xref: /linux/sound/soc/intel/boards/cht_bsw_max98090_ti.c (revision b7019ac550eb3916f34d79db583e9b7ea2524afa)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  *  cht-bsw-max98090.c - ASoc Machine driver for Intel Cherryview-based
4  *  platforms Cherrytrail and Braswell, with max98090 & TI codec.
5  *
6  *  Copyright (C) 2015 Intel Corp
7  *  Author: Fang, Yang A <yang.a.fang@intel.com>
8  *  This file is modified from cht_bsw_rt5645.c
9  *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10  *
11  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
12  */
13 
14 #include <linux/dmi.h>
15 #include <linux/module.h>
16 #include <linux/platform_device.h>
17 #include <linux/slab.h>
18 #include <linux/acpi.h>
19 #include <linux/clk.h>
20 #include <sound/pcm.h>
21 #include <sound/pcm_params.h>
22 #include <sound/soc.h>
23 #include <sound/soc-acpi.h>
24 #include <sound/jack.h>
25 #include "../../codecs/max98090.h"
26 #include "../atom/sst-atom-controls.h"
27 #include "../../codecs/ts3a227e.h"
28 
29 #define CHT_PLAT_CLK_3_HZ	19200000
30 #define CHT_CODEC_DAI	"HiFi"
31 
32 #define QUIRK_PMC_PLT_CLK_0				0x01
33 
34 struct cht_mc_private {
35 	struct clk *mclk;
36 	struct snd_soc_jack jack;
37 	bool ts3a227e_present;
38 	int quirks;
39 };
40 
41 static int platform_clock_control(struct snd_soc_dapm_widget *w,
42 					  struct snd_kcontrol *k, int  event)
43 {
44 	struct snd_soc_dapm_context *dapm = w->dapm;
45 	struct snd_soc_card *card = dapm->card;
46 	struct snd_soc_dai *codec_dai;
47 	struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
48 	int ret;
49 
50 	/* See the comment in snd_cht_mc_probe() */
51 	if (ctx->quirks & QUIRK_PMC_PLT_CLK_0)
52 		return 0;
53 
54 	codec_dai = snd_soc_card_get_codec_dai(card, CHT_CODEC_DAI);
55 	if (!codec_dai) {
56 		dev_err(card->dev, "Codec dai not found; Unable to set platform clock\n");
57 		return -EIO;
58 	}
59 
60 	if (SND_SOC_DAPM_EVENT_ON(event)) {
61 		ret = clk_prepare_enable(ctx->mclk);
62 		if (ret < 0) {
63 			dev_err(card->dev,
64 				"could not configure MCLK state");
65 			return ret;
66 		}
67 	} else {
68 		clk_disable_unprepare(ctx->mclk);
69 	}
70 
71 	return 0;
72 }
73 
74 static const struct snd_soc_dapm_widget cht_dapm_widgets[] = {
75 	SND_SOC_DAPM_HP("Headphone", NULL),
76 	SND_SOC_DAPM_MIC("Headset Mic", NULL),
77 	SND_SOC_DAPM_MIC("Int Mic", NULL),
78 	SND_SOC_DAPM_SPK("Ext Spk", NULL),
79 	SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
80 			    platform_clock_control, SND_SOC_DAPM_PRE_PMU |
81 			    SND_SOC_DAPM_POST_PMD),
82 };
83 
84 static const struct snd_soc_dapm_route cht_audio_map[] = {
85 	{"IN34", NULL, "Headset Mic"},
86 	{"Headset Mic", NULL, "MICBIAS"},
87 	{"DMICL", NULL, "Int Mic"},
88 	{"Headphone", NULL, "HPL"},
89 	{"Headphone", NULL, "HPR"},
90 	{"Ext Spk", NULL, "SPKL"},
91 	{"Ext Spk", NULL, "SPKR"},
92 	{"HiFi Playback", NULL, "ssp2 Tx"},
93 	{"ssp2 Tx", NULL, "codec_out0"},
94 	{"ssp2 Tx", NULL, "codec_out1"},
95 	{"codec_in0", NULL, "ssp2 Rx" },
96 	{"codec_in1", NULL, "ssp2 Rx" },
97 	{"ssp2 Rx", NULL, "HiFi Capture"},
98 	{"Headphone", NULL, "Platform Clock"},
99 	{"Headset Mic", NULL, "Platform Clock"},
100 	{"Int Mic", NULL, "Platform Clock"},
101 	{"Ext Spk", NULL, "Platform Clock"},
102 };
103 
104 static const struct snd_kcontrol_new cht_mc_controls[] = {
105 	SOC_DAPM_PIN_SWITCH("Headphone"),
106 	SOC_DAPM_PIN_SWITCH("Headset Mic"),
107 	SOC_DAPM_PIN_SWITCH("Int Mic"),
108 	SOC_DAPM_PIN_SWITCH("Ext Spk"),
109 };
110 
111 static int cht_aif1_hw_params(struct snd_pcm_substream *substream,
112 			     struct snd_pcm_hw_params *params)
113 {
114 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
115 	struct snd_soc_dai *codec_dai = rtd->codec_dai;
116 	int ret;
117 
118 	ret = snd_soc_dai_set_sysclk(codec_dai, M98090_REG_SYSTEM_CLOCK,
119 				     CHT_PLAT_CLK_3_HZ, SND_SOC_CLOCK_IN);
120 	if (ret < 0) {
121 		dev_err(rtd->dev, "can't set codec sysclk: %d\n", ret);
122 		return ret;
123 	}
124 
125 	return 0;
126 }
127 
128 static int cht_ti_jack_event(struct notifier_block *nb,
129 		unsigned long event, void *data)
130 {
131 	struct snd_soc_jack *jack = (struct snd_soc_jack *)data;
132 	struct snd_soc_dapm_context *dapm = &jack->card->dapm;
133 
134 	if (event & SND_JACK_MICROPHONE) {
135 		snd_soc_dapm_force_enable_pin(dapm, "SHDN");
136 		snd_soc_dapm_force_enable_pin(dapm, "MICBIAS");
137 		snd_soc_dapm_sync(dapm);
138 	} else {
139 		snd_soc_dapm_disable_pin(dapm, "MICBIAS");
140 		snd_soc_dapm_disable_pin(dapm, "SHDN");
141 		snd_soc_dapm_sync(dapm);
142 	}
143 
144 	return 0;
145 }
146 
147 static struct notifier_block cht_jack_nb = {
148 	.notifier_call = cht_ti_jack_event,
149 };
150 
151 static struct snd_soc_jack_pin hs_jack_pins[] = {
152 	{
153 		.pin	= "Headphone",
154 		.mask	= SND_JACK_HEADPHONE,
155 	},
156 	{
157 		.pin	= "Headset Mic",
158 		.mask	= SND_JACK_MICROPHONE,
159 	},
160 };
161 
162 static struct snd_soc_jack_gpio hs_jack_gpios[] = {
163 	{
164 		.name		= "hp",
165 		.report		= SND_JACK_HEADPHONE | SND_JACK_LINEOUT,
166 		.debounce_time	= 200,
167 	},
168 	{
169 		.name		= "mic",
170 		.invert		= 1,
171 		.report		= SND_JACK_MICROPHONE,
172 		.debounce_time	= 200,
173 	},
174 };
175 
176 static const struct acpi_gpio_params hp_gpios = { 0, 0, false };
177 static const struct acpi_gpio_params mic_gpios = { 1, 0, false };
178 
179 static const struct acpi_gpio_mapping acpi_max98090_gpios[] = {
180 	{ "hp-gpios", &hp_gpios, 1 },
181 	{ "mic-gpios", &mic_gpios, 1 },
182 	{},
183 };
184 
185 static int cht_codec_init(struct snd_soc_pcm_runtime *runtime)
186 {
187 	int ret;
188 	int jack_type;
189 	struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card);
190 	struct snd_soc_jack *jack = &ctx->jack;
191 
192 	if (ctx->ts3a227e_present) {
193 		/*
194 		 * The jack has already been created in the
195 		 * cht_max98090_headset_init() function.
196 		 */
197 		snd_soc_jack_notifier_register(jack, &cht_jack_nb);
198 		return 0;
199 	}
200 
201 	jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE;
202 
203 	ret = snd_soc_card_jack_new(runtime->card, "Headset Jack",
204 				    jack_type, jack,
205 				    hs_jack_pins, ARRAY_SIZE(hs_jack_pins));
206 	if (ret) {
207 		dev_err(runtime->dev, "Headset Jack creation failed %d\n", ret);
208 		return ret;
209 	}
210 
211 	ret = snd_soc_jack_add_gpiods(runtime->card->dev->parent, jack,
212 				      ARRAY_SIZE(hs_jack_gpios),
213 				      hs_jack_gpios);
214 	if (ret) {
215 		/*
216 		 * flag error but don't bail if jack detect is broken
217 		 * due to platform issues or bad BIOS/configuration
218 		 */
219 		dev_err(runtime->dev,
220 			"jack detection gpios not added, error %d\n", ret);
221 	}
222 
223 	/* See the comment in snd_cht_mc_probe() */
224 	if (ctx->quirks & QUIRK_PMC_PLT_CLK_0)
225 		return 0;
226 
227 	/*
228 	 * The firmware might enable the clock at
229 	 * boot (this information may or may not
230 	 * be reflected in the enable clock register).
231 	 * To change the rate we must disable the clock
232 	 * first to cover these cases. Due to common
233 	 * clock framework restrictions that do not allow
234 	 * to disable a clock that has not been enabled,
235 	 * we need to enable the clock first.
236 	 */
237 	ret = clk_prepare_enable(ctx->mclk);
238 	if (!ret)
239 		clk_disable_unprepare(ctx->mclk);
240 
241 	ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ);
242 
243 	if (ret)
244 		dev_err(runtime->dev, "unable to set MCLK rate\n");
245 
246 	return ret;
247 }
248 
249 static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd,
250 			    struct snd_pcm_hw_params *params)
251 {
252 	struct snd_interval *rate = hw_param_interval(params,
253 			SNDRV_PCM_HW_PARAM_RATE);
254 	struct snd_interval *channels = hw_param_interval(params,
255 						SNDRV_PCM_HW_PARAM_CHANNELS);
256 	int ret = 0;
257 	unsigned int fmt = 0;
258 
259 	ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2, 16);
260 	if (ret < 0) {
261 		dev_err(rtd->dev, "can't set cpu_dai slot fmt: %d\n", ret);
262 		return ret;
263 	}
264 
265 	fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
266 				| SND_SOC_DAIFMT_CBS_CFS;
267 
268 	ret = snd_soc_dai_set_fmt(rtd->cpu_dai, fmt);
269 	if (ret < 0) {
270 		dev_err(rtd->dev, "can't set cpu_dai set fmt: %d\n", ret);
271 		return ret;
272 	}
273 
274 	/* The DSP will covert the FE rate to 48k, stereo, 24bits */
275 	rate->min = rate->max = 48000;
276 	channels->min = channels->max = 2;
277 
278 	/* set SSP2 to 16-bit */
279 	params_set_format(params, SNDRV_PCM_FORMAT_S16_LE);
280 	return 0;
281 }
282 
283 static int cht_aif1_startup(struct snd_pcm_substream *substream)
284 {
285 	return snd_pcm_hw_constraint_single(substream->runtime,
286 			SNDRV_PCM_HW_PARAM_RATE, 48000);
287 }
288 
289 static int cht_max98090_headset_init(struct snd_soc_component *component)
290 {
291 	struct snd_soc_card *card = component->card;
292 	struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
293 	struct snd_soc_jack *jack = &ctx->jack;
294 	int jack_type;
295 	int ret;
296 
297 	/*
298 	 * TI supports 4 butons headset detection
299 	 * KEY_MEDIA
300 	 * KEY_VOICECOMMAND
301 	 * KEY_VOLUMEUP
302 	 * KEY_VOLUMEDOWN
303 	 */
304 	jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE |
305 		    SND_JACK_BTN_0 | SND_JACK_BTN_1 |
306 		    SND_JACK_BTN_2 | SND_JACK_BTN_3;
307 
308 	ret = snd_soc_card_jack_new(card, "Headset Jack", jack_type,
309 				    jack, NULL, 0);
310 	if (ret) {
311 		dev_err(card->dev, "Headset Jack creation failed %d\n", ret);
312 		return ret;
313 	}
314 
315 	return ts3a227e_enable_jack_detect(component, jack);
316 }
317 
318 static const struct snd_soc_ops cht_aif1_ops = {
319 	.startup = cht_aif1_startup,
320 };
321 
322 static const struct snd_soc_ops cht_be_ssp2_ops = {
323 	.hw_params = cht_aif1_hw_params,
324 };
325 
326 static struct snd_soc_aux_dev cht_max98090_headset_dev = {
327 	.name = "Headset Chip",
328 	.init = cht_max98090_headset_init,
329 	.codec_name = "i2c-104C227E:00",
330 };
331 
332 static struct snd_soc_dai_link cht_dailink[] = {
333 	[MERR_DPCM_AUDIO] = {
334 		.name = "Audio Port",
335 		.stream_name = "Audio",
336 		.cpu_dai_name = "media-cpu-dai",
337 		.codec_dai_name = "snd-soc-dummy-dai",
338 		.codec_name = "snd-soc-dummy",
339 		.platform_name = "sst-mfld-platform",
340 		.nonatomic = true,
341 		.dynamic = 1,
342 		.dpcm_playback = 1,
343 		.dpcm_capture = 1,
344 		.ops = &cht_aif1_ops,
345 	},
346 	[MERR_DPCM_DEEP_BUFFER] = {
347 		.name = "Deep-Buffer Audio Port",
348 		.stream_name = "Deep-Buffer Audio",
349 		.cpu_dai_name = "deepbuffer-cpu-dai",
350 		.codec_dai_name = "snd-soc-dummy-dai",
351 		.codec_name = "snd-soc-dummy",
352 		.platform_name = "sst-mfld-platform",
353 		.nonatomic = true,
354 		.dynamic = 1,
355 		.dpcm_playback = 1,
356 		.ops = &cht_aif1_ops,
357 	},
358 	/* back ends */
359 	{
360 		.name = "SSP2-Codec",
361 		.id = 0,
362 		.cpu_dai_name = "ssp2-port",
363 		.platform_name = "sst-mfld-platform",
364 		.no_pcm = 1,
365 		.codec_dai_name = "HiFi",
366 		.codec_name = "i2c-193C9890:00",
367 		.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
368 					| SND_SOC_DAIFMT_CBS_CFS,
369 		.init = cht_codec_init,
370 		.be_hw_params_fixup = cht_codec_fixup,
371 		.dpcm_playback = 1,
372 		.dpcm_capture = 1,
373 		.ops = &cht_be_ssp2_ops,
374 	},
375 };
376 
377 /* SoC card */
378 static struct snd_soc_card snd_soc_card_cht = {
379 	.name = "chtmax98090",
380 	.owner = THIS_MODULE,
381 	.dai_link = cht_dailink,
382 	.num_links = ARRAY_SIZE(cht_dailink),
383 	.aux_dev = &cht_max98090_headset_dev,
384 	.num_aux_devs = 1,
385 	.dapm_widgets = cht_dapm_widgets,
386 	.num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets),
387 	.dapm_routes = cht_audio_map,
388 	.num_dapm_routes = ARRAY_SIZE(cht_audio_map),
389 	.controls = cht_mc_controls,
390 	.num_controls = ARRAY_SIZE(cht_mc_controls),
391 };
392 
393 static const struct dmi_system_id cht_max98090_quirk_table[] = {
394 	{
395 		/* Clapper model Chromebook */
396 		.matches = {
397 			DMI_MATCH(DMI_PRODUCT_NAME, "Clapper"),
398 		},
399 		.driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
400 	},
401 	{
402 		/* Gnawty model Chromebook (Acer Chromebook CB3-111) */
403 		.matches = {
404 			DMI_MATCH(DMI_PRODUCT_NAME, "Gnawty"),
405 		},
406 		.driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
407 	},
408 	{
409 		/* Swanky model Chromebook (Toshiba Chromebook 2) */
410 		.matches = {
411 			DMI_MATCH(DMI_PRODUCT_NAME, "Swanky"),
412 		},
413 		.driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
414 	},
415 	{}
416 };
417 
418 static int snd_cht_mc_probe(struct platform_device *pdev)
419 {
420 	const struct dmi_system_id *dmi_id;
421 	struct device *dev = &pdev->dev;
422 	int ret_val = 0;
423 	struct cht_mc_private *drv;
424 	const char *mclk_name;
425 	struct snd_soc_acpi_mach *mach;
426 	const char *platform_name;
427 
428 	drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL);
429 	if (!drv)
430 		return -ENOMEM;
431 
432 	dmi_id = dmi_first_match(cht_max98090_quirk_table);
433 	if (dmi_id)
434 		drv->quirks = (unsigned long)dmi_id->driver_data;
435 
436 	drv->ts3a227e_present = acpi_dev_found("104C227E");
437 	if (!drv->ts3a227e_present) {
438 		/* no need probe TI jack detection chip */
439 		snd_soc_card_cht.aux_dev = NULL;
440 		snd_soc_card_cht.num_aux_devs = 0;
441 
442 		ret_val = devm_acpi_dev_add_driver_gpios(dev->parent,
443 							 acpi_max98090_gpios);
444 		if (ret_val)
445 			dev_dbg(dev, "Unable to add GPIO mapping table\n");
446 	}
447 
448 	/* override plaform name, if required */
449 	snd_soc_card_cht.dev = &pdev->dev;
450 	mach = (&pdev->dev)->platform_data;
451 	platform_name = mach->mach_params.platform;
452 
453 	ret_val = snd_soc_fixup_dai_links_platform_name(&snd_soc_card_cht,
454 							platform_name);
455 	if (ret_val)
456 		return ret_val;
457 
458 	/* register the soc card */
459 	snd_soc_card_set_drvdata(&snd_soc_card_cht, drv);
460 
461 	if (drv->quirks & QUIRK_PMC_PLT_CLK_0)
462 		mclk_name = "pmc_plt_clk_0";
463 	else
464 		mclk_name = "pmc_plt_clk_3";
465 
466 	drv->mclk = devm_clk_get(&pdev->dev, mclk_name);
467 	if (IS_ERR(drv->mclk)) {
468 		dev_err(&pdev->dev,
469 			"Failed to get MCLK from %s: %ld\n",
470 			mclk_name, PTR_ERR(drv->mclk));
471 		return PTR_ERR(drv->mclk);
472 	}
473 
474 	/*
475 	 * Boards which have the MAX98090's clk connected to clk_0 do not seem
476 	 * to like it if we muck with the clock. If we disable the clock when
477 	 * it is unused we get "max98090 i2c-193C9890:00: PLL unlocked" errors
478 	 * and the PLL never seems to lock again.
479 	 * So for these boards we enable it here once and leave it at that.
480 	 */
481 	if (drv->quirks & QUIRK_PMC_PLT_CLK_0) {
482 		ret_val = clk_prepare_enable(drv->mclk);
483 		if (ret_val < 0) {
484 			dev_err(&pdev->dev, "MCLK enable error: %d\n", ret_val);
485 			return ret_val;
486 		}
487 	}
488 
489 	ret_val = devm_snd_soc_register_card(&pdev->dev, &snd_soc_card_cht);
490 	if (ret_val) {
491 		dev_err(&pdev->dev,
492 			"snd_soc_register_card failed %d\n", ret_val);
493 		return ret_val;
494 	}
495 	platform_set_drvdata(pdev, &snd_soc_card_cht);
496 	return ret_val;
497 }
498 
499 static int snd_cht_mc_remove(struct platform_device *pdev)
500 {
501 	struct snd_soc_card *card = platform_get_drvdata(pdev);
502 	struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
503 
504 	if (ctx->quirks & QUIRK_PMC_PLT_CLK_0)
505 		clk_disable_unprepare(ctx->mclk);
506 
507 	return 0;
508 }
509 
510 static struct platform_driver snd_cht_mc_driver = {
511 	.driver = {
512 		.name = "cht-bsw-max98090",
513 	},
514 	.probe = snd_cht_mc_probe,
515 	.remove = snd_cht_mc_remove,
516 };
517 
518 module_platform_driver(snd_cht_mc_driver)
519 
520 MODULE_DESCRIPTION("ASoC Intel(R) Braswell Machine driver");
521 MODULE_AUTHOR("Fang, Yang A <yang.a.fang@intel.com>");
522 MODULE_LICENSE("GPL v2");
523 MODULE_ALIAS("platform:cht-bsw-max98090");
524