xref: /linux/sound/soc/intel/boards/bytcr_rt5651.c (revision bfd5bb6f90af092aa345b15cd78143956a13c2a8)
1 /*
2  *  bytcr_rt5651.c - ASoc Machine driver for Intel Byt CR platform
3  *  (derived from bytcr_rt5640.c)
4  *
5  *  Copyright (C) 2015 Intel Corp
6  *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
7  *
8  *  This program is free software; you can redistribute it and/or modify
9  *  it under the terms of the GNU General Public License as published by
10  *  the Free Software Foundation; version 2 of the License.
11  *
12  *  This program is distributed in the hope that it will be useful, but
13  *  WITHOUT ANY WARRANTY; without even the implied warranty of
14  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  *  General Public License for more details.
16  *
17  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
18  */
19 
20 #include <linux/init.h>
21 #include <linux/i2c.h>
22 #include <linux/module.h>
23 #include <linux/platform_device.h>
24 #include <linux/property.h>
25 #include <linux/acpi.h>
26 #include <linux/clk.h>
27 #include <linux/device.h>
28 #include <linux/dmi.h>
29 #include <linux/slab.h>
30 #include <asm/cpu_device_id.h>
31 #include <asm/platform_sst_audio.h>
32 #include <sound/pcm.h>
33 #include <sound/pcm_params.h>
34 #include <sound/soc.h>
35 #include <sound/jack.h>
36 #include <sound/soc-acpi.h>
37 #include "../../codecs/rt5651.h"
38 #include "../atom/sst-atom-controls.h"
39 
40 enum {
41 	BYT_RT5651_DMIC_MAP,
42 	BYT_RT5651_IN1_MAP,
43 	BYT_RT5651_IN2_MAP,
44 	BYT_RT5651_IN1_IN2_MAP,
45 	BYT_RT5651_IN1_HS_IN3_MAP,
46 	BYT_RT5651_IN2_HS_IN3_MAP,
47 };
48 
49 enum {
50 	BYT_RT5651_JD_NULL	= (RT5651_JD_NULL << 4),
51 	BYT_RT5651_JD1_1	= (RT5651_JD1_1 << 4),
52 	BYT_RT5651_JD1_2	= (RT5651_JD1_2 << 4),
53 	BYT_RT5651_JD2		= (RT5651_JD2 << 4),
54 };
55 
56 enum {
57 	BYT_RT5651_OVCD_TH_600UA  = (6 << 8),
58 	BYT_RT5651_OVCD_TH_1500UA = (15 << 8),
59 	BYT_RT5651_OVCD_TH_2000UA = (20 << 8),
60 };
61 
62 enum {
63 	BYT_RT5651_OVCD_SF_0P5	= (RT5651_OVCD_SF_0P5 << 13),
64 	BYT_RT5651_OVCD_SF_0P75	= (RT5651_OVCD_SF_0P75 << 13),
65 	BYT_RT5651_OVCD_SF_1P0	= (RT5651_OVCD_SF_1P0 << 13),
66 	BYT_RT5651_OVCD_SF_1P5	= (RT5651_OVCD_SF_1P5 << 13),
67 };
68 
69 #define BYT_RT5651_MAP(quirk)		((quirk) & GENMASK(3, 0))
70 #define BYT_RT5651_JDSRC(quirk)		(((quirk) & GENMASK(7, 4)) >> 4)
71 #define BYT_RT5651_OVCD_TH(quirk)	(((quirk) & GENMASK(12, 8)) >> 8)
72 #define BYT_RT5651_OVCD_SF(quirk)	(((quirk) & GENMASK(14, 13)) >> 13)
73 #define BYT_RT5651_DMIC_EN		BIT(16)
74 #define BYT_RT5651_MCLK_EN		BIT(17)
75 #define BYT_RT5651_MCLK_25MHZ		BIT(18)
76 #define BYT_RT5651_SSP2_AIF2		BIT(19) /* default is using AIF1  */
77 #define BYT_RT5651_SSP0_AIF1		BIT(20)
78 #define BYT_RT5651_SSP0_AIF2		BIT(21)
79 
80 /* jack-detect-source + dmic-en + ovcd-th + -sf + terminating empty entry */
81 #define MAX_NO_PROPS 5
82 
83 struct byt_rt5651_private {
84 	struct clk *mclk;
85 	struct snd_soc_jack jack;
86 };
87 
88 /* Default: jack-detect on JD1_1, internal mic on in2, headsetmic on in3 */
89 static unsigned long byt_rt5651_quirk = BYT_RT5651_MCLK_EN |
90 					BYT_RT5651_JD1_1 |
91 					BYT_RT5651_OVCD_TH_2000UA |
92 					BYT_RT5651_OVCD_SF_0P75 |
93 					BYT_RT5651_IN2_HS_IN3_MAP;
94 
95 static void log_quirks(struct device *dev)
96 {
97 	if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_DMIC_MAP)
98 		dev_info(dev, "quirk DMIC_MAP enabled");
99 	if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN1_MAP)
100 		dev_info(dev, "quirk IN1_MAP enabled");
101 	if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN2_MAP)
102 		dev_info(dev, "quirk IN2_MAP enabled");
103 	if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN1_HS_IN3_MAP)
104 		dev_info(dev, "quirk IN1_HS_IN3_MAP enabled");
105 	if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN2_HS_IN3_MAP)
106 		dev_info(dev, "quirk IN2_HS_IN3_MAP enabled");
107 	if (BYT_RT5651_JDSRC(byt_rt5651_quirk)) {
108 		dev_info(dev, "quirk realtek,jack-detect-source %ld\n",
109 			 BYT_RT5651_JDSRC(byt_rt5651_quirk));
110 		dev_info(dev, "quirk realtek,over-current-threshold-microamp %ld\n",
111 			 BYT_RT5651_OVCD_TH(byt_rt5651_quirk) * 100);
112 		dev_info(dev, "quirk realtek,over-current-scale-factor %ld\n",
113 			 BYT_RT5651_OVCD_SF(byt_rt5651_quirk));
114 	}
115 	if (byt_rt5651_quirk & BYT_RT5651_DMIC_EN)
116 		dev_info(dev, "quirk DMIC enabled");
117 	if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
118 		dev_info(dev, "quirk MCLK_EN enabled");
119 	if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
120 		dev_info(dev, "quirk MCLK_25MHZ enabled");
121 	if (byt_rt5651_quirk & BYT_RT5651_SSP2_AIF2)
122 		dev_info(dev, "quirk SSP2_AIF2 enabled\n");
123 	if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1)
124 		dev_info(dev, "quirk SSP0_AIF1 enabled\n");
125 	if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)
126 		dev_info(dev, "quirk SSP0_AIF2 enabled\n");
127 }
128 
129 #define BYT_CODEC_DAI1	"rt5651-aif1"
130 #define BYT_CODEC_DAI2	"rt5651-aif2"
131 
132 static int byt_rt5651_prepare_and_enable_pll1(struct snd_soc_dai *codec_dai,
133 					      int rate, int bclk_ratio)
134 {
135 	int clk_id, clk_freq, ret;
136 
137 	/* Configure the PLL before selecting it */
138 	if (!(byt_rt5651_quirk & BYT_RT5651_MCLK_EN)) {
139 		clk_id = RT5651_PLL1_S_BCLK1,
140 		clk_freq = rate * bclk_ratio;
141 	} else {
142 		clk_id = RT5651_PLL1_S_MCLK;
143 		if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
144 			clk_freq = 25000000;
145 		else
146 			clk_freq = 19200000;
147 	}
148 	ret = snd_soc_dai_set_pll(codec_dai, 0, clk_id, clk_freq, rate * 512);
149 	if (ret < 0) {
150 		dev_err(codec_dai->component->dev, "can't set pll: %d\n", ret);
151 		return ret;
152 	}
153 
154 	ret = snd_soc_dai_set_sysclk(codec_dai, RT5651_SCLK_S_PLL1,
155 				     rate * 512, SND_SOC_CLOCK_IN);
156 	if (ret < 0) {
157 		dev_err(codec_dai->component->dev, "can't set clock %d\n", ret);
158 		return ret;
159 	}
160 
161 	return 0;
162 }
163 
164 static int platform_clock_control(struct snd_soc_dapm_widget *w,
165 				  struct snd_kcontrol *k, int  event)
166 {
167 	struct snd_soc_dapm_context *dapm = w->dapm;
168 	struct snd_soc_card *card = dapm->card;
169 	struct snd_soc_dai *codec_dai;
170 	struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);
171 	int ret;
172 
173 	codec_dai = snd_soc_card_get_codec_dai(card, BYT_CODEC_DAI1);
174 	if (!codec_dai)
175 		codec_dai = snd_soc_card_get_codec_dai(card, BYT_CODEC_DAI2);
176 	if (!codec_dai) {
177 		dev_err(card->dev,
178 			"Codec dai not found; Unable to set platform clock\n");
179 		return -EIO;
180 	}
181 
182 	if (SND_SOC_DAPM_EVENT_ON(event)) {
183 		if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
184 			ret = clk_prepare_enable(priv->mclk);
185 			if (ret < 0) {
186 				dev_err(card->dev,
187 					"could not configure MCLK state");
188 				return ret;
189 			}
190 		}
191 		ret = byt_rt5651_prepare_and_enable_pll1(codec_dai, 48000, 50);
192 	} else {
193 		/*
194 		 * Set codec clock source to internal clock before
195 		 * turning off the platform clock. Codec needs clock
196 		 * for Jack detection and button press
197 		 */
198 		ret = snd_soc_dai_set_sysclk(codec_dai, RT5651_SCLK_S_RCCLK,
199 					     48000 * 512,
200 					     SND_SOC_CLOCK_IN);
201 		if (!ret)
202 			if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
203 				clk_disable_unprepare(priv->mclk);
204 	}
205 
206 	if (ret < 0) {
207 		dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
208 		return ret;
209 	}
210 
211 	return 0;
212 }
213 
214 static const struct snd_soc_dapm_widget byt_rt5651_widgets[] = {
215 	SND_SOC_DAPM_HP("Headphone", NULL),
216 	SND_SOC_DAPM_MIC("Headset Mic", NULL),
217 	SND_SOC_DAPM_MIC("Internal Mic", NULL),
218 	SND_SOC_DAPM_SPK("Speaker", NULL),
219 	SND_SOC_DAPM_LINE("Line In", NULL),
220 	SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
221 			    platform_clock_control, SND_SOC_DAPM_PRE_PMU |
222 			    SND_SOC_DAPM_POST_PMD),
223 
224 };
225 
226 static const struct snd_soc_dapm_route byt_rt5651_audio_map[] = {
227 	{"Headphone", NULL, "Platform Clock"},
228 	{"Headset Mic", NULL, "Platform Clock"},
229 	{"Internal Mic", NULL, "Platform Clock"},
230 	{"Speaker", NULL, "Platform Clock"},
231 	{"Line In", NULL, "Platform Clock"},
232 
233 	{"Headset Mic", NULL, "micbias1"}, /* lowercase for rt5651 */
234 	{"Headphone", NULL, "HPOL"},
235 	{"Headphone", NULL, "HPOR"},
236 	{"Speaker", NULL, "LOUTL"},
237 	{"Speaker", NULL, "LOUTR"},
238 	{"IN2P", NULL, "Line In"},
239 	{"IN2N", NULL, "Line In"},
240 
241 };
242 
243 static const struct snd_soc_dapm_route byt_rt5651_intmic_dmic_map[] = {
244 	{"IN2P", NULL, "Headset Mic"},
245 	{"DMIC L1", NULL, "Internal Mic"},
246 	{"DMIC R1", NULL, "Internal Mic"},
247 };
248 
249 static const struct snd_soc_dapm_route byt_rt5651_intmic_in1_map[] = {
250 	{"Internal Mic", NULL, "micbias1"},
251 	{"IN1P", NULL, "Internal Mic"},
252 	{"IN2P", NULL, "Headset Mic"},
253 };
254 
255 static const struct snd_soc_dapm_route byt_rt5651_intmic_in2_map[] = {
256 	{"Internal Mic", NULL, "micbias1"},
257 	{"IN1P", NULL, "Headset Mic"},
258 	{"IN2P", NULL, "Internal Mic"},
259 };
260 
261 static const struct snd_soc_dapm_route byt_rt5651_intmic_in1_in2_map[] = {
262 	{"Internal Mic", NULL, "micbias1"},
263 	{"IN1P", NULL, "Internal Mic"},
264 	{"IN2P", NULL, "Internal Mic"},
265 	{"IN3P", NULL, "Headset Mic"},
266 };
267 
268 static const struct snd_soc_dapm_route byt_rt5651_intmic_in1_hs_in3_map[] = {
269 	{"Internal Mic", NULL, "micbias1"},
270 	{"IN1P", NULL, "Internal Mic"},
271 	{"IN3P", NULL, "Headset Mic"},
272 };
273 
274 static const struct snd_soc_dapm_route byt_rt5651_intmic_in2_hs_in3_map[] = {
275 	{"Internal Mic", NULL, "micbias1"},
276 	{"IN2P", NULL, "Internal Mic"},
277 	{"IN3P", NULL, "Headset Mic"},
278 };
279 
280 static const struct snd_soc_dapm_route byt_rt5651_ssp0_aif1_map[] = {
281 	{"ssp0 Tx", NULL, "modem_out"},
282 	{"modem_in", NULL, "ssp0 Rx"},
283 
284 	{"AIF1 Playback", NULL, "ssp0 Tx"},
285 	{"ssp0 Rx", NULL, "AIF1 Capture"},
286 };
287 
288 static const struct snd_soc_dapm_route byt_rt5651_ssp0_aif2_map[] = {
289 	{"ssp0 Tx", NULL, "modem_out"},
290 	{"modem_in", NULL, "ssp0 Rx"},
291 
292 	{"AIF2 Playback", NULL, "ssp0 Tx"},
293 	{"ssp0 Rx", NULL, "AIF2 Capture"},
294 };
295 
296 static const struct snd_soc_dapm_route byt_rt5651_ssp2_aif1_map[] = {
297 	{"ssp2 Tx", NULL, "codec_out0"},
298 	{"ssp2 Tx", NULL, "codec_out1"},
299 	{"codec_in0", NULL, "ssp2 Rx"},
300 	{"codec_in1", NULL, "ssp2 Rx"},
301 
302 	{"AIF1 Playback", NULL, "ssp2 Tx"},
303 	{"ssp2 Rx", NULL, "AIF1 Capture"},
304 };
305 
306 static const struct snd_soc_dapm_route byt_rt5651_ssp2_aif2_map[] = {
307 	{"ssp2 Tx", NULL, "codec_out0"},
308 	{"ssp2 Tx", NULL, "codec_out1"},
309 	{"codec_in0", NULL, "ssp2 Rx"},
310 	{"codec_in1", NULL, "ssp2 Rx"},
311 
312 	{"AIF2 Playback", NULL, "ssp2 Tx"},
313 	{"ssp2 Rx", NULL, "AIF2 Capture"},
314 };
315 
316 static const struct snd_kcontrol_new byt_rt5651_controls[] = {
317 	SOC_DAPM_PIN_SWITCH("Headphone"),
318 	SOC_DAPM_PIN_SWITCH("Headset Mic"),
319 	SOC_DAPM_PIN_SWITCH("Internal Mic"),
320 	SOC_DAPM_PIN_SWITCH("Speaker"),
321 	SOC_DAPM_PIN_SWITCH("Line In"),
322 };
323 
324 static struct snd_soc_jack_pin bytcr_jack_pins[] = {
325 	{
326 		.pin	= "Headphone",
327 		.mask	= SND_JACK_HEADPHONE,
328 	},
329 	{
330 		.pin	= "Headset Mic",
331 		.mask	= SND_JACK_MICROPHONE,
332 	},
333 };
334 
335 static int byt_rt5651_aif1_hw_params(struct snd_pcm_substream *substream,
336 					struct snd_pcm_hw_params *params)
337 {
338 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
339 	struct snd_soc_dai *codec_dai = rtd->codec_dai;
340 	snd_pcm_format_t format = params_format(params);
341 	int rate = params_rate(params);
342 	int bclk_ratio;
343 
344 	if (format == SNDRV_PCM_FORMAT_S16_LE)
345 		bclk_ratio = 32;
346 	else
347 		bclk_ratio = 50;
348 
349 	return byt_rt5651_prepare_and_enable_pll1(codec_dai, rate, bclk_ratio);
350 }
351 
352 static int byt_rt5651_quirk_cb(const struct dmi_system_id *id)
353 {
354 	byt_rt5651_quirk = (unsigned long)id->driver_data;
355 	return 1;
356 }
357 
358 static const struct dmi_system_id byt_rt5651_quirk_table[] = {
359 	{
360 		.callback = byt_rt5651_quirk_cb,
361 		.matches = {
362 			DMI_MATCH(DMI_SYS_VENDOR, "Circuitco"),
363 			DMI_MATCH(DMI_PRODUCT_NAME, "Minnowboard Max B3 PLATFORM"),
364 		},
365 		.driver_data = (void *)(BYT_RT5651_IN1_HS_IN3_MAP),
366 	},
367 	{
368 		.callback = byt_rt5651_quirk_cb,
369 		.matches = {
370 			DMI_MATCH(DMI_SYS_VENDOR, "ADI"),
371 			DMI_MATCH(DMI_PRODUCT_NAME, "Minnowboard Turbot"),
372 		},
373 		.driver_data = (void *)(BYT_RT5651_MCLK_EN |
374 					BYT_RT5651_IN1_HS_IN3_MAP),
375 	},
376 	{
377 		.callback = byt_rt5651_quirk_cb,
378 		.matches = {
379 			DMI_MATCH(DMI_SYS_VENDOR, "KIANO"),
380 			DMI_MATCH(DMI_PRODUCT_NAME, "KIANO SlimNote 14.2"),
381 		},
382 		.driver_data = (void *)(BYT_RT5651_MCLK_EN |
383 					BYT_RT5651_JD1_1 |
384 					BYT_RT5651_OVCD_TH_2000UA |
385 					BYT_RT5651_OVCD_SF_0P75 |
386 					BYT_RT5651_IN1_IN2_MAP),
387 	},
388 	{
389 		/* Chuwi Vi8 Plus (CWI519) */
390 		.callback = byt_rt5651_quirk_cb,
391 		.matches = {
392 			DMI_MATCH(DMI_SYS_VENDOR, "Hampoo"),
393 			DMI_MATCH(DMI_PRODUCT_NAME, "D2D3_Vi8A1"),
394 		},
395 		.driver_data = (void *)(BYT_RT5651_MCLK_EN |
396 					BYT_RT5651_JD1_1 |
397 					BYT_RT5651_OVCD_TH_2000UA |
398 					BYT_RT5651_OVCD_SF_0P75 |
399 					BYT_RT5651_IN2_HS_IN3_MAP),
400 	},
401 	{
402 		/* VIOS LTH17 */
403 		.callback = byt_rt5651_quirk_cb,
404 		.matches = {
405 			DMI_MATCH(DMI_SYS_VENDOR, "VIOS"),
406 			DMI_MATCH(DMI_PRODUCT_NAME, "LTH17"),
407 		},
408 		.driver_data = (void *)(BYT_RT5651_MCLK_EN |
409 					BYT_RT5651_JD1_1 |
410 					BYT_RT5651_OVCD_TH_2000UA |
411 					BYT_RT5651_OVCD_SF_1P0 |
412 					BYT_RT5651_IN1_IN2_MAP),
413 	},
414 	{}
415 };
416 
417 /*
418  * Note this MUST be called before snd_soc_register_card(), so that the props
419  * are in place before the codec component driver's probe function parses them.
420  */
421 static int byt_rt5651_add_codec_device_props(const char *i2c_dev_name)
422 {
423 	struct property_entry props[MAX_NO_PROPS] = {};
424 	struct device *i2c_dev;
425 	int ret, cnt = 0;
426 
427 	i2c_dev = bus_find_device_by_name(&i2c_bus_type, NULL, i2c_dev_name);
428 	if (!i2c_dev)
429 		return -EPROBE_DEFER;
430 
431 	props[cnt++] = PROPERTY_ENTRY_U32("realtek,jack-detect-source",
432 				BYT_RT5651_JDSRC(byt_rt5651_quirk));
433 
434 	props[cnt++] = PROPERTY_ENTRY_U32("realtek,over-current-threshold-microamp",
435 				BYT_RT5651_OVCD_TH(byt_rt5651_quirk) * 100);
436 
437 	props[cnt++] = PROPERTY_ENTRY_U32("realtek,over-current-scale-factor",
438 				BYT_RT5651_OVCD_SF(byt_rt5651_quirk));
439 
440 	if (byt_rt5651_quirk & BYT_RT5651_DMIC_EN)
441 		props[cnt++] = PROPERTY_ENTRY_BOOL("realtek,dmic-en");
442 
443 	ret = device_add_properties(i2c_dev, props);
444 	put_device(i2c_dev);
445 
446 	return ret;
447 }
448 
449 static int byt_rt5651_init(struct snd_soc_pcm_runtime *runtime)
450 {
451 	struct snd_soc_card *card = runtime->card;
452 	struct snd_soc_component *codec = runtime->codec_dai->component;
453 	struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);
454 	const struct snd_soc_dapm_route *custom_map;
455 	int num_routes;
456 	int ret;
457 
458 	card->dapm.idle_bias_off = true;
459 
460 	/* Start with RC clk for jack-detect (we disable MCLK below) */
461 	if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
462 		snd_soc_component_update_bits(codec, RT5651_GLB_CLK,
463 			RT5651_SCLK_SRC_MASK, RT5651_SCLK_SRC_RCCLK);
464 
465 	switch (BYT_RT5651_MAP(byt_rt5651_quirk)) {
466 	case BYT_RT5651_IN1_MAP:
467 		custom_map = byt_rt5651_intmic_in1_map;
468 		num_routes = ARRAY_SIZE(byt_rt5651_intmic_in1_map);
469 		break;
470 	case BYT_RT5651_IN2_MAP:
471 		custom_map = byt_rt5651_intmic_in2_map;
472 		num_routes = ARRAY_SIZE(byt_rt5651_intmic_in2_map);
473 		break;
474 	case BYT_RT5651_IN1_IN2_MAP:
475 		custom_map = byt_rt5651_intmic_in1_in2_map;
476 		num_routes = ARRAY_SIZE(byt_rt5651_intmic_in1_in2_map);
477 		break;
478 	case BYT_RT5651_IN1_HS_IN3_MAP:
479 		custom_map = byt_rt5651_intmic_in1_hs_in3_map;
480 		num_routes = ARRAY_SIZE(byt_rt5651_intmic_in1_hs_in3_map);
481 		break;
482 	case BYT_RT5651_IN2_HS_IN3_MAP:
483 		custom_map = byt_rt5651_intmic_in2_hs_in3_map;
484 		num_routes = ARRAY_SIZE(byt_rt5651_intmic_in2_hs_in3_map);
485 		break;
486 	default:
487 		custom_map = byt_rt5651_intmic_dmic_map;
488 		num_routes = ARRAY_SIZE(byt_rt5651_intmic_dmic_map);
489 	}
490 	ret = snd_soc_dapm_add_routes(&card->dapm, custom_map, num_routes);
491 	if (ret)
492 		return ret;
493 
494 	if (byt_rt5651_quirk & BYT_RT5651_SSP2_AIF2) {
495 		ret = snd_soc_dapm_add_routes(&card->dapm,
496 					byt_rt5651_ssp2_aif2_map,
497 					ARRAY_SIZE(byt_rt5651_ssp2_aif2_map));
498 	} else if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) {
499 		ret = snd_soc_dapm_add_routes(&card->dapm,
500 					byt_rt5651_ssp0_aif1_map,
501 					ARRAY_SIZE(byt_rt5651_ssp0_aif1_map));
502 	} else if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2) {
503 		ret = snd_soc_dapm_add_routes(&card->dapm,
504 					byt_rt5651_ssp0_aif2_map,
505 					ARRAY_SIZE(byt_rt5651_ssp0_aif2_map));
506 	} else {
507 		ret = snd_soc_dapm_add_routes(&card->dapm,
508 					byt_rt5651_ssp2_aif1_map,
509 					ARRAY_SIZE(byt_rt5651_ssp2_aif1_map));
510 	}
511 	if (ret)
512 		return ret;
513 
514 	ret = snd_soc_add_card_controls(card, byt_rt5651_controls,
515 					ARRAY_SIZE(byt_rt5651_controls));
516 	if (ret) {
517 		dev_err(card->dev, "unable to add card controls\n");
518 		return ret;
519 	}
520 	snd_soc_dapm_ignore_suspend(&card->dapm, "Headphone");
521 	snd_soc_dapm_ignore_suspend(&card->dapm, "Speaker");
522 
523 	if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
524 		/*
525 		 * The firmware might enable the clock at
526 		 * boot (this information may or may not
527 		 * be reflected in the enable clock register).
528 		 * To change the rate we must disable the clock
529 		 * first to cover these cases. Due to common
530 		 * clock framework restrictions that do not allow
531 		 * to disable a clock that has not been enabled,
532 		 * we need to enable the clock first.
533 		 */
534 		ret = clk_prepare_enable(priv->mclk);
535 		if (!ret)
536 			clk_disable_unprepare(priv->mclk);
537 
538 		if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
539 			ret = clk_set_rate(priv->mclk, 25000000);
540 		else
541 			ret = clk_set_rate(priv->mclk, 19200000);
542 
543 		if (ret)
544 			dev_err(card->dev, "unable to set MCLK rate\n");
545 	}
546 
547 	if (BYT_RT5651_JDSRC(byt_rt5651_quirk)) {
548 		ret = snd_soc_card_jack_new(runtime->card, "Headset",
549 				    SND_JACK_HEADSET, &priv->jack,
550 				    bytcr_jack_pins, ARRAY_SIZE(bytcr_jack_pins));
551 		if (ret) {
552 			dev_err(runtime->dev, "jack creation failed %d\n", ret);
553 			return ret;
554 		}
555 
556 		ret = snd_soc_component_set_jack(codec, &priv->jack, NULL);
557 		if (ret)
558 			return ret;
559 	}
560 
561 	return 0;
562 }
563 
564 static const struct snd_soc_pcm_stream byt_rt5651_dai_params = {
565 	.formats = SNDRV_PCM_FMTBIT_S24_LE,
566 	.rate_min = 48000,
567 	.rate_max = 48000,
568 	.channels_min = 2,
569 	.channels_max = 2,
570 };
571 
572 static int byt_rt5651_codec_fixup(struct snd_soc_pcm_runtime *rtd,
573 			    struct snd_pcm_hw_params *params)
574 {
575 	struct snd_interval *rate = hw_param_interval(params,
576 			SNDRV_PCM_HW_PARAM_RATE);
577 	struct snd_interval *channels = hw_param_interval(params,
578 						SNDRV_PCM_HW_PARAM_CHANNELS);
579 	int ret, bits;
580 
581 	/* The DSP will covert the FE rate to 48k, stereo */
582 	rate->min = rate->max = 48000;
583 	channels->min = channels->max = 2;
584 
585 	if ((byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) ||
586 	    (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)) {
587 		/* set SSP0 to 16-bit */
588 		params_set_format(params, SNDRV_PCM_FORMAT_S16_LE);
589 		bits = 16;
590 	} else {
591 		/* set SSP2 to 24-bit */
592 		params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
593 		bits = 24;
594 	}
595 
596 	/*
597 	 * Default mode for SSP configuration is TDM 4 slot, override config
598 	 * with explicit setting to I2S 2ch. The word length is set with
599 	 * dai_set_tdm_slot() since there is no other API exposed
600 	 */
601 	ret = snd_soc_dai_set_fmt(rtd->cpu_dai,
602 				  SND_SOC_DAIFMT_I2S     |
603 				  SND_SOC_DAIFMT_NB_NF   |
604 				  SND_SOC_DAIFMT_CBS_CFS
605 				  );
606 
607 	if (ret < 0) {
608 		dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
609 		return ret;
610 	}
611 
612 	ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2, bits);
613 	if (ret < 0) {
614 		dev_err(rtd->dev, "can't set I2S config, err %d\n", ret);
615 		return ret;
616 	}
617 
618 	return 0;
619 }
620 
621 static const unsigned int rates_48000[] = {
622 	48000,
623 };
624 
625 static const struct snd_pcm_hw_constraint_list constraints_48000 = {
626 	.count = ARRAY_SIZE(rates_48000),
627 	.list  = rates_48000,
628 };
629 
630 static int byt_rt5651_aif1_startup(struct snd_pcm_substream *substream)
631 {
632 	return snd_pcm_hw_constraint_list(substream->runtime, 0,
633 			SNDRV_PCM_HW_PARAM_RATE,
634 			&constraints_48000);
635 }
636 
637 static const struct snd_soc_ops byt_rt5651_aif1_ops = {
638 	.startup = byt_rt5651_aif1_startup,
639 };
640 
641 static const struct snd_soc_ops byt_rt5651_be_ssp2_ops = {
642 	.hw_params = byt_rt5651_aif1_hw_params,
643 };
644 
645 static struct snd_soc_dai_link byt_rt5651_dais[] = {
646 	[MERR_DPCM_AUDIO] = {
647 		.name = "Audio Port",
648 		.stream_name = "Audio",
649 		.cpu_dai_name = "media-cpu-dai",
650 		.codec_dai_name = "snd-soc-dummy-dai",
651 		.codec_name = "snd-soc-dummy",
652 		.platform_name = "sst-mfld-platform",
653 		.nonatomic = true,
654 		.dynamic = 1,
655 		.dpcm_playback = 1,
656 		.dpcm_capture = 1,
657 		.ops = &byt_rt5651_aif1_ops,
658 	},
659 	[MERR_DPCM_DEEP_BUFFER] = {
660 		.name = "Deep-Buffer Audio Port",
661 		.stream_name = "Deep-Buffer Audio",
662 		.cpu_dai_name = "deepbuffer-cpu-dai",
663 		.codec_dai_name = "snd-soc-dummy-dai",
664 		.codec_name = "snd-soc-dummy",
665 		.platform_name = "sst-mfld-platform",
666 		.nonatomic = true,
667 		.dynamic = 1,
668 		.dpcm_playback = 1,
669 		.ops = &byt_rt5651_aif1_ops,
670 	},
671 	/* CODEC<->CODEC link */
672 	/* back ends */
673 	{
674 		.name = "SSP2-Codec",
675 		.id = 0,
676 		.cpu_dai_name = "ssp2-port",
677 		.platform_name = "sst-mfld-platform",
678 		.no_pcm = 1,
679 		.codec_dai_name = "rt5651-aif1",
680 		.codec_name = "i2c-10EC5651:00",
681 		.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
682 						| SND_SOC_DAIFMT_CBS_CFS,
683 		.be_hw_params_fixup = byt_rt5651_codec_fixup,
684 		.ignore_suspend = 1,
685 		.nonatomic = true,
686 		.dpcm_playback = 1,
687 		.dpcm_capture = 1,
688 		.init = byt_rt5651_init,
689 		.ops = &byt_rt5651_be_ssp2_ops,
690 	},
691 };
692 
693 /* SoC card */
694 static struct snd_soc_card byt_rt5651_card = {
695 	.name = "bytcr-rt5651",
696 	.owner = THIS_MODULE,
697 	.dai_link = byt_rt5651_dais,
698 	.num_links = ARRAY_SIZE(byt_rt5651_dais),
699 	.dapm_widgets = byt_rt5651_widgets,
700 	.num_dapm_widgets = ARRAY_SIZE(byt_rt5651_widgets),
701 	.dapm_routes = byt_rt5651_audio_map,
702 	.num_dapm_routes = ARRAY_SIZE(byt_rt5651_audio_map),
703 	.fully_routed = true,
704 };
705 
706 static char byt_rt5651_codec_name[SND_ACPI_I2C_ID_LEN];
707 static char byt_rt5651_codec_aif_name[12]; /*  = "rt5651-aif[1|2]" */
708 static char byt_rt5651_cpu_dai_name[10]; /*  = "ssp[0|2]-port" */
709 static char byt_rt5651_long_name[40]; /* = "bytcr-rt5651-*-spk-*-mic" */
710 
711 static bool is_valleyview(void)
712 {
713 	static const struct x86_cpu_id cpu_ids[] = {
714 		{ X86_VENDOR_INTEL, 6, 55 }, /* Valleyview, Bay Trail */
715 		{}
716 	};
717 
718 	if (!x86_match_cpu(cpu_ids))
719 		return false;
720 	return true;
721 }
722 
723 struct acpi_chan_package {   /* ACPICA seems to require 64 bit integers */
724 	u64 aif_value;       /* 1: AIF1, 2: AIF2 */
725 	u64 mclock_value;    /* usually 25MHz (0x17d7940), ignored */
726 };
727 
728 static int snd_byt_rt5651_mc_probe(struct platform_device *pdev)
729 {
730 	const char * const intmic_name[] =
731 		{ "dmic", "in1", "in2", "in12", "in1", "in2" };
732 	const char * const hsmic_name[] =
733 		{  "in2", "in2", "in1",  "in3", "in3", "in3" };
734 	struct byt_rt5651_private *priv;
735 	struct snd_soc_acpi_mach *mach;
736 	const char *i2c_name = NULL;
737 	bool is_bytcr = false;
738 	int ret_val = 0;
739 	int dai_index = 0;
740 	int i;
741 
742 	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
743 	if (!priv)
744 		return -ENOMEM;
745 
746 	/* register the soc card */
747 	byt_rt5651_card.dev = &pdev->dev;
748 
749 	mach = byt_rt5651_card.dev->platform_data;
750 	snd_soc_card_set_drvdata(&byt_rt5651_card, priv);
751 
752 	/* fix index of codec dai */
753 	for (i = 0; i < ARRAY_SIZE(byt_rt5651_dais); i++) {
754 		if (!strcmp(byt_rt5651_dais[i].codec_name, "i2c-10EC5651:00")) {
755 			dai_index = i;
756 			break;
757 		}
758 	}
759 
760 	/* fixup codec name based on HID */
761 	i2c_name = acpi_dev_get_first_match_name(mach->id, NULL, -1);
762 	if (!i2c_name) {
763 		dev_err(&pdev->dev, "Error cannot find '%s' dev\n", mach->id);
764 		return -ENODEV;
765 	}
766 	snprintf(byt_rt5651_codec_name, sizeof(byt_rt5651_codec_name),
767 		"%s%s", "i2c-", i2c_name);
768 	byt_rt5651_dais[dai_index].codec_name = byt_rt5651_codec_name;
769 
770 	/*
771 	 * swap SSP0 if bytcr is detected
772 	 * (will be overridden if DMI quirk is detected)
773 	 */
774 	if (is_valleyview()) {
775 		struct sst_platform_info *p_info = mach->pdata;
776 		const struct sst_res_info *res_info = p_info->res_info;
777 
778 		if (res_info->acpi_ipc_irq_index == 0)
779 			is_bytcr = true;
780 	}
781 
782 	if (is_bytcr) {
783 		/*
784 		 * Baytrail CR platforms may have CHAN package in BIOS, try
785 		 * to find relevant routing quirk based as done on Windows
786 		 * platforms. We have to read the information directly from the
787 		 * BIOS, at this stage the card is not created and the links
788 		 * with the codec driver/pdata are non-existent
789 		 */
790 
791 		struct acpi_chan_package chan_package;
792 
793 		/* format specified: 2 64-bit integers */
794 		struct acpi_buffer format = {sizeof("NN"), "NN"};
795 		struct acpi_buffer state = {0, NULL};
796 		struct snd_soc_acpi_package_context pkg_ctx;
797 		bool pkg_found = false;
798 
799 		state.length = sizeof(chan_package);
800 		state.pointer = &chan_package;
801 
802 		pkg_ctx.name = "CHAN";
803 		pkg_ctx.length = 2;
804 		pkg_ctx.format = &format;
805 		pkg_ctx.state = &state;
806 		pkg_ctx.data_valid = false;
807 
808 		pkg_found = snd_soc_acpi_find_package_from_hid(mach->id,
809 							       &pkg_ctx);
810 		if (pkg_found) {
811 			if (chan_package.aif_value == 1) {
812 				dev_info(&pdev->dev, "BIOS Routing: AIF1 connected\n");
813 				byt_rt5651_quirk |= BYT_RT5651_SSP0_AIF1;
814 			} else  if (chan_package.aif_value == 2) {
815 				dev_info(&pdev->dev, "BIOS Routing: AIF2 connected\n");
816 				byt_rt5651_quirk |= BYT_RT5651_SSP0_AIF2;
817 			} else {
818 				dev_info(&pdev->dev, "BIOS Routing isn't valid, ignored\n");
819 				pkg_found = false;
820 			}
821 		}
822 
823 		if (!pkg_found) {
824 			/* no BIOS indications, assume SSP0-AIF2 connection */
825 			byt_rt5651_quirk |= BYT_RT5651_SSP0_AIF2;
826 		}
827 	}
828 
829 	/* check quirks before creating card */
830 	dmi_check_system(byt_rt5651_quirk_table);
831 
832 	/* Must be called before register_card, also see declaration comment. */
833 	ret_val = byt_rt5651_add_codec_device_props(byt_rt5651_codec_name);
834 	if (ret_val)
835 		return ret_val;
836 
837 	log_quirks(&pdev->dev);
838 
839 	if ((byt_rt5651_quirk & BYT_RT5651_SSP2_AIF2) ||
840 	    (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)) {
841 		/* fixup codec aif name */
842 		snprintf(byt_rt5651_codec_aif_name,
843 			sizeof(byt_rt5651_codec_aif_name),
844 			"%s", "rt5651-aif2");
845 
846 		byt_rt5651_dais[dai_index].codec_dai_name =
847 			byt_rt5651_codec_aif_name;
848 	}
849 
850 	if ((byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) ||
851 	    (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)) {
852 		/* fixup cpu dai name name */
853 		snprintf(byt_rt5651_cpu_dai_name,
854 			sizeof(byt_rt5651_cpu_dai_name),
855 			"%s", "ssp0-port");
856 
857 		byt_rt5651_dais[dai_index].cpu_dai_name =
858 			byt_rt5651_cpu_dai_name;
859 	}
860 
861 	if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
862 		priv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
863 		if (IS_ERR(priv->mclk)) {
864 			ret_val = PTR_ERR(priv->mclk);
865 			dev_err(&pdev->dev,
866 				"Failed to get MCLK from pmc_plt_clk_3: %d\n",
867 				ret_val);
868 			/*
869 			 * Fall back to bit clock usage for -ENOENT (clock not
870 			 * available likely due to missing dependencies), bail
871 			 * for all other errors, including -EPROBE_DEFER
872 			 */
873 			if (ret_val != -ENOENT)
874 				return ret_val;
875 			byt_rt5651_quirk &= ~BYT_RT5651_MCLK_EN;
876 		}
877 	}
878 
879 	snprintf(byt_rt5651_long_name, sizeof(byt_rt5651_long_name),
880 		 "bytcr-rt5651-%s-intmic-%s-hsmic",
881 		 intmic_name[BYT_RT5651_MAP(byt_rt5651_quirk)],
882 		 hsmic_name[BYT_RT5651_MAP(byt_rt5651_quirk)]);
883 	byt_rt5651_card.long_name = byt_rt5651_long_name;
884 
885 	ret_val = devm_snd_soc_register_card(&pdev->dev, &byt_rt5651_card);
886 
887 	if (ret_val) {
888 		dev_err(&pdev->dev, "devm_snd_soc_register_card failed %d\n",
889 			ret_val);
890 		return ret_val;
891 	}
892 	platform_set_drvdata(pdev, &byt_rt5651_card);
893 	return ret_val;
894 }
895 
896 static struct platform_driver snd_byt_rt5651_mc_driver = {
897 	.driver = {
898 		.name = "bytcr_rt5651",
899 	},
900 	.probe = snd_byt_rt5651_mc_probe,
901 };
902 
903 module_platform_driver(snd_byt_rt5651_mc_driver);
904 
905 MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver for RT5651");
906 MODULE_AUTHOR("Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>");
907 MODULE_LICENSE("GPL v2");
908 MODULE_ALIAS("platform:bytcr_rt5651");
909