1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright(c) 2021-2022 Intel Corporation. All rights reserved. 4 * 5 * Authors: Cezary Rojewski <cezary.rojewski@intel.com> 6 * Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com> 7 */ 8 9 #ifndef __SOUND_SOC_INTEL_AVS_MSGS_H 10 #define __SOUND_SOC_INTEL_AVS_MSGS_H 11 12 #include <linux/sizes.h> 13 14 struct avs_dev; 15 16 #define AVS_MAILBOX_SIZE SZ_4K 17 18 enum avs_msg_target { 19 AVS_FW_GEN_MSG = 0, 20 AVS_MOD_MSG = 1 21 }; 22 23 enum avs_msg_direction { 24 AVS_MSG_REQUEST = 0, 25 AVS_MSG_REPLY = 1 26 }; 27 28 enum avs_global_msg_type { 29 AVS_GLB_ROM_CONTROL = 1, 30 AVS_GLB_LOAD_MULTIPLE_MODULES = 15, 31 AVS_GLB_UNLOAD_MULTIPLE_MODULES = 16, 32 AVS_GLB_CREATE_PIPELINE = 17, 33 AVS_GLB_DELETE_PIPELINE = 18, 34 AVS_GLB_SET_PIPELINE_STATE = 19, 35 AVS_GLB_GET_PIPELINE_STATE = 20, 36 AVS_GLB_LOAD_LIBRARY = 24, 37 AVS_GLB_NOTIFICATION = 27, 38 }; 39 40 union avs_global_msg { 41 u64 val; 42 struct { 43 union { 44 u32 primary; 45 struct { 46 u32 rsvd:24; 47 u32 global_msg_type:5; 48 u32 msg_direction:1; 49 u32 msg_target:1; 50 }; 51 /* set boot config */ 52 struct { 53 u32 rom_ctrl_msg_type:9; 54 u32 dma_id:5; 55 u32 purge_request:1; 56 } boot_cfg; 57 /* module loading */ 58 struct { 59 u32 mod_cnt:8; 60 } load_multi_mods; 61 /* pipeline management */ 62 struct { 63 u32 ppl_mem_size:11; 64 u32 ppl_priority:5; 65 u32 instance_id:8; 66 } create_ppl; 67 struct { 68 u32 rsvd:16; 69 u32 instance_id:8; 70 } ppl; /* generic ppl request */ 71 struct { 72 u32 state:16; 73 u32 ppl_id:8; 74 } set_ppl_state; 75 struct { 76 u32 ppl_id:8; 77 } get_ppl_state; 78 /* library loading */ 79 struct { 80 u32 dma_id:5; 81 u32 rsvd:11; 82 u32 lib_id:4; 83 } load_lib; 84 }; 85 union { 86 u32 val; 87 /* pipeline management */ 88 struct { 89 u32 lp:1; /* low power flag */ 90 u32 rsvd:3; 91 u32 attributes:16; /* additional scheduling flags */ 92 } create_ppl; 93 } ext; 94 }; 95 } __packed; 96 97 struct avs_tlv { 98 u32 type; 99 u32 length; 100 u32 value[]; 101 } __packed; 102 103 enum avs_module_msg_type { 104 AVS_MOD_INIT_INSTANCE = 0, 105 AVS_MOD_LARGE_CONFIG_GET = 3, 106 AVS_MOD_LARGE_CONFIG_SET = 4, 107 AVS_MOD_BIND = 5, 108 AVS_MOD_UNBIND = 6, 109 AVS_MOD_SET_DX = 7, 110 AVS_MOD_SET_D0IX = 8, 111 AVS_MOD_DELETE_INSTANCE = 11, 112 }; 113 114 union avs_module_msg { 115 u64 val; 116 struct { 117 union { 118 u32 primary; 119 struct { 120 u32 module_id:16; 121 u32 instance_id:8; 122 u32 module_msg_type:5; 123 u32 msg_direction:1; 124 u32 msg_target:1; 125 }; 126 }; 127 union { 128 u32 val; 129 struct { 130 u32 param_block_size:16; 131 u32 ppl_instance_id:8; 132 u32 core_id:4; 133 u32 proc_domain:1; 134 } init_instance; 135 struct { 136 u32 data_off_size:20; 137 u32 large_param_id:8; 138 u32 final_block:1; 139 u32 init_block:1; 140 } large_config; 141 struct { 142 u32 dst_module_id:16; 143 u32 dst_instance_id:8; 144 u32 dst_queue:3; 145 u32 src_queue:3; 146 } bind_unbind; 147 struct { 148 u32 wake:1; 149 u32 streaming:1; 150 } set_d0ix; 151 } ext; 152 }; 153 } __packed; 154 155 #define AVS_IPC_NOT_SUPPORTED 15 156 157 union avs_reply_msg { 158 u64 val; 159 struct { 160 union { 161 u32 primary; 162 struct { 163 u32 status:24; 164 u32 global_msg_type:5; 165 u32 msg_direction:1; 166 u32 msg_target:1; 167 }; 168 }; 169 union { 170 u32 val; 171 /* module loading */ 172 struct { 173 u32 err_mod_id:16; 174 } load_multi_mods; 175 /* pipeline management */ 176 struct { 177 u32 state:5; 178 } get_ppl_state; 179 /* module management */ 180 struct { 181 u32 data_off_size:20; 182 u32 large_param_id:8; 183 u32 final_block:1; 184 u32 init_block:1; 185 } large_config; 186 } ext; 187 }; 188 } __packed; 189 190 enum avs_notify_msg_type { 191 AVS_NOTIFY_PHRASE_DETECTED = 4, 192 AVS_NOTIFY_RESOURCE_EVENT = 5, 193 AVS_NOTIFY_LOG_BUFFER_STATUS = 6, 194 AVS_NOTIFY_FW_READY = 8, 195 AVS_NOTIFY_EXCEPTION_CAUGHT = 10, 196 AVS_NOTIFY_MODULE_EVENT = 12, 197 }; 198 199 union avs_notify_msg { 200 u64 val; 201 struct { 202 union { 203 u32 primary; 204 struct { 205 u32 rsvd:16; 206 u32 notify_msg_type:8; 207 u32 global_msg_type:5; 208 u32 msg_direction:1; 209 u32 msg_target:1; 210 }; 211 struct { 212 u16 rsvd:12; 213 u16 core:4; 214 } log; 215 }; 216 union { 217 u32 val; 218 struct { 219 u32 core_id:2; 220 u32 stack_dump_size:16; 221 } coredump; 222 } ext; 223 }; 224 } __packed; 225 226 #define AVS_MSG(hdr) { .val = hdr } 227 228 #define AVS_GLOBAL_REQUEST(msg_type) \ 229 { \ 230 .global_msg_type = AVS_GLB_##msg_type, \ 231 .msg_direction = AVS_MSG_REQUEST, \ 232 .msg_target = AVS_FW_GEN_MSG, \ 233 } 234 235 #define AVS_MODULE_REQUEST(msg_type) \ 236 { \ 237 .module_msg_type = AVS_MOD_##msg_type, \ 238 .msg_direction = AVS_MSG_REQUEST, \ 239 .msg_target = AVS_MOD_MSG, \ 240 } 241 242 #define AVS_NOTIFICATION(msg_type) \ 243 { \ 244 .notify_msg_type = AVS_NOTIFY_##msg_type,\ 245 .global_msg_type = AVS_GLB_NOTIFICATION,\ 246 .msg_direction = AVS_MSG_REPLY, \ 247 .msg_target = AVS_FW_GEN_MSG, \ 248 } 249 250 #define avs_msg_is_reply(hdr) \ 251 ({ \ 252 union avs_reply_msg __msg = AVS_MSG(hdr); \ 253 __msg.msg_direction == AVS_MSG_REPLY && \ 254 __msg.global_msg_type != AVS_GLB_NOTIFICATION; \ 255 }) 256 257 /* Notification types */ 258 259 struct avs_notify_voice_data { 260 u16 kpd_score; 261 u16 reserved; 262 } __packed; 263 264 struct avs_notify_res_data { 265 u32 resource_type; 266 u32 resource_id; 267 u32 event_type; 268 u32 reserved; 269 u32 data[6]; 270 } __packed; 271 272 struct avs_notify_mod_data { 273 u32 module_instance_id; 274 u32 event_id; 275 u32 data_size; 276 u32 data[]; 277 } __packed; 278 279 /* ROM messages */ 280 enum avs_rom_control_msg_type { 281 AVS_ROM_SET_BOOT_CONFIG = 0, 282 }; 283 284 int avs_ipc_set_boot_config(struct avs_dev *adev, u32 dma_id, u32 purge); 285 286 /* Code loading messages */ 287 int avs_ipc_load_modules(struct avs_dev *adev, u16 *mod_ids, u32 num_mod_ids); 288 int avs_ipc_unload_modules(struct avs_dev *adev, u16 *mod_ids, u32 num_mod_ids); 289 int avs_ipc_load_library(struct avs_dev *adev, u32 dma_id, u32 lib_id); 290 291 /* Pipeline management messages */ 292 enum avs_pipeline_state { 293 AVS_PPL_STATE_INVALID, 294 AVS_PPL_STATE_UNINITIALIZED, 295 AVS_PPL_STATE_RESET, 296 AVS_PPL_STATE_PAUSED, 297 AVS_PPL_STATE_RUNNING, 298 }; 299 300 int avs_ipc_create_pipeline(struct avs_dev *adev, u16 req_size, u8 priority, 301 u8 instance_id, bool lp, u16 attributes); 302 int avs_ipc_delete_pipeline(struct avs_dev *adev, u8 instance_id); 303 int avs_ipc_set_pipeline_state(struct avs_dev *adev, u8 instance_id, 304 enum avs_pipeline_state state); 305 int avs_ipc_get_pipeline_state(struct avs_dev *adev, u8 instance_id, 306 enum avs_pipeline_state *state); 307 308 /* Module management messages */ 309 int avs_ipc_init_instance(struct avs_dev *adev, u16 module_id, u8 instance_id, 310 u8 ppl_id, u8 core_id, u8 domain, 311 void *param, u32 param_size); 312 int avs_ipc_delete_instance(struct avs_dev *adev, u16 module_id, u8 instance_id); 313 int avs_ipc_bind(struct avs_dev *adev, u16 module_id, u8 instance_id, 314 u16 dst_module_id, u8 dst_instance_id, 315 u8 dst_queue, u8 src_queue); 316 int avs_ipc_unbind(struct avs_dev *adev, u16 module_id, u8 instance_id, 317 u16 dst_module_id, u8 dst_instance_id, 318 u8 dst_queue, u8 src_queue); 319 int avs_ipc_set_large_config(struct avs_dev *adev, u16 module_id, 320 u8 instance_id, u8 param_id, 321 u8 *request, size_t request_size); 322 int avs_ipc_get_large_config(struct avs_dev *adev, u16 module_id, u8 instance_id, 323 u8 param_id, u8 *request_data, size_t request_size, 324 u8 **reply_data, size_t *reply_size); 325 326 /* DSP cores and domains power management messages */ 327 struct avs_dxstate_info { 328 u32 core_mask; /* which cores are subject for power transition */ 329 u32 dx_mask; /* bit[n]=1 core n goes to D0, bit[n]=0 it goes to D3 */ 330 } __packed; 331 332 int avs_ipc_set_dx(struct avs_dev *adev, u32 core_mask, bool powerup); 333 int avs_ipc_set_d0ix(struct avs_dev *adev, bool enable_pg, bool streaming); 334 335 /* Base-firmware runtime parameters */ 336 337 #define AVS_BASEFW_MOD_ID 0 338 #define AVS_BASEFW_INST_ID 0 339 340 enum avs_basefw_runtime_param { 341 AVS_BASEFW_ENABLE_LOGS = 6, 342 AVS_BASEFW_FIRMWARE_CONFIG = 7, 343 AVS_BASEFW_HARDWARE_CONFIG = 8, 344 AVS_BASEFW_MODULES_INFO = 9, 345 AVS_BASEFW_LIBRARIES_INFO = 16, 346 AVS_BASEFW_SYSTEM_TIME = 20, 347 }; 348 349 enum avs_log_enable { 350 AVS_LOG_DISABLE = 0, 351 AVS_LOG_ENABLE = 1 352 }; 353 354 enum avs_skl_log_priority { 355 AVS_SKL_LOG_CRITICAL = 1, 356 AVS_SKL_LOG_HIGH, 357 AVS_SKL_LOG_MEDIUM, 358 AVS_SKL_LOG_LOW, 359 AVS_SKL_LOG_VERBOSE, 360 }; 361 362 struct skl_log_state { 363 u32 enable; 364 u32 min_priority; 365 } __packed; 366 367 struct skl_log_state_info { 368 u32 core_mask; 369 struct skl_log_state logs_core[]; 370 } __packed; 371 372 struct apl_log_state_info { 373 u32 aging_timer_period; 374 u32 fifo_full_timer_period; 375 u32 core_mask; 376 struct skl_log_state logs_core[]; 377 } __packed; 378 379 int avs_ipc_set_enable_logs(struct avs_dev *adev, u8 *log_info, size_t size); 380 381 struct avs_fw_version { 382 u16 major; 383 u16 minor; 384 u16 hotfix; 385 u16 build; 386 }; 387 388 enum avs_fw_cfg_params { 389 AVS_FW_CFG_FW_VERSION = 0, 390 AVS_FW_CFG_MEMORY_RECLAIMED, 391 AVS_FW_CFG_SLOW_CLOCK_FREQ_HZ, 392 AVS_FW_CFG_FAST_CLOCK_FREQ_HZ, 393 AVS_FW_CFG_DMA_BUFFER_CONFIG, 394 AVS_FW_CFG_ALH_SUPPORT_LEVEL, 395 AVS_FW_CFG_IPC_DL_MAILBOX_BYTES, 396 AVS_FW_CFG_IPC_UL_MAILBOX_BYTES, 397 AVS_FW_CFG_TRACE_LOG_BYTES, 398 AVS_FW_CFG_MAX_PPL_COUNT, 399 AVS_FW_CFG_MAX_ASTATE_COUNT, 400 AVS_FW_CFG_MAX_MODULE_PIN_COUNT, 401 AVS_FW_CFG_MODULES_COUNT, 402 AVS_FW_CFG_MAX_MOD_INST_COUNT, 403 AVS_FW_CFG_MAX_LL_TASKS_PER_PRI_COUNT, 404 AVS_FW_CFG_LL_PRI_COUNT, 405 AVS_FW_CFG_MAX_DP_TASKS_COUNT, 406 AVS_FW_CFG_MAX_LIBS_COUNT, 407 AVS_FW_CFG_SCHEDULER_CONFIG, 408 AVS_FW_CFG_XTAL_FREQ_HZ, 409 AVS_FW_CFG_CLOCKS_CONFIG, 410 AVS_FW_CFG_RESERVED, 411 AVS_FW_CFG_POWER_GATING_POLICY, 412 AVS_FW_CFG_ASSERT_MODE, 413 }; 414 415 struct avs_fw_cfg { 416 struct avs_fw_version fw_version; 417 u32 memory_reclaimed; 418 u32 slow_clock_freq_hz; 419 u32 fast_clock_freq_hz; 420 u32 alh_support; 421 u32 ipc_dl_mailbox_bytes; 422 u32 ipc_ul_mailbox_bytes; 423 u32 trace_log_bytes; 424 u32 max_ppl_count; 425 u32 max_astate_count; 426 u32 max_module_pin_count; 427 u32 modules_count; 428 u32 max_mod_inst_count; 429 u32 max_ll_tasks_per_pri_count; 430 u32 ll_pri_count; 431 u32 max_dp_tasks_count; 432 u32 max_libs_count; 433 u32 xtal_freq_hz; 434 u32 power_gating_policy; 435 }; 436 437 int avs_ipc_get_fw_config(struct avs_dev *adev, struct avs_fw_cfg *cfg); 438 439 enum avs_hw_cfg_params { 440 AVS_HW_CFG_AVS_VER, 441 AVS_HW_CFG_DSP_CORES, 442 AVS_HW_CFG_MEM_PAGE_BYTES, 443 AVS_HW_CFG_TOTAL_PHYS_MEM_PAGES, 444 AVS_HW_CFG_I2S_CAPS, 445 AVS_HW_CFG_GPDMA_CAPS, 446 AVS_HW_CFG_GATEWAY_COUNT, 447 AVS_HW_CFG_HP_EBB_COUNT, 448 AVS_HW_CFG_LP_EBB_COUNT, 449 AVS_HW_CFG_EBB_SIZE_BYTES, 450 }; 451 452 enum avs_iface_version { 453 AVS_AVS_VER_1_5 = 0x10005, 454 AVS_AVS_VER_1_8 = 0x10008, 455 }; 456 457 enum avs_i2s_version { 458 AVS_I2S_VER_15_SKYLAKE = 0x00000, 459 AVS_I2S_VER_15_BROXTON = 0x10000, 460 AVS_I2S_VER_15_BROXTON_P = 0x20000, 461 AVS_I2S_VER_18_KBL_CNL = 0x30000, 462 }; 463 464 struct avs_i2s_caps { 465 u32 i2s_version; 466 u32 ctrl_count; 467 u32 *ctrl_base_addr; 468 }; 469 470 struct avs_hw_cfg { 471 u32 avs_version; 472 u32 dsp_cores; 473 u32 mem_page_bytes; 474 u32 total_phys_mem_pages; 475 struct avs_i2s_caps i2s_caps; 476 u32 gateway_count; 477 u32 hp_ebb_count; 478 u32 lp_ebb_count; 479 u32 ebb_size_bytes; 480 }; 481 482 int avs_ipc_get_hw_config(struct avs_dev *adev, struct avs_hw_cfg *cfg); 483 484 #define AVS_MODULE_LOAD_TYPE_BUILTIN 0 485 #define AVS_MODULE_LOAD_TYPE_LOADABLE 1 486 #define AVS_MODULE_STATE_LOADED BIT(0) 487 488 struct avs_module_type { 489 u32 load_type:4; 490 u32 auto_start:1; 491 u32 domain_ll:1; 492 u32 domain_dp:1; 493 u32 lib_code:1; 494 u32 rsvd:24; 495 } __packed; 496 497 union avs_segment_flags { 498 u32 ul; 499 struct { 500 u32 contents:1; 501 u32 alloc:1; 502 u32 load:1; 503 u32 readonly:1; 504 u32 code:1; 505 u32 data:1; 506 u32 rsvd_1:2; 507 u32 type:4; 508 u32 rsvd_2:4; 509 u32 length:16; 510 }; 511 } __packed; 512 513 struct avs_segment_desc { 514 union avs_segment_flags flags; 515 u32 v_base_addr; 516 u32 file_offset; 517 } __packed; 518 519 struct avs_module_entry { 520 u16 module_id; 521 u16 state_flags; 522 u8 name[8]; 523 guid_t uuid; 524 struct avs_module_type type; 525 u8 hash[32]; 526 u32 entry_point; 527 u16 cfg_offset; 528 u16 cfg_count; 529 u32 affinity_mask; 530 u16 instance_max_count; 531 u16 instance_bss_size; 532 struct avs_segment_desc segments[3]; 533 } __packed; 534 535 struct avs_mods_info { 536 u32 count; 537 struct avs_module_entry entries[]; 538 } __packed; 539 540 static inline bool avs_module_entry_is_loaded(struct avs_module_entry *mentry) 541 { 542 return mentry->type.load_type == AVS_MODULE_LOAD_TYPE_BUILTIN || 543 mentry->state_flags & AVS_MODULE_STATE_LOADED; 544 } 545 546 int avs_ipc_get_modules_info(struct avs_dev *adev, struct avs_mods_info **info); 547 548 struct avs_sys_time { 549 u32 val_l; 550 u32 val_u; 551 } __packed; 552 553 int avs_ipc_set_system_time(struct avs_dev *adev); 554 555 /* Module configuration */ 556 557 #define AVS_MIXIN_MOD_UUID \ 558 GUID_INIT(0x39656EB2, 0x3B71, 0x4049, 0x8D, 0x3F, 0xF9, 0x2C, 0xD5, 0xC4, 0x3C, 0x09) 559 560 #define AVS_MIXOUT_MOD_UUID \ 561 GUID_INIT(0x3C56505A, 0x24D7, 0x418F, 0xBD, 0xDC, 0xC1, 0xF5, 0xA3, 0xAC, 0x2A, 0xE0) 562 563 #define AVS_COPIER_MOD_UUID \ 564 GUID_INIT(0x9BA00C83, 0xCA12, 0x4A83, 0x94, 0x3C, 0x1F, 0xA2, 0xE8, 0x2F, 0x9D, 0xDA) 565 566 #define AVS_PEAKVOL_MOD_UUID \ 567 GUID_INIT(0x8A171323, 0x94A3, 0x4E1D, 0xAF, 0xE9, 0xFE, 0x5D, 0xBA, 0xa4, 0xC3, 0x93) 568 569 #define AVS_GAIN_MOD_UUID \ 570 GUID_INIT(0x61BCA9A8, 0x18D0, 0x4A18, 0x8E, 0x7B, 0x26, 0x39, 0x21, 0x98, 0x04, 0xB7) 571 572 #define AVS_KPBUFF_MOD_UUID \ 573 GUID_INIT(0xA8A0CB32, 0x4A77, 0x4DB1, 0x85, 0xC7, 0x53, 0xD7, 0xEE, 0x07, 0xBC, 0xE6) 574 575 #define AVS_MICSEL_MOD_UUID \ 576 GUID_INIT(0x32FE92C1, 0x1E17, 0x4FC2, 0x97, 0x58, 0xC7, 0xF3, 0x54, 0x2E, 0x98, 0x0A) 577 578 #define AVS_MUX_MOD_UUID \ 579 GUID_INIT(0x64CE6E35, 0x857A, 0x4878, 0xAC, 0xE8, 0xE2, 0xA2, 0xF4, 0x2e, 0x30, 0x69) 580 581 #define AVS_UPDWMIX_MOD_UUID \ 582 GUID_INIT(0x42F8060C, 0x832F, 0x4DBF, 0xB2, 0x47, 0x51, 0xE9, 0x61, 0x99, 0x7b, 0x35) 583 584 #define AVS_SRCINTC_MOD_UUID \ 585 GUID_INIT(0xE61BB28D, 0x149A, 0x4C1F, 0xB7, 0x09, 0x46, 0x82, 0x3E, 0xF5, 0xF5, 0xAE) 586 587 #define AVS_PROBE_MOD_UUID \ 588 GUID_INIT(0x7CAD0808, 0xAB10, 0xCD23, 0xEF, 0x45, 0x12, 0xAB, 0x34, 0xCD, 0x56, 0xEF) 589 590 #define AVS_AEC_MOD_UUID \ 591 GUID_INIT(0x46CB87FB, 0xD2C9, 0x4970, 0x96, 0xD2, 0x6D, 0x7E, 0x61, 0x4B, 0xB6, 0x05) 592 593 #define AVS_ASRC_MOD_UUID \ 594 GUID_INIT(0x66B4402D, 0xB468, 0x42F2, 0x81, 0xA7, 0xB3, 0x71, 0x21, 0x86, 0x3D, 0xD4) 595 596 #define AVS_INTELWOV_MOD_UUID \ 597 GUID_INIT(0xEC774FA9, 0x28D3, 0x424A, 0x90, 0xE4, 0x69, 0xF9, 0x84, 0xF1, 0xEE, 0xB7) 598 599 /* channel map */ 600 enum avs_channel_index { 601 AVS_CHANNEL_LEFT = 0, 602 AVS_CHANNEL_RIGHT = 1, 603 AVS_CHANNEL_CENTER = 2, 604 AVS_CHANNEL_LEFT_SURROUND = 3, 605 AVS_CHANNEL_CENTER_SURROUND = 3, 606 AVS_CHANNEL_RIGHT_SURROUND = 4, 607 AVS_CHANNEL_LFE = 7, 608 AVS_CHANNEL_INVALID = 0xF, 609 }; 610 611 enum avs_channel_config { 612 AVS_CHANNEL_CONFIG_MONO = 0, 613 AVS_CHANNEL_CONFIG_STEREO = 1, 614 AVS_CHANNEL_CONFIG_2_1 = 2, 615 AVS_CHANNEL_CONFIG_3_0 = 3, 616 AVS_CHANNEL_CONFIG_3_1 = 4, 617 AVS_CHANNEL_CONFIG_QUATRO = 5, 618 AVS_CHANNEL_CONFIG_4_0 = 6, 619 AVS_CHANNEL_CONFIG_5_0 = 7, 620 AVS_CHANNEL_CONFIG_5_1 = 8, 621 AVS_CHANNEL_CONFIG_DUAL_MONO = 9, 622 AVS_CHANNEL_CONFIG_I2S_DUAL_STEREO_0 = 10, 623 AVS_CHANNEL_CONFIG_I2S_DUAL_STEREO_1 = 11, 624 AVS_CHANNEL_CONFIG_7_1 = 12, 625 AVS_CHANNEL_CONFIG_INVALID 626 }; 627 628 enum avs_interleaving { 629 AVS_INTERLEAVING_PER_CHANNEL = 0, 630 AVS_INTERLEAVING_PER_SAMPLE = 1, 631 }; 632 633 enum avs_sample_type { 634 AVS_SAMPLE_TYPE_INT_MSB = 0, 635 AVS_SAMPLE_TYPE_INT_LSB = 1, 636 AVS_SAMPLE_TYPE_INT_SIGNED = 2, 637 AVS_SAMPLE_TYPE_INT_UNSIGNED = 3, 638 AVS_SAMPLE_TYPE_FLOAT = 4, 639 }; 640 641 #define AVS_CHANNELS_MAX 8 642 #define AVS_ALL_CHANNELS_MASK UINT_MAX 643 644 struct avs_audio_format { 645 u32 sampling_freq; 646 u32 bit_depth; 647 u32 channel_map; 648 u32 channel_config; 649 u32 interleaving; 650 u32 num_channels:8; 651 u32 valid_bit_depth:8; 652 u32 sample_type:8; 653 u32 reserved:8; 654 } __packed; 655 656 struct avs_modcfg_base { 657 u32 cpc; 658 u32 ibs; 659 u32 obs; 660 u32 is_pages; 661 struct avs_audio_format audio_fmt; 662 } __packed; 663 664 struct avs_pin_format { 665 u32 pin_index; 666 u32 iobs; 667 struct avs_audio_format audio_fmt; 668 } __packed; 669 670 struct avs_modcfg_ext { 671 struct avs_modcfg_base base; 672 u16 num_input_pins; 673 u16 num_output_pins; 674 u8 reserved[12]; 675 /* input pin formats followed by output ones */ 676 struct avs_pin_format pin_fmts[]; 677 } __packed; 678 679 enum avs_dma_type { 680 AVS_DMA_HDA_HOST_OUTPUT = 0, 681 AVS_DMA_HDA_HOST_INPUT = 1, 682 AVS_DMA_HDA_LINK_OUTPUT = 8, 683 AVS_DMA_HDA_LINK_INPUT = 9, 684 AVS_DMA_DMIC_LINK_INPUT = 11, 685 AVS_DMA_I2S_LINK_OUTPUT = 12, 686 AVS_DMA_I2S_LINK_INPUT = 13, 687 }; 688 689 union avs_virtual_index { 690 u8 val; 691 struct { 692 u8 time_slot:4; 693 u8 instance:4; 694 } i2s; 695 struct { 696 u8 queue_id:3; 697 u8 time_slot:2; 698 u8 instance:3; 699 } dmic; 700 } __packed; 701 702 union avs_connector_node_id { 703 u32 val; 704 struct { 705 u32 vindex:8; 706 u32 dma_type:5; 707 u32 rsvd:19; 708 }; 709 } __packed; 710 711 #define INVALID_PIPELINE_ID 0xFF 712 #define INVALID_NODE_ID \ 713 ((union avs_connector_node_id) { UINT_MAX }) 714 715 union avs_gtw_attributes { 716 u32 val; 717 struct { 718 u32 lp_buffer_alloc:1; 719 u32 rsvd:31; 720 }; 721 } __packed; 722 723 struct avs_copier_gtw_cfg { 724 union avs_connector_node_id node_id; 725 u32 dma_buffer_size; 726 u32 config_length; 727 struct { 728 union avs_gtw_attributes attrs; 729 u32 blob[]; 730 } config; 731 } __packed; 732 733 struct avs_copier_cfg { 734 struct avs_modcfg_base base; 735 struct avs_audio_format out_fmt; 736 u32 feature_mask; 737 struct avs_copier_gtw_cfg gtw_cfg; 738 } __packed; 739 740 struct avs_volume_cfg { 741 u32 channel_id; 742 u32 target_volume; 743 u32 curve_type; 744 u32 reserved; /* alignment */ 745 u64 curve_duration; 746 } __packed; 747 748 struct avs_peakvol_cfg { 749 struct avs_modcfg_base base; 750 struct avs_volume_cfg vols[]; 751 } __packed; 752 753 struct avs_micsel_cfg { 754 struct avs_modcfg_base base; 755 struct avs_audio_format out_fmt; 756 } __packed; 757 758 struct avs_mux_cfg { 759 struct avs_modcfg_base base; 760 struct avs_audio_format ref_fmt; 761 struct avs_audio_format out_fmt; 762 } __packed; 763 764 struct avs_updown_mixer_cfg { 765 struct avs_modcfg_base base; 766 u32 out_channel_config; 767 u32 coefficients_select; 768 s32 coefficients[AVS_CHANNELS_MAX]; 769 u32 channel_map; 770 } __packed; 771 772 struct avs_src_cfg { 773 struct avs_modcfg_base base; 774 u32 out_freq; 775 } __packed; 776 777 struct avs_probe_gtw_cfg { 778 union avs_connector_node_id node_id; 779 u32 dma_buffer_size; 780 } __packed; 781 782 struct avs_probe_cfg { 783 struct avs_modcfg_base base; 784 struct avs_probe_gtw_cfg gtw_cfg; 785 } __packed; 786 787 struct avs_aec_cfg { 788 struct avs_modcfg_base base; 789 struct avs_audio_format ref_fmt; 790 struct avs_audio_format out_fmt; 791 u32 cpc_lp_mode; 792 } __packed; 793 794 struct avs_asrc_cfg { 795 struct avs_modcfg_base base; 796 u32 out_freq; 797 u32 rsvd0:1; 798 u32 mode:1; 799 u32 rsvd2:2; 800 u32 disable_jitter_buffer:1; 801 u32 rsvd3:27; 802 } __packed; 803 804 struct avs_wov_cfg { 805 struct avs_modcfg_base base; 806 u32 cpc_lp_mode; 807 } __packed; 808 809 /* Module runtime parameters */ 810 811 enum avs_copier_runtime_param { 812 AVS_COPIER_SET_SINK_FORMAT = 2, 813 }; 814 815 struct avs_copier_sink_format { 816 u32 sink_id; 817 struct avs_audio_format src_fmt; 818 struct avs_audio_format sink_fmt; 819 } __packed; 820 821 int avs_ipc_copier_set_sink_format(struct avs_dev *adev, u16 module_id, 822 u8 instance_id, u32 sink_id, 823 const struct avs_audio_format *src_fmt, 824 const struct avs_audio_format *sink_fmt); 825 826 enum avs_peakvol_runtime_param { 827 AVS_PEAKVOL_VOLUME = 0, 828 }; 829 830 enum avs_audio_curve_type { 831 AVS_AUDIO_CURVE_NONE = 0, 832 AVS_AUDIO_CURVE_WINDOWS_FADE = 1, 833 }; 834 835 int avs_ipc_peakvol_set_volume(struct avs_dev *adev, u16 module_id, u8 instance_id, 836 struct avs_volume_cfg *vol); 837 int avs_ipc_peakvol_get_volume(struct avs_dev *adev, u16 module_id, u8 instance_id, 838 struct avs_volume_cfg **vols, size_t *num_vols); 839 840 #define AVS_PROBE_INST_ID 0 841 842 enum avs_probe_runtime_param { 843 AVS_PROBE_INJECTION_DMA = 1, 844 AVS_PROBE_INJECTION_DMA_DETACH, 845 AVS_PROBE_POINTS, 846 AVS_PROBE_POINTS_DISCONNECT, 847 }; 848 849 struct avs_probe_dma { 850 union avs_connector_node_id node_id; 851 u32 dma_buffer_size; 852 } __packed; 853 854 enum avs_probe_type { 855 AVS_PROBE_TYPE_INPUT = 0, 856 AVS_PROBE_TYPE_OUTPUT, 857 AVS_PROBE_TYPE_INTERNAL 858 }; 859 860 union avs_probe_point_id { 861 u32 value; 862 struct { 863 u32 module_id:16; 864 u32 instance_id:8; 865 u32 type:2; 866 u32 index:6; 867 } id; 868 } __packed; 869 870 enum avs_connection_purpose { 871 AVS_CONNECTION_PURPOSE_EXTRACT = 0, 872 AVS_CONNECTION_PURPOSE_INJECT, 873 AVS_CONNECTION_PURPOSE_INJECT_REEXTRACT, 874 }; 875 876 struct avs_probe_point_desc { 877 union avs_probe_point_id id; 878 u32 purpose; 879 union avs_connector_node_id node_id; 880 } __packed; 881 882 int avs_ipc_probe_get_dma(struct avs_dev *adev, struct avs_probe_dma **dmas, size_t *num_dmas); 883 int avs_ipc_probe_attach_dma(struct avs_dev *adev, struct avs_probe_dma *dmas, size_t num_dmas); 884 int avs_ipc_probe_detach_dma(struct avs_dev *adev, union avs_connector_node_id *node_ids, 885 size_t num_node_ids); 886 int avs_ipc_probe_get_points(struct avs_dev *adev, struct avs_probe_point_desc **descs, 887 size_t *num_descs); 888 int avs_ipc_probe_connect_points(struct avs_dev *adev, struct avs_probe_point_desc *descs, 889 size_t num_descs); 890 int avs_ipc_probe_disconnect_points(struct avs_dev *adev, union avs_probe_point_id *ids, 891 size_t num_ids); 892 893 #endif /* __SOUND_SOC_INTEL_AVS_MSGS_H */ 894