1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright(c) 2021-2022 Intel Corporation. All rights reserved. 4 * 5 * Authors: Cezary Rojewski <cezary.rojewski@intel.com> 6 * Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com> 7 */ 8 9 #ifndef __SOUND_SOC_INTEL_AVS_MSGS_H 10 #define __SOUND_SOC_INTEL_AVS_MSGS_H 11 12 struct avs_dev; 13 14 #define AVS_MAILBOX_SIZE 4096 15 16 enum avs_msg_target { 17 AVS_FW_GEN_MSG = 0, 18 AVS_MOD_MSG = 1 19 }; 20 21 enum avs_msg_direction { 22 AVS_MSG_REQUEST = 0, 23 AVS_MSG_REPLY = 1 24 }; 25 26 enum avs_global_msg_type { 27 AVS_GLB_ROM_CONTROL = 1, 28 AVS_GLB_LOAD_MULTIPLE_MODULES = 15, 29 AVS_GLB_UNLOAD_MULTIPLE_MODULES = 16, 30 AVS_GLB_CREATE_PIPELINE = 17, 31 AVS_GLB_DELETE_PIPELINE = 18, 32 AVS_GLB_SET_PIPELINE_STATE = 19, 33 AVS_GLB_GET_PIPELINE_STATE = 20, 34 AVS_GLB_LOAD_LIBRARY = 24, 35 AVS_GLB_NOTIFICATION = 27, 36 }; 37 38 union avs_global_msg { 39 u64 val; 40 struct { 41 union { 42 u32 primary; 43 struct { 44 u32 rsvd:24; 45 u32 global_msg_type:5; 46 u32 msg_direction:1; 47 u32 msg_target:1; 48 }; 49 /* set boot config */ 50 struct { 51 u32 rom_ctrl_msg_type:9; 52 u32 dma_id:5; 53 u32 purge_request:1; 54 } boot_cfg; 55 /* module loading */ 56 struct { 57 u32 mod_cnt:8; 58 } load_multi_mods; 59 /* pipeline management */ 60 struct { 61 u32 ppl_mem_size:11; 62 u32 ppl_priority:5; 63 u32 instance_id:8; 64 } create_ppl; 65 struct { 66 u32 rsvd:16; 67 u32 instance_id:8; 68 } ppl; /* generic ppl request */ 69 struct { 70 u32 state:16; 71 u32 ppl_id:8; 72 } set_ppl_state; 73 struct { 74 u32 ppl_id:8; 75 } get_ppl_state; 76 /* library loading */ 77 struct { 78 u32 dma_id:5; 79 u32 rsvd:11; 80 u32 lib_id:4; 81 } load_lib; 82 }; 83 union { 84 u32 val; 85 /* pipeline management */ 86 struct { 87 u32 lp:1; /* low power flag */ 88 u32 rsvd:3; 89 u32 attributes:16; /* additional scheduling flags */ 90 } create_ppl; 91 } ext; 92 }; 93 } __packed; 94 95 struct avs_tlv { 96 u32 type; 97 u32 length; 98 u32 value[]; 99 } __packed; 100 101 enum avs_module_msg_type { 102 AVS_MOD_INIT_INSTANCE = 0, 103 AVS_MOD_LARGE_CONFIG_GET = 3, 104 AVS_MOD_LARGE_CONFIG_SET = 4, 105 AVS_MOD_BIND = 5, 106 AVS_MOD_UNBIND = 6, 107 AVS_MOD_SET_DX = 7, 108 AVS_MOD_SET_D0IX = 8, 109 AVS_MOD_DELETE_INSTANCE = 11, 110 }; 111 112 union avs_module_msg { 113 u64 val; 114 struct { 115 union { 116 u32 primary; 117 struct { 118 u32 module_id:16; 119 u32 instance_id:8; 120 u32 module_msg_type:5; 121 u32 msg_direction:1; 122 u32 msg_target:1; 123 }; 124 }; 125 union { 126 u32 val; 127 struct { 128 u32 param_block_size:16; 129 u32 ppl_instance_id:8; 130 u32 core_id:4; 131 u32 proc_domain:1; 132 } init_instance; 133 struct { 134 u32 data_off_size:20; 135 u32 large_param_id:8; 136 u32 final_block:1; 137 u32 init_block:1; 138 } large_config; 139 struct { 140 u32 dst_module_id:16; 141 u32 dst_instance_id:8; 142 u32 dst_queue:3; 143 u32 src_queue:3; 144 } bind_unbind; 145 struct { 146 u32 wake:1; 147 u32 streaming:1; 148 } set_d0ix; 149 } ext; 150 }; 151 } __packed; 152 153 union avs_reply_msg { 154 u64 val; 155 struct { 156 union { 157 u32 primary; 158 struct { 159 u32 status:24; 160 u32 global_msg_type:5; 161 u32 msg_direction:1; 162 u32 msg_target:1; 163 }; 164 }; 165 union { 166 u32 val; 167 /* module loading */ 168 struct { 169 u32 err_mod_id:16; 170 } load_multi_mods; 171 /* pipeline management */ 172 struct { 173 u32 state:5; 174 } get_ppl_state; 175 /* module management */ 176 struct { 177 u32 data_off_size:20; 178 u32 large_param_id:8; 179 u32 final_block:1; 180 u32 init_block:1; 181 } large_config; 182 } ext; 183 }; 184 } __packed; 185 186 enum avs_notify_msg_type { 187 AVS_NOTIFY_PHRASE_DETECTED = 4, 188 AVS_NOTIFY_RESOURCE_EVENT = 5, 189 AVS_NOTIFY_FW_READY = 8, 190 AVS_NOTIFY_EXCEPTION_CAUGHT = 10, 191 AVS_NOTIFY_MODULE_EVENT = 12, 192 }; 193 194 union avs_notify_msg { 195 u64 val; 196 struct { 197 union { 198 u32 primary; 199 struct { 200 u32 rsvd:16; 201 u32 notify_msg_type:8; 202 u32 global_msg_type:5; 203 u32 msg_direction:1; 204 u32 msg_target:1; 205 }; 206 }; 207 union { 208 u32 val; 209 struct { 210 u32 core_id:2; 211 u32 stack_dump_size:16; 212 } coredump; 213 } ext; 214 }; 215 } __packed; 216 217 #define AVS_MSG(hdr) { .val = hdr } 218 219 #define AVS_GLOBAL_REQUEST(msg_type) \ 220 { \ 221 .global_msg_type = AVS_GLB_##msg_type, \ 222 .msg_direction = AVS_MSG_REQUEST, \ 223 .msg_target = AVS_FW_GEN_MSG, \ 224 } 225 226 #define AVS_MODULE_REQUEST(msg_type) \ 227 { \ 228 .module_msg_type = AVS_MOD_##msg_type, \ 229 .msg_direction = AVS_MSG_REQUEST, \ 230 .msg_target = AVS_MOD_MSG, \ 231 } 232 233 #define AVS_NOTIFICATION(msg_type) \ 234 { \ 235 .notify_msg_type = AVS_NOTIFY_##msg_type,\ 236 .global_msg_type = AVS_GLB_NOTIFICATION,\ 237 .msg_direction = AVS_MSG_REPLY, \ 238 .msg_target = AVS_FW_GEN_MSG, \ 239 } 240 241 #define avs_msg_is_reply(hdr) \ 242 ({ \ 243 union avs_reply_msg __msg = AVS_MSG(hdr); \ 244 __msg.msg_direction == AVS_MSG_REPLY && \ 245 __msg.global_msg_type != AVS_GLB_NOTIFICATION; \ 246 }) 247 248 /* Notification types */ 249 250 struct avs_notify_voice_data { 251 u16 kpd_score; 252 u16 reserved; 253 } __packed; 254 255 struct avs_notify_res_data { 256 u32 resource_type; 257 u32 resource_id; 258 u32 event_type; 259 u32 reserved; 260 u32 data[6]; 261 } __packed; 262 263 struct avs_notify_mod_data { 264 u32 module_instance_id; 265 u32 event_id; 266 u32 data_size; 267 u32 data[]; 268 } __packed; 269 270 /* ROM messages */ 271 enum avs_rom_control_msg_type { 272 AVS_ROM_SET_BOOT_CONFIG = 0, 273 }; 274 275 int avs_ipc_set_boot_config(struct avs_dev *adev, u32 dma_id, u32 purge); 276 277 /* Code loading messages */ 278 int avs_ipc_load_modules(struct avs_dev *adev, u16 *mod_ids, u32 num_mod_ids); 279 int avs_ipc_unload_modules(struct avs_dev *adev, u16 *mod_ids, u32 num_mod_ids); 280 int avs_ipc_load_library(struct avs_dev *adev, u32 dma_id, u32 lib_id); 281 282 /* Pipeline management messages */ 283 enum avs_pipeline_state { 284 AVS_PPL_STATE_INVALID, 285 AVS_PPL_STATE_UNINITIALIZED, 286 AVS_PPL_STATE_RESET, 287 AVS_PPL_STATE_PAUSED, 288 AVS_PPL_STATE_RUNNING, 289 }; 290 291 int avs_ipc_create_pipeline(struct avs_dev *adev, u16 req_size, u8 priority, 292 u8 instance_id, bool lp, u16 attributes); 293 int avs_ipc_delete_pipeline(struct avs_dev *adev, u8 instance_id); 294 int avs_ipc_set_pipeline_state(struct avs_dev *adev, u8 instance_id, 295 enum avs_pipeline_state state); 296 int avs_ipc_get_pipeline_state(struct avs_dev *adev, u8 instance_id, 297 enum avs_pipeline_state *state); 298 299 /* Module management messages */ 300 int avs_ipc_init_instance(struct avs_dev *adev, u16 module_id, u8 instance_id, 301 u8 ppl_id, u8 core_id, u8 domain, 302 void *param, u32 param_size); 303 int avs_ipc_delete_instance(struct avs_dev *adev, u16 module_id, u8 instance_id); 304 int avs_ipc_bind(struct avs_dev *adev, u16 module_id, u8 instance_id, 305 u16 dst_module_id, u8 dst_instance_id, 306 u8 dst_queue, u8 src_queue); 307 int avs_ipc_unbind(struct avs_dev *adev, u16 module_id, u8 instance_id, 308 u16 dst_module_id, u8 dst_instance_id, 309 u8 dst_queue, u8 src_queue); 310 int avs_ipc_set_large_config(struct avs_dev *adev, u16 module_id, 311 u8 instance_id, u8 param_id, 312 u8 *request, size_t request_size); 313 int avs_ipc_get_large_config(struct avs_dev *adev, u16 module_id, u8 instance_id, 314 u8 param_id, u8 *request_data, size_t request_size, 315 u8 **reply_data, size_t *reply_size); 316 317 /* DSP cores and domains power management messages */ 318 struct avs_dxstate_info { 319 u32 core_mask; /* which cores are subject for power transition */ 320 u32 dx_mask; /* bit[n]=1 core n goes to D0, bit[n]=0 it goes to D3 */ 321 } __packed; 322 323 int avs_ipc_set_dx(struct avs_dev *adev, u32 core_mask, bool powerup); 324 int avs_ipc_set_d0ix(struct avs_dev *adev, bool enable_pg, bool streaming); 325 326 /* Base-firmware runtime parameters */ 327 328 #define AVS_BASEFW_MOD_ID 0 329 #define AVS_BASEFW_INST_ID 0 330 331 enum avs_basefw_runtime_param { 332 AVS_BASEFW_FIRMWARE_CONFIG = 7, 333 AVS_BASEFW_HARDWARE_CONFIG = 8, 334 AVS_BASEFW_MODULES_INFO = 9, 335 AVS_BASEFW_LIBRARIES_INFO = 16, 336 }; 337 338 struct avs_fw_version { 339 u16 major; 340 u16 minor; 341 u16 hotfix; 342 u16 build; 343 }; 344 345 enum avs_fw_cfg_params { 346 AVS_FW_CFG_FW_VERSION = 0, 347 AVS_FW_CFG_MEMORY_RECLAIMED, 348 AVS_FW_CFG_SLOW_CLOCK_FREQ_HZ, 349 AVS_FW_CFG_FAST_CLOCK_FREQ_HZ, 350 AVS_FW_CFG_DMA_BUFFER_CONFIG, 351 AVS_FW_CFG_ALH_SUPPORT_LEVEL, 352 AVS_FW_CFG_IPC_DL_MAILBOX_BYTES, 353 AVS_FW_CFG_IPC_UL_MAILBOX_BYTES, 354 AVS_FW_CFG_TRACE_LOG_BYTES, 355 AVS_FW_CFG_MAX_PPL_COUNT, 356 AVS_FW_CFG_MAX_ASTATE_COUNT, 357 AVS_FW_CFG_MAX_MODULE_PIN_COUNT, 358 AVS_FW_CFG_MODULES_COUNT, 359 AVS_FW_CFG_MAX_MOD_INST_COUNT, 360 AVS_FW_CFG_MAX_LL_TASKS_PER_PRI_COUNT, 361 AVS_FW_CFG_LL_PRI_COUNT, 362 AVS_FW_CFG_MAX_DP_TASKS_COUNT, 363 AVS_FW_CFG_MAX_LIBS_COUNT, 364 AVS_FW_CFG_SCHEDULER_CONFIG, 365 AVS_FW_CFG_XTAL_FREQ_HZ, 366 AVS_FW_CFG_CLOCKS_CONFIG, 367 AVS_FW_CFG_RESERVED, 368 AVS_FW_CFG_POWER_GATING_POLICY, 369 AVS_FW_CFG_ASSERT_MODE, 370 }; 371 372 struct avs_fw_cfg { 373 struct avs_fw_version fw_version; 374 u32 memory_reclaimed; 375 u32 slow_clock_freq_hz; 376 u32 fast_clock_freq_hz; 377 u32 alh_support; 378 u32 ipc_dl_mailbox_bytes; 379 u32 ipc_ul_mailbox_bytes; 380 u32 trace_log_bytes; 381 u32 max_ppl_count; 382 u32 max_astate_count; 383 u32 max_module_pin_count; 384 u32 modules_count; 385 u32 max_mod_inst_count; 386 u32 max_ll_tasks_per_pri_count; 387 u32 ll_pri_count; 388 u32 max_dp_tasks_count; 389 u32 max_libs_count; 390 u32 xtal_freq_hz; 391 u32 power_gating_policy; 392 }; 393 394 int avs_ipc_get_fw_config(struct avs_dev *adev, struct avs_fw_cfg *cfg); 395 396 enum avs_hw_cfg_params { 397 AVS_HW_CFG_AVS_VER, 398 AVS_HW_CFG_DSP_CORES, 399 AVS_HW_CFG_MEM_PAGE_BYTES, 400 AVS_HW_CFG_TOTAL_PHYS_MEM_PAGES, 401 AVS_HW_CFG_I2S_CAPS, 402 AVS_HW_CFG_GPDMA_CAPS, 403 AVS_HW_CFG_GATEWAY_COUNT, 404 AVS_HW_CFG_HP_EBB_COUNT, 405 AVS_HW_CFG_LP_EBB_COUNT, 406 AVS_HW_CFG_EBB_SIZE_BYTES, 407 }; 408 409 enum avs_iface_version { 410 AVS_AVS_VER_1_5 = 0x10005, 411 AVS_AVS_VER_1_8 = 0x10008, 412 }; 413 414 enum avs_i2s_version { 415 AVS_I2S_VER_15_SKYLAKE = 0x00000, 416 AVS_I2S_VER_15_BROXTON = 0x10000, 417 AVS_I2S_VER_15_BROXTON_P = 0x20000, 418 AVS_I2S_VER_18_KBL_CNL = 0x30000, 419 }; 420 421 struct avs_i2s_caps { 422 u32 i2s_version; 423 u32 ctrl_count; 424 u32 *ctrl_base_addr; 425 }; 426 427 struct avs_hw_cfg { 428 u32 avs_version; 429 u32 dsp_cores; 430 u32 mem_page_bytes; 431 u32 total_phys_mem_pages; 432 struct avs_i2s_caps i2s_caps; 433 u32 gateway_count; 434 u32 hp_ebb_count; 435 u32 lp_ebb_count; 436 u32 ebb_size_bytes; 437 }; 438 439 int avs_ipc_get_hw_config(struct avs_dev *adev, struct avs_hw_cfg *cfg); 440 441 #define AVS_MODULE_LOAD_TYPE_BUILTIN 0 442 #define AVS_MODULE_LOAD_TYPE_LOADABLE 1 443 #define AVS_MODULE_STATE_LOADED BIT(0) 444 445 struct avs_module_type { 446 u32 load_type:4; 447 u32 auto_start:1; 448 u32 domain_ll:1; 449 u32 domain_dp:1; 450 u32 lib_code:1; 451 u32 rsvd:24; 452 } __packed; 453 454 union avs_segment_flags { 455 u32 ul; 456 struct { 457 u32 contents:1; 458 u32 alloc:1; 459 u32 load:1; 460 u32 readonly:1; 461 u32 code:1; 462 u32 data:1; 463 u32 rsvd_1:2; 464 u32 type:4; 465 u32 rsvd_2:4; 466 u32 length:16; 467 }; 468 } __packed; 469 470 struct avs_segment_desc { 471 union avs_segment_flags flags; 472 u32 v_base_addr; 473 u32 file_offset; 474 } __packed; 475 476 struct avs_module_entry { 477 u16 module_id; 478 u16 state_flags; 479 u8 name[8]; 480 guid_t uuid; 481 struct avs_module_type type; 482 u8 hash[32]; 483 u32 entry_point; 484 u16 cfg_offset; 485 u16 cfg_count; 486 u32 affinity_mask; 487 u16 instance_max_count; 488 u16 instance_bss_size; 489 struct avs_segment_desc segments[3]; 490 } __packed; 491 492 struct avs_mods_info { 493 u32 count; 494 struct avs_module_entry entries[]; 495 } __packed; 496 497 static inline bool avs_module_entry_is_loaded(struct avs_module_entry *mentry) 498 { 499 return mentry->type.load_type == AVS_MODULE_LOAD_TYPE_BUILTIN || 500 mentry->state_flags & AVS_MODULE_STATE_LOADED; 501 } 502 503 int avs_ipc_get_modules_info(struct avs_dev *adev, struct avs_mods_info **info); 504 505 /* Module configuration */ 506 507 #define AVS_MIXIN_MOD_UUID \ 508 GUID_INIT(0x39656EB2, 0x3B71, 0x4049, 0x8D, 0x3F, 0xF9, 0x2C, 0xD5, 0xC4, 0x3C, 0x09) 509 510 #define AVS_MIXOUT_MOD_UUID \ 511 GUID_INIT(0x3C56505A, 0x24D7, 0x418F, 0xBD, 0xDC, 0xC1, 0xF5, 0xA3, 0xAC, 0x2A, 0xE0) 512 513 #define AVS_COPIER_MOD_UUID \ 514 GUID_INIT(0x9BA00C83, 0xCA12, 0x4A83, 0x94, 0x3C, 0x1F, 0xA2, 0xE8, 0x2F, 0x9D, 0xDA) 515 516 #define AVS_KPBUFF_MOD_UUID \ 517 GUID_INIT(0xA8A0CB32, 0x4A77, 0x4DB1, 0x85, 0xC7, 0x53, 0xD7, 0xEE, 0x07, 0xBC, 0xE6) 518 519 #define AVS_MICSEL_MOD_UUID \ 520 GUID_INIT(0x32FE92C1, 0x1E17, 0x4FC2, 0x97, 0x58, 0xC7, 0xF3, 0x54, 0x2E, 0x98, 0x0A) 521 522 #define AVS_MUX_MOD_UUID \ 523 GUID_INIT(0x64CE6E35, 0x857A, 0x4878, 0xAC, 0xE8, 0xE2, 0xA2, 0xF4, 0x2e, 0x30, 0x69) 524 525 #define AVS_UPDWMIX_MOD_UUID \ 526 GUID_INIT(0x42F8060C, 0x832F, 0x4DBF, 0xB2, 0x47, 0x51, 0xE9, 0x61, 0x99, 0x7b, 0x35) 527 528 #define AVS_SRCINTC_MOD_UUID \ 529 GUID_INIT(0xE61BB28D, 0x149A, 0x4C1F, 0xB7, 0x09, 0x46, 0x82, 0x3E, 0xF5, 0xF5, 0xAE) 530 531 #define AVS_PROBE_MOD_UUID \ 532 GUID_INIT(0x7CAD0808, 0xAB10, 0xCD23, 0xEF, 0x45, 0x12, 0xAB, 0x34, 0xCD, 0x56, 0xEF) 533 534 #define AVS_AEC_MOD_UUID \ 535 GUID_INIT(0x46CB87FB, 0xD2C9, 0x4970, 0x96, 0xD2, 0x6D, 0x7E, 0x61, 0x4B, 0xB6, 0x05) 536 537 #define AVS_ASRC_MOD_UUID \ 538 GUID_INIT(0x66B4402D, 0xB468, 0x42F2, 0x81, 0xA7, 0xB3, 0x71, 0x21, 0x86, 0x3D, 0xD4) 539 540 #define AVS_INTELWOV_MOD_UUID \ 541 GUID_INIT(0xEC774FA9, 0x28D3, 0x424A, 0x90, 0xE4, 0x69, 0xF9, 0x84, 0xF1, 0xEE, 0xB7) 542 543 /* channel map */ 544 enum avs_channel_index { 545 AVS_CHANNEL_LEFT = 0, 546 AVS_CHANNEL_RIGHT = 1, 547 AVS_CHANNEL_CENTER = 2, 548 AVS_CHANNEL_LEFT_SURROUND = 3, 549 AVS_CHANNEL_CENTER_SURROUND = 3, 550 AVS_CHANNEL_RIGHT_SURROUND = 4, 551 AVS_CHANNEL_LFE = 7, 552 AVS_CHANNEL_INVALID = 0xF, 553 }; 554 555 enum avs_channel_config { 556 AVS_CHANNEL_CONFIG_MONO = 0, 557 AVS_CHANNEL_CONFIG_STEREO = 1, 558 AVS_CHANNEL_CONFIG_2_1 = 2, 559 AVS_CHANNEL_CONFIG_3_0 = 3, 560 AVS_CHANNEL_CONFIG_3_1 = 4, 561 AVS_CHANNEL_CONFIG_QUATRO = 5, 562 AVS_CHANNEL_CONFIG_4_0 = 6, 563 AVS_CHANNEL_CONFIG_5_0 = 7, 564 AVS_CHANNEL_CONFIG_5_1 = 8, 565 AVS_CHANNEL_CONFIG_DUAL_MONO = 9, 566 AVS_CHANNEL_CONFIG_I2S_DUAL_STEREO_0 = 10, 567 AVS_CHANNEL_CONFIG_I2S_DUAL_STEREO_1 = 11, 568 AVS_CHANNEL_CONFIG_4_CHANNEL = 12, 569 AVS_CHANNEL_CONFIG_INVALID 570 }; 571 572 enum avs_interleaving { 573 AVS_INTERLEAVING_PER_CHANNEL = 0, 574 AVS_INTERLEAVING_PER_SAMPLE = 1, 575 }; 576 577 enum avs_sample_type { 578 AVS_SAMPLE_TYPE_INT_MSB = 0, 579 AVS_SAMPLE_TYPE_INT_LSB = 1, 580 AVS_SAMPLE_TYPE_INT_SIGNED = 2, 581 AVS_SAMPLE_TYPE_INT_UNSIGNED = 3, 582 AVS_SAMPLE_TYPE_FLOAT = 4, 583 }; 584 585 #define AVS_CHANNELS_MAX 8 586 #define AVS_ALL_CHANNELS_MASK UINT_MAX 587 588 struct avs_audio_format { 589 u32 sampling_freq; 590 u32 bit_depth; 591 u32 channel_map; 592 u32 channel_config; 593 u32 interleaving; 594 u32 num_channels:8; 595 u32 valid_bit_depth:8; 596 u32 sample_type:8; 597 u32 reserved:8; 598 } __packed; 599 600 struct avs_modcfg_base { 601 u32 cpc; 602 u32 ibs; 603 u32 obs; 604 u32 is_pages; 605 struct avs_audio_format audio_fmt; 606 } __packed; 607 608 struct avs_pin_format { 609 u32 pin_index; 610 u32 iobs; 611 struct avs_audio_format audio_fmt; 612 } __packed; 613 614 struct avs_modcfg_ext { 615 struct avs_modcfg_base base; 616 u16 num_input_pins; 617 u16 num_output_pins; 618 u8 reserved[12]; 619 /* input pin formats followed by output ones */ 620 struct avs_pin_format pin_fmts[]; 621 } __packed; 622 623 enum avs_dma_type { 624 AVS_DMA_HDA_HOST_OUTPUT = 0, 625 AVS_DMA_HDA_HOST_INPUT = 1, 626 AVS_DMA_HDA_LINK_OUTPUT = 8, 627 AVS_DMA_HDA_LINK_INPUT = 9, 628 AVS_DMA_DMIC_LINK_INPUT = 11, 629 AVS_DMA_I2S_LINK_OUTPUT = 12, 630 AVS_DMA_I2S_LINK_INPUT = 13, 631 }; 632 633 union avs_virtual_index { 634 u8 val; 635 struct { 636 u8 time_slot:4; 637 u8 instance:4; 638 } i2s; 639 struct { 640 u8 queue_id:3; 641 u8 time_slot:2; 642 u8 instance:3; 643 } dmic; 644 } __packed; 645 646 union avs_connector_node_id { 647 u32 val; 648 struct { 649 u32 vindex:8; 650 u32 dma_type:5; 651 u32 rsvd:19; 652 }; 653 } __packed; 654 655 #define INVALID_PIPELINE_ID 0xFF 656 #define INVALID_NODE_ID \ 657 ((union avs_connector_node_id) { UINT_MAX }) 658 659 union avs_gtw_attributes { 660 u32 val; 661 struct { 662 u32 lp_buffer_alloc:1; 663 u32 rsvd:31; 664 }; 665 } __packed; 666 667 struct avs_copier_gtw_cfg { 668 union avs_connector_node_id node_id; 669 u32 dma_buffer_size; 670 u32 config_length; 671 struct { 672 union avs_gtw_attributes attrs; 673 u32 blob[]; 674 } config; 675 } __packed; 676 677 struct avs_copier_cfg { 678 struct avs_modcfg_base base; 679 struct avs_audio_format out_fmt; 680 u32 feature_mask; 681 struct avs_copier_gtw_cfg gtw_cfg; 682 } __packed; 683 684 struct avs_micsel_cfg { 685 struct avs_modcfg_base base; 686 struct avs_audio_format out_fmt; 687 } __packed; 688 689 struct avs_mux_cfg { 690 struct avs_modcfg_base base; 691 struct avs_audio_format ref_fmt; 692 struct avs_audio_format out_fmt; 693 } __packed; 694 695 struct avs_updown_mixer_cfg { 696 struct avs_modcfg_base base; 697 u32 out_channel_config; 698 u32 coefficients_select; 699 s32 coefficients[AVS_CHANNELS_MAX]; 700 u32 channel_map; 701 } __packed; 702 703 struct avs_src_cfg { 704 struct avs_modcfg_base base; 705 u32 out_freq; 706 } __packed; 707 708 struct avs_probe_gtw_cfg { 709 union avs_connector_node_id node_id; 710 u32 dma_buffer_size; 711 } __packed; 712 713 struct avs_probe_cfg { 714 struct avs_modcfg_base base; 715 struct avs_probe_gtw_cfg gtw_cfg; 716 } __packed; 717 718 struct avs_aec_cfg { 719 struct avs_modcfg_base base; 720 struct avs_audio_format ref_fmt; 721 struct avs_audio_format out_fmt; 722 u32 cpc_lp_mode; 723 } __packed; 724 725 struct avs_asrc_cfg { 726 struct avs_modcfg_base base; 727 u32 out_freq; 728 u32 rsvd0:1; 729 u32 mode:1; 730 u32 rsvd2:2; 731 u32 disable_jitter_buffer:1; 732 u32 rsvd3:27; 733 } __packed; 734 735 struct avs_wov_cfg { 736 struct avs_modcfg_base base; 737 u32 cpc_lp_mode; 738 } __packed; 739 740 /* Module runtime parameters */ 741 742 enum avs_copier_runtime_param { 743 AVS_COPIER_SET_SINK_FORMAT = 2, 744 }; 745 746 struct avs_copier_sink_format { 747 u32 sink_id; 748 struct avs_audio_format src_fmt; 749 struct avs_audio_format sink_fmt; 750 } __packed; 751 752 int avs_ipc_copier_set_sink_format(struct avs_dev *adev, u16 module_id, 753 u8 instance_id, u32 sink_id, 754 const struct avs_audio_format *src_fmt, 755 const struct avs_audio_format *sink_fmt); 756 757 #endif /* __SOUND_SOC_INTEL_AVS_MSGS_H */ 758