1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright(c) 2021-2022 Intel Corporation. All rights reserved. 4 * 5 * Authors: Cezary Rojewski <cezary.rojewski@intel.com> 6 * Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com> 7 */ 8 9 #ifndef __SOUND_SOC_INTEL_AVS_H 10 #define __SOUND_SOC_INTEL_AVS_H 11 12 #include <linux/device.h> 13 #include <linux/firmware.h> 14 #include <sound/hda_codec.h> 15 #include <sound/hda_register.h> 16 #include <sound/soc-component.h> 17 #include "messages.h" 18 #include "registers.h" 19 20 struct avs_dev; 21 struct avs_tplg; 22 23 /* 24 * struct avs_dsp_ops - Platform-specific DSP operations 25 * 26 * @power: Power on or off DSP cores 27 * @reset: Enter or exit reset state on DSP cores 28 * @stall: Stall or run DSP cores 29 * @irq_handler: Top half of IPC servicing 30 * @irq_thread: Bottom half of IPC servicing 31 * @int_control: Enable or disable IPC interrupts 32 */ 33 struct avs_dsp_ops { 34 int (* const power)(struct avs_dev *, u32, bool); 35 int (* const reset)(struct avs_dev *, u32, bool); 36 int (* const stall)(struct avs_dev *, u32, bool); 37 irqreturn_t (* const irq_handler)(int, void *); 38 irqreturn_t (* const irq_thread)(int, void *); 39 void (* const int_control)(struct avs_dev *, bool); 40 int (* const load_basefw)(struct avs_dev *, struct firmware *); 41 int (* const load_lib)(struct avs_dev *, struct firmware *, u32); 42 int (* const transfer_mods)(struct avs_dev *, bool, struct avs_module_entry *, u32); 43 }; 44 45 #define avs_dsp_op(adev, op, ...) \ 46 ((adev)->spec->dsp_ops->op(adev, ## __VA_ARGS__)) 47 48 #define AVS_PLATATTR_CLDMA BIT_ULL(0) 49 #define AVS_PLATATTR_IMR BIT_ULL(1) 50 51 #define avs_platattr_test(adev, attr) \ 52 ((adev)->spec->attributes & AVS_PLATATTR_##attr) 53 54 /* Platform specific descriptor */ 55 struct avs_spec { 56 const char *name; 57 58 const struct avs_dsp_ops *const dsp_ops; 59 struct avs_fw_version min_fw_version; /* anything below is rejected */ 60 61 const u32 core_init_mask; /* used during DSP boot */ 62 const u64 attributes; /* bitmask of AVS_PLATATTR_* */ 63 const u32 sram_base_offset; 64 const u32 sram_window_size; 65 const u32 rom_status; 66 }; 67 68 struct avs_fw_entry { 69 char *name; 70 const struct firmware *fw; 71 72 struct list_head node; 73 }; 74 75 /* 76 * struct avs_dev - Intel HD-Audio driver data 77 * 78 * @dev: PCI device 79 * @dsp_ba: DSP bar address 80 * @spec: platform-specific descriptor 81 * @fw_cfg: Firmware configuration, obtained through FW_CONFIG message 82 * @hw_cfg: Hardware configuration, obtained through HW_CONFIG message 83 * @mods_info: Available module-types, obtained through MODULES_INFO message 84 * @mod_idas: Module instance ID pool, one per module-type 85 * @modres_mutex: For synchronizing any @mods_info updates 86 * @ppl_ida: Pipeline instance ID pool 87 * @fw_list: List of libraries loaded, including base firmware 88 */ 89 struct avs_dev { 90 struct hda_bus base; 91 struct device *dev; 92 93 void __iomem *dsp_ba; 94 const struct avs_spec *spec; 95 struct avs_ipc *ipc; 96 97 struct avs_fw_cfg fw_cfg; 98 struct avs_hw_cfg hw_cfg; 99 struct avs_mods_info *mods_info; 100 struct ida **mod_idas; 101 struct mutex modres_mutex; 102 struct ida ppl_ida; 103 struct list_head fw_list; 104 int *core_refs; /* reference count per core */ 105 char **lib_names; 106 107 struct completion fw_ready; 108 109 struct nhlt_acpi_table *nhlt; 110 struct list_head comp_list; 111 struct mutex comp_list_mutex; 112 struct list_head path_list; 113 spinlock_t path_list_lock; 114 struct mutex path_mutex; 115 }; 116 117 /* from hda_bus to avs_dev */ 118 #define hda_to_avs(hda) container_of(hda, struct avs_dev, base) 119 /* from hdac_bus to avs_dev */ 120 #define hdac_to_avs(hdac) hda_to_avs(to_hda_bus(hdac)) 121 /* from device to avs_dev */ 122 #define to_avs_dev(dev) \ 123 ({ \ 124 struct hdac_bus *__bus = dev_get_drvdata(dev); \ 125 hdac_to_avs(__bus); \ 126 }) 127 128 int avs_dsp_core_power(struct avs_dev *adev, u32 core_mask, bool power); 129 int avs_dsp_core_reset(struct avs_dev *adev, u32 core_mask, bool reset); 130 int avs_dsp_core_stall(struct avs_dev *adev, u32 core_mask, bool stall); 131 int avs_dsp_core_enable(struct avs_dev *adev, u32 core_mask); 132 int avs_dsp_core_disable(struct avs_dev *adev, u32 core_mask); 133 134 /* Inter Process Communication */ 135 136 struct avs_ipc_msg { 137 union { 138 u64 header; 139 union avs_global_msg glb; 140 union avs_reply_msg rsp; 141 }; 142 void *data; 143 size_t size; 144 }; 145 146 /* 147 * struct avs_ipc - DSP IPC context 148 * 149 * @dev: PCI device 150 * @rx: Reply message cache 151 * @default_timeout_ms: default message timeout in MS 152 * @ready: whether firmware is ready and communication is open 153 * @rx_completed: whether RX for previously sent TX has been received 154 * @rx_lock: for serializing manipulation of rx_* fields 155 * @msg_lock: for synchronizing request handling 156 * @done_completion: DONE-part of IPC i.e. ROM and ACKs from FW 157 * @busy_completion: BUSY-part of IPC i.e. receiving responses from FW 158 */ 159 struct avs_ipc { 160 struct device *dev; 161 162 struct avs_ipc_msg rx; 163 u32 default_timeout_ms; 164 bool ready; 165 166 bool rx_completed; 167 spinlock_t rx_lock; 168 struct mutex msg_mutex; 169 struct completion done_completion; 170 struct completion busy_completion; 171 }; 172 173 #define AVS_EIPC EREMOTEIO 174 /* 175 * IPC handlers may return positive value (firmware error code) what denotes 176 * successful HOST <-> DSP communication yet failure to process specific request. 177 * 178 * Below macro converts returned value to linux kernel error code. 179 * All IPC callers MUST use it as soon as firmware error code is consumed. 180 */ 181 #define AVS_IPC_RET(ret) \ 182 (((ret) <= 0) ? (ret) : -AVS_EIPC) 183 184 static inline void avs_ipc_err(struct avs_dev *adev, struct avs_ipc_msg *tx, 185 const char *name, int error) 186 { 187 /* 188 * If IPC channel is blocked e.g.: due to ongoing recovery, 189 * -EPERM error code is expected and thus it's not an actual error. 190 */ 191 if (error == -EPERM) 192 dev_dbg(adev->dev, "%s 0x%08x 0x%08x failed: %d\n", name, 193 tx->glb.primary, tx->glb.ext.val, error); 194 else 195 dev_err(adev->dev, "%s 0x%08x 0x%08x failed: %d\n", name, 196 tx->glb.primary, tx->glb.ext.val, error); 197 } 198 199 irqreturn_t avs_dsp_irq_handler(int irq, void *dev_id); 200 irqreturn_t avs_dsp_irq_thread(int irq, void *dev_id); 201 void avs_dsp_process_response(struct avs_dev *adev, u64 header); 202 int avs_dsp_send_msg_timeout(struct avs_dev *adev, 203 struct avs_ipc_msg *request, 204 struct avs_ipc_msg *reply, int timeout); 205 int avs_dsp_send_msg(struct avs_dev *adev, 206 struct avs_ipc_msg *request, struct avs_ipc_msg *reply); 207 int avs_dsp_send_rom_msg_timeout(struct avs_dev *adev, 208 struct avs_ipc_msg *request, int timeout); 209 int avs_dsp_send_rom_msg(struct avs_dev *adev, struct avs_ipc_msg *request); 210 void avs_dsp_interrupt_control(struct avs_dev *adev, bool enable); 211 int avs_ipc_init(struct avs_ipc *ipc, struct device *dev); 212 void avs_ipc_block(struct avs_ipc *ipc); 213 214 /* Firmware resources management */ 215 216 int avs_get_module_entry(struct avs_dev *adev, const guid_t *uuid, struct avs_module_entry *entry); 217 int avs_get_module_id_entry(struct avs_dev *adev, u32 module_id, struct avs_module_entry *entry); 218 int avs_get_module_id(struct avs_dev *adev, const guid_t *uuid); 219 bool avs_is_module_ida_empty(struct avs_dev *adev, u32 module_id); 220 221 int avs_module_info_init(struct avs_dev *adev, bool purge); 222 void avs_module_info_free(struct avs_dev *adev); 223 int avs_module_id_alloc(struct avs_dev *adev, u16 module_id); 224 void avs_module_id_free(struct avs_dev *adev, u16 module_id, u8 instance_id); 225 int avs_request_firmware(struct avs_dev *adev, const struct firmware **fw_p, const char *name); 226 void avs_release_last_firmware(struct avs_dev *adev); 227 void avs_release_firmwares(struct avs_dev *adev); 228 229 int avs_dsp_init_module(struct avs_dev *adev, u16 module_id, u8 ppl_instance_id, 230 u8 core_id, u8 domain, void *param, u32 param_size, 231 u16 *instance_id); 232 void avs_dsp_delete_module(struct avs_dev *adev, u16 module_id, u16 instance_id, 233 u8 ppl_instance_id, u8 core_id); 234 int avs_dsp_create_pipeline(struct avs_dev *adev, u16 req_size, u8 priority, 235 bool lp, u16 attributes, u8 *instance_id); 236 int avs_dsp_delete_pipeline(struct avs_dev *adev, u8 instance_id); 237 238 /* Firmware loading */ 239 240 void avs_hda_clock_gating_enable(struct avs_dev *adev, bool enable); 241 void avs_hda_power_gating_enable(struct avs_dev *adev, bool enable); 242 void avs_hda_l1sen_enable(struct avs_dev *adev, bool enable); 243 244 int avs_dsp_boot_firmware(struct avs_dev *adev, bool purge); 245 int avs_dsp_first_boot_firmware(struct avs_dev *adev); 246 247 int avs_cldma_load_basefw(struct avs_dev *adev, struct firmware *fw); 248 int avs_cldma_load_library(struct avs_dev *adev, struct firmware *lib, u32 id); 249 int avs_cldma_transfer_modules(struct avs_dev *adev, bool load, 250 struct avs_module_entry *mods, u32 num_mods); 251 int avs_hda_load_basefw(struct avs_dev *adev, struct firmware *fw); 252 int avs_hda_load_library(struct avs_dev *adev, struct firmware *lib, u32 id); 253 int avs_hda_transfer_modules(struct avs_dev *adev, bool load, 254 struct avs_module_entry *mods, u32 num_mods); 255 256 /* Soc component members */ 257 258 struct avs_soc_component { 259 struct snd_soc_component base; 260 struct avs_tplg *tplg; 261 262 struct list_head node; 263 }; 264 265 #define to_avs_soc_component(comp) \ 266 container_of(comp, struct avs_soc_component, base) 267 268 extern const struct snd_soc_dai_ops avs_dai_fe_ops; 269 270 #endif /* __SOUND_SOC_INTEL_AVS_H */ 271