1 /* 2 * linux/sound/mpc5200-ac97.c -- AC97 support for the Freescale MPC52xx chip. 3 * 4 * Copyright (C) 2009 Jon Smirl, Digispeaker 5 * Author: Jon Smirl <jonsmirl@gmail.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 12 #include <linux/module.h> 13 #include <linux/of_device.h> 14 #include <linux/of_platform.h> 15 #include <linux/delay.h> 16 #include <linux/time.h> 17 18 #include <sound/pcm.h> 19 #include <sound/pcm_params.h> 20 #include <sound/soc.h> 21 22 #include <asm/time.h> 23 #include <asm/delay.h> 24 #include <asm/mpc52xx.h> 25 #include <asm/mpc52xx_psc.h> 26 27 #include "mpc5200_dma.h" 28 29 #define DRV_NAME "mpc5200-psc-ac97" 30 31 /* ALSA only supports a single AC97 device so static is recommend here */ 32 static struct psc_dma *psc_dma; 33 34 static unsigned short psc_ac97_read(struct snd_ac97 *ac97, unsigned short reg) 35 { 36 int status; 37 unsigned int val; 38 39 mutex_lock(&psc_dma->mutex); 40 41 /* Wait for command send status zero = ready */ 42 status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) & 43 MPC52xx_PSC_SR_CMDSEND), 100, 0); 44 if (status == 0) { 45 pr_err("timeout on ac97 bus (rdy)\n"); 46 mutex_unlock(&psc_dma->mutex); 47 return -ENODEV; 48 } 49 50 /* Force clear the data valid bit */ 51 in_be32(&psc_dma->psc_regs->ac97_data); 52 53 /* Send the read */ 54 out_be32(&psc_dma->psc_regs->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24)); 55 56 /* Wait for the answer */ 57 status = spin_event_timeout((in_be16(&psc_dma->psc_regs->sr_csr.status) & 58 MPC52xx_PSC_SR_DATA_VAL), 100, 0); 59 if (status == 0) { 60 pr_err("timeout on ac97 read (val) %x\n", 61 in_be16(&psc_dma->psc_regs->sr_csr.status)); 62 mutex_unlock(&psc_dma->mutex); 63 return -ENODEV; 64 } 65 /* Get the data */ 66 val = in_be32(&psc_dma->psc_regs->ac97_data); 67 if (((val >> 24) & 0x7f) != reg) { 68 pr_err("reg echo error on ac97 read\n"); 69 mutex_unlock(&psc_dma->mutex); 70 return -ENODEV; 71 } 72 val = (val >> 8) & 0xffff; 73 74 mutex_unlock(&psc_dma->mutex); 75 return (unsigned short) val; 76 } 77 78 static void psc_ac97_write(struct snd_ac97 *ac97, 79 unsigned short reg, unsigned short val) 80 { 81 int status; 82 83 mutex_lock(&psc_dma->mutex); 84 85 /* Wait for command status zero = ready */ 86 status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) & 87 MPC52xx_PSC_SR_CMDSEND), 100, 0); 88 if (status == 0) { 89 pr_err("timeout on ac97 bus (write)\n"); 90 goto out; 91 } 92 /* Write data */ 93 out_be32(&psc_dma->psc_regs->ac97_cmd, 94 ((reg & 0x7f) << 24) | (val << 8)); 95 96 out: 97 mutex_unlock(&psc_dma->mutex); 98 } 99 100 static void psc_ac97_warm_reset(struct snd_ac97 *ac97) 101 { 102 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; 103 104 mutex_lock(&psc_dma->mutex); 105 106 out_be32(®s->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_AWR); 107 udelay(3); 108 out_be32(®s->sicr, psc_dma->sicr); 109 110 mutex_unlock(&psc_dma->mutex); 111 } 112 113 static void psc_ac97_cold_reset(struct snd_ac97 *ac97) 114 { 115 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; 116 117 mutex_lock(&psc_dma->mutex); 118 dev_dbg(psc_dma->dev, "cold reset\n"); 119 120 mpc5200_psc_ac97_gpio_reset(psc_dma->id); 121 122 /* Notify the PSC that a reset has occurred */ 123 out_be32(®s->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_ACRB); 124 125 /* Re-enable RX and TX */ 126 out_8(®s->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE); 127 128 mutex_unlock(&psc_dma->mutex); 129 130 usleep_range(1000, 2000); 131 psc_ac97_warm_reset(ac97); 132 } 133 134 static struct snd_ac97_bus_ops psc_ac97_ops = { 135 .read = psc_ac97_read, 136 .write = psc_ac97_write, 137 .reset = psc_ac97_cold_reset, 138 .warm_reset = psc_ac97_warm_reset, 139 }; 140 141 static int psc_ac97_hw_analog_params(struct snd_pcm_substream *substream, 142 struct snd_pcm_hw_params *params, 143 struct snd_soc_dai *cpu_dai) 144 { 145 struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(cpu_dai); 146 struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma); 147 148 dev_dbg(psc_dma->dev, "%s(substream=%p) p_size=%i p_bytes=%i" 149 " periods=%i buffer_size=%i buffer_bytes=%i channels=%i" 150 " rate=%i format=%i\n", 151 __func__, substream, params_period_size(params), 152 params_period_bytes(params), params_periods(params), 153 params_buffer_size(params), params_buffer_bytes(params), 154 params_channels(params), params_rate(params), 155 params_format(params)); 156 157 /* Determine the set of enable bits to turn on */ 158 s->ac97_slot_bits = (params_channels(params) == 1) ? 0x100 : 0x300; 159 if (substream->pstr->stream != SNDRV_PCM_STREAM_CAPTURE) 160 s->ac97_slot_bits <<= 16; 161 return 0; 162 } 163 164 static int psc_ac97_hw_digital_params(struct snd_pcm_substream *substream, 165 struct snd_pcm_hw_params *params, 166 struct snd_soc_dai *cpu_dai) 167 { 168 struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(cpu_dai); 169 170 dev_dbg(psc_dma->dev, "%s(substream=%p)\n", __func__, substream); 171 172 if (params_channels(params) == 1) 173 out_be32(&psc_dma->psc_regs->ac97_slots, 0x01000000); 174 else 175 out_be32(&psc_dma->psc_regs->ac97_slots, 0x03000000); 176 177 return 0; 178 } 179 180 static int psc_ac97_trigger(struct snd_pcm_substream *substream, int cmd, 181 struct snd_soc_dai *dai) 182 { 183 struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(dai); 184 struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma); 185 186 switch (cmd) { 187 case SNDRV_PCM_TRIGGER_START: 188 dev_dbg(psc_dma->dev, "AC97 START: stream=%i\n", 189 substream->pstr->stream); 190 191 /* Set the slot enable bits */ 192 psc_dma->slots |= s->ac97_slot_bits; 193 out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots); 194 break; 195 196 case SNDRV_PCM_TRIGGER_STOP: 197 dev_dbg(psc_dma->dev, "AC97 STOP: stream=%i\n", 198 substream->pstr->stream); 199 200 /* Clear the slot enable bits */ 201 psc_dma->slots &= ~(s->ac97_slot_bits); 202 out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots); 203 break; 204 } 205 return 0; 206 } 207 208 static int psc_ac97_probe(struct snd_soc_dai *cpu_dai) 209 { 210 struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(cpu_dai); 211 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; 212 213 /* Go */ 214 out_8(®s->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE); 215 return 0; 216 } 217 218 /* --------------------------------------------------------------------- 219 * ALSA SoC Bindings 220 * 221 * - Digital Audio Interface (DAI) template 222 * - create/destroy dai hooks 223 */ 224 225 /** 226 * psc_ac97_dai_template: template CPU Digital Audio Interface 227 */ 228 static const struct snd_soc_dai_ops psc_ac97_analog_ops = { 229 .hw_params = psc_ac97_hw_analog_params, 230 .trigger = psc_ac97_trigger, 231 }; 232 233 static const struct snd_soc_dai_ops psc_ac97_digital_ops = { 234 .hw_params = psc_ac97_hw_digital_params, 235 }; 236 237 static struct snd_soc_dai_driver psc_ac97_dai[] = { 238 { 239 .name = "mpc5200-psc-ac97.0", 240 .bus_control = true, 241 .probe = psc_ac97_probe, 242 .playback = { 243 .stream_name = "AC97 Playback", 244 .channels_min = 1, 245 .channels_max = 6, 246 .rates = SNDRV_PCM_RATE_8000_48000, 247 .formats = SNDRV_PCM_FMTBIT_S32_BE, 248 }, 249 .capture = { 250 .stream_name = "AC97 Capture", 251 .channels_min = 1, 252 .channels_max = 2, 253 .rates = SNDRV_PCM_RATE_8000_48000, 254 .formats = SNDRV_PCM_FMTBIT_S32_BE, 255 }, 256 .ops = &psc_ac97_analog_ops, 257 }, 258 { 259 .name = "mpc5200-psc-ac97.1", 260 .bus_control = true, 261 .playback = { 262 .stream_name = "AC97 SPDIF", 263 .channels_min = 1, 264 .channels_max = 2, 265 .rates = SNDRV_PCM_RATE_32000 | \ 266 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000, 267 .formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_BE, 268 }, 269 .ops = &psc_ac97_digital_ops, 270 } }; 271 272 static const struct snd_soc_component_driver psc_ac97_component = { 273 .name = DRV_NAME, 274 }; 275 276 277 /* --------------------------------------------------------------------- 278 * OF platform bus binding code: 279 * - Probe/remove operations 280 * - OF device match table 281 */ 282 static int psc_ac97_of_probe(struct platform_device *op) 283 { 284 int rc; 285 struct mpc52xx_psc __iomem *regs; 286 287 rc = mpc5200_audio_dma_create(op); 288 if (rc != 0) 289 return rc; 290 291 rc = snd_soc_set_ac97_ops(&psc_ac97_ops); 292 if (rc != 0) { 293 dev_err(&op->dev, "Failed to set AC'97 ops: %d\n", rc); 294 return rc; 295 } 296 297 rc = snd_soc_register_component(&op->dev, &psc_ac97_component, 298 psc_ac97_dai, ARRAY_SIZE(psc_ac97_dai)); 299 if (rc != 0) { 300 dev_err(&op->dev, "Failed to register DAI\n"); 301 return rc; 302 } 303 304 psc_dma = dev_get_drvdata(&op->dev); 305 regs = psc_dma->psc_regs; 306 307 psc_dma->imr = 0; 308 out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr); 309 310 /* Configure the serial interface mode to AC97 */ 311 psc_dma->sicr = MPC52xx_PSC_SICR_SIM_AC97 | MPC52xx_PSC_SICR_ENAC97; 312 out_be32(®s->sicr, psc_dma->sicr); 313 314 /* No slots active */ 315 out_be32(®s->ac97_slots, 0x00000000); 316 317 return 0; 318 } 319 320 static int psc_ac97_of_remove(struct platform_device *op) 321 { 322 mpc5200_audio_dma_destroy(op); 323 snd_soc_unregister_component(&op->dev); 324 snd_soc_set_ac97_ops(NULL); 325 return 0; 326 } 327 328 /* Match table for of_platform binding */ 329 static const struct of_device_id psc_ac97_match[] = { 330 { .compatible = "fsl,mpc5200-psc-ac97", }, 331 { .compatible = "fsl,mpc5200b-psc-ac97", }, 332 {} 333 }; 334 MODULE_DEVICE_TABLE(of, psc_ac97_match); 335 336 static struct platform_driver psc_ac97_driver = { 337 .probe = psc_ac97_of_probe, 338 .remove = psc_ac97_of_remove, 339 .driver = { 340 .name = "mpc5200-psc-ac97", 341 .of_match_table = psc_ac97_match, 342 }, 343 }; 344 345 module_platform_driver(psc_ac97_driver); 346 347 MODULE_AUTHOR("Jon Smirl <jonsmirl@gmail.com>"); 348 MODULE_DESCRIPTION("mpc5200 AC97 module"); 349 MODULE_LICENSE("GPL"); 350 351