147bbcbfeSAndra Danciu // SPDX-License-Identifier: GPL-2.0+ 247bbcbfeSAndra Danciu // 347bbcbfeSAndra Danciu // Copyright 2012 Freescale Semiconductor, Inc. 447bbcbfeSAndra Danciu // Copyright 2012 Linaro Ltd. 547bbcbfeSAndra Danciu // Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> 647bbcbfeSAndra Danciu // 747bbcbfeSAndra Danciu // Initial development of this code was funded by 81ce8f643SAlexander A. Klimov // Phytec Messtechnik GmbH, https://www.phytec.de 9a23dc694SShawn Guo 10a23dc694SShawn Guo #include <linux/clk.h> 11a23dc694SShawn Guo #include <linux/debugfs.h> 12a23dc694SShawn Guo #include <linux/err.h> 13a23dc694SShawn Guo #include <linux/io.h> 14a23dc694SShawn Guo #include <linux/module.h> 15a23dc694SShawn Guo #include <linux/of.h> 16a23dc694SShawn Guo #include <linux/of_device.h> 17a23dc694SShawn Guo #include <linux/platform_device.h> 18a23dc694SShawn Guo #include <linux/slab.h> 19a23dc694SShawn Guo 20a23dc694SShawn Guo #include "imx-audmux.h" 21a23dc694SShawn Guo 22a23dc694SShawn Guo #define DRIVER_NAME "imx-audmux" 23a23dc694SShawn Guo 24a23dc694SShawn Guo static struct clk *audmux_clk; 25a23dc694SShawn Guo static void __iomem *audmux_base; 268661ab5bSShengjiu Wang static u32 *regcache; 278661ab5bSShengjiu Wang static u32 reg_max; 28a23dc694SShawn Guo 29a23dc694SShawn Guo #define IMX_AUDMUX_V2_PTCR(x) ((x) * 8) 30a23dc694SShawn Guo #define IMX_AUDMUX_V2_PDCR(x) ((x) * 8 + 4) 31a23dc694SShawn Guo 32a23dc694SShawn Guo #ifdef CONFIG_DEBUG_FS 33a23dc694SShawn Guo static struct dentry *audmux_debugfs_root; 34a23dc694SShawn Guo 35a23dc694SShawn Guo /* There is an annoying discontinuity in the SSI numbering with regard 36a23dc694SShawn Guo * to the Linux number of the devices */ 37a23dc694SShawn Guo static const char *audmux_port_string(int port) 38a23dc694SShawn Guo { 39a23dc694SShawn Guo switch (port) { 40a23dc694SShawn Guo case MX31_AUDMUX_PORT1_SSI0: 41a23dc694SShawn Guo return "imx-ssi.0"; 42a23dc694SShawn Guo case MX31_AUDMUX_PORT2_SSI1: 43a23dc694SShawn Guo return "imx-ssi.1"; 44a23dc694SShawn Guo case MX31_AUDMUX_PORT3_SSI_PINS_3: 45a23dc694SShawn Guo return "SSI3"; 46a23dc694SShawn Guo case MX31_AUDMUX_PORT4_SSI_PINS_4: 47a23dc694SShawn Guo return "SSI4"; 48a23dc694SShawn Guo case MX31_AUDMUX_PORT5_SSI_PINS_5: 49a23dc694SShawn Guo return "SSI5"; 50a23dc694SShawn Guo case MX31_AUDMUX_PORT6_SSI_PINS_6: 51a23dc694SShawn Guo return "SSI6"; 52a23dc694SShawn Guo default: 53a23dc694SShawn Guo return "UNKNOWN"; 54a23dc694SShawn Guo } 55a23dc694SShawn Guo } 56a23dc694SShawn Guo 57a23dc694SShawn Guo static ssize_t audmux_read_file(struct file *file, char __user *user_buf, 58a23dc694SShawn Guo size_t count, loff_t *ppos) 59a23dc694SShawn Guo { 60a23dc694SShawn Guo ssize_t ret; 611b3ed70aSFelipe Pena char *buf; 62e5f89768SMark Brown uintptr_t port = (uintptr_t)file->private_data; 63a23dc694SShawn Guo u32 pdcr, ptcr; 64a23dc694SShawn Guo 6572192366SFabio Estevam ret = clk_prepare_enable(audmux_clk); 6672192366SFabio Estevam if (ret) 6772192366SFabio Estevam return ret; 68a23dc694SShawn Guo 69a23dc694SShawn Guo ptcr = readl(audmux_base + IMX_AUDMUX_V2_PTCR(port)); 70a23dc694SShawn Guo pdcr = readl(audmux_base + IMX_AUDMUX_V2_PDCR(port)); 71a23dc694SShawn Guo 72a23dc694SShawn Guo clk_disable_unprepare(audmux_clk); 73a23dc694SShawn Guo 741b3ed70aSFelipe Pena buf = kmalloc(PAGE_SIZE, GFP_KERNEL); 751b3ed70aSFelipe Pena if (!buf) 761b3ed70aSFelipe Pena return -ENOMEM; 771b3ed70aSFelipe Pena 78*a39bc7cfSye xingchen ret = sysfs_emit(buf, "PDCR: %08x\nPTCR: %08x\n", pdcr, ptcr); 79a23dc694SShawn Guo 80a23dc694SShawn Guo if (ptcr & IMX_AUDMUX_V2_PTCR_TFSDIR) 81c407cd00SSilvio Cesare ret += scnprintf(buf + ret, PAGE_SIZE - ret, 82a23dc694SShawn Guo "TxFS output from %s, ", 83a23dc694SShawn Guo audmux_port_string((ptcr >> 27) & 0x7)); 84a23dc694SShawn Guo else 85c407cd00SSilvio Cesare ret += scnprintf(buf + ret, PAGE_SIZE - ret, 86a23dc694SShawn Guo "TxFS input, "); 87a23dc694SShawn Guo 88a23dc694SShawn Guo if (ptcr & IMX_AUDMUX_V2_PTCR_TCLKDIR) 89c407cd00SSilvio Cesare ret += scnprintf(buf + ret, PAGE_SIZE - ret, 90a23dc694SShawn Guo "TxClk output from %s", 91a23dc694SShawn Guo audmux_port_string((ptcr >> 22) & 0x7)); 92a23dc694SShawn Guo else 93c407cd00SSilvio Cesare ret += scnprintf(buf + ret, PAGE_SIZE - ret, 94a23dc694SShawn Guo "TxClk input"); 95a23dc694SShawn Guo 96c407cd00SSilvio Cesare ret += scnprintf(buf + ret, PAGE_SIZE - ret, "\n"); 97a23dc694SShawn Guo 98a23dc694SShawn Guo if (ptcr & IMX_AUDMUX_V2_PTCR_SYN) { 99c407cd00SSilvio Cesare ret += scnprintf(buf + ret, PAGE_SIZE - ret, 100a23dc694SShawn Guo "Port is symmetric"); 101a23dc694SShawn Guo } else { 102a23dc694SShawn Guo if (ptcr & IMX_AUDMUX_V2_PTCR_RFSDIR) 103c407cd00SSilvio Cesare ret += scnprintf(buf + ret, PAGE_SIZE - ret, 104a23dc694SShawn Guo "RxFS output from %s, ", 105a23dc694SShawn Guo audmux_port_string((ptcr >> 17) & 0x7)); 106a23dc694SShawn Guo else 107c407cd00SSilvio Cesare ret += scnprintf(buf + ret, PAGE_SIZE - ret, 108a23dc694SShawn Guo "RxFS input, "); 109a23dc694SShawn Guo 110a23dc694SShawn Guo if (ptcr & IMX_AUDMUX_V2_PTCR_RCLKDIR) 111c407cd00SSilvio Cesare ret += scnprintf(buf + ret, PAGE_SIZE - ret, 112a23dc694SShawn Guo "RxClk output from %s", 113a23dc694SShawn Guo audmux_port_string((ptcr >> 12) & 0x7)); 114a23dc694SShawn Guo else 115c407cd00SSilvio Cesare ret += scnprintf(buf + ret, PAGE_SIZE - ret, 116a23dc694SShawn Guo "RxClk input"); 117a23dc694SShawn Guo } 118a23dc694SShawn Guo 119c407cd00SSilvio Cesare ret += scnprintf(buf + ret, PAGE_SIZE - ret, 120a23dc694SShawn Guo "\nData received from %s\n", 121a23dc694SShawn Guo audmux_port_string((pdcr >> 13) & 0x7)); 122a23dc694SShawn Guo 123a23dc694SShawn Guo ret = simple_read_from_buffer(user_buf, count, ppos, buf, ret); 124a23dc694SShawn Guo 125a23dc694SShawn Guo kfree(buf); 126a23dc694SShawn Guo 127a23dc694SShawn Guo return ret; 128a23dc694SShawn Guo } 129a23dc694SShawn Guo 130a23dc694SShawn Guo static const struct file_operations audmux_debugfs_fops = { 1311eecb828SMark Brown .open = simple_open, 132a23dc694SShawn Guo .read = audmux_read_file, 133a23dc694SShawn Guo .llseek = default_llseek, 134a23dc694SShawn Guo }; 135a23dc694SShawn Guo 136b8909783SLars-Peter Clausen static void audmux_debugfs_init(void) 137a23dc694SShawn Guo { 138e5f89768SMark Brown uintptr_t i; 139a23dc694SShawn Guo char buf[20]; 140a23dc694SShawn Guo 141a23dc694SShawn Guo audmux_debugfs_root = debugfs_create_dir("audmux", NULL); 142a23dc694SShawn Guo 143409b78ccSTorben Hohn for (i = 0; i < MX31_AUDMUX_PORT7_SSI_PINS_7 + 1; i++) { 144e5f89768SMark Brown snprintf(buf, sizeof(buf), "ssi%lu", i); 145227ab8baSGreg Kroah-Hartman debugfs_create_file(buf, 0444, audmux_debugfs_root, 146227ab8baSGreg Kroah-Hartman (void *)i, &audmux_debugfs_fops); 147a23dc694SShawn Guo } 148a23dc694SShawn Guo } 149a23dc694SShawn Guo 150a0a3d518SBill Pemberton static void audmux_debugfs_remove(void) 151a23dc694SShawn Guo { 152a23dc694SShawn Guo debugfs_remove_recursive(audmux_debugfs_root); 153a23dc694SShawn Guo } 154a23dc694SShawn Guo #else 155a23dc694SShawn Guo static inline void audmux_debugfs_init(void) 156a23dc694SShawn Guo { 157a23dc694SShawn Guo } 158a23dc694SShawn Guo 159a23dc694SShawn Guo static inline void audmux_debugfs_remove(void) 160a23dc694SShawn Guo { 161a23dc694SShawn Guo } 162a23dc694SShawn Guo #endif 163a23dc694SShawn Guo 164a10807aeSFabio Estevam static enum imx_audmux_type { 165a23dc694SShawn Guo IMX21_AUDMUX, 166a23dc694SShawn Guo IMX31_AUDMUX, 167a23dc694SShawn Guo } audmux_type; 168a23dc694SShawn Guo 169a23dc694SShawn Guo static const struct of_device_id imx_audmux_dt_ids[] = { 1706a8b8b58SFabio Estevam { .compatible = "fsl,imx21-audmux", .data = (void *)IMX21_AUDMUX, }, 1716a8b8b58SFabio Estevam { .compatible = "fsl,imx31-audmux", .data = (void *)IMX31_AUDMUX, }, 172a23dc694SShawn Guo { /* sentinel */ } 173a23dc694SShawn Guo }; 174a23dc694SShawn Guo MODULE_DEVICE_TABLE(of, imx_audmux_dt_ids); 175a23dc694SShawn Guo 176a23dc694SShawn Guo static const uint8_t port_mapping[] = { 177a23dc694SShawn Guo 0x0, 0x4, 0x8, 0x10, 0x14, 0x1c, 178a23dc694SShawn Guo }; 179a23dc694SShawn Guo 180a23dc694SShawn Guo int imx_audmux_v1_configure_port(unsigned int port, unsigned int pcr) 181a23dc694SShawn Guo { 182a23dc694SShawn Guo if (audmux_type != IMX21_AUDMUX) 183a23dc694SShawn Guo return -EINVAL; 184a23dc694SShawn Guo 185a23dc694SShawn Guo if (!audmux_base) 186a23dc694SShawn Guo return -ENOSYS; 187a23dc694SShawn Guo 188a23dc694SShawn Guo if (port >= ARRAY_SIZE(port_mapping)) 189a23dc694SShawn Guo return -EINVAL; 190a23dc694SShawn Guo 191a23dc694SShawn Guo writel(pcr, audmux_base + port_mapping[port]); 192a23dc694SShawn Guo 193a23dc694SShawn Guo return 0; 194a23dc694SShawn Guo } 195a23dc694SShawn Guo EXPORT_SYMBOL_GPL(imx_audmux_v1_configure_port); 196a23dc694SShawn Guo 197a23dc694SShawn Guo int imx_audmux_v2_configure_port(unsigned int port, unsigned int ptcr, 198a23dc694SShawn Guo unsigned int pdcr) 199a23dc694SShawn Guo { 20072192366SFabio Estevam int ret; 20172192366SFabio Estevam 202a23dc694SShawn Guo if (audmux_type != IMX31_AUDMUX) 203a23dc694SShawn Guo return -EINVAL; 204a23dc694SShawn Guo 205a23dc694SShawn Guo if (!audmux_base) 206a23dc694SShawn Guo return -ENOSYS; 207a23dc694SShawn Guo 20872192366SFabio Estevam ret = clk_prepare_enable(audmux_clk); 20972192366SFabio Estevam if (ret) 21072192366SFabio Estevam return ret; 211a23dc694SShawn Guo 212a23dc694SShawn Guo writel(ptcr, audmux_base + IMX_AUDMUX_V2_PTCR(port)); 213a23dc694SShawn Guo writel(pdcr, audmux_base + IMX_AUDMUX_V2_PDCR(port)); 214a23dc694SShawn Guo 215a23dc694SShawn Guo clk_disable_unprepare(audmux_clk); 216a23dc694SShawn Guo 217a23dc694SShawn Guo return 0; 218a23dc694SShawn Guo } 219a23dc694SShawn Guo EXPORT_SYMBOL_GPL(imx_audmux_v2_configure_port); 220a23dc694SShawn Guo 2218548a464SMarkus Pargmann static int imx_audmux_parse_dt_defaults(struct platform_device *pdev, 2228548a464SMarkus Pargmann struct device_node *of_node) 2238548a464SMarkus Pargmann { 2248548a464SMarkus Pargmann struct device_node *child; 2258548a464SMarkus Pargmann 2268548a464SMarkus Pargmann for_each_available_child_of_node(of_node, child) { 2278548a464SMarkus Pargmann unsigned int port; 2288548a464SMarkus Pargmann unsigned int ptcr = 0; 2298548a464SMarkus Pargmann unsigned int pdcr = 0; 2308548a464SMarkus Pargmann unsigned int pcr = 0; 2318548a464SMarkus Pargmann unsigned int val; 2328548a464SMarkus Pargmann int ret; 2338548a464SMarkus Pargmann int i = 0; 2348548a464SMarkus Pargmann 2358548a464SMarkus Pargmann ret = of_property_read_u32(child, "fsl,audmux-port", &port); 2368548a464SMarkus Pargmann if (ret) { 23706d15a2eSRob Herring dev_warn(&pdev->dev, "Failed to get fsl,audmux-port of child node \"%pOF\"\n", 23806d15a2eSRob Herring child); 2398548a464SMarkus Pargmann continue; 2408548a464SMarkus Pargmann } 2418548a464SMarkus Pargmann if (!of_property_read_bool(child, "fsl,port-config")) { 24206d15a2eSRob Herring dev_warn(&pdev->dev, "child node \"%pOF\" does not have property fsl,port-config\n", 24306d15a2eSRob Herring child); 2448548a464SMarkus Pargmann continue; 2458548a464SMarkus Pargmann } 2468548a464SMarkus Pargmann 2478548a464SMarkus Pargmann for (i = 0; (ret = of_property_read_u32_index(child, 2489c0aeaa3SMarkus Pargmann "fsl,port-config", i, &val)) == 0; 2498548a464SMarkus Pargmann ++i) { 2508548a464SMarkus Pargmann if (audmux_type == IMX31_AUDMUX) { 2518548a464SMarkus Pargmann if (i % 2) 2528548a464SMarkus Pargmann pdcr |= val; 2538548a464SMarkus Pargmann else 2548548a464SMarkus Pargmann ptcr |= val; 2558548a464SMarkus Pargmann } else { 2568548a464SMarkus Pargmann pcr |= val; 2578548a464SMarkus Pargmann } 2588548a464SMarkus Pargmann } 2598548a464SMarkus Pargmann 2609c0aeaa3SMarkus Pargmann if (ret != -EOVERFLOW) { 26106d15a2eSRob Herring dev_err(&pdev->dev, "Failed to read u32 at index %d of child %pOF\n", 26206d15a2eSRob Herring i, child); 2638548a464SMarkus Pargmann continue; 2648548a464SMarkus Pargmann } 2658548a464SMarkus Pargmann 2668548a464SMarkus Pargmann if (audmux_type == IMX31_AUDMUX) { 2678548a464SMarkus Pargmann if (i % 2) { 26806d15a2eSRob Herring dev_err(&pdev->dev, "One pdcr value is missing in child node %pOF\n", 26906d15a2eSRob Herring child); 2708548a464SMarkus Pargmann continue; 2718548a464SMarkus Pargmann } 2728548a464SMarkus Pargmann imx_audmux_v2_configure_port(port, ptcr, pdcr); 2738548a464SMarkus Pargmann } else { 2748548a464SMarkus Pargmann imx_audmux_v1_configure_port(port, pcr); 2758548a464SMarkus Pargmann } 2768548a464SMarkus Pargmann } 2778548a464SMarkus Pargmann 2788548a464SMarkus Pargmann return 0; 2798548a464SMarkus Pargmann } 2808548a464SMarkus Pargmann 281a0a3d518SBill Pemberton static int imx_audmux_probe(struct platform_device *pdev) 282a23dc694SShawn Guo { 283d003e308SYueHaibing audmux_base = devm_platform_ioremap_resource(pdev, 0); 284b25b5aa0SThierry Reding if (IS_ERR(audmux_base)) 285b25b5aa0SThierry Reding return PTR_ERR(audmux_base); 286a23dc694SShawn Guo 287127c5cadSFabio Estevam audmux_clk = devm_clk_get(&pdev->dev, "audmux"); 288a23dc694SShawn Guo if (IS_ERR(audmux_clk)) { 289a23dc694SShawn Guo dev_dbg(&pdev->dev, "cannot get clock: %ld\n", 290a23dc694SShawn Guo PTR_ERR(audmux_clk)); 291a23dc694SShawn Guo audmux_clk = NULL; 292a23dc694SShawn Guo } 293a23dc694SShawn Guo 2942f4a8171SFabio Estevam audmux_type = (uintptr_t)of_device_get_match_data(&pdev->dev); 2958661ab5bSShengjiu Wang 2968661ab5bSShengjiu Wang switch (audmux_type) { 2978661ab5bSShengjiu Wang case IMX31_AUDMUX: 298a23dc694SShawn Guo audmux_debugfs_init(); 2998661ab5bSShengjiu Wang reg_max = 14; 3008661ab5bSShengjiu Wang break; 3018661ab5bSShengjiu Wang case IMX21_AUDMUX: 3028661ab5bSShengjiu Wang reg_max = 6; 3038661ab5bSShengjiu Wang break; 3048661ab5bSShengjiu Wang default: 3058661ab5bSShengjiu Wang dev_err(&pdev->dev, "unsupported version!\n"); 3068661ab5bSShengjiu Wang return -EINVAL; 3078661ab5bSShengjiu Wang } 3088661ab5bSShengjiu Wang 3098661ab5bSShengjiu Wang regcache = devm_kzalloc(&pdev->dev, sizeof(u32) * reg_max, GFP_KERNEL); 3108661ab5bSShengjiu Wang if (!regcache) 3118661ab5bSShengjiu Wang return -ENOMEM; 312a23dc694SShawn Guo 3138548a464SMarkus Pargmann imx_audmux_parse_dt_defaults(pdev, pdev->dev.of_node); 3148548a464SMarkus Pargmann 315a23dc694SShawn Guo return 0; 316a23dc694SShawn Guo } 317a23dc694SShawn Guo 318a0a3d518SBill Pemberton static int imx_audmux_remove(struct platform_device *pdev) 319a23dc694SShawn Guo { 320a23dc694SShawn Guo if (audmux_type == IMX31_AUDMUX) 321a23dc694SShawn Guo audmux_debugfs_remove(); 322a23dc694SShawn Guo 323a23dc694SShawn Guo return 0; 324a23dc694SShawn Guo } 325a23dc694SShawn Guo 3268661ab5bSShengjiu Wang #ifdef CONFIG_PM_SLEEP 3278661ab5bSShengjiu Wang static int imx_audmux_suspend(struct device *dev) 3288661ab5bSShengjiu Wang { 3298661ab5bSShengjiu Wang int i; 3308661ab5bSShengjiu Wang 3318661ab5bSShengjiu Wang clk_prepare_enable(audmux_clk); 3328661ab5bSShengjiu Wang 3338661ab5bSShengjiu Wang for (i = 0; i < reg_max; i++) 3348661ab5bSShengjiu Wang regcache[i] = readl(audmux_base + i * 4); 3358661ab5bSShengjiu Wang 3368661ab5bSShengjiu Wang clk_disable_unprepare(audmux_clk); 3378661ab5bSShengjiu Wang 3388661ab5bSShengjiu Wang return 0; 3398661ab5bSShengjiu Wang } 3408661ab5bSShengjiu Wang 3418661ab5bSShengjiu Wang static int imx_audmux_resume(struct device *dev) 3428661ab5bSShengjiu Wang { 3438661ab5bSShengjiu Wang int i; 3448661ab5bSShengjiu Wang 3458661ab5bSShengjiu Wang clk_prepare_enable(audmux_clk); 3468661ab5bSShengjiu Wang 3478661ab5bSShengjiu Wang for (i = 0; i < reg_max; i++) 3488661ab5bSShengjiu Wang writel(regcache[i], audmux_base + i * 4); 3498661ab5bSShengjiu Wang 3508661ab5bSShengjiu Wang clk_disable_unprepare(audmux_clk); 3518661ab5bSShengjiu Wang 3528661ab5bSShengjiu Wang return 0; 3538661ab5bSShengjiu Wang } 3548661ab5bSShengjiu Wang #endif /* CONFIG_PM_SLEEP */ 3558661ab5bSShengjiu Wang 3568661ab5bSShengjiu Wang static const struct dev_pm_ops imx_audmux_pm = { 3578661ab5bSShengjiu Wang SET_SYSTEM_SLEEP_PM_OPS(imx_audmux_suspend, imx_audmux_resume) 3588661ab5bSShengjiu Wang }; 3598661ab5bSShengjiu Wang 360a23dc694SShawn Guo static struct platform_driver imx_audmux_driver = { 361a23dc694SShawn Guo .probe = imx_audmux_probe, 362a0a3d518SBill Pemberton .remove = imx_audmux_remove, 363a23dc694SShawn Guo .driver = { 364a23dc694SShawn Guo .name = DRIVER_NAME, 3658661ab5bSShengjiu Wang .pm = &imx_audmux_pm, 366a23dc694SShawn Guo .of_match_table = imx_audmux_dt_ids, 367a23dc694SShawn Guo } 368a23dc694SShawn Guo }; 369a23dc694SShawn Guo 370a23dc694SShawn Guo static int __init imx_audmux_init(void) 371a23dc694SShawn Guo { 372a23dc694SShawn Guo return platform_driver_register(&imx_audmux_driver); 373a23dc694SShawn Guo } 374a23dc694SShawn Guo subsys_initcall(imx_audmux_init); 375a23dc694SShawn Guo 376a23dc694SShawn Guo static void __exit imx_audmux_exit(void) 377a23dc694SShawn Guo { 378a23dc694SShawn Guo platform_driver_unregister(&imx_audmux_driver); 379a23dc694SShawn Guo } 380a23dc694SShawn Guo module_exit(imx_audmux_exit); 381a23dc694SShawn Guo 382a23dc694SShawn Guo MODULE_DESCRIPTION("Freescale i.MX AUDMUX driver"); 383a23dc694SShawn Guo MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>"); 384a23dc694SShawn Guo MODULE_LICENSE("GPL v2"); 385a23dc694SShawn Guo MODULE_ALIAS("platform:" DRIVER_NAME); 386