1f10485e7SMark Brown /* 2f10485e7SMark Brown * wm8990.c -- WM8990 ALSA Soc Audio driver 3f10485e7SMark Brown * 4f10485e7SMark Brown * Copyright 2008 Wolfson Microelectronics PLC. 5f10485e7SMark Brown * Author: Liam Girdwood 6f10485e7SMark Brown * lg@opensource.wolfsonmicro.com or linux@wolfsonmicro.com 7f10485e7SMark Brown * 8f10485e7SMark Brown * This program is free software; you can redistribute it and/or modify it 9f10485e7SMark Brown * under the terms of the GNU General Public License as published by the 10f10485e7SMark Brown * Free Software Foundation; either version 2 of the License, or (at your 11f10485e7SMark Brown * option) any later version. 12f10485e7SMark Brown */ 13f10485e7SMark Brown 14f10485e7SMark Brown #include <linux/module.h> 15f10485e7SMark Brown #include <linux/moduleparam.h> 16f10485e7SMark Brown #include <linux/kernel.h> 17f10485e7SMark Brown #include <linux/init.h> 18f10485e7SMark Brown #include <linux/delay.h> 19f10485e7SMark Brown #include <linux/pm.h> 20f10485e7SMark Brown #include <linux/i2c.h> 21f10485e7SMark Brown #include <linux/platform_device.h> 22f10485e7SMark Brown #include <sound/core.h> 23f10485e7SMark Brown #include <sound/pcm.h> 24f10485e7SMark Brown #include <sound/pcm_params.h> 25f10485e7SMark Brown #include <sound/soc.h> 26f10485e7SMark Brown #include <sound/soc-dapm.h> 27f10485e7SMark Brown #include <sound/initval.h> 28f10485e7SMark Brown #include <sound/tlv.h> 29f10485e7SMark Brown #include <asm/div64.h> 30f10485e7SMark Brown 31f10485e7SMark Brown #include "wm8990.h" 32f10485e7SMark Brown 33f10485e7SMark Brown #define AUDIO_NAME "wm8990" 34f10485e7SMark Brown #define WM8990_VERSION "0.2" 35f10485e7SMark Brown 36f10485e7SMark Brown /* codec private data */ 37f10485e7SMark Brown struct wm8990_priv { 38f10485e7SMark Brown unsigned int sysclk; 39f10485e7SMark Brown unsigned int pcmclk; 40f10485e7SMark Brown }; 41f10485e7SMark Brown 42f10485e7SMark Brown /* 43f10485e7SMark Brown * wm8990 register cache. Note that register 0 is not included in the 44f10485e7SMark Brown * cache. 45f10485e7SMark Brown */ 46f10485e7SMark Brown static const u16 wm8990_reg[] = { 47f10485e7SMark Brown 0x8990, /* R0 - Reset */ 48f10485e7SMark Brown 0x0000, /* R1 - Power Management (1) */ 49f10485e7SMark Brown 0x6000, /* R2 - Power Management (2) */ 50f10485e7SMark Brown 0x0000, /* R3 - Power Management (3) */ 51f10485e7SMark Brown 0x4050, /* R4 - Audio Interface (1) */ 52f10485e7SMark Brown 0x4000, /* R5 - Audio Interface (2) */ 53f10485e7SMark Brown 0x01C8, /* R6 - Clocking (1) */ 54f10485e7SMark Brown 0x0000, /* R7 - Clocking (2) */ 55f10485e7SMark Brown 0x0040, /* R8 - Audio Interface (3) */ 56f10485e7SMark Brown 0x0040, /* R9 - Audio Interface (4) */ 57f10485e7SMark Brown 0x0004, /* R10 - DAC CTRL */ 58f10485e7SMark Brown 0x00C0, /* R11 - Left DAC Digital Volume */ 59f10485e7SMark Brown 0x00C0, /* R12 - Right DAC Digital Volume */ 60f10485e7SMark Brown 0x0000, /* R13 - Digital Side Tone */ 61f10485e7SMark Brown 0x0100, /* R14 - ADC CTRL */ 62f10485e7SMark Brown 0x00C0, /* R15 - Left ADC Digital Volume */ 63f10485e7SMark Brown 0x00C0, /* R16 - Right ADC Digital Volume */ 64f10485e7SMark Brown 0x0000, /* R17 */ 65f10485e7SMark Brown 0x0000, /* R18 - GPIO CTRL 1 */ 66f10485e7SMark Brown 0x1000, /* R19 - GPIO1 & GPIO2 */ 67f10485e7SMark Brown 0x1010, /* R20 - GPIO3 & GPIO4 */ 68f10485e7SMark Brown 0x1010, /* R21 - GPIO5 & GPIO6 */ 69f10485e7SMark Brown 0x8000, /* R22 - GPIOCTRL 2 */ 70f10485e7SMark Brown 0x0800, /* R23 - GPIO_POL */ 71f10485e7SMark Brown 0x008B, /* R24 - Left Line Input 1&2 Volume */ 72f10485e7SMark Brown 0x008B, /* R25 - Left Line Input 3&4 Volume */ 73f10485e7SMark Brown 0x008B, /* R26 - Right Line Input 1&2 Volume */ 74f10485e7SMark Brown 0x008B, /* R27 - Right Line Input 3&4 Volume */ 75f10485e7SMark Brown 0x0000, /* R28 - Left Output Volume */ 76f10485e7SMark Brown 0x0000, /* R29 - Right Output Volume */ 77f10485e7SMark Brown 0x0066, /* R30 - Line Outputs Volume */ 78f10485e7SMark Brown 0x0022, /* R31 - Out3/4 Volume */ 79f10485e7SMark Brown 0x0079, /* R32 - Left OPGA Volume */ 80f10485e7SMark Brown 0x0079, /* R33 - Right OPGA Volume */ 81f10485e7SMark Brown 0x0003, /* R34 - Speaker Volume */ 82f10485e7SMark Brown 0x0003, /* R35 - ClassD1 */ 83f10485e7SMark Brown 0x0000, /* R36 */ 84f10485e7SMark Brown 0x0100, /* R37 - ClassD3 */ 85*97bb8129SMark Brown 0x0079, /* R38 - ClassD4 */ 86f10485e7SMark Brown 0x0000, /* R39 - Input Mixer1 */ 87f10485e7SMark Brown 0x0000, /* R40 - Input Mixer2 */ 88f10485e7SMark Brown 0x0000, /* R41 - Input Mixer3 */ 89f10485e7SMark Brown 0x0000, /* R42 - Input Mixer4 */ 90f10485e7SMark Brown 0x0000, /* R43 - Input Mixer5 */ 91f10485e7SMark Brown 0x0000, /* R44 - Input Mixer6 */ 92f10485e7SMark Brown 0x0000, /* R45 - Output Mixer1 */ 93f10485e7SMark Brown 0x0000, /* R46 - Output Mixer2 */ 94f10485e7SMark Brown 0x0000, /* R47 - Output Mixer3 */ 95f10485e7SMark Brown 0x0000, /* R48 - Output Mixer4 */ 96f10485e7SMark Brown 0x0000, /* R49 - Output Mixer5 */ 97f10485e7SMark Brown 0x0000, /* R50 - Output Mixer6 */ 98f10485e7SMark Brown 0x0180, /* R51 - Out3/4 Mixer */ 99f10485e7SMark Brown 0x0000, /* R52 - Line Mixer1 */ 100f10485e7SMark Brown 0x0000, /* R53 - Line Mixer2 */ 101f10485e7SMark Brown 0x0000, /* R54 - Speaker Mixer */ 102f10485e7SMark Brown 0x0000, /* R55 - Additional Control */ 103f10485e7SMark Brown 0x0000, /* R56 - AntiPOP1 */ 104f10485e7SMark Brown 0x0000, /* R57 - AntiPOP2 */ 105f10485e7SMark Brown 0x0000, /* R58 - MICBIAS */ 106f10485e7SMark Brown 0x0000, /* R59 */ 107f10485e7SMark Brown 0x0008, /* R60 - PLL1 */ 108f10485e7SMark Brown 0x0031, /* R61 - PLL2 */ 109f10485e7SMark Brown 0x0026, /* R62 - PLL3 */ 110f10485e7SMark Brown }; 111f10485e7SMark Brown 112f10485e7SMark Brown /* 113f10485e7SMark Brown * read wm8990 register cache 114f10485e7SMark Brown */ 115f10485e7SMark Brown static inline unsigned int wm8990_read_reg_cache(struct snd_soc_codec *codec, 116f10485e7SMark Brown unsigned int reg) 117f10485e7SMark Brown { 118f10485e7SMark Brown u16 *cache = codec->reg_cache; 119f10485e7SMark Brown BUG_ON(reg > (ARRAY_SIZE(wm8990_reg)) - 1); 120f10485e7SMark Brown return cache[reg]; 121f10485e7SMark Brown } 122f10485e7SMark Brown 123f10485e7SMark Brown /* 124f10485e7SMark Brown * write wm8990 register cache 125f10485e7SMark Brown */ 126f10485e7SMark Brown static inline void wm8990_write_reg_cache(struct snd_soc_codec *codec, 127f10485e7SMark Brown unsigned int reg, unsigned int value) 128f10485e7SMark Brown { 129f10485e7SMark Brown u16 *cache = codec->reg_cache; 130f10485e7SMark Brown BUG_ON(reg > (ARRAY_SIZE(wm8990_reg)) - 1); 131f10485e7SMark Brown 132f10485e7SMark Brown /* Reset register is uncached */ 133f10485e7SMark Brown if (reg == 0) 134f10485e7SMark Brown return; 135f10485e7SMark Brown 136f10485e7SMark Brown cache[reg] = value; 137f10485e7SMark Brown } 138f10485e7SMark Brown 139f10485e7SMark Brown /* 140f10485e7SMark Brown * write to the wm8990 register space 141f10485e7SMark Brown */ 142f10485e7SMark Brown static int wm8990_write(struct snd_soc_codec *codec, unsigned int reg, 143f10485e7SMark Brown unsigned int value) 144f10485e7SMark Brown { 145f10485e7SMark Brown u8 data[3]; 146f10485e7SMark Brown 147f10485e7SMark Brown data[0] = reg & 0xFF; 148f10485e7SMark Brown data[1] = (value >> 8) & 0xFF; 149f10485e7SMark Brown data[2] = value & 0xFF; 150f10485e7SMark Brown 151f10485e7SMark Brown wm8990_write_reg_cache(codec, reg, value); 152f10485e7SMark Brown 153f10485e7SMark Brown if (codec->hw_write(codec->control_data, data, 3) == 2) 154f10485e7SMark Brown return 0; 155f10485e7SMark Brown else 156f10485e7SMark Brown return -EIO; 157f10485e7SMark Brown } 158f10485e7SMark Brown 159f10485e7SMark Brown #define wm8990_reset(c) wm8990_write(c, WM8990_RESET, 0) 160f10485e7SMark Brown 161f10485e7SMark Brown static const DECLARE_TLV_DB_LINEAR(rec_mix_tlv, -1500, 600); 162f10485e7SMark Brown 163f10485e7SMark Brown static const DECLARE_TLV_DB_LINEAR(in_pga_tlv, -1650, 3000); 164f10485e7SMark Brown 165f10485e7SMark Brown static const DECLARE_TLV_DB_LINEAR(out_mix_tlv, 0, -2100); 166f10485e7SMark Brown 167f10485e7SMark Brown static const DECLARE_TLV_DB_LINEAR(out_pga_tlv, -7300, 600); 168f10485e7SMark Brown 169f10485e7SMark Brown static const DECLARE_TLV_DB_LINEAR(out_omix_tlv, -600, 0); 170f10485e7SMark Brown 171f10485e7SMark Brown static const DECLARE_TLV_DB_LINEAR(out_dac_tlv, -7163, 0); 172f10485e7SMark Brown 173f10485e7SMark Brown static const DECLARE_TLV_DB_LINEAR(in_adc_tlv, -7163, 1763); 174f10485e7SMark Brown 175f10485e7SMark Brown static const DECLARE_TLV_DB_LINEAR(out_sidetone_tlv, -3600, 0); 176f10485e7SMark Brown 177f10485e7SMark Brown static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol, 178f10485e7SMark Brown struct snd_ctl_elem_value *ucontrol) 179f10485e7SMark Brown { 180f10485e7SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 181f10485e7SMark Brown int reg = kcontrol->private_value & 0xff; 182f10485e7SMark Brown int ret; 183f10485e7SMark Brown u16 val; 184f10485e7SMark Brown 185f10485e7SMark Brown ret = snd_soc_put_volsw(kcontrol, ucontrol); 186f10485e7SMark Brown if (ret < 0) 187f10485e7SMark Brown return ret; 188f10485e7SMark Brown 189f10485e7SMark Brown /* now hit the volume update bits (always bit 8) */ 190f10485e7SMark Brown val = wm8990_read_reg_cache(codec, reg); 191f10485e7SMark Brown return wm8990_write(codec, reg, val | 0x0100); 192f10485e7SMark Brown } 193f10485e7SMark Brown 194f10485e7SMark Brown #define SOC_WM899X_OUTPGA_SINGLE_R_TLV(xname, reg, shift, max, invert,\ 195f10485e7SMark Brown tlv_array) {\ 196f10485e7SMark Brown .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ 197f10485e7SMark Brown .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ 198f10485e7SMark Brown SNDRV_CTL_ELEM_ACCESS_READWRITE,\ 199f10485e7SMark Brown .tlv.p = (tlv_array), \ 200f10485e7SMark Brown .info = snd_soc_info_volsw, \ 201f10485e7SMark Brown .get = snd_soc_get_volsw, .put = wm899x_outpga_put_volsw_vu, \ 202f10485e7SMark Brown .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) } 203f10485e7SMark Brown 204f10485e7SMark Brown 205f10485e7SMark Brown static const char *wm8990_digital_sidetone[] = 206f10485e7SMark Brown {"None", "Left ADC", "Right ADC", "Reserved"}; 207f10485e7SMark Brown 208f10485e7SMark Brown static const struct soc_enum wm8990_left_digital_sidetone_enum = 209f10485e7SMark Brown SOC_ENUM_SINGLE(WM8990_DIGITAL_SIDE_TONE, 210f10485e7SMark Brown WM8990_ADC_TO_DACL_SHIFT, 211f10485e7SMark Brown WM8990_ADC_TO_DACL_MASK, 212f10485e7SMark Brown wm8990_digital_sidetone); 213f10485e7SMark Brown 214f10485e7SMark Brown static const struct soc_enum wm8990_right_digital_sidetone_enum = 215f10485e7SMark Brown SOC_ENUM_SINGLE(WM8990_DIGITAL_SIDE_TONE, 216f10485e7SMark Brown WM8990_ADC_TO_DACR_SHIFT, 217f10485e7SMark Brown WM8990_ADC_TO_DACR_MASK, 218f10485e7SMark Brown wm8990_digital_sidetone); 219f10485e7SMark Brown 220f10485e7SMark Brown static const char *wm8990_adcmode[] = 221f10485e7SMark Brown {"Hi-fi mode", "Voice mode 1", "Voice mode 2", "Voice mode 3"}; 222f10485e7SMark Brown 223f10485e7SMark Brown static const struct soc_enum wm8990_right_adcmode_enum = 224f10485e7SMark Brown SOC_ENUM_SINGLE(WM8990_ADC_CTRL, 225f10485e7SMark Brown WM8990_ADC_HPF_CUT_SHIFT, 226f10485e7SMark Brown WM8990_ADC_HPF_CUT_MASK, 227f10485e7SMark Brown wm8990_adcmode); 228f10485e7SMark Brown 229f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_snd_controls[] = { 230f10485e7SMark Brown /* INMIXL */ 231f10485e7SMark Brown SOC_SINGLE("LIN12 PGA Boost", WM8990_INPUT_MIXER3, WM8990_L12MNBST_BIT, 1, 0), 232f10485e7SMark Brown SOC_SINGLE("LIN34 PGA Boost", WM8990_INPUT_MIXER3, WM8990_L34MNBST_BIT, 1, 0), 233f10485e7SMark Brown /* INMIXR */ 234f10485e7SMark Brown SOC_SINGLE("RIN12 PGA Boost", WM8990_INPUT_MIXER3, WM8990_R12MNBST_BIT, 1, 0), 235f10485e7SMark Brown SOC_SINGLE("RIN34 PGA Boost", WM8990_INPUT_MIXER3, WM8990_R34MNBST_BIT, 1, 0), 236f10485e7SMark Brown 237f10485e7SMark Brown /* LOMIX */ 238f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER3, 239f10485e7SMark Brown WM8990_LLI3LOVOL_SHIFT, WM8990_LLI3LOVOL_MASK, 1, out_mix_tlv), 240f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3, 241f10485e7SMark Brown WM8990_LR12LOVOL_SHIFT, WM8990_LR12LOVOL_MASK, 1, out_mix_tlv), 242f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3, 243f10485e7SMark Brown WM8990_LL12LOVOL_SHIFT, WM8990_LL12LOVOL_MASK, 1, out_mix_tlv), 244f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER5, 245f10485e7SMark Brown WM8990_LRI3LOVOL_SHIFT, WM8990_LRI3LOVOL_MASK, 1, out_mix_tlv), 246f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8990_OUTPUT_MIXER5, 247f10485e7SMark Brown WM8990_LRBLOVOL_SHIFT, WM8990_LRBLOVOL_MASK, 1, out_mix_tlv), 248f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8990_OUTPUT_MIXER5, 249f10485e7SMark Brown WM8990_LRBLOVOL_SHIFT, WM8990_LRBLOVOL_MASK, 1, out_mix_tlv), 250f10485e7SMark Brown 251f10485e7SMark Brown /* ROMIX */ 252f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER4, 253f10485e7SMark Brown WM8990_RRI3ROVOL_SHIFT, WM8990_RRI3ROVOL_MASK, 1, out_mix_tlv), 254f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4, 255f10485e7SMark Brown WM8990_RL12ROVOL_SHIFT, WM8990_RL12ROVOL_MASK, 1, out_mix_tlv), 256f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4, 257f10485e7SMark Brown WM8990_RR12ROVOL_SHIFT, WM8990_RR12ROVOL_MASK, 1, out_mix_tlv), 258f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER6, 259f10485e7SMark Brown WM8990_RLI3ROVOL_SHIFT, WM8990_RLI3ROVOL_MASK, 1, out_mix_tlv), 260f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX AINLMUX Bypass Volume", WM8990_OUTPUT_MIXER6, 261f10485e7SMark Brown WM8990_RLBROVOL_SHIFT, WM8990_RLBROVOL_MASK, 1, out_mix_tlv), 262f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX AINRMUX Bypass Volume", WM8990_OUTPUT_MIXER6, 263f10485e7SMark Brown WM8990_RRBROVOL_SHIFT, WM8990_RRBROVOL_MASK, 1, out_mix_tlv), 264f10485e7SMark Brown 265f10485e7SMark Brown /* LOUT */ 266f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOUT Volume", WM8990_LEFT_OUTPUT_VOLUME, 267f10485e7SMark Brown WM8990_LOUTVOL_SHIFT, WM8990_LOUTVOL_MASK, 0, out_pga_tlv), 268f10485e7SMark Brown SOC_SINGLE("LOUT ZC", WM8990_LEFT_OUTPUT_VOLUME, WM8990_LOZC_BIT, 1, 0), 269f10485e7SMark Brown 270f10485e7SMark Brown /* ROUT */ 271f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROUT Volume", WM8990_RIGHT_OUTPUT_VOLUME, 272f10485e7SMark Brown WM8990_ROUTVOL_SHIFT, WM8990_ROUTVOL_MASK, 0, out_pga_tlv), 273f10485e7SMark Brown SOC_SINGLE("ROUT ZC", WM8990_RIGHT_OUTPUT_VOLUME, WM8990_ROZC_BIT, 1, 0), 274f10485e7SMark Brown 275f10485e7SMark Brown /* LOPGA */ 276f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOPGA Volume", WM8990_LEFT_OPGA_VOLUME, 277f10485e7SMark Brown WM8990_LOPGAVOL_SHIFT, WM8990_LOPGAVOL_MASK, 0, out_pga_tlv), 278f10485e7SMark Brown SOC_SINGLE("LOPGA ZC Switch", WM8990_LEFT_OPGA_VOLUME, 279f10485e7SMark Brown WM8990_LOPGAZC_BIT, 1, 0), 280f10485e7SMark Brown 281f10485e7SMark Brown /* ROPGA */ 282f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROPGA Volume", WM8990_RIGHT_OPGA_VOLUME, 283f10485e7SMark Brown WM8990_ROPGAVOL_SHIFT, WM8990_ROPGAVOL_MASK, 0, out_pga_tlv), 284f10485e7SMark Brown SOC_SINGLE("ROPGA ZC Switch", WM8990_RIGHT_OPGA_VOLUME, 285f10485e7SMark Brown WM8990_ROPGAZC_BIT, 1, 0), 286f10485e7SMark Brown 287f10485e7SMark Brown SOC_SINGLE("LON Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, 288f10485e7SMark Brown WM8990_LONMUTE_BIT, 1, 0), 289f10485e7SMark Brown SOC_SINGLE("LOP Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, 290f10485e7SMark Brown WM8990_LOPMUTE_BIT, 1, 0), 291f10485e7SMark Brown SOC_SINGLE("LOP Attenuation Switch", WM8990_LINE_OUTPUTS_VOLUME, 292f10485e7SMark Brown WM8990_LOATTN_BIT, 1, 0), 293f10485e7SMark Brown SOC_SINGLE("RON Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, 294f10485e7SMark Brown WM8990_RONMUTE_BIT, 1, 0), 295f10485e7SMark Brown SOC_SINGLE("ROP Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, 296f10485e7SMark Brown WM8990_ROPMUTE_BIT, 1, 0), 297f10485e7SMark Brown SOC_SINGLE("ROP Attenuation Switch", WM8990_LINE_OUTPUTS_VOLUME, 298f10485e7SMark Brown WM8990_ROATTN_BIT, 1, 0), 299f10485e7SMark Brown 300f10485e7SMark Brown SOC_SINGLE("OUT3 Mute Switch", WM8990_OUT3_4_VOLUME, 301f10485e7SMark Brown WM8990_OUT3MUTE_BIT, 1, 0), 302f10485e7SMark Brown SOC_SINGLE("OUT3 Attenuation Switch", WM8990_OUT3_4_VOLUME, 303f10485e7SMark Brown WM8990_OUT3ATTN_BIT, 1, 0), 304f10485e7SMark Brown 305f10485e7SMark Brown SOC_SINGLE("OUT4 Mute Switch", WM8990_OUT3_4_VOLUME, 306f10485e7SMark Brown WM8990_OUT4MUTE_BIT, 1, 0), 307f10485e7SMark Brown SOC_SINGLE("OUT4 Attenuation Switch", WM8990_OUT3_4_VOLUME, 308f10485e7SMark Brown WM8990_OUT4ATTN_BIT, 1, 0), 309f10485e7SMark Brown 310f10485e7SMark Brown SOC_SINGLE("Speaker Mode Switch", WM8990_CLASSD1, 311f10485e7SMark Brown WM8990_CDMODE_BIT, 1, 0), 312f10485e7SMark Brown 313f10485e7SMark Brown SOC_SINGLE("Speaker Output Attenuation Volume", WM8990_SPEAKER_VOLUME, 314*97bb8129SMark Brown WM8990_SPKATTN_SHIFT, WM8990_SPKATTN_MASK, 0), 315f10485e7SMark Brown SOC_SINGLE("Speaker DC Boost Volume", WM8990_CLASSD3, 316f10485e7SMark Brown WM8990_DCGAIN_SHIFT, WM8990_DCGAIN_MASK, 0), 317f10485e7SMark Brown SOC_SINGLE("Speaker AC Boost Volume", WM8990_CLASSD3, 318f10485e7SMark Brown WM8990_ACGAIN_SHIFT, WM8990_ACGAIN_MASK, 0), 319*97bb8129SMark Brown SOC_SINGLE_TLV("Speaker Volume", WM8990_CLASSD4, 320*97bb8129SMark Brown WM8990_SPKVOL_SHIFT, WM8990_SPKVOL_MASK, 0, out_pga_tlv), 321*97bb8129SMark Brown SOC_SINGLE("Speaker ZC Switch", WM8990_CLASSD4, 322*97bb8129SMark Brown WM8990_SPKZC_SHIFT, WM8990_SPKZC_MASK, 0), 323f10485e7SMark Brown 324f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left DAC Digital Volume", 325f10485e7SMark Brown WM8990_LEFT_DAC_DIGITAL_VOLUME, 326f10485e7SMark Brown WM8990_DACL_VOL_SHIFT, 327f10485e7SMark Brown WM8990_DACL_VOL_MASK, 328f10485e7SMark Brown 0, 329f10485e7SMark Brown out_dac_tlv), 330f10485e7SMark Brown 331f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right DAC Digital Volume", 332f10485e7SMark Brown WM8990_RIGHT_DAC_DIGITAL_VOLUME, 333f10485e7SMark Brown WM8990_DACR_VOL_SHIFT, 334f10485e7SMark Brown WM8990_DACR_VOL_MASK, 335f10485e7SMark Brown 0, 336f10485e7SMark Brown out_dac_tlv), 337f10485e7SMark Brown 338f10485e7SMark Brown SOC_ENUM("Left Digital Sidetone", wm8990_left_digital_sidetone_enum), 339f10485e7SMark Brown SOC_ENUM("Right Digital Sidetone", wm8990_right_digital_sidetone_enum), 340f10485e7SMark Brown 341f10485e7SMark Brown SOC_SINGLE_TLV("Left Digital Sidetone Volume", WM8990_DIGITAL_SIDE_TONE, 342f10485e7SMark Brown WM8990_ADCL_DAC_SVOL_SHIFT, WM8990_ADCL_DAC_SVOL_MASK, 0, 343f10485e7SMark Brown out_sidetone_tlv), 344f10485e7SMark Brown SOC_SINGLE_TLV("Right Digital Sidetone Volume", WM8990_DIGITAL_SIDE_TONE, 345f10485e7SMark Brown WM8990_ADCR_DAC_SVOL_SHIFT, WM8990_ADCR_DAC_SVOL_MASK, 0, 346f10485e7SMark Brown out_sidetone_tlv), 347f10485e7SMark Brown 348f10485e7SMark Brown SOC_SINGLE("ADC Digital High Pass Filter Switch", WM8990_ADC_CTRL, 349f10485e7SMark Brown WM8990_ADC_HPF_ENA_BIT, 1, 0), 350f10485e7SMark Brown 351f10485e7SMark Brown SOC_ENUM("ADC HPF Mode", wm8990_right_adcmode_enum), 352f10485e7SMark Brown 353f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left ADC Digital Volume", 354f10485e7SMark Brown WM8990_LEFT_ADC_DIGITAL_VOLUME, 355f10485e7SMark Brown WM8990_ADCL_VOL_SHIFT, 356f10485e7SMark Brown WM8990_ADCL_VOL_MASK, 357f10485e7SMark Brown 0, 358f10485e7SMark Brown in_adc_tlv), 359f10485e7SMark Brown 360f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right ADC Digital Volume", 361f10485e7SMark Brown WM8990_RIGHT_ADC_DIGITAL_VOLUME, 362f10485e7SMark Brown WM8990_ADCR_VOL_SHIFT, 363f10485e7SMark Brown WM8990_ADCR_VOL_MASK, 364f10485e7SMark Brown 0, 365f10485e7SMark Brown in_adc_tlv), 366f10485e7SMark Brown 367f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN12 Volume", 368f10485e7SMark Brown WM8990_LEFT_LINE_INPUT_1_2_VOLUME, 369f10485e7SMark Brown WM8990_LIN12VOL_SHIFT, 370f10485e7SMark Brown WM8990_LIN12VOL_MASK, 371f10485e7SMark Brown 0, 372f10485e7SMark Brown in_pga_tlv), 373f10485e7SMark Brown 374f10485e7SMark Brown SOC_SINGLE("LIN12 ZC Switch", WM8990_LEFT_LINE_INPUT_1_2_VOLUME, 375f10485e7SMark Brown WM8990_LI12ZC_BIT, 1, 0), 376f10485e7SMark Brown 377f10485e7SMark Brown SOC_SINGLE("LIN12 Mute Switch", WM8990_LEFT_LINE_INPUT_1_2_VOLUME, 378f10485e7SMark Brown WM8990_LI12MUTE_BIT, 1, 0), 379f10485e7SMark Brown 380f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN34 Volume", 381f10485e7SMark Brown WM8990_LEFT_LINE_INPUT_3_4_VOLUME, 382f10485e7SMark Brown WM8990_LIN34VOL_SHIFT, 383f10485e7SMark Brown WM8990_LIN34VOL_MASK, 384f10485e7SMark Brown 0, 385f10485e7SMark Brown in_pga_tlv), 386f10485e7SMark Brown 387f10485e7SMark Brown SOC_SINGLE("LIN34 ZC Switch", WM8990_LEFT_LINE_INPUT_3_4_VOLUME, 388f10485e7SMark Brown WM8990_LI34ZC_BIT, 1, 0), 389f10485e7SMark Brown 390f10485e7SMark Brown SOC_SINGLE("LIN34 Mute Switch", WM8990_LEFT_LINE_INPUT_3_4_VOLUME, 391f10485e7SMark Brown WM8990_LI34MUTE_BIT, 1, 0), 392f10485e7SMark Brown 393f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN12 Volume", 394f10485e7SMark Brown WM8990_RIGHT_LINE_INPUT_1_2_VOLUME, 395f10485e7SMark Brown WM8990_RIN12VOL_SHIFT, 396f10485e7SMark Brown WM8990_RIN12VOL_MASK, 397f10485e7SMark Brown 0, 398f10485e7SMark Brown in_pga_tlv), 399f10485e7SMark Brown 400f10485e7SMark Brown SOC_SINGLE("RIN12 ZC Switch", WM8990_RIGHT_LINE_INPUT_1_2_VOLUME, 401f10485e7SMark Brown WM8990_RI12ZC_BIT, 1, 0), 402f10485e7SMark Brown 403f10485e7SMark Brown SOC_SINGLE("RIN12 Mute Switch", WM8990_RIGHT_LINE_INPUT_1_2_VOLUME, 404f10485e7SMark Brown WM8990_RI12MUTE_BIT, 1, 0), 405f10485e7SMark Brown 406f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN34 Volume", 407f10485e7SMark Brown WM8990_RIGHT_LINE_INPUT_3_4_VOLUME, 408f10485e7SMark Brown WM8990_RIN34VOL_SHIFT, 409f10485e7SMark Brown WM8990_RIN34VOL_MASK, 410f10485e7SMark Brown 0, 411f10485e7SMark Brown in_pga_tlv), 412f10485e7SMark Brown 413f10485e7SMark Brown SOC_SINGLE("RIN34 ZC Switch", WM8990_RIGHT_LINE_INPUT_3_4_VOLUME, 414f10485e7SMark Brown WM8990_RI34ZC_BIT, 1, 0), 415f10485e7SMark Brown 416f10485e7SMark Brown SOC_SINGLE("RIN34 Mute Switch", WM8990_RIGHT_LINE_INPUT_3_4_VOLUME, 417f10485e7SMark Brown WM8990_RI34MUTE_BIT, 1, 0), 418f10485e7SMark Brown 419f10485e7SMark Brown }; 420f10485e7SMark Brown 421f10485e7SMark Brown /* add non dapm controls */ 422f10485e7SMark Brown static int wm8990_add_controls(struct snd_soc_codec *codec) 423f10485e7SMark Brown { 424f10485e7SMark Brown int err, i; 425f10485e7SMark Brown 426f10485e7SMark Brown for (i = 0; i < ARRAY_SIZE(wm8990_snd_controls); i++) { 427f10485e7SMark Brown err = snd_ctl_add(codec->card, 428f10485e7SMark Brown snd_soc_cnew(&wm8990_snd_controls[i], codec, 429f10485e7SMark Brown NULL)); 430f10485e7SMark Brown if (err < 0) 431f10485e7SMark Brown return err; 432f10485e7SMark Brown } 433f10485e7SMark Brown return 0; 434f10485e7SMark Brown } 435f10485e7SMark Brown 436f10485e7SMark Brown /* 437f10485e7SMark Brown * _DAPM_ Controls 438f10485e7SMark Brown */ 439f10485e7SMark Brown 440f10485e7SMark Brown static int inmixer_event(struct snd_soc_dapm_widget *w, 441f10485e7SMark Brown struct snd_kcontrol *kcontrol, int event) 442f10485e7SMark Brown { 443f10485e7SMark Brown u16 reg, fakepower; 444f10485e7SMark Brown 445f10485e7SMark Brown reg = wm8990_read_reg_cache(w->codec, WM8990_POWER_MANAGEMENT_2); 446f10485e7SMark Brown fakepower = wm8990_read_reg_cache(w->codec, WM8990_INTDRIVBITS); 447f10485e7SMark Brown 448f10485e7SMark Brown if (fakepower & ((1 << WM8990_INMIXL_PWR_BIT) | 449f10485e7SMark Brown (1 << WM8990_AINLMUX_PWR_BIT))) { 450f10485e7SMark Brown reg |= WM8990_AINL_ENA; 451f10485e7SMark Brown } else { 452f10485e7SMark Brown reg &= ~WM8990_AINL_ENA; 453f10485e7SMark Brown } 454f10485e7SMark Brown 455f10485e7SMark Brown if (fakepower & ((1 << WM8990_INMIXR_PWR_BIT) | 456f10485e7SMark Brown (1 << WM8990_AINRMUX_PWR_BIT))) { 457f10485e7SMark Brown reg |= WM8990_AINR_ENA; 458f10485e7SMark Brown } else { 459f10485e7SMark Brown reg &= ~WM8990_AINL_ENA; 460f10485e7SMark Brown } 461f10485e7SMark Brown wm8990_write(w->codec, WM8990_POWER_MANAGEMENT_2, reg); 462f10485e7SMark Brown 463f10485e7SMark Brown return 0; 464f10485e7SMark Brown } 465f10485e7SMark Brown 466f10485e7SMark Brown static int outmixer_event(struct snd_soc_dapm_widget *w, 467f10485e7SMark Brown struct snd_kcontrol *kcontrol, int event) 468f10485e7SMark Brown { 469f10485e7SMark Brown u32 reg_shift = kcontrol->private_value & 0xfff; 470f10485e7SMark Brown int ret = 0; 471f10485e7SMark Brown u16 reg; 472f10485e7SMark Brown 473f10485e7SMark Brown switch (reg_shift) { 474f10485e7SMark Brown case WM8990_SPEAKER_MIXER | (WM8990_LDSPK_BIT << 8) : 475f10485e7SMark Brown reg = wm8990_read_reg_cache(w->codec, WM8990_OUTPUT_MIXER1); 476f10485e7SMark Brown if (reg & WM8990_LDLO) { 477f10485e7SMark Brown printk(KERN_WARNING 478f10485e7SMark Brown "Cannot set as Output Mixer 1 LDLO Set\n"); 479f10485e7SMark Brown ret = -1; 480f10485e7SMark Brown } 481f10485e7SMark Brown break; 482f10485e7SMark Brown case WM8990_SPEAKER_MIXER | (WM8990_RDSPK_BIT << 8): 483f10485e7SMark Brown reg = wm8990_read_reg_cache(w->codec, WM8990_OUTPUT_MIXER2); 484f10485e7SMark Brown if (reg & WM8990_RDRO) { 485f10485e7SMark Brown printk(KERN_WARNING 486f10485e7SMark Brown "Cannot set as Output Mixer 2 RDRO Set\n"); 487f10485e7SMark Brown ret = -1; 488f10485e7SMark Brown } 489f10485e7SMark Brown break; 490f10485e7SMark Brown case WM8990_OUTPUT_MIXER1 | (WM8990_LDLO_BIT << 8): 491f10485e7SMark Brown reg = wm8990_read_reg_cache(w->codec, WM8990_SPEAKER_MIXER); 492f10485e7SMark Brown if (reg & WM8990_LDSPK) { 493f10485e7SMark Brown printk(KERN_WARNING 494f10485e7SMark Brown "Cannot set as Speaker Mixer LDSPK Set\n"); 495f10485e7SMark Brown ret = -1; 496f10485e7SMark Brown } 497f10485e7SMark Brown break; 498f10485e7SMark Brown case WM8990_OUTPUT_MIXER2 | (WM8990_RDRO_BIT << 8): 499f10485e7SMark Brown reg = wm8990_read_reg_cache(w->codec, WM8990_SPEAKER_MIXER); 500f10485e7SMark Brown if (reg & WM8990_RDSPK) { 501f10485e7SMark Brown printk(KERN_WARNING 502f10485e7SMark Brown "Cannot set as Speaker Mixer RDSPK Set\n"); 503f10485e7SMark Brown ret = -1; 504f10485e7SMark Brown } 505f10485e7SMark Brown break; 506f10485e7SMark Brown } 507f10485e7SMark Brown 508f10485e7SMark Brown return ret; 509f10485e7SMark Brown } 510f10485e7SMark Brown 511f10485e7SMark Brown /* INMIX dB values */ 512f10485e7SMark Brown static const unsigned int in_mix_tlv[] = { 513f10485e7SMark Brown TLV_DB_RANGE_HEAD(1), 514f10485e7SMark Brown 0, 7, TLV_DB_LINEAR_ITEM(-1200, 600), 515f10485e7SMark Brown }; 516f10485e7SMark Brown 517f10485e7SMark Brown /* Left In PGA Connections */ 518f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lin12_pga_controls[] = { 519f10485e7SMark Brown SOC_DAPM_SINGLE("LIN1 Switch", WM8990_INPUT_MIXER2, WM8990_LMN1_BIT, 1, 0), 520f10485e7SMark Brown SOC_DAPM_SINGLE("LIN2 Switch", WM8990_INPUT_MIXER2, WM8990_LMP2_BIT, 1, 0), 521f10485e7SMark Brown }; 522f10485e7SMark Brown 523f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lin34_pga_controls[] = { 524f10485e7SMark Brown SOC_DAPM_SINGLE("LIN3 Switch", WM8990_INPUT_MIXER2, WM8990_LMN3_BIT, 1, 0), 525f10485e7SMark Brown SOC_DAPM_SINGLE("LIN4 Switch", WM8990_INPUT_MIXER2, WM8990_LMP4_BIT, 1, 0), 526f10485e7SMark Brown }; 527f10485e7SMark Brown 528f10485e7SMark Brown /* Right In PGA Connections */ 529f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_rin12_pga_controls[] = { 530f10485e7SMark Brown SOC_DAPM_SINGLE("RIN1 Switch", WM8990_INPUT_MIXER2, WM8990_RMN1_BIT, 1, 0), 531f10485e7SMark Brown SOC_DAPM_SINGLE("RIN2 Switch", WM8990_INPUT_MIXER2, WM8990_RMP2_BIT, 1, 0), 532f10485e7SMark Brown }; 533f10485e7SMark Brown 534f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_rin34_pga_controls[] = { 535f10485e7SMark Brown SOC_DAPM_SINGLE("RIN3 Switch", WM8990_INPUT_MIXER2, WM8990_RMN3_BIT, 1, 0), 536f10485e7SMark Brown SOC_DAPM_SINGLE("RIN4 Switch", WM8990_INPUT_MIXER2, WM8990_RMP4_BIT, 1, 0), 537f10485e7SMark Brown }; 538f10485e7SMark Brown 539f10485e7SMark Brown /* INMIXL */ 540f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_inmixl_controls[] = { 541f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("Record Left Volume", WM8990_INPUT_MIXER3, 542f10485e7SMark Brown WM8990_LDBVOL_SHIFT, WM8990_LDBVOL_MASK, 0, in_mix_tlv), 543f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("LIN2 Volume", WM8990_INPUT_MIXER5, WM8990_LI2BVOL_SHIFT, 544f10485e7SMark Brown 7, 0, in_mix_tlv), 545f10485e7SMark Brown SOC_DAPM_SINGLE("LINPGA12 Switch", WM8990_INPUT_MIXER3, WM8990_L12MNB_BIT, 546f10485e7SMark Brown 1, 0), 547f10485e7SMark Brown SOC_DAPM_SINGLE("LINPGA34 Switch", WM8990_INPUT_MIXER3, WM8990_L34MNB_BIT, 548f10485e7SMark Brown 1, 0), 549f10485e7SMark Brown }; 550f10485e7SMark Brown 551f10485e7SMark Brown /* INMIXR */ 552f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_inmixr_controls[] = { 553f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("Record Right Volume", WM8990_INPUT_MIXER4, 554f10485e7SMark Brown WM8990_RDBVOL_SHIFT, WM8990_RDBVOL_MASK, 0, in_mix_tlv), 555f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("RIN2 Volume", WM8990_INPUT_MIXER6, WM8990_RI2BVOL_SHIFT, 556f10485e7SMark Brown 7, 0, in_mix_tlv), 557f10485e7SMark Brown SOC_DAPM_SINGLE("RINPGA12 Switch", WM8990_INPUT_MIXER3, WM8990_L12MNB_BIT, 558f10485e7SMark Brown 1, 0), 559f10485e7SMark Brown SOC_DAPM_SINGLE("RINPGA34 Switch", WM8990_INPUT_MIXER3, WM8990_L34MNB_BIT, 560f10485e7SMark Brown 1, 0), 561f10485e7SMark Brown }; 562f10485e7SMark Brown 563f10485e7SMark Brown /* AINLMUX */ 564f10485e7SMark Brown static const char *wm8990_ainlmux[] = 565f10485e7SMark Brown {"INMIXL Mix", "RXVOICE Mix", "DIFFINL Mix"}; 566f10485e7SMark Brown 567f10485e7SMark Brown static const struct soc_enum wm8990_ainlmux_enum = 568f10485e7SMark Brown SOC_ENUM_SINGLE(WM8990_INPUT_MIXER1, WM8990_AINLMODE_SHIFT, 569f10485e7SMark Brown ARRAY_SIZE(wm8990_ainlmux), wm8990_ainlmux); 570f10485e7SMark Brown 571f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_ainlmux_controls = 572f10485e7SMark Brown SOC_DAPM_ENUM("Route", wm8990_ainlmux_enum); 573f10485e7SMark Brown 574f10485e7SMark Brown /* DIFFINL */ 575f10485e7SMark Brown 576f10485e7SMark Brown /* AINRMUX */ 577f10485e7SMark Brown static const char *wm8990_ainrmux[] = 578f10485e7SMark Brown {"INMIXR Mix", "RXVOICE Mix", "DIFFINR Mix"}; 579f10485e7SMark Brown 580f10485e7SMark Brown static const struct soc_enum wm8990_ainrmux_enum = 581f10485e7SMark Brown SOC_ENUM_SINGLE(WM8990_INPUT_MIXER1, WM8990_AINRMODE_SHIFT, 582f10485e7SMark Brown ARRAY_SIZE(wm8990_ainrmux), wm8990_ainrmux); 583f10485e7SMark Brown 584f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_ainrmux_controls = 585f10485e7SMark Brown SOC_DAPM_ENUM("Route", wm8990_ainrmux_enum); 586f10485e7SMark Brown 587f10485e7SMark Brown /* RXVOICE */ 588f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_rxvoice_controls[] = { 589f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("LIN4/RXN", WM8990_INPUT_MIXER5, WM8990_LR4BVOL_SHIFT, 590f10485e7SMark Brown WM8990_LR4BVOL_MASK, 0, in_mix_tlv), 591f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("RIN4/RXP", WM8990_INPUT_MIXER6, WM8990_RL4BVOL_SHIFT, 592f10485e7SMark Brown WM8990_RL4BVOL_MASK, 0, in_mix_tlv), 593f10485e7SMark Brown }; 594f10485e7SMark Brown 595f10485e7SMark Brown /* LOMIX */ 596f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lomix_controls[] = { 597f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX Right ADC Bypass Switch", WM8990_OUTPUT_MIXER1, 598f10485e7SMark Brown WM8990_LRBLO_BIT, 1, 0), 599f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX Left ADC Bypass Switch", WM8990_OUTPUT_MIXER1, 600f10485e7SMark Brown WM8990_LLBLO_BIT, 1, 0), 601f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX RIN3 Bypass Switch", WM8990_OUTPUT_MIXER1, 602f10485e7SMark Brown WM8990_LRI3LO_BIT, 1, 0), 603f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX LIN3 Bypass Switch", WM8990_OUTPUT_MIXER1, 604f10485e7SMark Brown WM8990_LLI3LO_BIT, 1, 0), 605f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX RIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER1, 606f10485e7SMark Brown WM8990_LR12LO_BIT, 1, 0), 607f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX LIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER1, 608f10485e7SMark Brown WM8990_LL12LO_BIT, 1, 0), 609f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX Left DAC Switch", WM8990_OUTPUT_MIXER1, 610f10485e7SMark Brown WM8990_LDLO_BIT, 1, 0), 611f10485e7SMark Brown }; 612f10485e7SMark Brown 613f10485e7SMark Brown /* ROMIX */ 614f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_romix_controls[] = { 615f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX Left ADC Bypass Switch", WM8990_OUTPUT_MIXER2, 616f10485e7SMark Brown WM8990_RLBRO_BIT, 1, 0), 617f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX Right ADC Bypass Switch", WM8990_OUTPUT_MIXER2, 618f10485e7SMark Brown WM8990_RRBRO_BIT, 1, 0), 619f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX LIN3 Bypass Switch", WM8990_OUTPUT_MIXER2, 620f10485e7SMark Brown WM8990_RLI3RO_BIT, 1, 0), 621f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX RIN3 Bypass Switch", WM8990_OUTPUT_MIXER2, 622f10485e7SMark Brown WM8990_RRI3RO_BIT, 1, 0), 623f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX LIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER2, 624f10485e7SMark Brown WM8990_RL12RO_BIT, 1, 0), 625f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX RIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER2, 626f10485e7SMark Brown WM8990_RR12RO_BIT, 1, 0), 627f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX Right DAC Switch", WM8990_OUTPUT_MIXER2, 628f10485e7SMark Brown WM8990_RDRO_BIT, 1, 0), 629f10485e7SMark Brown }; 630f10485e7SMark Brown 631f10485e7SMark Brown /* LONMIX */ 632f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lonmix_controls[] = { 633f10485e7SMark Brown SOC_DAPM_SINGLE("LONMIX Left Mixer PGA Switch", WM8990_LINE_MIXER1, 634f10485e7SMark Brown WM8990_LLOPGALON_BIT, 1, 0), 635f10485e7SMark Brown SOC_DAPM_SINGLE("LONMIX Right Mixer PGA Switch", WM8990_LINE_MIXER1, 636f10485e7SMark Brown WM8990_LROPGALON_BIT, 1, 0), 637f10485e7SMark Brown SOC_DAPM_SINGLE("LONMIX Inverted LOP Switch", WM8990_LINE_MIXER1, 638f10485e7SMark Brown WM8990_LOPLON_BIT, 1, 0), 639f10485e7SMark Brown }; 640f10485e7SMark Brown 641f10485e7SMark Brown /* LOPMIX */ 642f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lopmix_controls[] = { 643f10485e7SMark Brown SOC_DAPM_SINGLE("LOPMIX Right Mic Bypass Switch", WM8990_LINE_MIXER1, 644f10485e7SMark Brown WM8990_LR12LOP_BIT, 1, 0), 645f10485e7SMark Brown SOC_DAPM_SINGLE("LOPMIX Left Mic Bypass Switch", WM8990_LINE_MIXER1, 646f10485e7SMark Brown WM8990_LL12LOP_BIT, 1, 0), 647f10485e7SMark Brown SOC_DAPM_SINGLE("LOPMIX Left Mixer PGA Switch", WM8990_LINE_MIXER1, 648f10485e7SMark Brown WM8990_LLOPGALOP_BIT, 1, 0), 649f10485e7SMark Brown }; 650f10485e7SMark Brown 651f10485e7SMark Brown /* RONMIX */ 652f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_ronmix_controls[] = { 653f10485e7SMark Brown SOC_DAPM_SINGLE("RONMIX Right Mixer PGA Switch", WM8990_LINE_MIXER2, 654f10485e7SMark Brown WM8990_RROPGARON_BIT, 1, 0), 655f10485e7SMark Brown SOC_DAPM_SINGLE("RONMIX Left Mixer PGA Switch", WM8990_LINE_MIXER2, 656f10485e7SMark Brown WM8990_RLOPGARON_BIT, 1, 0), 657f10485e7SMark Brown SOC_DAPM_SINGLE("RONMIX Inverted ROP Switch", WM8990_LINE_MIXER2, 658f10485e7SMark Brown WM8990_ROPRON_BIT, 1, 0), 659f10485e7SMark Brown }; 660f10485e7SMark Brown 661f10485e7SMark Brown /* ROPMIX */ 662f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_ropmix_controls[] = { 663f10485e7SMark Brown SOC_DAPM_SINGLE("ROPMIX Left Mic Bypass Switch", WM8990_LINE_MIXER2, 664f10485e7SMark Brown WM8990_RL12ROP_BIT, 1, 0), 665f10485e7SMark Brown SOC_DAPM_SINGLE("ROPMIX Right Mic Bypass Switch", WM8990_LINE_MIXER2, 666f10485e7SMark Brown WM8990_RR12ROP_BIT, 1, 0), 667f10485e7SMark Brown SOC_DAPM_SINGLE("ROPMIX Right Mixer PGA Switch", WM8990_LINE_MIXER2, 668f10485e7SMark Brown WM8990_RROPGAROP_BIT, 1, 0), 669f10485e7SMark Brown }; 670f10485e7SMark Brown 671f10485e7SMark Brown /* OUT3MIX */ 672f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_out3mix_controls[] = { 673f10485e7SMark Brown SOC_DAPM_SINGLE("OUT3MIX LIN4/RXP Bypass Switch", WM8990_OUT3_4_MIXER, 674f10485e7SMark Brown WM8990_LI4O3_BIT, 1, 0), 675f10485e7SMark Brown SOC_DAPM_SINGLE("OUT3MIX Left Out PGA Switch", WM8990_OUT3_4_MIXER, 676f10485e7SMark Brown WM8990_LPGAO3_BIT, 1, 0), 677f10485e7SMark Brown }; 678f10485e7SMark Brown 679f10485e7SMark Brown /* OUT4MIX */ 680f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_out4mix_controls[] = { 681f10485e7SMark Brown SOC_DAPM_SINGLE("OUT4MIX Right Out PGA Switch", WM8990_OUT3_4_MIXER, 682f10485e7SMark Brown WM8990_RPGAO4_BIT, 1, 0), 683f10485e7SMark Brown SOC_DAPM_SINGLE("OUT4MIX RIN4/RXP Bypass Switch", WM8990_OUT3_4_MIXER, 684f10485e7SMark Brown WM8990_RI4O4_BIT, 1, 0), 685f10485e7SMark Brown }; 686f10485e7SMark Brown 687f10485e7SMark Brown /* SPKMIX */ 688f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_spkmix_controls[] = { 689f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX LIN2 Bypass Switch", WM8990_SPEAKER_MIXER, 690f10485e7SMark Brown WM8990_LI2SPK_BIT, 1, 0), 691f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX LADC Bypass Switch", WM8990_SPEAKER_MIXER, 692f10485e7SMark Brown WM8990_LB2SPK_BIT, 1, 0), 693f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX Left Mixer PGA Switch", WM8990_SPEAKER_MIXER, 694f10485e7SMark Brown WM8990_LOPGASPK_BIT, 1, 0), 695f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX Left DAC Switch", WM8990_SPEAKER_MIXER, 696f10485e7SMark Brown WM8990_LDSPK_BIT, 1, 0), 697f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX Right DAC Switch", WM8990_SPEAKER_MIXER, 698f10485e7SMark Brown WM8990_RDSPK_BIT, 1, 0), 699f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX Right Mixer PGA Switch", WM8990_SPEAKER_MIXER, 700f10485e7SMark Brown WM8990_ROPGASPK_BIT, 1, 0), 701f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX RADC Bypass Switch", WM8990_SPEAKER_MIXER, 702f10485e7SMark Brown WM8990_RL12ROP_BIT, 1, 0), 703f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX RIN2 Bypass Switch", WM8990_SPEAKER_MIXER, 704f10485e7SMark Brown WM8990_RI2SPK_BIT, 1, 0), 705f10485e7SMark Brown }; 706f10485e7SMark Brown 707f10485e7SMark Brown static const struct snd_soc_dapm_widget wm8990_dapm_widgets[] = { 708f10485e7SMark Brown /* Input Side */ 709f10485e7SMark Brown /* Input Lines */ 710f10485e7SMark Brown SND_SOC_DAPM_INPUT("LIN1"), 711f10485e7SMark Brown SND_SOC_DAPM_INPUT("LIN2"), 712f10485e7SMark Brown SND_SOC_DAPM_INPUT("LIN3"), 713f10485e7SMark Brown SND_SOC_DAPM_INPUT("LIN4/RXN"), 714f10485e7SMark Brown SND_SOC_DAPM_INPUT("RIN3"), 715f10485e7SMark Brown SND_SOC_DAPM_INPUT("RIN4/RXP"), 716f10485e7SMark Brown SND_SOC_DAPM_INPUT("RIN1"), 717f10485e7SMark Brown SND_SOC_DAPM_INPUT("RIN2"), 718f10485e7SMark Brown SND_SOC_DAPM_INPUT("Internal ADC Source"), 719f10485e7SMark Brown 720f10485e7SMark Brown /* DACs */ 721f10485e7SMark Brown SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8990_POWER_MANAGEMENT_2, 722f10485e7SMark Brown WM8990_ADCL_ENA_BIT, 0), 723f10485e7SMark Brown SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8990_POWER_MANAGEMENT_2, 724f10485e7SMark Brown WM8990_ADCR_ENA_BIT, 0), 725f10485e7SMark Brown 726f10485e7SMark Brown /* Input PGAs */ 727f10485e7SMark Brown SND_SOC_DAPM_MIXER("LIN12 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_LIN12_ENA_BIT, 728f10485e7SMark Brown 0, &wm8990_dapm_lin12_pga_controls[0], 729f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lin12_pga_controls)), 730f10485e7SMark Brown SND_SOC_DAPM_MIXER("LIN34 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_LIN34_ENA_BIT, 731f10485e7SMark Brown 0, &wm8990_dapm_lin34_pga_controls[0], 732f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lin34_pga_controls)), 733f10485e7SMark Brown SND_SOC_DAPM_MIXER("RIN12 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_RIN12_ENA_BIT, 734f10485e7SMark Brown 0, &wm8990_dapm_rin12_pga_controls[0], 735f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_rin12_pga_controls)), 736f10485e7SMark Brown SND_SOC_DAPM_MIXER("RIN34 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_RIN34_ENA_BIT, 737f10485e7SMark Brown 0, &wm8990_dapm_rin34_pga_controls[0], 738f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_rin34_pga_controls)), 739f10485e7SMark Brown 740f10485e7SMark Brown /* INMIXL */ 741f10485e7SMark Brown SND_SOC_DAPM_MIXER_E("INMIXL", WM8990_INTDRIVBITS, WM8990_INMIXL_PWR_BIT, 0, 742f10485e7SMark Brown &wm8990_dapm_inmixl_controls[0], 743f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_inmixl_controls), 744f10485e7SMark Brown inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), 745f10485e7SMark Brown 746f10485e7SMark Brown /* AINLMUX */ 747f10485e7SMark Brown SND_SOC_DAPM_MUX_E("AILNMUX", WM8990_INTDRIVBITS, WM8990_AINLMUX_PWR_BIT, 0, 748f10485e7SMark Brown &wm8990_dapm_ainlmux_controls, inmixer_event, 749f10485e7SMark Brown SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), 750f10485e7SMark Brown 751f10485e7SMark Brown /* INMIXR */ 752f10485e7SMark Brown SND_SOC_DAPM_MIXER_E("INMIXR", WM8990_INTDRIVBITS, WM8990_INMIXR_PWR_BIT, 0, 753f10485e7SMark Brown &wm8990_dapm_inmixr_controls[0], 754f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_inmixr_controls), 755f10485e7SMark Brown inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), 756f10485e7SMark Brown 757f10485e7SMark Brown /* AINRMUX */ 758f10485e7SMark Brown SND_SOC_DAPM_MUX_E("AIRNMUX", WM8990_INTDRIVBITS, WM8990_AINRMUX_PWR_BIT, 0, 759f10485e7SMark Brown &wm8990_dapm_ainrmux_controls, inmixer_event, 760f10485e7SMark Brown SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), 761f10485e7SMark Brown 762f10485e7SMark Brown /* Output Side */ 763f10485e7SMark Brown /* DACs */ 764f10485e7SMark Brown SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8990_POWER_MANAGEMENT_3, 765f10485e7SMark Brown WM8990_DACL_ENA_BIT, 0), 766f10485e7SMark Brown SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8990_POWER_MANAGEMENT_3, 767f10485e7SMark Brown WM8990_DACR_ENA_BIT, 0), 768f10485e7SMark Brown 769f10485e7SMark Brown /* LOMIX */ 770f10485e7SMark Brown SND_SOC_DAPM_MIXER_E("LOMIX", WM8990_POWER_MANAGEMENT_3, WM8990_LOMIX_ENA_BIT, 771f10485e7SMark Brown 0, &wm8990_dapm_lomix_controls[0], 772f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lomix_controls), 773f10485e7SMark Brown outmixer_event, SND_SOC_DAPM_PRE_REG), 774f10485e7SMark Brown 775f10485e7SMark Brown /* LONMIX */ 776f10485e7SMark Brown SND_SOC_DAPM_MIXER("LONMIX", WM8990_POWER_MANAGEMENT_3, WM8990_LON_ENA_BIT, 0, 777f10485e7SMark Brown &wm8990_dapm_lonmix_controls[0], 778f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lonmix_controls)), 779f10485e7SMark Brown 780f10485e7SMark Brown /* LOPMIX */ 781f10485e7SMark Brown SND_SOC_DAPM_MIXER("LOPMIX", WM8990_POWER_MANAGEMENT_3, WM8990_LOP_ENA_BIT, 0, 782f10485e7SMark Brown &wm8990_dapm_lopmix_controls[0], 783f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lopmix_controls)), 784f10485e7SMark Brown 785f10485e7SMark Brown /* OUT3MIX */ 786f10485e7SMark Brown SND_SOC_DAPM_MIXER("OUT3MIX", WM8990_POWER_MANAGEMENT_1, WM8990_OUT3_ENA_BIT, 0, 787f10485e7SMark Brown &wm8990_dapm_out3mix_controls[0], 788f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_out3mix_controls)), 789f10485e7SMark Brown 790f10485e7SMark Brown /* SPKMIX */ 791f10485e7SMark Brown SND_SOC_DAPM_MIXER_E("SPKMIX", WM8990_POWER_MANAGEMENT_1, WM8990_SPK_ENA_BIT, 0, 792f10485e7SMark Brown &wm8990_dapm_spkmix_controls[0], 793f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_spkmix_controls), outmixer_event, 794f10485e7SMark Brown SND_SOC_DAPM_PRE_REG), 795f10485e7SMark Brown 796f10485e7SMark Brown /* OUT4MIX */ 797f10485e7SMark Brown SND_SOC_DAPM_MIXER("OUT4MIX", WM8990_POWER_MANAGEMENT_1, WM8990_OUT4_ENA_BIT, 0, 798f10485e7SMark Brown &wm8990_dapm_out4mix_controls[0], 799f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_out4mix_controls)), 800f10485e7SMark Brown 801f10485e7SMark Brown /* ROPMIX */ 802f10485e7SMark Brown SND_SOC_DAPM_MIXER("ROPMIX", WM8990_POWER_MANAGEMENT_3, WM8990_ROP_ENA_BIT, 0, 803f10485e7SMark Brown &wm8990_dapm_ropmix_controls[0], 804f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_ropmix_controls)), 805f10485e7SMark Brown 806f10485e7SMark Brown /* RONMIX */ 807f10485e7SMark Brown SND_SOC_DAPM_MIXER("RONMIX", WM8990_POWER_MANAGEMENT_3, WM8990_RON_ENA_BIT, 0, 808f10485e7SMark Brown &wm8990_dapm_ronmix_controls[0], 809f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_ronmix_controls)), 810f10485e7SMark Brown 811f10485e7SMark Brown /* ROMIX */ 812f10485e7SMark Brown SND_SOC_DAPM_MIXER_E("ROMIX", WM8990_POWER_MANAGEMENT_3, WM8990_ROMIX_ENA_BIT, 813f10485e7SMark Brown 0, &wm8990_dapm_romix_controls[0], 814f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_romix_controls), 815f10485e7SMark Brown outmixer_event, SND_SOC_DAPM_PRE_REG), 816f10485e7SMark Brown 817f10485e7SMark Brown /* LOUT PGA */ 818f10485e7SMark Brown SND_SOC_DAPM_PGA("LOUT PGA", WM8990_POWER_MANAGEMENT_1, WM8990_LOUT_ENA_BIT, 0, 819f10485e7SMark Brown NULL, 0), 820f10485e7SMark Brown 821f10485e7SMark Brown /* ROUT PGA */ 822f10485e7SMark Brown SND_SOC_DAPM_PGA("ROUT PGA", WM8990_POWER_MANAGEMENT_1, WM8990_ROUT_ENA_BIT, 0, 823f10485e7SMark Brown NULL, 0), 824f10485e7SMark Brown 825f10485e7SMark Brown /* LOPGA */ 826f10485e7SMark Brown SND_SOC_DAPM_PGA("LOPGA", WM8990_POWER_MANAGEMENT_3, WM8990_LOPGA_ENA_BIT, 0, 827f10485e7SMark Brown NULL, 0), 828f10485e7SMark Brown 829f10485e7SMark Brown /* ROPGA */ 830f10485e7SMark Brown SND_SOC_DAPM_PGA("ROPGA", WM8990_POWER_MANAGEMENT_3, WM8990_ROPGA_ENA_BIT, 0, 831f10485e7SMark Brown NULL, 0), 832f10485e7SMark Brown 833f10485e7SMark Brown /* MICBIAS */ 834f10485e7SMark Brown SND_SOC_DAPM_MICBIAS("MICBIAS", WM8990_POWER_MANAGEMENT_1, 835f10485e7SMark Brown WM8990_MICBIAS_ENA_BIT, 0), 836f10485e7SMark Brown 837f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("LON"), 838f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("LOP"), 839f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("OUT3"), 840f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("LOUT"), 841f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("SPKN"), 842f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("SPKP"), 843f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("ROUT"), 844f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("OUT4"), 845f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("ROP"), 846f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("RON"), 847f10485e7SMark Brown 848f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("Internal DAC Sink"), 849f10485e7SMark Brown }; 850f10485e7SMark Brown 851f10485e7SMark Brown static const struct snd_soc_dapm_route audio_map[] = { 852f10485e7SMark Brown /* Make DACs turn on when playing even if not mixed into any outputs */ 853f10485e7SMark Brown {"Internal DAC Sink", NULL, "Left DAC"}, 854f10485e7SMark Brown {"Internal DAC Sink", NULL, "Right DAC"}, 855f10485e7SMark Brown 856f10485e7SMark Brown /* Make ADCs turn on when recording even if not mixed from any inputs */ 857f10485e7SMark Brown {"Left ADC", NULL, "Internal ADC Source"}, 858f10485e7SMark Brown {"Right ADC", NULL, "Internal ADC Source"}, 859f10485e7SMark Brown 860f10485e7SMark Brown /* Input Side */ 861f10485e7SMark Brown /* LIN12 PGA */ 862f10485e7SMark Brown {"LIN12 PGA", "LIN1 Switch", "LIN1"}, 863f10485e7SMark Brown {"LIN12 PGA", "LIN2 Switch", "LIN2"}, 864f10485e7SMark Brown /* LIN34 PGA */ 865f10485e7SMark Brown {"LIN34 PGA", "LIN3 Switch", "LIN3"}, 866f10485e7SMark Brown {"LIN34 PGA", "LIN4 Switch", "LIN4"}, 867f10485e7SMark Brown /* INMIXL */ 868f10485e7SMark Brown {"INMIXL", "Record Left Volume", "LOMIX"}, 869f10485e7SMark Brown {"INMIXL", "LIN2 Volume", "LIN2"}, 870f10485e7SMark Brown {"INMIXL", "LINPGA12 Switch", "LIN12 PGA"}, 871f10485e7SMark Brown {"INMIXL", "LINPGA34 Switch", "LIN34 PGA"}, 872f10485e7SMark Brown /* AILNMUX */ 873f10485e7SMark Brown {"AILNMUX", "INMIXL Mix", "INMIXL"}, 874f10485e7SMark Brown {"AILNMUX", "DIFFINL Mix", "LIN12PGA"}, 875f10485e7SMark Brown {"AILNMUX", "DIFFINL Mix", "LIN34PGA"}, 876f10485e7SMark Brown {"AILNMUX", "RXVOICE Mix", "LIN4/RXN"}, 877f10485e7SMark Brown {"AILNMUX", "RXVOICE Mix", "RIN4/RXP"}, 878f10485e7SMark Brown /* ADC */ 879f10485e7SMark Brown {"Left ADC", NULL, "AILNMUX"}, 880f10485e7SMark Brown 881f10485e7SMark Brown /* RIN12 PGA */ 882f10485e7SMark Brown {"RIN12 PGA", "RIN1 Switch", "RIN1"}, 883f10485e7SMark Brown {"RIN12 PGA", "RIN2 Switch", "RIN2"}, 884f10485e7SMark Brown /* RIN34 PGA */ 885f10485e7SMark Brown {"RIN34 PGA", "RIN3 Switch", "RIN3"}, 886f10485e7SMark Brown {"RIN34 PGA", "RIN4 Switch", "RIN4"}, 887f10485e7SMark Brown /* INMIXL */ 888f10485e7SMark Brown {"INMIXR", "Record Right Volume", "ROMIX"}, 889f10485e7SMark Brown {"INMIXR", "RIN2 Volume", "RIN2"}, 890f10485e7SMark Brown {"INMIXR", "RINPGA12 Switch", "RIN12 PGA"}, 891f10485e7SMark Brown {"INMIXR", "RINPGA34 Switch", "RIN34 PGA"}, 892f10485e7SMark Brown /* AIRNMUX */ 893f10485e7SMark Brown {"AIRNMUX", "INMIXR Mix", "INMIXR"}, 894f10485e7SMark Brown {"AIRNMUX", "DIFFINR Mix", "RIN12PGA"}, 895f10485e7SMark Brown {"AIRNMUX", "DIFFINR Mix", "RIN34PGA"}, 896f10485e7SMark Brown {"AIRNMUX", "RXVOICE Mix", "RIN4/RXN"}, 897f10485e7SMark Brown {"AIRNMUX", "RXVOICE Mix", "RIN4/RXP"}, 898f10485e7SMark Brown /* ADC */ 899f10485e7SMark Brown {"Right ADC", NULL, "AIRNMUX"}, 900f10485e7SMark Brown 901f10485e7SMark Brown /* LOMIX */ 902f10485e7SMark Brown {"LOMIX", "LOMIX RIN3 Bypass Switch", "RIN3"}, 903f10485e7SMark Brown {"LOMIX", "LOMIX LIN3 Bypass Switch", "LIN3"}, 904f10485e7SMark Brown {"LOMIX", "LOMIX LIN12 PGA Bypass Switch", "LIN12 PGA"}, 905f10485e7SMark Brown {"LOMIX", "LOMIX RIN12 PGA Bypass Switch", "RIN12 PGA"}, 906f10485e7SMark Brown {"LOMIX", "LOMIX Right ADC Bypass Switch", "AINRMUX"}, 907f10485e7SMark Brown {"LOMIX", "LOMIX Left ADC Bypass Switch", "AINLMUX"}, 908f10485e7SMark Brown {"LOMIX", "LOMIX Left DAC Switch", "Left DAC"}, 909f10485e7SMark Brown 910f10485e7SMark Brown /* ROMIX */ 911f10485e7SMark Brown {"ROMIX", "ROMIX RIN3 Bypass Switch", "RIN3"}, 912f10485e7SMark Brown {"ROMIX", "ROMIX LIN3 Bypass Switch", "LIN3"}, 913f10485e7SMark Brown {"ROMIX", "ROMIX LIN12 PGA Bypass Switch", "LIN12 PGA"}, 914f10485e7SMark Brown {"ROMIX", "ROMIX RIN12 PGA Bypass Switch", "RIN12 PGA"}, 915f10485e7SMark Brown {"ROMIX", "ROMIX Right ADC Bypass Switch", "AINRMUX"}, 916f10485e7SMark Brown {"ROMIX", "ROMIX Left ADC Bypass Switch", "AINLMUX"}, 917f10485e7SMark Brown {"ROMIX", "ROMIX Right DAC Switch", "Right DAC"}, 918f10485e7SMark Brown 919f10485e7SMark Brown /* SPKMIX */ 920f10485e7SMark Brown {"SPKMIX", "SPKMIX LIN2 Bypass Switch", "LIN2"}, 921f10485e7SMark Brown {"SPKMIX", "SPKMIX RIN2 Bypass Switch", "RIN2"}, 922f10485e7SMark Brown {"SPKMIX", "SPKMIX LADC Bypass Switch", "AINLMUX"}, 923f10485e7SMark Brown {"SPKMIX", "SPKMIX RADC Bypass Switch", "AINRMUX"}, 924f10485e7SMark Brown {"SPKMIX", "SPKMIX Left Mixer PGA Switch", "LOPGA"}, 925f10485e7SMark Brown {"SPKMIX", "SPKMIX Right Mixer PGA Switch", "ROPGA"}, 926f10485e7SMark Brown {"SPKMIX", "SPKMIX Right DAC Switch", "Right DAC"}, 927436a7459SMark Brown {"SPKMIX", "SPKMIX Left DAC Switch", "Left DAC"}, 928f10485e7SMark Brown 929f10485e7SMark Brown /* LONMIX */ 930f10485e7SMark Brown {"LONMIX", "LONMIX Left Mixer PGA Switch", "LOPGA"}, 931f10485e7SMark Brown {"LONMIX", "LONMIX Right Mixer PGA Switch", "ROPGA"}, 932f10485e7SMark Brown {"LONMIX", "LONMIX Inverted LOP Switch", "LOPMIX"}, 933f10485e7SMark Brown 934f10485e7SMark Brown /* LOPMIX */ 935f10485e7SMark Brown {"LOPMIX", "LOPMIX Right Mic Bypass Switch", "RIN12 PGA"}, 936f10485e7SMark Brown {"LOPMIX", "LOPMIX Left Mic Bypass Switch", "LIN12 PGA"}, 937f10485e7SMark Brown {"LOPMIX", "LOPMIX Left Mixer PGA Switch", "LOPGA"}, 938f10485e7SMark Brown 939f10485e7SMark Brown /* OUT3MIX */ 940f10485e7SMark Brown {"OUT3MIX", "OUT3MIX LIN4/RXP Bypass Switch", "LIN4/RXP"}, 941f10485e7SMark Brown {"OUT3MIX", "OUT3MIX Left Out PGA Switch", "LOPGA"}, 942f10485e7SMark Brown 943f10485e7SMark Brown /* OUT4MIX */ 944f10485e7SMark Brown {"OUT4MIX", "OUT4MIX Right Out PGA Switch", "ROPGA"}, 945f10485e7SMark Brown {"OUT4MIX", "OUT4MIX RIN4/RXP Bypass Switch", "RIN4/RXP"}, 946f10485e7SMark Brown 947f10485e7SMark Brown /* RONMIX */ 948f10485e7SMark Brown {"RONMIX", "RONMIX Right Mixer PGA Switch", "ROPGA"}, 949f10485e7SMark Brown {"RONMIX", "RONMIX Left Mixer PGA Switch", "LOPGA"}, 950f10485e7SMark Brown {"RONMIX", "RONMIX Inverted ROP Switch", "ROPMIX"}, 951f10485e7SMark Brown 952f10485e7SMark Brown /* ROPMIX */ 953f10485e7SMark Brown {"ROPMIX", "ROPMIX Left Mic Bypass Switch", "LIN12 PGA"}, 954f10485e7SMark Brown {"ROPMIX", "ROPMIX Right Mic Bypass Switch", "RIN12 PGA"}, 955f10485e7SMark Brown {"ROPMIX", "ROPMIX Right Mixer PGA Switch", "ROPGA"}, 956f10485e7SMark Brown 957f10485e7SMark Brown /* Out Mixer PGAs */ 958f10485e7SMark Brown {"LOPGA", NULL, "LOMIX"}, 959f10485e7SMark Brown {"ROPGA", NULL, "ROMIX"}, 960f10485e7SMark Brown 961f10485e7SMark Brown {"LOUT PGA", NULL, "LOMIX"}, 962f10485e7SMark Brown {"ROUT PGA", NULL, "ROMIX"}, 963f10485e7SMark Brown 964f10485e7SMark Brown /* Output Pins */ 965f10485e7SMark Brown {"LON", NULL, "LONMIX"}, 966f10485e7SMark Brown {"LOP", NULL, "LOPMIX"}, 967f10485e7SMark Brown {"OUT", NULL, "OUT3MIX"}, 968f10485e7SMark Brown {"LOUT", NULL, "LOUT PGA"}, 969f10485e7SMark Brown {"SPKN", NULL, "SPKMIX"}, 970f10485e7SMark Brown {"ROUT", NULL, "ROUT PGA"}, 971f10485e7SMark Brown {"OUT4", NULL, "OUT4MIX"}, 972f10485e7SMark Brown {"ROP", NULL, "ROPMIX"}, 973f10485e7SMark Brown {"RON", NULL, "RONMIX"}, 974f10485e7SMark Brown }; 975f10485e7SMark Brown 976f10485e7SMark Brown static int wm8990_add_widgets(struct snd_soc_codec *codec) 977f10485e7SMark Brown { 978f10485e7SMark Brown snd_soc_dapm_new_controls(codec, wm8990_dapm_widgets, 979f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_widgets)); 980f10485e7SMark Brown 981f10485e7SMark Brown /* set up the WM8990 audio map */ 982f10485e7SMark Brown snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map)); 983f10485e7SMark Brown 984f10485e7SMark Brown snd_soc_dapm_new_widgets(codec); 985f10485e7SMark Brown return 0; 986f10485e7SMark Brown } 987f10485e7SMark Brown 988f10485e7SMark Brown /* PLL divisors */ 989f10485e7SMark Brown struct _pll_div { 990f10485e7SMark Brown u32 div2; 991f10485e7SMark Brown u32 n; 992f10485e7SMark Brown u32 k; 993f10485e7SMark Brown }; 994f10485e7SMark Brown 995f10485e7SMark Brown /* The size in bits of the pll divide multiplied by 10 996f10485e7SMark Brown * to allow rounding later */ 997f10485e7SMark Brown #define FIXED_PLL_SIZE ((1 << 16) * 10) 998f10485e7SMark Brown 999f10485e7SMark Brown static void pll_factors(struct _pll_div *pll_div, unsigned int target, 1000f10485e7SMark Brown unsigned int source) 1001f10485e7SMark Brown { 1002f10485e7SMark Brown u64 Kpart; 1003f10485e7SMark Brown unsigned int K, Ndiv, Nmod; 1004f10485e7SMark Brown 1005f10485e7SMark Brown 1006f10485e7SMark Brown Ndiv = target / source; 1007f10485e7SMark Brown if (Ndiv < 6) { 1008f10485e7SMark Brown source >>= 1; 1009f10485e7SMark Brown pll_div->div2 = 1; 1010f10485e7SMark Brown Ndiv = target / source; 1011f10485e7SMark Brown } else 1012f10485e7SMark Brown pll_div->div2 = 0; 1013f10485e7SMark Brown 1014f10485e7SMark Brown if ((Ndiv < 6) || (Ndiv > 12)) 1015f10485e7SMark Brown printk(KERN_WARNING 1016f10485e7SMark Brown "WM8990 N value outwith recommended range! N = %d\n", Ndiv); 1017f10485e7SMark Brown 1018f10485e7SMark Brown pll_div->n = Ndiv; 1019f10485e7SMark Brown Nmod = target % source; 1020f10485e7SMark Brown Kpart = FIXED_PLL_SIZE * (long long)Nmod; 1021f10485e7SMark Brown 1022f10485e7SMark Brown do_div(Kpart, source); 1023f10485e7SMark Brown 1024f10485e7SMark Brown K = Kpart & 0xFFFFFFFF; 1025f10485e7SMark Brown 1026f10485e7SMark Brown /* Check if we need to round */ 1027f10485e7SMark Brown if ((K % 10) >= 5) 1028f10485e7SMark Brown K += 5; 1029f10485e7SMark Brown 1030f10485e7SMark Brown /* Move down to proper range now rounding is done */ 1031f10485e7SMark Brown K /= 10; 1032f10485e7SMark Brown 1033f10485e7SMark Brown pll_div->k = K; 1034f10485e7SMark Brown } 1035f10485e7SMark Brown 1036e550e17fSLiam Girdwood static int wm8990_set_dai_pll(struct snd_soc_dai *codec_dai, 1037f10485e7SMark Brown int pll_id, unsigned int freq_in, unsigned int freq_out) 1038f10485e7SMark Brown { 1039f10485e7SMark Brown u16 reg; 1040f10485e7SMark Brown struct snd_soc_codec *codec = codec_dai->codec; 1041f10485e7SMark Brown struct _pll_div pll_div; 1042f10485e7SMark Brown 1043f10485e7SMark Brown if (freq_in && freq_out) { 1044f10485e7SMark Brown pll_factors(&pll_div, freq_out * 4, freq_in); 1045f10485e7SMark Brown 1046f10485e7SMark Brown /* Turn on PLL */ 1047f10485e7SMark Brown reg = wm8990_read_reg_cache(codec, WM8990_POWER_MANAGEMENT_2); 1048f10485e7SMark Brown reg |= WM8990_PLL_ENA; 1049f10485e7SMark Brown wm8990_write(codec, WM8990_POWER_MANAGEMENT_2, reg); 1050f10485e7SMark Brown 1051f10485e7SMark Brown /* sysclk comes from PLL */ 1052f10485e7SMark Brown reg = wm8990_read_reg_cache(codec, WM8990_CLOCKING_2); 1053f10485e7SMark Brown wm8990_write(codec, WM8990_CLOCKING_2, reg | WM8990_SYSCLK_SRC); 1054f10485e7SMark Brown 1055f10485e7SMark Brown /* set up N , fractional mode and pre-divisor if neccessary */ 1056f10485e7SMark Brown wm8990_write(codec, WM8990_PLL1, pll_div.n | WM8990_SDM | 1057f10485e7SMark Brown (pll_div.div2?WM8990_PRESCALE:0)); 1058f10485e7SMark Brown wm8990_write(codec, WM8990_PLL2, (u8)(pll_div.k>>8)); 1059f10485e7SMark Brown wm8990_write(codec, WM8990_PLL3, (u8)(pll_div.k & 0xFF)); 1060f10485e7SMark Brown } else { 1061f10485e7SMark Brown /* Turn on PLL */ 1062f10485e7SMark Brown reg = wm8990_read_reg_cache(codec, WM8990_POWER_MANAGEMENT_2); 1063f10485e7SMark Brown reg &= ~WM8990_PLL_ENA; 1064f10485e7SMark Brown wm8990_write(codec, WM8990_POWER_MANAGEMENT_2, reg); 1065f10485e7SMark Brown } 1066f10485e7SMark Brown return 0; 1067f10485e7SMark Brown } 1068f10485e7SMark Brown 1069f10485e7SMark Brown /* 1070f10485e7SMark Brown * Clock after PLL and dividers 1071f10485e7SMark Brown */ 1072e550e17fSLiam Girdwood static int wm8990_set_dai_sysclk(struct snd_soc_dai *codec_dai, 1073f10485e7SMark Brown int clk_id, unsigned int freq, int dir) 1074f10485e7SMark Brown { 1075f10485e7SMark Brown struct snd_soc_codec *codec = codec_dai->codec; 1076f10485e7SMark Brown struct wm8990_priv *wm8990 = codec->private_data; 1077f10485e7SMark Brown 1078f10485e7SMark Brown wm8990->sysclk = freq; 1079f10485e7SMark Brown return 0; 1080f10485e7SMark Brown } 1081f10485e7SMark Brown 1082f10485e7SMark Brown /* 1083f10485e7SMark Brown * Set's ADC and Voice DAC format. 1084f10485e7SMark Brown */ 1085e550e17fSLiam Girdwood static int wm8990_set_dai_fmt(struct snd_soc_dai *codec_dai, 1086f10485e7SMark Brown unsigned int fmt) 1087f10485e7SMark Brown { 1088f10485e7SMark Brown struct snd_soc_codec *codec = codec_dai->codec; 1089f10485e7SMark Brown u16 audio1, audio3; 1090f10485e7SMark Brown 1091f10485e7SMark Brown audio1 = wm8990_read_reg_cache(codec, WM8990_AUDIO_INTERFACE_1); 1092f10485e7SMark Brown audio3 = wm8990_read_reg_cache(codec, WM8990_AUDIO_INTERFACE_3); 1093f10485e7SMark Brown 1094f10485e7SMark Brown /* set master/slave audio interface */ 1095f10485e7SMark Brown switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1096f10485e7SMark Brown case SND_SOC_DAIFMT_CBS_CFS: 1097f10485e7SMark Brown audio3 &= ~WM8990_AIF_MSTR1; 1098f10485e7SMark Brown break; 1099f10485e7SMark Brown case SND_SOC_DAIFMT_CBM_CFM: 1100f10485e7SMark Brown audio3 |= WM8990_AIF_MSTR1; 1101f10485e7SMark Brown break; 1102f10485e7SMark Brown default: 1103f10485e7SMark Brown return -EINVAL; 1104f10485e7SMark Brown } 1105f10485e7SMark Brown 1106f10485e7SMark Brown audio1 &= ~WM8990_AIF_FMT_MASK; 1107f10485e7SMark Brown 1108f10485e7SMark Brown /* interface format */ 1109f10485e7SMark Brown switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1110f10485e7SMark Brown case SND_SOC_DAIFMT_I2S: 1111f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_I2S; 1112f10485e7SMark Brown audio1 &= ~WM8990_AIF_LRCLK_INV; 1113f10485e7SMark Brown break; 1114f10485e7SMark Brown case SND_SOC_DAIFMT_RIGHT_J: 1115f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_RIGHTJ; 1116f10485e7SMark Brown audio1 &= ~WM8990_AIF_LRCLK_INV; 1117f10485e7SMark Brown break; 1118f10485e7SMark Brown case SND_SOC_DAIFMT_LEFT_J: 1119f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_LEFTJ; 1120f10485e7SMark Brown audio1 &= ~WM8990_AIF_LRCLK_INV; 1121f10485e7SMark Brown break; 1122f10485e7SMark Brown case SND_SOC_DAIFMT_DSP_A: 1123f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_DSP; 1124f10485e7SMark Brown audio1 &= ~WM8990_AIF_LRCLK_INV; 1125f10485e7SMark Brown break; 1126f10485e7SMark Brown case SND_SOC_DAIFMT_DSP_B: 1127f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_DSP | WM8990_AIF_LRCLK_INV; 1128f10485e7SMark Brown break; 1129f10485e7SMark Brown default: 1130f10485e7SMark Brown return -EINVAL; 1131f10485e7SMark Brown } 1132f10485e7SMark Brown 1133f10485e7SMark Brown wm8990_write(codec, WM8990_AUDIO_INTERFACE_1, audio1); 1134f10485e7SMark Brown wm8990_write(codec, WM8990_AUDIO_INTERFACE_3, audio3); 1135f10485e7SMark Brown return 0; 1136f10485e7SMark Brown } 1137f10485e7SMark Brown 1138e550e17fSLiam Girdwood static int wm8990_set_dai_clkdiv(struct snd_soc_dai *codec_dai, 1139f10485e7SMark Brown int div_id, int div) 1140f10485e7SMark Brown { 1141f10485e7SMark Brown struct snd_soc_codec *codec = codec_dai->codec; 1142f10485e7SMark Brown u16 reg; 1143f10485e7SMark Brown 1144f10485e7SMark Brown switch (div_id) { 1145f10485e7SMark Brown case WM8990_MCLK_DIV: 1146f10485e7SMark Brown reg = wm8990_read_reg_cache(codec, WM8990_CLOCKING_2) & 1147f10485e7SMark Brown ~WM8990_MCLK_DIV_MASK; 1148f10485e7SMark Brown wm8990_write(codec, WM8990_CLOCKING_2, reg | div); 1149f10485e7SMark Brown break; 1150f10485e7SMark Brown case WM8990_DACCLK_DIV: 1151f10485e7SMark Brown reg = wm8990_read_reg_cache(codec, WM8990_CLOCKING_2) & 1152f10485e7SMark Brown ~WM8990_DAC_CLKDIV_MASK; 1153f10485e7SMark Brown wm8990_write(codec, WM8990_CLOCKING_2, reg | div); 1154f10485e7SMark Brown break; 1155f10485e7SMark Brown case WM8990_ADCCLK_DIV: 1156f10485e7SMark Brown reg = wm8990_read_reg_cache(codec, WM8990_CLOCKING_2) & 1157f10485e7SMark Brown ~WM8990_ADC_CLKDIV_MASK; 1158f10485e7SMark Brown wm8990_write(codec, WM8990_CLOCKING_2, reg | div); 1159f10485e7SMark Brown break; 1160f10485e7SMark Brown case WM8990_BCLK_DIV: 1161f10485e7SMark Brown reg = wm8990_read_reg_cache(codec, WM8990_CLOCKING_1) & 1162f10485e7SMark Brown ~WM8990_BCLK_DIV_MASK; 1163f10485e7SMark Brown wm8990_write(codec, WM8990_CLOCKING_1, reg | div); 1164f10485e7SMark Brown break; 1165f10485e7SMark Brown default: 1166f10485e7SMark Brown return -EINVAL; 1167f10485e7SMark Brown } 1168f10485e7SMark Brown 1169f10485e7SMark Brown return 0; 1170f10485e7SMark Brown } 1171f10485e7SMark Brown 1172f10485e7SMark Brown /* 1173f10485e7SMark Brown * Set PCM DAI bit size and sample rate. 1174f10485e7SMark Brown */ 1175f10485e7SMark Brown static int wm8990_hw_params(struct snd_pcm_substream *substream, 1176f10485e7SMark Brown struct snd_pcm_hw_params *params) 1177f10485e7SMark Brown { 1178f10485e7SMark Brown struct snd_soc_pcm_runtime *rtd = substream->private_data; 1179f10485e7SMark Brown struct snd_soc_device *socdev = rtd->socdev; 1180f10485e7SMark Brown struct snd_soc_codec *codec = socdev->codec; 1181f10485e7SMark Brown u16 audio1 = wm8990_read_reg_cache(codec, WM8990_AUDIO_INTERFACE_1); 1182f10485e7SMark Brown 1183f10485e7SMark Brown audio1 &= ~WM8990_AIF_WL_MASK; 1184f10485e7SMark Brown /* bit size */ 1185f10485e7SMark Brown switch (params_format(params)) { 1186f10485e7SMark Brown case SNDRV_PCM_FORMAT_S16_LE: 1187f10485e7SMark Brown break; 1188f10485e7SMark Brown case SNDRV_PCM_FORMAT_S20_3LE: 1189f10485e7SMark Brown audio1 |= WM8990_AIF_WL_20BITS; 1190f10485e7SMark Brown break; 1191f10485e7SMark Brown case SNDRV_PCM_FORMAT_S24_LE: 1192f10485e7SMark Brown audio1 |= WM8990_AIF_WL_24BITS; 1193f10485e7SMark Brown break; 1194f10485e7SMark Brown case SNDRV_PCM_FORMAT_S32_LE: 1195f10485e7SMark Brown audio1 |= WM8990_AIF_WL_32BITS; 1196f10485e7SMark Brown break; 1197f10485e7SMark Brown } 1198f10485e7SMark Brown 1199f10485e7SMark Brown wm8990_write(codec, WM8990_AUDIO_INTERFACE_1, audio1); 1200f10485e7SMark Brown return 0; 1201f10485e7SMark Brown } 1202f10485e7SMark Brown 1203e550e17fSLiam Girdwood static int wm8990_mute(struct snd_soc_dai *dai, int mute) 1204f10485e7SMark Brown { 1205f10485e7SMark Brown struct snd_soc_codec *codec = dai->codec; 1206f10485e7SMark Brown u16 val; 1207f10485e7SMark Brown 1208f10485e7SMark Brown val = wm8990_read_reg_cache(codec, WM8990_DAC_CTRL) & ~WM8990_DAC_MUTE; 1209f10485e7SMark Brown 1210f10485e7SMark Brown if (mute) 1211f10485e7SMark Brown wm8990_write(codec, WM8990_DAC_CTRL, val | WM8990_DAC_MUTE); 1212f10485e7SMark Brown else 1213f10485e7SMark Brown wm8990_write(codec, WM8990_DAC_CTRL, val); 1214f10485e7SMark Brown 1215f10485e7SMark Brown return 0; 1216f10485e7SMark Brown } 1217f10485e7SMark Brown 1218f10485e7SMark Brown static int wm8990_set_bias_level(struct snd_soc_codec *codec, 1219f10485e7SMark Brown enum snd_soc_bias_level level) 1220f10485e7SMark Brown { 1221f10485e7SMark Brown u16 val; 1222f10485e7SMark Brown 1223f10485e7SMark Brown switch (level) { 1224f10485e7SMark Brown case SND_SOC_BIAS_ON: 1225f10485e7SMark Brown break; 1226f10485e7SMark Brown case SND_SOC_BIAS_PREPARE: 1227f10485e7SMark Brown break; 1228f10485e7SMark Brown case SND_SOC_BIAS_STANDBY: 1229f10485e7SMark Brown if (codec->bias_level == SND_SOC_BIAS_OFF) { 1230f10485e7SMark Brown /* Enable all output discharge bits */ 1231f10485e7SMark Brown wm8990_write(codec, WM8990_ANTIPOP1, WM8990_DIS_LLINE | 1232f10485e7SMark Brown WM8990_DIS_RLINE | WM8990_DIS_OUT3 | 1233f10485e7SMark Brown WM8990_DIS_OUT4 | WM8990_DIS_LOUT | 1234f10485e7SMark Brown WM8990_DIS_ROUT); 1235f10485e7SMark Brown 1236f10485e7SMark Brown /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */ 1237f10485e7SMark Brown wm8990_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | 1238f10485e7SMark Brown WM8990_BUFDCOPEN | WM8990_POBCTRL | 1239f10485e7SMark Brown WM8990_VMIDTOG); 1240f10485e7SMark Brown 1241f10485e7SMark Brown /* Delay to allow output caps to discharge */ 1242f10485e7SMark Brown msleep(msecs_to_jiffies(300)); 1243f10485e7SMark Brown 1244f10485e7SMark Brown /* Disable VMIDTOG */ 1245f10485e7SMark Brown wm8990_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | 1246f10485e7SMark Brown WM8990_BUFDCOPEN | WM8990_POBCTRL); 1247f10485e7SMark Brown 1248f10485e7SMark Brown /* disable all output discharge bits */ 1249f10485e7SMark Brown wm8990_write(codec, WM8990_ANTIPOP1, 0); 1250f10485e7SMark Brown 1251f10485e7SMark Brown /* Enable outputs */ 1252f10485e7SMark Brown wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1b00); 1253f10485e7SMark Brown 1254f10485e7SMark Brown msleep(msecs_to_jiffies(50)); 1255f10485e7SMark Brown 1256f10485e7SMark Brown /* Enable VMID at 2x50k */ 1257f10485e7SMark Brown wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f02); 1258f10485e7SMark Brown 1259f10485e7SMark Brown msleep(msecs_to_jiffies(100)); 1260f10485e7SMark Brown 1261f10485e7SMark Brown /* Enable VREF */ 1262f10485e7SMark Brown wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f03); 1263f10485e7SMark Brown 1264f10485e7SMark Brown msleep(msecs_to_jiffies(600)); 1265f10485e7SMark Brown 1266f10485e7SMark Brown /* Enable BUFIOEN */ 1267f10485e7SMark Brown wm8990_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | 1268f10485e7SMark Brown WM8990_BUFDCOPEN | WM8990_POBCTRL | 1269f10485e7SMark Brown WM8990_BUFIOEN); 1270f10485e7SMark Brown 1271f10485e7SMark Brown /* Disable outputs */ 1272f10485e7SMark Brown wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x3); 1273f10485e7SMark Brown 1274f10485e7SMark Brown /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ 1275f10485e7SMark Brown wm8990_write(codec, WM8990_ANTIPOP2, WM8990_BUFIOEN); 1276f10485e7SMark Brown } else { 1277f10485e7SMark Brown /* ON -> standby */ 1278f10485e7SMark Brown 1279f10485e7SMark Brown } 1280f10485e7SMark Brown break; 1281f10485e7SMark Brown 1282f10485e7SMark Brown case SND_SOC_BIAS_OFF: 1283f10485e7SMark Brown /* Enable POBCTRL and SOFT_ST */ 1284f10485e7SMark Brown wm8990_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | 1285f10485e7SMark Brown WM8990_POBCTRL | WM8990_BUFIOEN); 1286f10485e7SMark Brown 1287f10485e7SMark Brown /* Enable POBCTRL, SOFT_ST and BUFDCOPEN */ 1288f10485e7SMark Brown wm8990_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | 1289f10485e7SMark Brown WM8990_BUFDCOPEN | WM8990_POBCTRL | 1290f10485e7SMark Brown WM8990_BUFIOEN); 1291f10485e7SMark Brown 1292f10485e7SMark Brown /* mute DAC */ 1293f10485e7SMark Brown val = wm8990_read_reg_cache(codec, WM8990_DAC_CTRL); 1294f10485e7SMark Brown wm8990_write(codec, WM8990_DAC_CTRL, val | WM8990_DAC_MUTE); 1295f10485e7SMark Brown 1296f10485e7SMark Brown /* Enable any disabled outputs */ 1297f10485e7SMark Brown wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f03); 1298f10485e7SMark Brown 1299f10485e7SMark Brown /* Disable VMID */ 1300f10485e7SMark Brown wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f01); 1301f10485e7SMark Brown 1302f10485e7SMark Brown msleep(msecs_to_jiffies(300)); 1303f10485e7SMark Brown 1304f10485e7SMark Brown /* Enable all output discharge bits */ 1305f10485e7SMark Brown wm8990_write(codec, WM8990_ANTIPOP1, WM8990_DIS_LLINE | 1306f10485e7SMark Brown WM8990_DIS_RLINE | WM8990_DIS_OUT3 | 1307f10485e7SMark Brown WM8990_DIS_OUT4 | WM8990_DIS_LOUT | 1308f10485e7SMark Brown WM8990_DIS_ROUT); 1309f10485e7SMark Brown 1310f10485e7SMark Brown /* Disable VREF */ 1311f10485e7SMark Brown wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x0); 1312f10485e7SMark Brown 1313f10485e7SMark Brown /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ 1314f10485e7SMark Brown wm8990_write(codec, WM8990_ANTIPOP2, 0x0); 1315f10485e7SMark Brown break; 1316f10485e7SMark Brown } 1317f10485e7SMark Brown 1318f10485e7SMark Brown codec->bias_level = level; 1319f10485e7SMark Brown return 0; 1320f10485e7SMark Brown } 1321f10485e7SMark Brown 1322f10485e7SMark Brown #define WM8990_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ 1323f10485e7SMark Brown SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \ 1324f10485e7SMark Brown SNDRV_PCM_RATE_48000) 1325f10485e7SMark Brown 1326f10485e7SMark Brown #define WM8990_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 1327f10485e7SMark Brown SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) 1328f10485e7SMark Brown 1329f10485e7SMark Brown /* 1330f10485e7SMark Brown * The WM8990 supports 2 different and mutually exclusive DAI 1331f10485e7SMark Brown * configurations. 1332f10485e7SMark Brown * 1333f10485e7SMark Brown * 1. ADC/DAC on Primary Interface 1334f10485e7SMark Brown * 2. ADC on Primary Interface/DAC on secondary 1335f10485e7SMark Brown */ 1336e550e17fSLiam Girdwood struct snd_soc_dai wm8990_dai = { 1337f10485e7SMark Brown /* ADC/DAC on primary */ 1338f10485e7SMark Brown .name = "WM8990 ADC/DAC Primary", 1339f10485e7SMark Brown .id = 1, 1340f10485e7SMark Brown .playback = { 1341f10485e7SMark Brown .stream_name = "Playback", 1342f10485e7SMark Brown .channels_min = 1, 1343f10485e7SMark Brown .channels_max = 2, 1344f10485e7SMark Brown .rates = WM8990_RATES, 1345f10485e7SMark Brown .formats = WM8990_FORMATS,}, 1346f10485e7SMark Brown .capture = { 1347f10485e7SMark Brown .stream_name = "Capture", 1348f10485e7SMark Brown .channels_min = 1, 1349f10485e7SMark Brown .channels_max = 2, 1350f10485e7SMark Brown .rates = WM8990_RATES, 1351f10485e7SMark Brown .formats = WM8990_FORMATS,}, 1352f10485e7SMark Brown .ops = { 1353f10485e7SMark Brown .hw_params = wm8990_hw_params,}, 1354f10485e7SMark Brown .dai_ops = { 1355f10485e7SMark Brown .digital_mute = wm8990_mute, 1356f10485e7SMark Brown .set_fmt = wm8990_set_dai_fmt, 1357f10485e7SMark Brown .set_clkdiv = wm8990_set_dai_clkdiv, 1358f10485e7SMark Brown .set_pll = wm8990_set_dai_pll, 1359f10485e7SMark Brown .set_sysclk = wm8990_set_dai_sysclk, 1360f10485e7SMark Brown }, 1361f10485e7SMark Brown }; 1362f10485e7SMark Brown EXPORT_SYMBOL_GPL(wm8990_dai); 1363f10485e7SMark Brown 1364f10485e7SMark Brown static int wm8990_suspend(struct platform_device *pdev, pm_message_t state) 1365f10485e7SMark Brown { 1366f10485e7SMark Brown struct snd_soc_device *socdev = platform_get_drvdata(pdev); 1367f10485e7SMark Brown struct snd_soc_codec *codec = socdev->codec; 1368f10485e7SMark Brown 1369f10485e7SMark Brown /* we only need to suspend if we are a valid card */ 1370f10485e7SMark Brown if (!codec->card) 1371f10485e7SMark Brown return 0; 1372f10485e7SMark Brown 1373f10485e7SMark Brown wm8990_set_bias_level(codec, SND_SOC_BIAS_OFF); 1374f10485e7SMark Brown return 0; 1375f10485e7SMark Brown } 1376f10485e7SMark Brown 1377f10485e7SMark Brown static int wm8990_resume(struct platform_device *pdev) 1378f10485e7SMark Brown { 1379f10485e7SMark Brown struct snd_soc_device *socdev = platform_get_drvdata(pdev); 1380f10485e7SMark Brown struct snd_soc_codec *codec = socdev->codec; 1381f10485e7SMark Brown int i; 1382f10485e7SMark Brown u8 data[2]; 1383f10485e7SMark Brown u16 *cache = codec->reg_cache; 1384f10485e7SMark Brown 1385f10485e7SMark Brown /* we only need to resume if we are a valid card */ 1386f10485e7SMark Brown if (!codec->card) 1387f10485e7SMark Brown return 0; 1388f10485e7SMark Brown 1389f10485e7SMark Brown /* Sync reg_cache with the hardware */ 1390f10485e7SMark Brown for (i = 0; i < ARRAY_SIZE(wm8990_reg); i++) { 1391f10485e7SMark Brown if (i + 1 == WM8990_RESET) 1392f10485e7SMark Brown continue; 1393f10485e7SMark Brown data[0] = ((i + 1) << 1) | ((cache[i] >> 8) & 0x0001); 1394f10485e7SMark Brown data[1] = cache[i] & 0x00ff; 1395f10485e7SMark Brown codec->hw_write(codec->control_data, data, 2); 1396f10485e7SMark Brown } 1397f10485e7SMark Brown 1398f10485e7SMark Brown wm8990_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 1399f10485e7SMark Brown return 0; 1400f10485e7SMark Brown } 1401f10485e7SMark Brown 1402f10485e7SMark Brown /* 1403f10485e7SMark Brown * initialise the WM8990 driver 1404f10485e7SMark Brown * register the mixer and dsp interfaces with the kernel 1405f10485e7SMark Brown */ 1406f10485e7SMark Brown static int wm8990_init(struct snd_soc_device *socdev) 1407f10485e7SMark Brown { 1408f10485e7SMark Brown struct snd_soc_codec *codec = socdev->codec; 1409f10485e7SMark Brown u16 reg; 1410f10485e7SMark Brown int ret = 0; 1411f10485e7SMark Brown 1412f10485e7SMark Brown codec->name = "WM8990"; 1413f10485e7SMark Brown codec->owner = THIS_MODULE; 1414f10485e7SMark Brown codec->read = wm8990_read_reg_cache; 1415f10485e7SMark Brown codec->write = wm8990_write; 1416f10485e7SMark Brown codec->set_bias_level = wm8990_set_bias_level; 1417f10485e7SMark Brown codec->dai = &wm8990_dai; 1418f10485e7SMark Brown codec->num_dai = 2; 1419f10485e7SMark Brown codec->reg_cache_size = ARRAY_SIZE(wm8990_reg); 1420f10485e7SMark Brown codec->reg_cache = kmemdup(wm8990_reg, sizeof(wm8990_reg), GFP_KERNEL); 1421f10485e7SMark Brown 1422f10485e7SMark Brown if (codec->reg_cache == NULL) 1423f10485e7SMark Brown return -ENOMEM; 1424f10485e7SMark Brown 1425f10485e7SMark Brown wm8990_reset(codec); 1426f10485e7SMark Brown 1427f10485e7SMark Brown /* register pcms */ 1428f10485e7SMark Brown ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); 1429f10485e7SMark Brown if (ret < 0) { 1430f10485e7SMark Brown printk(KERN_ERR "wm8990: failed to create pcms\n"); 1431f10485e7SMark Brown goto pcm_err; 1432f10485e7SMark Brown } 1433f10485e7SMark Brown 1434f10485e7SMark Brown /* charge output caps */ 1435f10485e7SMark Brown codec->bias_level = SND_SOC_BIAS_OFF; 1436f10485e7SMark Brown wm8990_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 1437f10485e7SMark Brown 1438f10485e7SMark Brown reg = wm8990_read_reg_cache(codec, WM8990_AUDIO_INTERFACE_4); 1439f10485e7SMark Brown wm8990_write(codec, WM8990_AUDIO_INTERFACE_4, reg | WM8990_ALRCGPIO1); 1440f10485e7SMark Brown 1441f10485e7SMark Brown reg = wm8990_read_reg_cache(codec, WM8990_GPIO1_GPIO2) & 1442f10485e7SMark Brown ~WM8990_GPIO1_SEL_MASK; 1443f10485e7SMark Brown wm8990_write(codec, WM8990_GPIO1_GPIO2, reg | 1); 1444f10485e7SMark Brown 1445f10485e7SMark Brown reg = wm8990_read_reg_cache(codec, WM8990_POWER_MANAGEMENT_2); 1446f10485e7SMark Brown wm8990_write(codec, WM8990_POWER_MANAGEMENT_2, reg | WM8990_OPCLK_ENA); 1447f10485e7SMark Brown 1448f10485e7SMark Brown wm8990_write(codec, WM8990_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8)); 1449f10485e7SMark Brown wm8990_write(codec, WM8990_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8)); 1450f10485e7SMark Brown 1451f10485e7SMark Brown wm8990_add_controls(codec); 1452f10485e7SMark Brown wm8990_add_widgets(codec); 1453f10485e7SMark Brown ret = snd_soc_register_card(socdev); 1454f10485e7SMark Brown if (ret < 0) { 1455f10485e7SMark Brown printk(KERN_ERR "wm8990: failed to register card\n"); 1456f10485e7SMark Brown goto card_err; 1457f10485e7SMark Brown } 1458f10485e7SMark Brown return ret; 1459f10485e7SMark Brown 1460f10485e7SMark Brown card_err: 1461f10485e7SMark Brown snd_soc_free_pcms(socdev); 1462f10485e7SMark Brown snd_soc_dapm_free(socdev); 1463f10485e7SMark Brown pcm_err: 1464f10485e7SMark Brown kfree(codec->reg_cache); 1465f10485e7SMark Brown return ret; 1466f10485e7SMark Brown } 1467f10485e7SMark Brown 1468f10485e7SMark Brown /* If the i2c layer weren't so broken, we could pass this kind of data 1469f10485e7SMark Brown around */ 1470f10485e7SMark Brown static struct snd_soc_device *wm8990_socdev; 1471f10485e7SMark Brown 1472f10485e7SMark Brown #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 1473f10485e7SMark Brown 1474f10485e7SMark Brown /* 1475f10485e7SMark Brown * WM891 2 wire address is determined by GPIO5 1476f10485e7SMark Brown * state during powerup. 1477f10485e7SMark Brown * low = 0x34 1478f10485e7SMark Brown * high = 0x36 1479f10485e7SMark Brown */ 1480f10485e7SMark Brown static unsigned short normal_i2c[] = { 0, I2C_CLIENT_END }; 1481f10485e7SMark Brown 1482f10485e7SMark Brown /* Magic definition of all other variables and things */ 1483f10485e7SMark Brown I2C_CLIENT_INSMOD; 1484f10485e7SMark Brown 1485f10485e7SMark Brown static struct i2c_driver wm8990_i2c_driver; 1486f10485e7SMark Brown static struct i2c_client client_template; 1487f10485e7SMark Brown 1488f10485e7SMark Brown static int wm8990_codec_probe(struct i2c_adapter *adap, int addr, int kind) 1489f10485e7SMark Brown { 1490f10485e7SMark Brown struct snd_soc_device *socdev = wm8990_socdev; 1491f10485e7SMark Brown struct wm8990_setup_data *setup = socdev->codec_data; 1492f10485e7SMark Brown struct snd_soc_codec *codec = socdev->codec; 1493f10485e7SMark Brown struct i2c_client *i2c; 1494f10485e7SMark Brown int ret; 1495f10485e7SMark Brown 1496f10485e7SMark Brown if (addr != setup->i2c_address) 1497f10485e7SMark Brown return -ENODEV; 1498f10485e7SMark Brown 1499f10485e7SMark Brown client_template.adapter = adap; 1500f10485e7SMark Brown client_template.addr = addr; 1501f10485e7SMark Brown 1502f10485e7SMark Brown i2c = kmemdup(&client_template, sizeof(client_template), GFP_KERNEL); 1503f10485e7SMark Brown if (i2c == NULL) { 1504f10485e7SMark Brown kfree(codec); 1505f10485e7SMark Brown return -ENOMEM; 1506f10485e7SMark Brown } 1507f10485e7SMark Brown i2c_set_clientdata(i2c, codec); 1508f10485e7SMark Brown codec->control_data = i2c; 1509f10485e7SMark Brown 1510f10485e7SMark Brown ret = i2c_attach_client(i2c); 1511f10485e7SMark Brown if (ret < 0) { 1512a5c95e90SMark Brown pr_err("failed to attach codec at addr %x\n", addr); 1513f10485e7SMark Brown goto err; 1514f10485e7SMark Brown } 1515f10485e7SMark Brown 1516f10485e7SMark Brown ret = wm8990_init(socdev); 1517f10485e7SMark Brown if (ret < 0) { 1518a5c95e90SMark Brown pr_err("failed to initialise WM8990\n"); 1519f10485e7SMark Brown goto err; 1520f10485e7SMark Brown } 1521f10485e7SMark Brown return ret; 1522f10485e7SMark Brown 1523f10485e7SMark Brown err: 1524f10485e7SMark Brown kfree(codec); 1525f10485e7SMark Brown kfree(i2c); 1526f10485e7SMark Brown return ret; 1527f10485e7SMark Brown } 1528f10485e7SMark Brown 1529f10485e7SMark Brown static int wm8990_i2c_detach(struct i2c_client *client) 1530f10485e7SMark Brown { 1531f10485e7SMark Brown struct snd_soc_codec *codec = i2c_get_clientdata(client); 1532f10485e7SMark Brown i2c_detach_client(client); 1533f10485e7SMark Brown kfree(codec->reg_cache); 1534f10485e7SMark Brown kfree(client); 1535f10485e7SMark Brown return 0; 1536f10485e7SMark Brown } 1537f10485e7SMark Brown 1538f10485e7SMark Brown static int wm8990_i2c_attach(struct i2c_adapter *adap) 1539f10485e7SMark Brown { 1540f10485e7SMark Brown return i2c_probe(adap, &addr_data, wm8990_codec_probe); 1541f10485e7SMark Brown } 1542f10485e7SMark Brown 1543f10485e7SMark Brown static struct i2c_driver wm8990_i2c_driver = { 1544f10485e7SMark Brown .driver = { 1545f10485e7SMark Brown .name = "WM8990 I2C Codec", 1546f10485e7SMark Brown .owner = THIS_MODULE, 1547f10485e7SMark Brown }, 1548f10485e7SMark Brown .attach_adapter = wm8990_i2c_attach, 1549f10485e7SMark Brown .detach_client = wm8990_i2c_detach, 1550f10485e7SMark Brown .command = NULL, 1551f10485e7SMark Brown }; 1552f10485e7SMark Brown 1553f10485e7SMark Brown static struct i2c_client client_template = { 1554f10485e7SMark Brown .name = "WM8990", 1555f10485e7SMark Brown .driver = &wm8990_i2c_driver, 1556f10485e7SMark Brown }; 1557f10485e7SMark Brown #endif 1558f10485e7SMark Brown 1559f10485e7SMark Brown static int wm8990_probe(struct platform_device *pdev) 1560f10485e7SMark Brown { 1561f10485e7SMark Brown struct snd_soc_device *socdev = platform_get_drvdata(pdev); 1562f10485e7SMark Brown struct wm8990_setup_data *setup; 1563f10485e7SMark Brown struct snd_soc_codec *codec; 1564f10485e7SMark Brown struct wm8990_priv *wm8990; 1565f10485e7SMark Brown int ret = 0; 1566f10485e7SMark Brown 1567a5c95e90SMark Brown pr_info("WM8990 Audio Codec %s\n", WM8990_VERSION); 1568f10485e7SMark Brown 1569f10485e7SMark Brown setup = socdev->codec_data; 1570f10485e7SMark Brown codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL); 1571f10485e7SMark Brown if (codec == NULL) 1572f10485e7SMark Brown return -ENOMEM; 1573f10485e7SMark Brown 1574f10485e7SMark Brown wm8990 = kzalloc(sizeof(struct wm8990_priv), GFP_KERNEL); 1575f10485e7SMark Brown if (wm8990 == NULL) { 1576f10485e7SMark Brown kfree(codec); 1577f10485e7SMark Brown return -ENOMEM; 1578f10485e7SMark Brown } 1579f10485e7SMark Brown 1580f10485e7SMark Brown codec->private_data = wm8990; 1581f10485e7SMark Brown socdev->codec = codec; 1582f10485e7SMark Brown mutex_init(&codec->mutex); 1583f10485e7SMark Brown INIT_LIST_HEAD(&codec->dapm_widgets); 1584f10485e7SMark Brown INIT_LIST_HEAD(&codec->dapm_paths); 1585f10485e7SMark Brown wm8990_socdev = socdev; 1586f10485e7SMark Brown 1587f10485e7SMark Brown #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 1588f10485e7SMark Brown if (setup->i2c_address) { 1589f10485e7SMark Brown normal_i2c[0] = setup->i2c_address; 1590f10485e7SMark Brown codec->hw_write = (hw_write_t)i2c_master_send; 1591f10485e7SMark Brown ret = i2c_add_driver(&wm8990_i2c_driver); 1592f10485e7SMark Brown if (ret != 0) 1593f10485e7SMark Brown printk(KERN_ERR "can't add i2c driver"); 1594f10485e7SMark Brown } 1595f10485e7SMark Brown #else 1596f10485e7SMark Brown /* Add other interfaces here */ 1597f10485e7SMark Brown #endif 1598f10485e7SMark Brown return ret; 1599f10485e7SMark Brown } 1600f10485e7SMark Brown 1601f10485e7SMark Brown /* power down chip */ 1602f10485e7SMark Brown static int wm8990_remove(struct platform_device *pdev) 1603f10485e7SMark Brown { 1604f10485e7SMark Brown struct snd_soc_device *socdev = platform_get_drvdata(pdev); 1605f10485e7SMark Brown struct snd_soc_codec *codec = socdev->codec; 1606f10485e7SMark Brown 1607f10485e7SMark Brown if (codec->control_data) 1608f10485e7SMark Brown wm8990_set_bias_level(codec, SND_SOC_BIAS_OFF); 1609f10485e7SMark Brown snd_soc_free_pcms(socdev); 1610f10485e7SMark Brown snd_soc_dapm_free(socdev); 1611f10485e7SMark Brown #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 1612f10485e7SMark Brown i2c_del_driver(&wm8990_i2c_driver); 1613f10485e7SMark Brown #endif 1614f10485e7SMark Brown kfree(codec->private_data); 1615f10485e7SMark Brown kfree(codec); 1616f10485e7SMark Brown 1617f10485e7SMark Brown return 0; 1618f10485e7SMark Brown } 1619f10485e7SMark Brown 1620f10485e7SMark Brown struct snd_soc_codec_device soc_codec_dev_wm8990 = { 1621f10485e7SMark Brown .probe = wm8990_probe, 1622f10485e7SMark Brown .remove = wm8990_remove, 1623f10485e7SMark Brown .suspend = wm8990_suspend, 1624f10485e7SMark Brown .resume = wm8990_resume, 1625f10485e7SMark Brown }; 1626f10485e7SMark Brown EXPORT_SYMBOL_GPL(soc_codec_dev_wm8990); 1627f10485e7SMark Brown 1628f10485e7SMark Brown MODULE_DESCRIPTION("ASoC WM8990 driver"); 1629f10485e7SMark Brown MODULE_AUTHOR("Liam Girdwood"); 1630f10485e7SMark Brown MODULE_LICENSE("GPL"); 1631