1f10485e7SMark Brown /* 2f10485e7SMark Brown * wm8990.c -- WM8990 ALSA Soc Audio driver 3f10485e7SMark Brown * 4f10485e7SMark Brown * Copyright 2008 Wolfson Microelectronics PLC. 564ca0404SLiam Girdwood * Author: Liam Girdwood <lrg@slimlogic.co.uk> 6f10485e7SMark Brown * 7f10485e7SMark Brown * This program is free software; you can redistribute it and/or modify it 8f10485e7SMark Brown * under the terms of the GNU General Public License as published by the 9f10485e7SMark Brown * Free Software Foundation; either version 2 of the License, or (at your 10f10485e7SMark Brown * option) any later version. 11f10485e7SMark Brown */ 12f10485e7SMark Brown 13f10485e7SMark Brown #include <linux/module.h> 14f10485e7SMark Brown #include <linux/moduleparam.h> 15f10485e7SMark Brown #include <linux/kernel.h> 16f10485e7SMark Brown #include <linux/init.h> 17f10485e7SMark Brown #include <linux/delay.h> 18f10485e7SMark Brown #include <linux/pm.h> 19f10485e7SMark Brown #include <linux/i2c.h> 200112b62bSMark Brown #include <linux/regmap.h> 215a0e3ad6STejun Heo #include <linux/slab.h> 22f10485e7SMark Brown #include <sound/core.h> 23f10485e7SMark Brown #include <sound/pcm.h> 24f10485e7SMark Brown #include <sound/pcm_params.h> 25f10485e7SMark Brown #include <sound/soc.h> 26f10485e7SMark Brown #include <sound/initval.h> 27f10485e7SMark Brown #include <sound/tlv.h> 28f10485e7SMark Brown #include <asm/div64.h> 29f10485e7SMark Brown 30f10485e7SMark Brown #include "wm8990.h" 31f10485e7SMark Brown 32f10485e7SMark Brown /* codec private data */ 33f10485e7SMark Brown struct wm8990_priv { 340112b62bSMark Brown struct regmap *regmap; 35f10485e7SMark Brown unsigned int sysclk; 36f10485e7SMark Brown unsigned int pcmclk; 37f10485e7SMark Brown }; 38f10485e7SMark Brown 390112b62bSMark Brown static bool wm8990_volatile_register(struct device *dev, unsigned int reg) 40416a0ce5SAxel Lin { 41416a0ce5SAxel Lin switch (reg) { 42416a0ce5SAxel Lin case WM8990_RESET: 43416a0ce5SAxel Lin return 1; 44416a0ce5SAxel Lin default: 45416a0ce5SAxel Lin return 0; 46416a0ce5SAxel Lin } 47416a0ce5SAxel Lin } 48416a0ce5SAxel Lin 490112b62bSMark Brown static const struct reg_default wm8990_reg_defaults[] = { 500112b62bSMark Brown { 1, 0x0000 }, /* R1 - Power Management (1) */ 510112b62bSMark Brown { 2, 0x6000 }, /* R2 - Power Management (2) */ 520112b62bSMark Brown { 3, 0x0000 }, /* R3 - Power Management (3) */ 530112b62bSMark Brown { 4, 0x4050 }, /* R4 - Audio Interface (1) */ 540112b62bSMark Brown { 5, 0x4000 }, /* R5 - Audio Interface (2) */ 550112b62bSMark Brown { 6, 0x01C8 }, /* R6 - Clocking (1) */ 560112b62bSMark Brown { 7, 0x0000 }, /* R7 - Clocking (2) */ 570112b62bSMark Brown { 8, 0x0040 }, /* R8 - Audio Interface (3) */ 580112b62bSMark Brown { 9, 0x0040 }, /* R9 - Audio Interface (4) */ 590112b62bSMark Brown { 10, 0x0004 }, /* R10 - DAC CTRL */ 600112b62bSMark Brown { 11, 0x00C0 }, /* R11 - Left DAC Digital Volume */ 610112b62bSMark Brown { 12, 0x00C0 }, /* R12 - Right DAC Digital Volume */ 620112b62bSMark Brown { 13, 0x0000 }, /* R13 - Digital Side Tone */ 630112b62bSMark Brown { 14, 0x0100 }, /* R14 - ADC CTRL */ 640112b62bSMark Brown { 15, 0x00C0 }, /* R15 - Left ADC Digital Volume */ 650112b62bSMark Brown { 16, 0x00C0 }, /* R16 - Right ADC Digital Volume */ 660112b62bSMark Brown 670112b62bSMark Brown { 18, 0x0000 }, /* R18 - GPIO CTRL 1 */ 680112b62bSMark Brown { 19, 0x1000 }, /* R19 - GPIO1 & GPIO2 */ 690112b62bSMark Brown { 20, 0x1010 }, /* R20 - GPIO3 & GPIO4 */ 700112b62bSMark Brown { 21, 0x1010 }, /* R21 - GPIO5 & GPIO6 */ 710112b62bSMark Brown { 22, 0x8000 }, /* R22 - GPIOCTRL 2 */ 720112b62bSMark Brown { 23, 0x0800 }, /* R23 - GPIO_POL */ 730112b62bSMark Brown { 24, 0x008B }, /* R24 - Left Line Input 1&2 Volume */ 740112b62bSMark Brown { 25, 0x008B }, /* R25 - Left Line Input 3&4 Volume */ 750112b62bSMark Brown { 26, 0x008B }, /* R26 - Right Line Input 1&2 Volume */ 760112b62bSMark Brown { 27, 0x008B }, /* R27 - Right Line Input 3&4 Volume */ 770112b62bSMark Brown { 28, 0x0000 }, /* R28 - Left Output Volume */ 780112b62bSMark Brown { 29, 0x0000 }, /* R29 - Right Output Volume */ 790112b62bSMark Brown { 30, 0x0066 }, /* R30 - Line Outputs Volume */ 800112b62bSMark Brown { 31, 0x0022 }, /* R31 - Out3/4 Volume */ 810112b62bSMark Brown { 32, 0x0079 }, /* R32 - Left OPGA Volume */ 820112b62bSMark Brown { 33, 0x0079 }, /* R33 - Right OPGA Volume */ 830112b62bSMark Brown { 34, 0x0003 }, /* R34 - Speaker Volume */ 840112b62bSMark Brown { 35, 0x0003 }, /* R35 - ClassD1 */ 850112b62bSMark Brown 860112b62bSMark Brown { 37, 0x0100 }, /* R37 - ClassD3 */ 870112b62bSMark Brown { 38, 0x0079 }, /* R38 - ClassD4 */ 880112b62bSMark Brown { 39, 0x0000 }, /* R39 - Input Mixer1 */ 890112b62bSMark Brown { 40, 0x0000 }, /* R40 - Input Mixer2 */ 900112b62bSMark Brown { 41, 0x0000 }, /* R41 - Input Mixer3 */ 910112b62bSMark Brown { 42, 0x0000 }, /* R42 - Input Mixer4 */ 920112b62bSMark Brown { 43, 0x0000 }, /* R43 - Input Mixer5 */ 930112b62bSMark Brown { 44, 0x0000 }, /* R44 - Input Mixer6 */ 940112b62bSMark Brown { 45, 0x0000 }, /* R45 - Output Mixer1 */ 950112b62bSMark Brown { 46, 0x0000 }, /* R46 - Output Mixer2 */ 960112b62bSMark Brown { 47, 0x0000 }, /* R47 - Output Mixer3 */ 970112b62bSMark Brown { 48, 0x0000 }, /* R48 - Output Mixer4 */ 980112b62bSMark Brown { 49, 0x0000 }, /* R49 - Output Mixer5 */ 990112b62bSMark Brown { 50, 0x0000 }, /* R50 - Output Mixer6 */ 1000112b62bSMark Brown { 51, 0x0180 }, /* R51 - Out3/4 Mixer */ 1010112b62bSMark Brown { 52, 0x0000 }, /* R52 - Line Mixer1 */ 1020112b62bSMark Brown { 53, 0x0000 }, /* R53 - Line Mixer2 */ 1030112b62bSMark Brown { 54, 0x0000 }, /* R54 - Speaker Mixer */ 1040112b62bSMark Brown { 55, 0x0000 }, /* R55 - Additional Control */ 1050112b62bSMark Brown { 56, 0x0000 }, /* R56 - AntiPOP1 */ 1060112b62bSMark Brown { 57, 0x0000 }, /* R57 - AntiPOP2 */ 1070112b62bSMark Brown { 58, 0x0000 }, /* R58 - MICBIAS */ 1080112b62bSMark Brown 1090112b62bSMark Brown { 60, 0x0008 }, /* R60 - PLL1 */ 1100112b62bSMark Brown { 61, 0x0031 }, /* R61 - PLL2 */ 1110112b62bSMark Brown { 62, 0x0026 }, /* R62 - PLL3 */ 112f10485e7SMark Brown }; 113f10485e7SMark Brown 1148d50e447SMark Brown #define wm8990_reset(c) snd_soc_write(c, WM8990_RESET, 0) 115f10485e7SMark Brown 116021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 600, 0); 117f10485e7SMark Brown 118021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(in_pga_tlv, -1650, 3000, 0); 119f10485e7SMark Brown 120021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(out_mix_tlv, 0, -2100, 0); 121f10485e7SMark Brown 122021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(out_pga_tlv, -7300, 600, 0); 123f10485e7SMark Brown 124021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(out_omix_tlv, -600, 0, 0); 125f10485e7SMark Brown 126021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(out_dac_tlv, -7163, 0, 0); 127f10485e7SMark Brown 128021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(in_adc_tlv, -7163, 1763, 0); 129f10485e7SMark Brown 130021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(out_sidetone_tlv, -3600, 0, 0); 131f10485e7SMark Brown 132f10485e7SMark Brown static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol, 133f10485e7SMark Brown struct snd_ctl_elem_value *ucontrol) 134f10485e7SMark Brown { 135f10485e7SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 136397d5aeeSJarkko Nikula struct soc_mixer_control *mc = 137397d5aeeSJarkko Nikula (struct soc_mixer_control *)kcontrol->private_value; 138397d5aeeSJarkko Nikula int reg = mc->reg; 139f10485e7SMark Brown int ret; 140f10485e7SMark Brown u16 val; 141f10485e7SMark Brown 142f10485e7SMark Brown ret = snd_soc_put_volsw(kcontrol, ucontrol); 143f10485e7SMark Brown if (ret < 0) 144f10485e7SMark Brown return ret; 145f10485e7SMark Brown 146f10485e7SMark Brown /* now hit the volume update bits (always bit 8) */ 1478d50e447SMark Brown val = snd_soc_read(codec, reg); 1488d50e447SMark Brown return snd_soc_write(codec, reg, val | 0x0100); 149f10485e7SMark Brown } 150f10485e7SMark Brown 151f10485e7SMark Brown #define SOC_WM899X_OUTPGA_SINGLE_R_TLV(xname, reg, shift, max, invert,\ 152fc99adc3SLars-Peter Clausen tlv_array) \ 153fc99adc3SLars-Peter Clausen SOC_SINGLE_EXT_TLV(xname, reg, shift, max, invert, \ 154fc99adc3SLars-Peter Clausen snd_soc_get_volsw, wm899x_outpga_put_volsw_vu, tlv_array) 155f10485e7SMark Brown 156f10485e7SMark Brown 157f10485e7SMark Brown static const char *wm8990_digital_sidetone[] = 158f10485e7SMark Brown {"None", "Left ADC", "Right ADC", "Reserved"}; 159f10485e7SMark Brown 160*830b5011STakashi Iwai static SOC_ENUM_SINGLE_DECL(wm8990_left_digital_sidetone_enum, 161*830b5011STakashi Iwai WM8990_DIGITAL_SIDE_TONE, 162f10485e7SMark Brown WM8990_ADC_TO_DACL_SHIFT, 163f10485e7SMark Brown wm8990_digital_sidetone); 164f10485e7SMark Brown 165*830b5011STakashi Iwai static SOC_ENUM_SINGLE_DECL(wm8990_right_digital_sidetone_enum, 166*830b5011STakashi Iwai WM8990_DIGITAL_SIDE_TONE, 167f10485e7SMark Brown WM8990_ADC_TO_DACR_SHIFT, 168f10485e7SMark Brown wm8990_digital_sidetone); 169f10485e7SMark Brown 170f10485e7SMark Brown static const char *wm8990_adcmode[] = 171f10485e7SMark Brown {"Hi-fi mode", "Voice mode 1", "Voice mode 2", "Voice mode 3"}; 172f10485e7SMark Brown 173*830b5011STakashi Iwai static SOC_ENUM_SINGLE_DECL(wm8990_right_adcmode_enum, 174*830b5011STakashi Iwai WM8990_ADC_CTRL, 175f10485e7SMark Brown WM8990_ADC_HPF_CUT_SHIFT, 176f10485e7SMark Brown wm8990_adcmode); 177f10485e7SMark Brown 178f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_snd_controls[] = { 179f10485e7SMark Brown /* INMIXL */ 180f10485e7SMark Brown SOC_SINGLE("LIN12 PGA Boost", WM8990_INPUT_MIXER3, WM8990_L12MNBST_BIT, 1, 0), 181f10485e7SMark Brown SOC_SINGLE("LIN34 PGA Boost", WM8990_INPUT_MIXER3, WM8990_L34MNBST_BIT, 1, 0), 182f10485e7SMark Brown /* INMIXR */ 183f10485e7SMark Brown SOC_SINGLE("RIN12 PGA Boost", WM8990_INPUT_MIXER3, WM8990_R12MNBST_BIT, 1, 0), 184f10485e7SMark Brown SOC_SINGLE("RIN34 PGA Boost", WM8990_INPUT_MIXER3, WM8990_R34MNBST_BIT, 1, 0), 185f10485e7SMark Brown 186f10485e7SMark Brown /* LOMIX */ 187f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER3, 188f10485e7SMark Brown WM8990_LLI3LOVOL_SHIFT, WM8990_LLI3LOVOL_MASK, 1, out_mix_tlv), 189f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3, 190f10485e7SMark Brown WM8990_LR12LOVOL_SHIFT, WM8990_LR12LOVOL_MASK, 1, out_mix_tlv), 191f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3, 192f10485e7SMark Brown WM8990_LL12LOVOL_SHIFT, WM8990_LL12LOVOL_MASK, 1, out_mix_tlv), 193f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER5, 194f10485e7SMark Brown WM8990_LRI3LOVOL_SHIFT, WM8990_LRI3LOVOL_MASK, 1, out_mix_tlv), 195f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8990_OUTPUT_MIXER5, 196f10485e7SMark Brown WM8990_LRBLOVOL_SHIFT, WM8990_LRBLOVOL_MASK, 1, out_mix_tlv), 197f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8990_OUTPUT_MIXER5, 198f10485e7SMark Brown WM8990_LRBLOVOL_SHIFT, WM8990_LRBLOVOL_MASK, 1, out_mix_tlv), 199f10485e7SMark Brown 200f10485e7SMark Brown /* ROMIX */ 201f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER4, 202f10485e7SMark Brown WM8990_RRI3ROVOL_SHIFT, WM8990_RRI3ROVOL_MASK, 1, out_mix_tlv), 203f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4, 204f10485e7SMark Brown WM8990_RL12ROVOL_SHIFT, WM8990_RL12ROVOL_MASK, 1, out_mix_tlv), 205f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4, 206f10485e7SMark Brown WM8990_RR12ROVOL_SHIFT, WM8990_RR12ROVOL_MASK, 1, out_mix_tlv), 207f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER6, 208f10485e7SMark Brown WM8990_RLI3ROVOL_SHIFT, WM8990_RLI3ROVOL_MASK, 1, out_mix_tlv), 209f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX AINLMUX Bypass Volume", WM8990_OUTPUT_MIXER6, 210f10485e7SMark Brown WM8990_RLBROVOL_SHIFT, WM8990_RLBROVOL_MASK, 1, out_mix_tlv), 211f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX AINRMUX Bypass Volume", WM8990_OUTPUT_MIXER6, 212f10485e7SMark Brown WM8990_RRBROVOL_SHIFT, WM8990_RRBROVOL_MASK, 1, out_mix_tlv), 213f10485e7SMark Brown 214f10485e7SMark Brown /* LOUT */ 215f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOUT Volume", WM8990_LEFT_OUTPUT_VOLUME, 216f10485e7SMark Brown WM8990_LOUTVOL_SHIFT, WM8990_LOUTVOL_MASK, 0, out_pga_tlv), 217f10485e7SMark Brown SOC_SINGLE("LOUT ZC", WM8990_LEFT_OUTPUT_VOLUME, WM8990_LOZC_BIT, 1, 0), 218f10485e7SMark Brown 219f10485e7SMark Brown /* ROUT */ 220f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROUT Volume", WM8990_RIGHT_OUTPUT_VOLUME, 221f10485e7SMark Brown WM8990_ROUTVOL_SHIFT, WM8990_ROUTVOL_MASK, 0, out_pga_tlv), 222f10485e7SMark Brown SOC_SINGLE("ROUT ZC", WM8990_RIGHT_OUTPUT_VOLUME, WM8990_ROZC_BIT, 1, 0), 223f10485e7SMark Brown 224f10485e7SMark Brown /* LOPGA */ 225f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOPGA Volume", WM8990_LEFT_OPGA_VOLUME, 226f10485e7SMark Brown WM8990_LOPGAVOL_SHIFT, WM8990_LOPGAVOL_MASK, 0, out_pga_tlv), 227f10485e7SMark Brown SOC_SINGLE("LOPGA ZC Switch", WM8990_LEFT_OPGA_VOLUME, 228f10485e7SMark Brown WM8990_LOPGAZC_BIT, 1, 0), 229f10485e7SMark Brown 230f10485e7SMark Brown /* ROPGA */ 231f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROPGA Volume", WM8990_RIGHT_OPGA_VOLUME, 232f10485e7SMark Brown WM8990_ROPGAVOL_SHIFT, WM8990_ROPGAVOL_MASK, 0, out_pga_tlv), 233f10485e7SMark Brown SOC_SINGLE("ROPGA ZC Switch", WM8990_RIGHT_OPGA_VOLUME, 234f10485e7SMark Brown WM8990_ROPGAZC_BIT, 1, 0), 235f10485e7SMark Brown 236f10485e7SMark Brown SOC_SINGLE("LON Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, 237f10485e7SMark Brown WM8990_LONMUTE_BIT, 1, 0), 238f10485e7SMark Brown SOC_SINGLE("LOP Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, 239f10485e7SMark Brown WM8990_LOPMUTE_BIT, 1, 0), 240f10485e7SMark Brown SOC_SINGLE("LOP Attenuation Switch", WM8990_LINE_OUTPUTS_VOLUME, 241f10485e7SMark Brown WM8990_LOATTN_BIT, 1, 0), 242f10485e7SMark Brown SOC_SINGLE("RON Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, 243f10485e7SMark Brown WM8990_RONMUTE_BIT, 1, 0), 244f10485e7SMark Brown SOC_SINGLE("ROP Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, 245f10485e7SMark Brown WM8990_ROPMUTE_BIT, 1, 0), 246f10485e7SMark Brown SOC_SINGLE("ROP Attenuation Switch", WM8990_LINE_OUTPUTS_VOLUME, 247f10485e7SMark Brown WM8990_ROATTN_BIT, 1, 0), 248f10485e7SMark Brown 249f10485e7SMark Brown SOC_SINGLE("OUT3 Mute Switch", WM8990_OUT3_4_VOLUME, 250f10485e7SMark Brown WM8990_OUT3MUTE_BIT, 1, 0), 251f10485e7SMark Brown SOC_SINGLE("OUT3 Attenuation Switch", WM8990_OUT3_4_VOLUME, 252f10485e7SMark Brown WM8990_OUT3ATTN_BIT, 1, 0), 253f10485e7SMark Brown 254f10485e7SMark Brown SOC_SINGLE("OUT4 Mute Switch", WM8990_OUT3_4_VOLUME, 255f10485e7SMark Brown WM8990_OUT4MUTE_BIT, 1, 0), 256f10485e7SMark Brown SOC_SINGLE("OUT4 Attenuation Switch", WM8990_OUT3_4_VOLUME, 257f10485e7SMark Brown WM8990_OUT4ATTN_BIT, 1, 0), 258f10485e7SMark Brown 259f10485e7SMark Brown SOC_SINGLE("Speaker Mode Switch", WM8990_CLASSD1, 260f10485e7SMark Brown WM8990_CDMODE_BIT, 1, 0), 261f10485e7SMark Brown 262f10485e7SMark Brown SOC_SINGLE("Speaker Output Attenuation Volume", WM8990_SPEAKER_VOLUME, 26397bb8129SMark Brown WM8990_SPKATTN_SHIFT, WM8990_SPKATTN_MASK, 0), 264f10485e7SMark Brown SOC_SINGLE("Speaker DC Boost Volume", WM8990_CLASSD3, 265f10485e7SMark Brown WM8990_DCGAIN_SHIFT, WM8990_DCGAIN_MASK, 0), 266f10485e7SMark Brown SOC_SINGLE("Speaker AC Boost Volume", WM8990_CLASSD3, 267f10485e7SMark Brown WM8990_ACGAIN_SHIFT, WM8990_ACGAIN_MASK, 0), 26897bb8129SMark Brown SOC_SINGLE_TLV("Speaker Volume", WM8990_CLASSD4, 26997bb8129SMark Brown WM8990_SPKVOL_SHIFT, WM8990_SPKVOL_MASK, 0, out_pga_tlv), 27097bb8129SMark Brown SOC_SINGLE("Speaker ZC Switch", WM8990_CLASSD4, 27197bb8129SMark Brown WM8990_SPKZC_SHIFT, WM8990_SPKZC_MASK, 0), 272f10485e7SMark Brown 273f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left DAC Digital Volume", 274f10485e7SMark Brown WM8990_LEFT_DAC_DIGITAL_VOLUME, 275f10485e7SMark Brown WM8990_DACL_VOL_SHIFT, 276f10485e7SMark Brown WM8990_DACL_VOL_MASK, 277f10485e7SMark Brown 0, 278f10485e7SMark Brown out_dac_tlv), 279f10485e7SMark Brown 280f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right DAC Digital Volume", 281f10485e7SMark Brown WM8990_RIGHT_DAC_DIGITAL_VOLUME, 282f10485e7SMark Brown WM8990_DACR_VOL_SHIFT, 283f10485e7SMark Brown WM8990_DACR_VOL_MASK, 284f10485e7SMark Brown 0, 285f10485e7SMark Brown out_dac_tlv), 286f10485e7SMark Brown 287f10485e7SMark Brown SOC_ENUM("Left Digital Sidetone", wm8990_left_digital_sidetone_enum), 288f10485e7SMark Brown SOC_ENUM("Right Digital Sidetone", wm8990_right_digital_sidetone_enum), 289f10485e7SMark Brown 290f10485e7SMark Brown SOC_SINGLE_TLV("Left Digital Sidetone Volume", WM8990_DIGITAL_SIDE_TONE, 291f10485e7SMark Brown WM8990_ADCL_DAC_SVOL_SHIFT, WM8990_ADCL_DAC_SVOL_MASK, 0, 292f10485e7SMark Brown out_sidetone_tlv), 293f10485e7SMark Brown SOC_SINGLE_TLV("Right Digital Sidetone Volume", WM8990_DIGITAL_SIDE_TONE, 294f10485e7SMark Brown WM8990_ADCR_DAC_SVOL_SHIFT, WM8990_ADCR_DAC_SVOL_MASK, 0, 295f10485e7SMark Brown out_sidetone_tlv), 296f10485e7SMark Brown 297f10485e7SMark Brown SOC_SINGLE("ADC Digital High Pass Filter Switch", WM8990_ADC_CTRL, 298f10485e7SMark Brown WM8990_ADC_HPF_ENA_BIT, 1, 0), 299f10485e7SMark Brown 300f10485e7SMark Brown SOC_ENUM("ADC HPF Mode", wm8990_right_adcmode_enum), 301f10485e7SMark Brown 302f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left ADC Digital Volume", 303f10485e7SMark Brown WM8990_LEFT_ADC_DIGITAL_VOLUME, 304f10485e7SMark Brown WM8990_ADCL_VOL_SHIFT, 305f10485e7SMark Brown WM8990_ADCL_VOL_MASK, 306f10485e7SMark Brown 0, 307f10485e7SMark Brown in_adc_tlv), 308f10485e7SMark Brown 309f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right ADC Digital Volume", 310f10485e7SMark Brown WM8990_RIGHT_ADC_DIGITAL_VOLUME, 311f10485e7SMark Brown WM8990_ADCR_VOL_SHIFT, 312f10485e7SMark Brown WM8990_ADCR_VOL_MASK, 313f10485e7SMark Brown 0, 314f10485e7SMark Brown in_adc_tlv), 315f10485e7SMark Brown 316f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN12 Volume", 317f10485e7SMark Brown WM8990_LEFT_LINE_INPUT_1_2_VOLUME, 318f10485e7SMark Brown WM8990_LIN12VOL_SHIFT, 319f10485e7SMark Brown WM8990_LIN12VOL_MASK, 320f10485e7SMark Brown 0, 321f10485e7SMark Brown in_pga_tlv), 322f10485e7SMark Brown 323f10485e7SMark Brown SOC_SINGLE("LIN12 ZC Switch", WM8990_LEFT_LINE_INPUT_1_2_VOLUME, 324f10485e7SMark Brown WM8990_LI12ZC_BIT, 1, 0), 325f10485e7SMark Brown 326f10485e7SMark Brown SOC_SINGLE("LIN12 Mute Switch", WM8990_LEFT_LINE_INPUT_1_2_VOLUME, 327f10485e7SMark Brown WM8990_LI12MUTE_BIT, 1, 0), 328f10485e7SMark Brown 329f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN34 Volume", 330f10485e7SMark Brown WM8990_LEFT_LINE_INPUT_3_4_VOLUME, 331f10485e7SMark Brown WM8990_LIN34VOL_SHIFT, 332f10485e7SMark Brown WM8990_LIN34VOL_MASK, 333f10485e7SMark Brown 0, 334f10485e7SMark Brown in_pga_tlv), 335f10485e7SMark Brown 336f10485e7SMark Brown SOC_SINGLE("LIN34 ZC Switch", WM8990_LEFT_LINE_INPUT_3_4_VOLUME, 337f10485e7SMark Brown WM8990_LI34ZC_BIT, 1, 0), 338f10485e7SMark Brown 339f10485e7SMark Brown SOC_SINGLE("LIN34 Mute Switch", WM8990_LEFT_LINE_INPUT_3_4_VOLUME, 340f10485e7SMark Brown WM8990_LI34MUTE_BIT, 1, 0), 341f10485e7SMark Brown 342f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN12 Volume", 343f10485e7SMark Brown WM8990_RIGHT_LINE_INPUT_1_2_VOLUME, 344f10485e7SMark Brown WM8990_RIN12VOL_SHIFT, 345f10485e7SMark Brown WM8990_RIN12VOL_MASK, 346f10485e7SMark Brown 0, 347f10485e7SMark Brown in_pga_tlv), 348f10485e7SMark Brown 349f10485e7SMark Brown SOC_SINGLE("RIN12 ZC Switch", WM8990_RIGHT_LINE_INPUT_1_2_VOLUME, 350f10485e7SMark Brown WM8990_RI12ZC_BIT, 1, 0), 351f10485e7SMark Brown 352f10485e7SMark Brown SOC_SINGLE("RIN12 Mute Switch", WM8990_RIGHT_LINE_INPUT_1_2_VOLUME, 353f10485e7SMark Brown WM8990_RI12MUTE_BIT, 1, 0), 354f10485e7SMark Brown 355f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN34 Volume", 356f10485e7SMark Brown WM8990_RIGHT_LINE_INPUT_3_4_VOLUME, 357f10485e7SMark Brown WM8990_RIN34VOL_SHIFT, 358f10485e7SMark Brown WM8990_RIN34VOL_MASK, 359f10485e7SMark Brown 0, 360f10485e7SMark Brown in_pga_tlv), 361f10485e7SMark Brown 362f10485e7SMark Brown SOC_SINGLE("RIN34 ZC Switch", WM8990_RIGHT_LINE_INPUT_3_4_VOLUME, 363f10485e7SMark Brown WM8990_RI34ZC_BIT, 1, 0), 364f10485e7SMark Brown 365f10485e7SMark Brown SOC_SINGLE("RIN34 Mute Switch", WM8990_RIGHT_LINE_INPUT_3_4_VOLUME, 366f10485e7SMark Brown WM8990_RI34MUTE_BIT, 1, 0), 367f10485e7SMark Brown 368f10485e7SMark Brown }; 369f10485e7SMark Brown 370f10485e7SMark Brown /* 371f10485e7SMark Brown * _DAPM_ Controls 372f10485e7SMark Brown */ 373f10485e7SMark Brown 374f10485e7SMark Brown static int outmixer_event(struct snd_soc_dapm_widget *w, 375f10485e7SMark Brown struct snd_kcontrol *kcontrol, int event) 376f10485e7SMark Brown { 377f10485e7SMark Brown u32 reg_shift = kcontrol->private_value & 0xfff; 378f10485e7SMark Brown int ret = 0; 379f10485e7SMark Brown u16 reg; 380f10485e7SMark Brown 381f10485e7SMark Brown switch (reg_shift) { 382f10485e7SMark Brown case WM8990_SPEAKER_MIXER | (WM8990_LDSPK_BIT << 8) : 3838d50e447SMark Brown reg = snd_soc_read(w->codec, WM8990_OUTPUT_MIXER1); 384f10485e7SMark Brown if (reg & WM8990_LDLO) { 385f10485e7SMark Brown printk(KERN_WARNING 386f10485e7SMark Brown "Cannot set as Output Mixer 1 LDLO Set\n"); 387f10485e7SMark Brown ret = -1; 388f10485e7SMark Brown } 389f10485e7SMark Brown break; 390f10485e7SMark Brown case WM8990_SPEAKER_MIXER | (WM8990_RDSPK_BIT << 8): 3918d50e447SMark Brown reg = snd_soc_read(w->codec, WM8990_OUTPUT_MIXER2); 392f10485e7SMark Brown if (reg & WM8990_RDRO) { 393f10485e7SMark Brown printk(KERN_WARNING 394f10485e7SMark Brown "Cannot set as Output Mixer 2 RDRO Set\n"); 395f10485e7SMark Brown ret = -1; 396f10485e7SMark Brown } 397f10485e7SMark Brown break; 398f10485e7SMark Brown case WM8990_OUTPUT_MIXER1 | (WM8990_LDLO_BIT << 8): 3998d50e447SMark Brown reg = snd_soc_read(w->codec, WM8990_SPEAKER_MIXER); 400f10485e7SMark Brown if (reg & WM8990_LDSPK) { 401f10485e7SMark Brown printk(KERN_WARNING 402f10485e7SMark Brown "Cannot set as Speaker Mixer LDSPK Set\n"); 403f10485e7SMark Brown ret = -1; 404f10485e7SMark Brown } 405f10485e7SMark Brown break; 406f10485e7SMark Brown case WM8990_OUTPUT_MIXER2 | (WM8990_RDRO_BIT << 8): 4078d50e447SMark Brown reg = snd_soc_read(w->codec, WM8990_SPEAKER_MIXER); 408f10485e7SMark Brown if (reg & WM8990_RDSPK) { 409f10485e7SMark Brown printk(KERN_WARNING 410f10485e7SMark Brown "Cannot set as Speaker Mixer RDSPK Set\n"); 411f10485e7SMark Brown ret = -1; 412f10485e7SMark Brown } 413f10485e7SMark Brown break; 414f10485e7SMark Brown } 415f10485e7SMark Brown 416f10485e7SMark Brown return ret; 417f10485e7SMark Brown } 418f10485e7SMark Brown 419f10485e7SMark Brown /* INMIX dB values */ 420f10485e7SMark Brown static const unsigned int in_mix_tlv[] = { 421f10485e7SMark Brown TLV_DB_RANGE_HEAD(1), 422021f80ccSMark Brown 0, 7, TLV_DB_SCALE_ITEM(-1200, 600, 0), 423f10485e7SMark Brown }; 424f10485e7SMark Brown 425f10485e7SMark Brown /* Left In PGA Connections */ 426f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lin12_pga_controls[] = { 427f10485e7SMark Brown SOC_DAPM_SINGLE("LIN1 Switch", WM8990_INPUT_MIXER2, WM8990_LMN1_BIT, 1, 0), 428f10485e7SMark Brown SOC_DAPM_SINGLE("LIN2 Switch", WM8990_INPUT_MIXER2, WM8990_LMP2_BIT, 1, 0), 429f10485e7SMark Brown }; 430f10485e7SMark Brown 431f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lin34_pga_controls[] = { 432f10485e7SMark Brown SOC_DAPM_SINGLE("LIN3 Switch", WM8990_INPUT_MIXER2, WM8990_LMN3_BIT, 1, 0), 433f10485e7SMark Brown SOC_DAPM_SINGLE("LIN4 Switch", WM8990_INPUT_MIXER2, WM8990_LMP4_BIT, 1, 0), 434f10485e7SMark Brown }; 435f10485e7SMark Brown 436f10485e7SMark Brown /* Right In PGA Connections */ 437f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_rin12_pga_controls[] = { 438f10485e7SMark Brown SOC_DAPM_SINGLE("RIN1 Switch", WM8990_INPUT_MIXER2, WM8990_RMN1_BIT, 1, 0), 439f10485e7SMark Brown SOC_DAPM_SINGLE("RIN2 Switch", WM8990_INPUT_MIXER2, WM8990_RMP2_BIT, 1, 0), 440f10485e7SMark Brown }; 441f10485e7SMark Brown 442f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_rin34_pga_controls[] = { 443f10485e7SMark Brown SOC_DAPM_SINGLE("RIN3 Switch", WM8990_INPUT_MIXER2, WM8990_RMN3_BIT, 1, 0), 444f10485e7SMark Brown SOC_DAPM_SINGLE("RIN4 Switch", WM8990_INPUT_MIXER2, WM8990_RMP4_BIT, 1, 0), 445f10485e7SMark Brown }; 446f10485e7SMark Brown 447f10485e7SMark Brown /* INMIXL */ 448f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_inmixl_controls[] = { 449f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("Record Left Volume", WM8990_INPUT_MIXER3, 450f10485e7SMark Brown WM8990_LDBVOL_SHIFT, WM8990_LDBVOL_MASK, 0, in_mix_tlv), 451f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("LIN2 Volume", WM8990_INPUT_MIXER5, WM8990_LI2BVOL_SHIFT, 452f10485e7SMark Brown 7, 0, in_mix_tlv), 453f10485e7SMark Brown SOC_DAPM_SINGLE("LINPGA12 Switch", WM8990_INPUT_MIXER3, WM8990_L12MNB_BIT, 454f10485e7SMark Brown 1, 0), 455f10485e7SMark Brown SOC_DAPM_SINGLE("LINPGA34 Switch", WM8990_INPUT_MIXER3, WM8990_L34MNB_BIT, 456f10485e7SMark Brown 1, 0), 457f10485e7SMark Brown }; 458f10485e7SMark Brown 459f10485e7SMark Brown /* INMIXR */ 460f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_inmixr_controls[] = { 461f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("Record Right Volume", WM8990_INPUT_MIXER4, 462f10485e7SMark Brown WM8990_RDBVOL_SHIFT, WM8990_RDBVOL_MASK, 0, in_mix_tlv), 463f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("RIN2 Volume", WM8990_INPUT_MIXER6, WM8990_RI2BVOL_SHIFT, 464f10485e7SMark Brown 7, 0, in_mix_tlv), 465f10485e7SMark Brown SOC_DAPM_SINGLE("RINPGA12 Switch", WM8990_INPUT_MIXER3, WM8990_L12MNB_BIT, 466f10485e7SMark Brown 1, 0), 467f10485e7SMark Brown SOC_DAPM_SINGLE("RINPGA34 Switch", WM8990_INPUT_MIXER3, WM8990_L34MNB_BIT, 468f10485e7SMark Brown 1, 0), 469f10485e7SMark Brown }; 470f10485e7SMark Brown 471f10485e7SMark Brown /* AINLMUX */ 472f10485e7SMark Brown static const char *wm8990_ainlmux[] = 473f10485e7SMark Brown {"INMIXL Mix", "RXVOICE Mix", "DIFFINL Mix"}; 474f10485e7SMark Brown 475*830b5011STakashi Iwai static SOC_ENUM_SINGLE_DECL(wm8990_ainlmux_enum, 476*830b5011STakashi Iwai WM8990_INPUT_MIXER1, WM8990_AINLMODE_SHIFT, 477*830b5011STakashi Iwai wm8990_ainlmux); 478f10485e7SMark Brown 479f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_ainlmux_controls = 480f10485e7SMark Brown SOC_DAPM_ENUM("Route", wm8990_ainlmux_enum); 481f10485e7SMark Brown 482f10485e7SMark Brown /* DIFFINL */ 483f10485e7SMark Brown 484f10485e7SMark Brown /* AINRMUX */ 485f10485e7SMark Brown static const char *wm8990_ainrmux[] = 486f10485e7SMark Brown {"INMIXR Mix", "RXVOICE Mix", "DIFFINR Mix"}; 487f10485e7SMark Brown 488*830b5011STakashi Iwai static SOC_ENUM_SINGLE_DECL(wm8990_ainrmux_enum, 489*830b5011STakashi Iwai WM8990_INPUT_MIXER1, WM8990_AINRMODE_SHIFT, 490*830b5011STakashi Iwai wm8990_ainrmux); 491f10485e7SMark Brown 492f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_ainrmux_controls = 493f10485e7SMark Brown SOC_DAPM_ENUM("Route", wm8990_ainrmux_enum); 494f10485e7SMark Brown 495f10485e7SMark Brown /* RXVOICE */ 496f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_rxvoice_controls[] = { 497f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("LIN4/RXN", WM8990_INPUT_MIXER5, WM8990_LR4BVOL_SHIFT, 498f10485e7SMark Brown WM8990_LR4BVOL_MASK, 0, in_mix_tlv), 499f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("RIN4/RXP", WM8990_INPUT_MIXER6, WM8990_RL4BVOL_SHIFT, 500f10485e7SMark Brown WM8990_RL4BVOL_MASK, 0, in_mix_tlv), 501f10485e7SMark Brown }; 502f10485e7SMark Brown 503f10485e7SMark Brown /* LOMIX */ 504f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lomix_controls[] = { 505f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX Right ADC Bypass Switch", WM8990_OUTPUT_MIXER1, 506f10485e7SMark Brown WM8990_LRBLO_BIT, 1, 0), 507f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX Left ADC Bypass Switch", WM8990_OUTPUT_MIXER1, 508f10485e7SMark Brown WM8990_LLBLO_BIT, 1, 0), 509f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX RIN3 Bypass Switch", WM8990_OUTPUT_MIXER1, 510f10485e7SMark Brown WM8990_LRI3LO_BIT, 1, 0), 511f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX LIN3 Bypass Switch", WM8990_OUTPUT_MIXER1, 512f10485e7SMark Brown WM8990_LLI3LO_BIT, 1, 0), 513f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX RIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER1, 514f10485e7SMark Brown WM8990_LR12LO_BIT, 1, 0), 515f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX LIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER1, 516f10485e7SMark Brown WM8990_LL12LO_BIT, 1, 0), 517f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX Left DAC Switch", WM8990_OUTPUT_MIXER1, 518f10485e7SMark Brown WM8990_LDLO_BIT, 1, 0), 519f10485e7SMark Brown }; 520f10485e7SMark Brown 521f10485e7SMark Brown /* ROMIX */ 522f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_romix_controls[] = { 523f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX Left ADC Bypass Switch", WM8990_OUTPUT_MIXER2, 524f10485e7SMark Brown WM8990_RLBRO_BIT, 1, 0), 525f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX Right ADC Bypass Switch", WM8990_OUTPUT_MIXER2, 526f10485e7SMark Brown WM8990_RRBRO_BIT, 1, 0), 527f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX LIN3 Bypass Switch", WM8990_OUTPUT_MIXER2, 528f10485e7SMark Brown WM8990_RLI3RO_BIT, 1, 0), 529f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX RIN3 Bypass Switch", WM8990_OUTPUT_MIXER2, 530f10485e7SMark Brown WM8990_RRI3RO_BIT, 1, 0), 531f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX LIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER2, 532f10485e7SMark Brown WM8990_RL12RO_BIT, 1, 0), 533f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX RIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER2, 534f10485e7SMark Brown WM8990_RR12RO_BIT, 1, 0), 535f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX Right DAC Switch", WM8990_OUTPUT_MIXER2, 536f10485e7SMark Brown WM8990_RDRO_BIT, 1, 0), 537f10485e7SMark Brown }; 538f10485e7SMark Brown 539f10485e7SMark Brown /* LONMIX */ 540f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lonmix_controls[] = { 541f10485e7SMark Brown SOC_DAPM_SINGLE("LONMIX Left Mixer PGA Switch", WM8990_LINE_MIXER1, 542f10485e7SMark Brown WM8990_LLOPGALON_BIT, 1, 0), 543f10485e7SMark Brown SOC_DAPM_SINGLE("LONMIX Right Mixer PGA Switch", WM8990_LINE_MIXER1, 544f10485e7SMark Brown WM8990_LROPGALON_BIT, 1, 0), 545f10485e7SMark Brown SOC_DAPM_SINGLE("LONMIX Inverted LOP Switch", WM8990_LINE_MIXER1, 546f10485e7SMark Brown WM8990_LOPLON_BIT, 1, 0), 547f10485e7SMark Brown }; 548f10485e7SMark Brown 549f10485e7SMark Brown /* LOPMIX */ 550f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lopmix_controls[] = { 551f10485e7SMark Brown SOC_DAPM_SINGLE("LOPMIX Right Mic Bypass Switch", WM8990_LINE_MIXER1, 552f10485e7SMark Brown WM8990_LR12LOP_BIT, 1, 0), 553f10485e7SMark Brown SOC_DAPM_SINGLE("LOPMIX Left Mic Bypass Switch", WM8990_LINE_MIXER1, 554f10485e7SMark Brown WM8990_LL12LOP_BIT, 1, 0), 555f10485e7SMark Brown SOC_DAPM_SINGLE("LOPMIX Left Mixer PGA Switch", WM8990_LINE_MIXER1, 556f10485e7SMark Brown WM8990_LLOPGALOP_BIT, 1, 0), 557f10485e7SMark Brown }; 558f10485e7SMark Brown 559f10485e7SMark Brown /* RONMIX */ 560f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_ronmix_controls[] = { 561f10485e7SMark Brown SOC_DAPM_SINGLE("RONMIX Right Mixer PGA Switch", WM8990_LINE_MIXER2, 562f10485e7SMark Brown WM8990_RROPGARON_BIT, 1, 0), 563f10485e7SMark Brown SOC_DAPM_SINGLE("RONMIX Left Mixer PGA Switch", WM8990_LINE_MIXER2, 564f10485e7SMark Brown WM8990_RLOPGARON_BIT, 1, 0), 565f10485e7SMark Brown SOC_DAPM_SINGLE("RONMIX Inverted ROP Switch", WM8990_LINE_MIXER2, 566f10485e7SMark Brown WM8990_ROPRON_BIT, 1, 0), 567f10485e7SMark Brown }; 568f10485e7SMark Brown 569f10485e7SMark Brown /* ROPMIX */ 570f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_ropmix_controls[] = { 571f10485e7SMark Brown SOC_DAPM_SINGLE("ROPMIX Left Mic Bypass Switch", WM8990_LINE_MIXER2, 572f10485e7SMark Brown WM8990_RL12ROP_BIT, 1, 0), 573f10485e7SMark Brown SOC_DAPM_SINGLE("ROPMIX Right Mic Bypass Switch", WM8990_LINE_MIXER2, 574f10485e7SMark Brown WM8990_RR12ROP_BIT, 1, 0), 575f10485e7SMark Brown SOC_DAPM_SINGLE("ROPMIX Right Mixer PGA Switch", WM8990_LINE_MIXER2, 576f10485e7SMark Brown WM8990_RROPGAROP_BIT, 1, 0), 577f10485e7SMark Brown }; 578f10485e7SMark Brown 579f10485e7SMark Brown /* OUT3MIX */ 580f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_out3mix_controls[] = { 581f10485e7SMark Brown SOC_DAPM_SINGLE("OUT3MIX LIN4/RXP Bypass Switch", WM8990_OUT3_4_MIXER, 582f10485e7SMark Brown WM8990_LI4O3_BIT, 1, 0), 583f10485e7SMark Brown SOC_DAPM_SINGLE("OUT3MIX Left Out PGA Switch", WM8990_OUT3_4_MIXER, 584f10485e7SMark Brown WM8990_LPGAO3_BIT, 1, 0), 585f10485e7SMark Brown }; 586f10485e7SMark Brown 587f10485e7SMark Brown /* OUT4MIX */ 588f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_out4mix_controls[] = { 589f10485e7SMark Brown SOC_DAPM_SINGLE("OUT4MIX Right Out PGA Switch", WM8990_OUT3_4_MIXER, 590f10485e7SMark Brown WM8990_RPGAO4_BIT, 1, 0), 591f10485e7SMark Brown SOC_DAPM_SINGLE("OUT4MIX RIN4/RXP Bypass Switch", WM8990_OUT3_4_MIXER, 592f10485e7SMark Brown WM8990_RI4O4_BIT, 1, 0), 593f10485e7SMark Brown }; 594f10485e7SMark Brown 595f10485e7SMark Brown /* SPKMIX */ 596f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_spkmix_controls[] = { 597f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX LIN2 Bypass Switch", WM8990_SPEAKER_MIXER, 598f10485e7SMark Brown WM8990_LI2SPK_BIT, 1, 0), 599f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX LADC Bypass Switch", WM8990_SPEAKER_MIXER, 600f10485e7SMark Brown WM8990_LB2SPK_BIT, 1, 0), 601f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX Left Mixer PGA Switch", WM8990_SPEAKER_MIXER, 602f10485e7SMark Brown WM8990_LOPGASPK_BIT, 1, 0), 603f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX Left DAC Switch", WM8990_SPEAKER_MIXER, 604f10485e7SMark Brown WM8990_LDSPK_BIT, 1, 0), 605f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX Right DAC Switch", WM8990_SPEAKER_MIXER, 606f10485e7SMark Brown WM8990_RDSPK_BIT, 1, 0), 607f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX Right Mixer PGA Switch", WM8990_SPEAKER_MIXER, 608f10485e7SMark Brown WM8990_ROPGASPK_BIT, 1, 0), 609f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX RADC Bypass Switch", WM8990_SPEAKER_MIXER, 610f10485e7SMark Brown WM8990_RL12ROP_BIT, 1, 0), 611f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX RIN2 Bypass Switch", WM8990_SPEAKER_MIXER, 612f10485e7SMark Brown WM8990_RI2SPK_BIT, 1, 0), 613f10485e7SMark Brown }; 614f10485e7SMark Brown 615f10485e7SMark Brown static const struct snd_soc_dapm_widget wm8990_dapm_widgets[] = { 616f10485e7SMark Brown /* Input Side */ 617f10485e7SMark Brown /* Input Lines */ 618f10485e7SMark Brown SND_SOC_DAPM_INPUT("LIN1"), 619f10485e7SMark Brown SND_SOC_DAPM_INPUT("LIN2"), 620f10485e7SMark Brown SND_SOC_DAPM_INPUT("LIN3"), 621f10485e7SMark Brown SND_SOC_DAPM_INPUT("LIN4/RXN"), 622f10485e7SMark Brown SND_SOC_DAPM_INPUT("RIN3"), 623f10485e7SMark Brown SND_SOC_DAPM_INPUT("RIN4/RXP"), 624f10485e7SMark Brown SND_SOC_DAPM_INPUT("RIN1"), 625f10485e7SMark Brown SND_SOC_DAPM_INPUT("RIN2"), 626f10485e7SMark Brown SND_SOC_DAPM_INPUT("Internal ADC Source"), 627f10485e7SMark Brown 628d2fd5fe7SMark Brown SND_SOC_DAPM_SUPPLY("INL", WM8990_POWER_MANAGEMENT_2, WM8990_AINL_ENA_BIT, 0, 629d2fd5fe7SMark Brown NULL, 0), 630d2fd5fe7SMark Brown SND_SOC_DAPM_SUPPLY("INR", WM8990_POWER_MANAGEMENT_2, WM8990_AINR_ENA_BIT, 0, 631d2fd5fe7SMark Brown NULL, 0), 632d2fd5fe7SMark Brown 633f10485e7SMark Brown /* DACs */ 634f10485e7SMark Brown SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8990_POWER_MANAGEMENT_2, 635f10485e7SMark Brown WM8990_ADCL_ENA_BIT, 0), 636f10485e7SMark Brown SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8990_POWER_MANAGEMENT_2, 637f10485e7SMark Brown WM8990_ADCR_ENA_BIT, 0), 638f10485e7SMark Brown 639f10485e7SMark Brown /* Input PGAs */ 640f10485e7SMark Brown SND_SOC_DAPM_MIXER("LIN12 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_LIN12_ENA_BIT, 641f10485e7SMark Brown 0, &wm8990_dapm_lin12_pga_controls[0], 642f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lin12_pga_controls)), 643f10485e7SMark Brown SND_SOC_DAPM_MIXER("LIN34 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_LIN34_ENA_BIT, 644f10485e7SMark Brown 0, &wm8990_dapm_lin34_pga_controls[0], 645f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lin34_pga_controls)), 646f10485e7SMark Brown SND_SOC_DAPM_MIXER("RIN12 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_RIN12_ENA_BIT, 647f10485e7SMark Brown 0, &wm8990_dapm_rin12_pga_controls[0], 648f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_rin12_pga_controls)), 649f10485e7SMark Brown SND_SOC_DAPM_MIXER("RIN34 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_RIN34_ENA_BIT, 650f10485e7SMark Brown 0, &wm8990_dapm_rin34_pga_controls[0], 651f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_rin34_pga_controls)), 652f10485e7SMark Brown 653f10485e7SMark Brown /* INMIXL */ 654d2fd5fe7SMark Brown SND_SOC_DAPM_MIXER("INMIXL", SND_SOC_NOPM, 0, 0, 655f10485e7SMark Brown &wm8990_dapm_inmixl_controls[0], 656d2fd5fe7SMark Brown ARRAY_SIZE(wm8990_dapm_inmixl_controls)), 657f10485e7SMark Brown 658f10485e7SMark Brown /* AINLMUX */ 659d2fd5fe7SMark Brown SND_SOC_DAPM_MUX("AINLMUX", SND_SOC_NOPM, 0, 0, &wm8990_dapm_ainlmux_controls), 660f10485e7SMark Brown 661f10485e7SMark Brown /* INMIXR */ 662d2fd5fe7SMark Brown SND_SOC_DAPM_MIXER("INMIXR", SND_SOC_NOPM, 0, 0, 663f10485e7SMark Brown &wm8990_dapm_inmixr_controls[0], 664d2fd5fe7SMark Brown ARRAY_SIZE(wm8990_dapm_inmixr_controls)), 665f10485e7SMark Brown 666f10485e7SMark Brown /* AINRMUX */ 667d2fd5fe7SMark Brown SND_SOC_DAPM_MUX("AINRMUX", SND_SOC_NOPM, 0, 0, &wm8990_dapm_ainrmux_controls), 668f10485e7SMark Brown 669f10485e7SMark Brown /* Output Side */ 670f10485e7SMark Brown /* DACs */ 671f10485e7SMark Brown SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8990_POWER_MANAGEMENT_3, 672f10485e7SMark Brown WM8990_DACL_ENA_BIT, 0), 673f10485e7SMark Brown SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8990_POWER_MANAGEMENT_3, 674f10485e7SMark Brown WM8990_DACR_ENA_BIT, 0), 675f10485e7SMark Brown 676f10485e7SMark Brown /* LOMIX */ 677f10485e7SMark Brown SND_SOC_DAPM_MIXER_E("LOMIX", WM8990_POWER_MANAGEMENT_3, WM8990_LOMIX_ENA_BIT, 678f10485e7SMark Brown 0, &wm8990_dapm_lomix_controls[0], 679f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lomix_controls), 680f10485e7SMark Brown outmixer_event, SND_SOC_DAPM_PRE_REG), 681f10485e7SMark Brown 682f10485e7SMark Brown /* LONMIX */ 683f10485e7SMark Brown SND_SOC_DAPM_MIXER("LONMIX", WM8990_POWER_MANAGEMENT_3, WM8990_LON_ENA_BIT, 0, 684f10485e7SMark Brown &wm8990_dapm_lonmix_controls[0], 685f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lonmix_controls)), 686f10485e7SMark Brown 687f10485e7SMark Brown /* LOPMIX */ 688f10485e7SMark Brown SND_SOC_DAPM_MIXER("LOPMIX", WM8990_POWER_MANAGEMENT_3, WM8990_LOP_ENA_BIT, 0, 689f10485e7SMark Brown &wm8990_dapm_lopmix_controls[0], 690f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lopmix_controls)), 691f10485e7SMark Brown 692f10485e7SMark Brown /* OUT3MIX */ 693f10485e7SMark Brown SND_SOC_DAPM_MIXER("OUT3MIX", WM8990_POWER_MANAGEMENT_1, WM8990_OUT3_ENA_BIT, 0, 694f10485e7SMark Brown &wm8990_dapm_out3mix_controls[0], 695f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_out3mix_controls)), 696f10485e7SMark Brown 697f10485e7SMark Brown /* SPKMIX */ 698f10485e7SMark Brown SND_SOC_DAPM_MIXER_E("SPKMIX", WM8990_POWER_MANAGEMENT_1, WM8990_SPK_ENA_BIT, 0, 699f10485e7SMark Brown &wm8990_dapm_spkmix_controls[0], 700f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_spkmix_controls), outmixer_event, 701f10485e7SMark Brown SND_SOC_DAPM_PRE_REG), 702f10485e7SMark Brown 703f10485e7SMark Brown /* OUT4MIX */ 704f10485e7SMark Brown SND_SOC_DAPM_MIXER("OUT4MIX", WM8990_POWER_MANAGEMENT_1, WM8990_OUT4_ENA_BIT, 0, 705f10485e7SMark Brown &wm8990_dapm_out4mix_controls[0], 706f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_out4mix_controls)), 707f10485e7SMark Brown 708f10485e7SMark Brown /* ROPMIX */ 709f10485e7SMark Brown SND_SOC_DAPM_MIXER("ROPMIX", WM8990_POWER_MANAGEMENT_3, WM8990_ROP_ENA_BIT, 0, 710f10485e7SMark Brown &wm8990_dapm_ropmix_controls[0], 711f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_ropmix_controls)), 712f10485e7SMark Brown 713f10485e7SMark Brown /* RONMIX */ 714f10485e7SMark Brown SND_SOC_DAPM_MIXER("RONMIX", WM8990_POWER_MANAGEMENT_3, WM8990_RON_ENA_BIT, 0, 715f10485e7SMark Brown &wm8990_dapm_ronmix_controls[0], 716f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_ronmix_controls)), 717f10485e7SMark Brown 718f10485e7SMark Brown /* ROMIX */ 719f10485e7SMark Brown SND_SOC_DAPM_MIXER_E("ROMIX", WM8990_POWER_MANAGEMENT_3, WM8990_ROMIX_ENA_BIT, 720f10485e7SMark Brown 0, &wm8990_dapm_romix_controls[0], 721f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_romix_controls), 722f10485e7SMark Brown outmixer_event, SND_SOC_DAPM_PRE_REG), 723f10485e7SMark Brown 724f10485e7SMark Brown /* LOUT PGA */ 725f10485e7SMark Brown SND_SOC_DAPM_PGA("LOUT PGA", WM8990_POWER_MANAGEMENT_1, WM8990_LOUT_ENA_BIT, 0, 726f10485e7SMark Brown NULL, 0), 727f10485e7SMark Brown 728f10485e7SMark Brown /* ROUT PGA */ 729f10485e7SMark Brown SND_SOC_DAPM_PGA("ROUT PGA", WM8990_POWER_MANAGEMENT_1, WM8990_ROUT_ENA_BIT, 0, 730f10485e7SMark Brown NULL, 0), 731f10485e7SMark Brown 732f10485e7SMark Brown /* LOPGA */ 733f10485e7SMark Brown SND_SOC_DAPM_PGA("LOPGA", WM8990_POWER_MANAGEMENT_3, WM8990_LOPGA_ENA_BIT, 0, 734f10485e7SMark Brown NULL, 0), 735f10485e7SMark Brown 736f10485e7SMark Brown /* ROPGA */ 737f10485e7SMark Brown SND_SOC_DAPM_PGA("ROPGA", WM8990_POWER_MANAGEMENT_3, WM8990_ROPGA_ENA_BIT, 0, 738f10485e7SMark Brown NULL, 0), 739f10485e7SMark Brown 740f10485e7SMark Brown /* MICBIAS */ 741e1fc3f21SMark Brown SND_SOC_DAPM_SUPPLY("MICBIAS", WM8990_POWER_MANAGEMENT_1, 742e1fc3f21SMark Brown WM8990_MICBIAS_ENA_BIT, 0, NULL, 0), 743f10485e7SMark Brown 744f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("LON"), 745f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("LOP"), 746f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("OUT3"), 747f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("LOUT"), 748f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("SPKN"), 749f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("SPKP"), 750f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("ROUT"), 751f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("OUT4"), 752f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("ROP"), 753f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("RON"), 754f10485e7SMark Brown 755f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("Internal DAC Sink"), 756f10485e7SMark Brown }; 757f10485e7SMark Brown 758f6b415b6SMark Brown static const struct snd_soc_dapm_route wm8990_dapm_routes[] = { 759f10485e7SMark Brown /* Make DACs turn on when playing even if not mixed into any outputs */ 760f10485e7SMark Brown {"Internal DAC Sink", NULL, "Left DAC"}, 761f10485e7SMark Brown {"Internal DAC Sink", NULL, "Right DAC"}, 762f10485e7SMark Brown 763f10485e7SMark Brown /* Make ADCs turn on when recording even if not mixed from any inputs */ 764f10485e7SMark Brown {"Left ADC", NULL, "Internal ADC Source"}, 765f10485e7SMark Brown {"Right ADC", NULL, "Internal ADC Source"}, 766f10485e7SMark Brown 767d2fd5fe7SMark Brown {"AINLMUX", NULL, "INL"}, 768d2fd5fe7SMark Brown {"INMIXL", NULL, "INL"}, 769d2fd5fe7SMark Brown {"AINRMUX", NULL, "INR"}, 770d2fd5fe7SMark Brown {"INMIXR", NULL, "INR"}, 771d2fd5fe7SMark Brown 772f10485e7SMark Brown /* Input Side */ 773f10485e7SMark Brown /* LIN12 PGA */ 774f10485e7SMark Brown {"LIN12 PGA", "LIN1 Switch", "LIN1"}, 775f10485e7SMark Brown {"LIN12 PGA", "LIN2 Switch", "LIN2"}, 776f10485e7SMark Brown /* LIN34 PGA */ 777f10485e7SMark Brown {"LIN34 PGA", "LIN3 Switch", "LIN3"}, 77897a775c4SJinyoung Park {"LIN34 PGA", "LIN4 Switch", "LIN4/RXN"}, 779f10485e7SMark Brown /* INMIXL */ 780f10485e7SMark Brown {"INMIXL", "Record Left Volume", "LOMIX"}, 781f10485e7SMark Brown {"INMIXL", "LIN2 Volume", "LIN2"}, 782f10485e7SMark Brown {"INMIXL", "LINPGA12 Switch", "LIN12 PGA"}, 783f10485e7SMark Brown {"INMIXL", "LINPGA34 Switch", "LIN34 PGA"}, 78497a775c4SJinyoung Park /* AINLMUX */ 78597a775c4SJinyoung Park {"AINLMUX", "INMIXL Mix", "INMIXL"}, 78697a775c4SJinyoung Park {"AINLMUX", "DIFFINL Mix", "LIN12 PGA"}, 78797a775c4SJinyoung Park {"AINLMUX", "DIFFINL Mix", "LIN34 PGA"}, 78897a775c4SJinyoung Park {"AINLMUX", "RXVOICE Mix", "LIN4/RXN"}, 78997a775c4SJinyoung Park {"AINLMUX", "RXVOICE Mix", "RIN4/RXP"}, 790f10485e7SMark Brown /* ADC */ 79197a775c4SJinyoung Park {"Left ADC", NULL, "AINLMUX"}, 792f10485e7SMark Brown 793f10485e7SMark Brown /* RIN12 PGA */ 794f10485e7SMark Brown {"RIN12 PGA", "RIN1 Switch", "RIN1"}, 795f10485e7SMark Brown {"RIN12 PGA", "RIN2 Switch", "RIN2"}, 796f10485e7SMark Brown /* RIN34 PGA */ 797f10485e7SMark Brown {"RIN34 PGA", "RIN3 Switch", "RIN3"}, 79897a775c4SJinyoung Park {"RIN34 PGA", "RIN4 Switch", "RIN4/RXP"}, 799f10485e7SMark Brown /* INMIXL */ 800f10485e7SMark Brown {"INMIXR", "Record Right Volume", "ROMIX"}, 801f10485e7SMark Brown {"INMIXR", "RIN2 Volume", "RIN2"}, 802f10485e7SMark Brown {"INMIXR", "RINPGA12 Switch", "RIN12 PGA"}, 803f10485e7SMark Brown {"INMIXR", "RINPGA34 Switch", "RIN34 PGA"}, 80497a775c4SJinyoung Park /* AINRMUX */ 80597a775c4SJinyoung Park {"AINRMUX", "INMIXR Mix", "INMIXR"}, 80697a775c4SJinyoung Park {"AINRMUX", "DIFFINR Mix", "RIN12 PGA"}, 80797a775c4SJinyoung Park {"AINRMUX", "DIFFINR Mix", "RIN34 PGA"}, 80897a775c4SJinyoung Park {"AINRMUX", "RXVOICE Mix", "LIN4/RXN"}, 80997a775c4SJinyoung Park {"AINRMUX", "RXVOICE Mix", "RIN4/RXP"}, 810f10485e7SMark Brown /* ADC */ 81197a775c4SJinyoung Park {"Right ADC", NULL, "AINRMUX"}, 812f10485e7SMark Brown 813f10485e7SMark Brown /* LOMIX */ 814f10485e7SMark Brown {"LOMIX", "LOMIX RIN3 Bypass Switch", "RIN3"}, 815f10485e7SMark Brown {"LOMIX", "LOMIX LIN3 Bypass Switch", "LIN3"}, 816f10485e7SMark Brown {"LOMIX", "LOMIX LIN12 PGA Bypass Switch", "LIN12 PGA"}, 817f10485e7SMark Brown {"LOMIX", "LOMIX RIN12 PGA Bypass Switch", "RIN12 PGA"}, 818f10485e7SMark Brown {"LOMIX", "LOMIX Right ADC Bypass Switch", "AINRMUX"}, 819f10485e7SMark Brown {"LOMIX", "LOMIX Left ADC Bypass Switch", "AINLMUX"}, 820f10485e7SMark Brown {"LOMIX", "LOMIX Left DAC Switch", "Left DAC"}, 821f10485e7SMark Brown 822f10485e7SMark Brown /* ROMIX */ 823f10485e7SMark Brown {"ROMIX", "ROMIX RIN3 Bypass Switch", "RIN3"}, 824f10485e7SMark Brown {"ROMIX", "ROMIX LIN3 Bypass Switch", "LIN3"}, 825f10485e7SMark Brown {"ROMIX", "ROMIX LIN12 PGA Bypass Switch", "LIN12 PGA"}, 826f10485e7SMark Brown {"ROMIX", "ROMIX RIN12 PGA Bypass Switch", "RIN12 PGA"}, 827f10485e7SMark Brown {"ROMIX", "ROMIX Right ADC Bypass Switch", "AINRMUX"}, 828f10485e7SMark Brown {"ROMIX", "ROMIX Left ADC Bypass Switch", "AINLMUX"}, 829f10485e7SMark Brown {"ROMIX", "ROMIX Right DAC Switch", "Right DAC"}, 830f10485e7SMark Brown 831f10485e7SMark Brown /* SPKMIX */ 832f10485e7SMark Brown {"SPKMIX", "SPKMIX LIN2 Bypass Switch", "LIN2"}, 833f10485e7SMark Brown {"SPKMIX", "SPKMIX RIN2 Bypass Switch", "RIN2"}, 834f10485e7SMark Brown {"SPKMIX", "SPKMIX LADC Bypass Switch", "AINLMUX"}, 835f10485e7SMark Brown {"SPKMIX", "SPKMIX RADC Bypass Switch", "AINRMUX"}, 836f10485e7SMark Brown {"SPKMIX", "SPKMIX Left Mixer PGA Switch", "LOPGA"}, 837f10485e7SMark Brown {"SPKMIX", "SPKMIX Right Mixer PGA Switch", "ROPGA"}, 838f10485e7SMark Brown {"SPKMIX", "SPKMIX Right DAC Switch", "Right DAC"}, 839436a7459SMark Brown {"SPKMIX", "SPKMIX Left DAC Switch", "Left DAC"}, 840f10485e7SMark Brown 841f10485e7SMark Brown /* LONMIX */ 842f10485e7SMark Brown {"LONMIX", "LONMIX Left Mixer PGA Switch", "LOPGA"}, 843f10485e7SMark Brown {"LONMIX", "LONMIX Right Mixer PGA Switch", "ROPGA"}, 844f10485e7SMark Brown {"LONMIX", "LONMIX Inverted LOP Switch", "LOPMIX"}, 845f10485e7SMark Brown 846f10485e7SMark Brown /* LOPMIX */ 847f10485e7SMark Brown {"LOPMIX", "LOPMIX Right Mic Bypass Switch", "RIN12 PGA"}, 848f10485e7SMark Brown {"LOPMIX", "LOPMIX Left Mic Bypass Switch", "LIN12 PGA"}, 849f10485e7SMark Brown {"LOPMIX", "LOPMIX Left Mixer PGA Switch", "LOPGA"}, 850f10485e7SMark Brown 851f10485e7SMark Brown /* OUT3MIX */ 85297a775c4SJinyoung Park {"OUT3MIX", "OUT3MIX LIN4/RXP Bypass Switch", "LIN4/RXN"}, 853f10485e7SMark Brown {"OUT3MIX", "OUT3MIX Left Out PGA Switch", "LOPGA"}, 854f10485e7SMark Brown 855f10485e7SMark Brown /* OUT4MIX */ 856f10485e7SMark Brown {"OUT4MIX", "OUT4MIX Right Out PGA Switch", "ROPGA"}, 857f10485e7SMark Brown {"OUT4MIX", "OUT4MIX RIN4/RXP Bypass Switch", "RIN4/RXP"}, 858f10485e7SMark Brown 859f10485e7SMark Brown /* RONMIX */ 860f10485e7SMark Brown {"RONMIX", "RONMIX Right Mixer PGA Switch", "ROPGA"}, 861f10485e7SMark Brown {"RONMIX", "RONMIX Left Mixer PGA Switch", "LOPGA"}, 862f10485e7SMark Brown {"RONMIX", "RONMIX Inverted ROP Switch", "ROPMIX"}, 863f10485e7SMark Brown 864f10485e7SMark Brown /* ROPMIX */ 865f10485e7SMark Brown {"ROPMIX", "ROPMIX Left Mic Bypass Switch", "LIN12 PGA"}, 866f10485e7SMark Brown {"ROPMIX", "ROPMIX Right Mic Bypass Switch", "RIN12 PGA"}, 867f10485e7SMark Brown {"ROPMIX", "ROPMIX Right Mixer PGA Switch", "ROPGA"}, 868f10485e7SMark Brown 869f10485e7SMark Brown /* Out Mixer PGAs */ 870f10485e7SMark Brown {"LOPGA", NULL, "LOMIX"}, 871f10485e7SMark Brown {"ROPGA", NULL, "ROMIX"}, 872f10485e7SMark Brown 873f10485e7SMark Brown {"LOUT PGA", NULL, "LOMIX"}, 874f10485e7SMark Brown {"ROUT PGA", NULL, "ROMIX"}, 875f10485e7SMark Brown 876f10485e7SMark Brown /* Output Pins */ 877f10485e7SMark Brown {"LON", NULL, "LONMIX"}, 878f10485e7SMark Brown {"LOP", NULL, "LOPMIX"}, 87997a775c4SJinyoung Park {"OUT3", NULL, "OUT3MIX"}, 880f10485e7SMark Brown {"LOUT", NULL, "LOUT PGA"}, 881f10485e7SMark Brown {"SPKN", NULL, "SPKMIX"}, 882f10485e7SMark Brown {"ROUT", NULL, "ROUT PGA"}, 883f10485e7SMark Brown {"OUT4", NULL, "OUT4MIX"}, 884f10485e7SMark Brown {"ROP", NULL, "ROPMIX"}, 885f10485e7SMark Brown {"RON", NULL, "RONMIX"}, 886f10485e7SMark Brown }; 887f10485e7SMark Brown 888f10485e7SMark Brown /* PLL divisors */ 889f10485e7SMark Brown struct _pll_div { 890f10485e7SMark Brown u32 div2; 891f10485e7SMark Brown u32 n; 892f10485e7SMark Brown u32 k; 893f10485e7SMark Brown }; 894f10485e7SMark Brown 895f10485e7SMark Brown /* The size in bits of the pll divide multiplied by 10 896f10485e7SMark Brown * to allow rounding later */ 897f10485e7SMark Brown #define FIXED_PLL_SIZE ((1 << 16) * 10) 898f10485e7SMark Brown 899f10485e7SMark Brown static void pll_factors(struct _pll_div *pll_div, unsigned int target, 900f10485e7SMark Brown unsigned int source) 901f10485e7SMark Brown { 902f10485e7SMark Brown u64 Kpart; 903f10485e7SMark Brown unsigned int K, Ndiv, Nmod; 904f10485e7SMark Brown 905f10485e7SMark Brown 906f10485e7SMark Brown Ndiv = target / source; 907f10485e7SMark Brown if (Ndiv < 6) { 908f10485e7SMark Brown source >>= 1; 909f10485e7SMark Brown pll_div->div2 = 1; 910f10485e7SMark Brown Ndiv = target / source; 911f10485e7SMark Brown } else 912f10485e7SMark Brown pll_div->div2 = 0; 913f10485e7SMark Brown 914f10485e7SMark Brown if ((Ndiv < 6) || (Ndiv > 12)) 915f10485e7SMark Brown printk(KERN_WARNING 916449bd54dSRoel Kluin "WM8990 N value outwith recommended range! N = %u\n", Ndiv); 917f10485e7SMark Brown 918f10485e7SMark Brown pll_div->n = Ndiv; 919f10485e7SMark Brown Nmod = target % source; 920f10485e7SMark Brown Kpart = FIXED_PLL_SIZE * (long long)Nmod; 921f10485e7SMark Brown 922f10485e7SMark Brown do_div(Kpart, source); 923f10485e7SMark Brown 924f10485e7SMark Brown K = Kpart & 0xFFFFFFFF; 925f10485e7SMark Brown 926f10485e7SMark Brown /* Check if we need to round */ 927f10485e7SMark Brown if ((K % 10) >= 5) 928f10485e7SMark Brown K += 5; 929f10485e7SMark Brown 930f10485e7SMark Brown /* Move down to proper range now rounding is done */ 931f10485e7SMark Brown K /= 10; 932f10485e7SMark Brown 933f10485e7SMark Brown pll_div->k = K; 934f10485e7SMark Brown } 935f10485e7SMark Brown 93685488037SMark Brown static int wm8990_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, 93785488037SMark Brown int source, unsigned int freq_in, unsigned int freq_out) 938f10485e7SMark Brown { 939f10485e7SMark Brown struct snd_soc_codec *codec = codec_dai->codec; 940f10485e7SMark Brown struct _pll_div pll_div; 941f10485e7SMark Brown 942f10485e7SMark Brown if (freq_in && freq_out) { 943f10485e7SMark Brown pll_factors(&pll_div, freq_out * 4, freq_in); 944f10485e7SMark Brown 945f10485e7SMark Brown /* Turn on PLL */ 94679d07265SAxel Lin snd_soc_update_bits(codec, WM8990_POWER_MANAGEMENT_2, 94779d07265SAxel Lin WM8990_PLL_ENA, WM8990_PLL_ENA); 948f10485e7SMark Brown 949f10485e7SMark Brown /* sysclk comes from PLL */ 95079d07265SAxel Lin snd_soc_update_bits(codec, WM8990_CLOCKING_2, 95179d07265SAxel Lin WM8990_SYSCLK_SRC, WM8990_SYSCLK_SRC); 952f10485e7SMark Brown 9533ad2f3fbSDaniel Mack /* set up N , fractional mode and pre-divisor if necessary */ 9548d50e447SMark Brown snd_soc_write(codec, WM8990_PLL1, pll_div.n | WM8990_SDM | 955f10485e7SMark Brown (pll_div.div2?WM8990_PRESCALE:0)); 9568d50e447SMark Brown snd_soc_write(codec, WM8990_PLL2, (u8)(pll_div.k>>8)); 9578d50e447SMark Brown snd_soc_write(codec, WM8990_PLL3, (u8)(pll_div.k & 0xFF)); 958f10485e7SMark Brown } else { 95979d07265SAxel Lin /* Turn off PLL */ 96079d07265SAxel Lin snd_soc_update_bits(codec, WM8990_POWER_MANAGEMENT_2, 96179d07265SAxel Lin WM8990_PLL_ENA, 0); 962f10485e7SMark Brown } 963f10485e7SMark Brown return 0; 964f10485e7SMark Brown } 965f10485e7SMark Brown 966f10485e7SMark Brown /* 967f10485e7SMark Brown * Clock after PLL and dividers 968f10485e7SMark Brown */ 969e550e17fSLiam Girdwood static int wm8990_set_dai_sysclk(struct snd_soc_dai *codec_dai, 970f10485e7SMark Brown int clk_id, unsigned int freq, int dir) 971f10485e7SMark Brown { 972f10485e7SMark Brown struct snd_soc_codec *codec = codec_dai->codec; 973b2c812e2SMark Brown struct wm8990_priv *wm8990 = snd_soc_codec_get_drvdata(codec); 974f10485e7SMark Brown 975f10485e7SMark Brown wm8990->sysclk = freq; 976f10485e7SMark Brown return 0; 977f10485e7SMark Brown } 978f10485e7SMark Brown 979f10485e7SMark Brown /* 980f10485e7SMark Brown * Set's ADC and Voice DAC format. 981f10485e7SMark Brown */ 982e550e17fSLiam Girdwood static int wm8990_set_dai_fmt(struct snd_soc_dai *codec_dai, 983f10485e7SMark Brown unsigned int fmt) 984f10485e7SMark Brown { 985f10485e7SMark Brown struct snd_soc_codec *codec = codec_dai->codec; 986f10485e7SMark Brown u16 audio1, audio3; 987f10485e7SMark Brown 9888d50e447SMark Brown audio1 = snd_soc_read(codec, WM8990_AUDIO_INTERFACE_1); 9898d50e447SMark Brown audio3 = snd_soc_read(codec, WM8990_AUDIO_INTERFACE_3); 990f10485e7SMark Brown 991f10485e7SMark Brown /* set master/slave audio interface */ 992f10485e7SMark Brown switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 993f10485e7SMark Brown case SND_SOC_DAIFMT_CBS_CFS: 994f10485e7SMark Brown audio3 &= ~WM8990_AIF_MSTR1; 995f10485e7SMark Brown break; 996f10485e7SMark Brown case SND_SOC_DAIFMT_CBM_CFM: 997f10485e7SMark Brown audio3 |= WM8990_AIF_MSTR1; 998f10485e7SMark Brown break; 999f10485e7SMark Brown default: 1000f10485e7SMark Brown return -EINVAL; 1001f10485e7SMark Brown } 1002f10485e7SMark Brown 1003f10485e7SMark Brown audio1 &= ~WM8990_AIF_FMT_MASK; 1004f10485e7SMark Brown 1005f10485e7SMark Brown /* interface format */ 1006f10485e7SMark Brown switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1007f10485e7SMark Brown case SND_SOC_DAIFMT_I2S: 1008f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_I2S; 1009f10485e7SMark Brown audio1 &= ~WM8990_AIF_LRCLK_INV; 1010f10485e7SMark Brown break; 1011f10485e7SMark Brown case SND_SOC_DAIFMT_RIGHT_J: 1012f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_RIGHTJ; 1013f10485e7SMark Brown audio1 &= ~WM8990_AIF_LRCLK_INV; 1014f10485e7SMark Brown break; 1015f10485e7SMark Brown case SND_SOC_DAIFMT_LEFT_J: 1016f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_LEFTJ; 1017f10485e7SMark Brown audio1 &= ~WM8990_AIF_LRCLK_INV; 1018f10485e7SMark Brown break; 1019f10485e7SMark Brown case SND_SOC_DAIFMT_DSP_A: 1020f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_DSP; 1021f10485e7SMark Brown audio1 &= ~WM8990_AIF_LRCLK_INV; 1022f10485e7SMark Brown break; 1023f10485e7SMark Brown case SND_SOC_DAIFMT_DSP_B: 1024f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_DSP | WM8990_AIF_LRCLK_INV; 1025f10485e7SMark Brown break; 1026f10485e7SMark Brown default: 1027f10485e7SMark Brown return -EINVAL; 1028f10485e7SMark Brown } 1029f10485e7SMark Brown 10308d50e447SMark Brown snd_soc_write(codec, WM8990_AUDIO_INTERFACE_1, audio1); 10318d50e447SMark Brown snd_soc_write(codec, WM8990_AUDIO_INTERFACE_3, audio3); 1032f10485e7SMark Brown return 0; 1033f10485e7SMark Brown } 1034f10485e7SMark Brown 1035e550e17fSLiam Girdwood static int wm8990_set_dai_clkdiv(struct snd_soc_dai *codec_dai, 1036f10485e7SMark Brown int div_id, int div) 1037f10485e7SMark Brown { 1038f10485e7SMark Brown struct snd_soc_codec *codec = codec_dai->codec; 1039f10485e7SMark Brown 1040f10485e7SMark Brown switch (div_id) { 1041f10485e7SMark Brown case WM8990_MCLK_DIV: 104279d07265SAxel Lin snd_soc_update_bits(codec, WM8990_CLOCKING_2, 104379d07265SAxel Lin WM8990_MCLK_DIV_MASK, div); 1044f10485e7SMark Brown break; 1045f10485e7SMark Brown case WM8990_DACCLK_DIV: 104679d07265SAxel Lin snd_soc_update_bits(codec, WM8990_CLOCKING_2, 104779d07265SAxel Lin WM8990_DAC_CLKDIV_MASK, div); 1048f10485e7SMark Brown break; 1049f10485e7SMark Brown case WM8990_ADCCLK_DIV: 105079d07265SAxel Lin snd_soc_update_bits(codec, WM8990_CLOCKING_2, 105179d07265SAxel Lin WM8990_ADC_CLKDIV_MASK, div); 1052f10485e7SMark Brown break; 1053f10485e7SMark Brown case WM8990_BCLK_DIV: 105479d07265SAxel Lin snd_soc_update_bits(codec, WM8990_CLOCKING_1, 105579d07265SAxel Lin WM8990_BCLK_DIV_MASK, div); 1056f10485e7SMark Brown break; 1057f10485e7SMark Brown default: 1058f10485e7SMark Brown return -EINVAL; 1059f10485e7SMark Brown } 1060f10485e7SMark Brown 1061f10485e7SMark Brown return 0; 1062f10485e7SMark Brown } 1063f10485e7SMark Brown 1064f10485e7SMark Brown /* 1065f10485e7SMark Brown * Set PCM DAI bit size and sample rate. 1066f10485e7SMark Brown */ 1067f10485e7SMark Brown static int wm8990_hw_params(struct snd_pcm_substream *substream, 1068dee89c4dSMark Brown struct snd_pcm_hw_params *params, 1069dee89c4dSMark Brown struct snd_soc_dai *dai) 1070f10485e7SMark Brown { 1071e6968a17SMark Brown struct snd_soc_codec *codec = dai->codec; 10728d50e447SMark Brown u16 audio1 = snd_soc_read(codec, WM8990_AUDIO_INTERFACE_1); 1073f10485e7SMark Brown 1074f10485e7SMark Brown audio1 &= ~WM8990_AIF_WL_MASK; 1075f10485e7SMark Brown /* bit size */ 1076f10485e7SMark Brown switch (params_format(params)) { 1077f10485e7SMark Brown case SNDRV_PCM_FORMAT_S16_LE: 1078f10485e7SMark Brown break; 1079f10485e7SMark Brown case SNDRV_PCM_FORMAT_S20_3LE: 1080f10485e7SMark Brown audio1 |= WM8990_AIF_WL_20BITS; 1081f10485e7SMark Brown break; 1082f10485e7SMark Brown case SNDRV_PCM_FORMAT_S24_LE: 1083f10485e7SMark Brown audio1 |= WM8990_AIF_WL_24BITS; 1084f10485e7SMark Brown break; 1085f10485e7SMark Brown case SNDRV_PCM_FORMAT_S32_LE: 1086f10485e7SMark Brown audio1 |= WM8990_AIF_WL_32BITS; 1087f10485e7SMark Brown break; 1088f10485e7SMark Brown } 1089f10485e7SMark Brown 10908d50e447SMark Brown snd_soc_write(codec, WM8990_AUDIO_INTERFACE_1, audio1); 1091f10485e7SMark Brown return 0; 1092f10485e7SMark Brown } 1093f10485e7SMark Brown 1094e550e17fSLiam Girdwood static int wm8990_mute(struct snd_soc_dai *dai, int mute) 1095f10485e7SMark Brown { 1096f10485e7SMark Brown struct snd_soc_codec *codec = dai->codec; 1097f10485e7SMark Brown u16 val; 1098f10485e7SMark Brown 10998d50e447SMark Brown val = snd_soc_read(codec, WM8990_DAC_CTRL) & ~WM8990_DAC_MUTE; 1100f10485e7SMark Brown 1101f10485e7SMark Brown if (mute) 11028d50e447SMark Brown snd_soc_write(codec, WM8990_DAC_CTRL, val | WM8990_DAC_MUTE); 1103f10485e7SMark Brown else 11048d50e447SMark Brown snd_soc_write(codec, WM8990_DAC_CTRL, val); 1105f10485e7SMark Brown 1106f10485e7SMark Brown return 0; 1107f10485e7SMark Brown } 1108f10485e7SMark Brown 1109f10485e7SMark Brown static int wm8990_set_bias_level(struct snd_soc_codec *codec, 1110f10485e7SMark Brown enum snd_soc_bias_level level) 1111f10485e7SMark Brown { 11120112b62bSMark Brown struct wm8990_priv *wm8990 = snd_soc_codec_get_drvdata(codec); 1113416a0ce5SAxel Lin int ret; 1114f10485e7SMark Brown 1115f10485e7SMark Brown switch (level) { 1116f10485e7SMark Brown case SND_SOC_BIAS_ON: 1117f10485e7SMark Brown break; 11182adb9833SMark Brown 1119f10485e7SMark Brown case SND_SOC_BIAS_PREPARE: 11202adb9833SMark Brown /* VMID=2*50k */ 112179d07265SAxel Lin snd_soc_update_bits(codec, WM8990_POWER_MANAGEMENT_1, 112279d07265SAxel Lin WM8990_VMID_MODE_MASK, 0x2); 1123f10485e7SMark Brown break; 11242adb9833SMark Brown 1125f10485e7SMark Brown case SND_SOC_BIAS_STANDBY: 1126ce6120ccSLiam Girdwood if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { 11270112b62bSMark Brown ret = regcache_sync(wm8990->regmap); 1128416a0ce5SAxel Lin if (ret < 0) { 1129416a0ce5SAxel Lin dev_err(codec->dev, "Failed to sync cache: %d\n", ret); 1130416a0ce5SAxel Lin return ret; 1131416a0ce5SAxel Lin } 1132416a0ce5SAxel Lin 1133f10485e7SMark Brown /* Enable all output discharge bits */ 11348d50e447SMark Brown snd_soc_write(codec, WM8990_ANTIPOP1, WM8990_DIS_LLINE | 1135f10485e7SMark Brown WM8990_DIS_RLINE | WM8990_DIS_OUT3 | 1136f10485e7SMark Brown WM8990_DIS_OUT4 | WM8990_DIS_LOUT | 1137f10485e7SMark Brown WM8990_DIS_ROUT); 1138f10485e7SMark Brown 1139f10485e7SMark Brown /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */ 11408d50e447SMark Brown snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | 1141f10485e7SMark Brown WM8990_BUFDCOPEN | WM8990_POBCTRL | 1142f10485e7SMark Brown WM8990_VMIDTOG); 1143f10485e7SMark Brown 1144f10485e7SMark Brown /* Delay to allow output caps to discharge */ 11457ebcf5d6SDimitris Papastamos msleep(300); 1146f10485e7SMark Brown 1147f10485e7SMark Brown /* Disable VMIDTOG */ 11488d50e447SMark Brown snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | 1149f10485e7SMark Brown WM8990_BUFDCOPEN | WM8990_POBCTRL); 1150f10485e7SMark Brown 1151f10485e7SMark Brown /* disable all output discharge bits */ 11528d50e447SMark Brown snd_soc_write(codec, WM8990_ANTIPOP1, 0); 1153f10485e7SMark Brown 1154f10485e7SMark Brown /* Enable outputs */ 11558d50e447SMark Brown snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1b00); 1156f10485e7SMark Brown 11577ebcf5d6SDimitris Papastamos msleep(50); 1158f10485e7SMark Brown 1159f10485e7SMark Brown /* Enable VMID at 2x50k */ 11608d50e447SMark Brown snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f02); 1161f10485e7SMark Brown 11627ebcf5d6SDimitris Papastamos msleep(100); 1163f10485e7SMark Brown 1164f10485e7SMark Brown /* Enable VREF */ 11658d50e447SMark Brown snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f03); 1166f10485e7SMark Brown 11677ebcf5d6SDimitris Papastamos msleep(600); 1168f10485e7SMark Brown 1169f10485e7SMark Brown /* Enable BUFIOEN */ 11708d50e447SMark Brown snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | 1171f10485e7SMark Brown WM8990_BUFDCOPEN | WM8990_POBCTRL | 1172f10485e7SMark Brown WM8990_BUFIOEN); 1173f10485e7SMark Brown 1174f10485e7SMark Brown /* Disable outputs */ 11758d50e447SMark Brown snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x3); 1176f10485e7SMark Brown 1177f10485e7SMark Brown /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ 11788d50e447SMark Brown snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_BUFIOEN); 1179f10485e7SMark Brown 1180be1b87c7SMark Brown /* Enable workaround for ADC clocking issue. */ 11818d50e447SMark Brown snd_soc_write(codec, WM8990_EXT_ACCESS_ENA, 0x2); 11828d50e447SMark Brown snd_soc_write(codec, WM8990_EXT_CTL1, 0xa003); 11838d50e447SMark Brown snd_soc_write(codec, WM8990_EXT_ACCESS_ENA, 0); 1184f10485e7SMark Brown } 11852adb9833SMark Brown 11862adb9833SMark Brown /* VMID=2*250k */ 118779d07265SAxel Lin snd_soc_update_bits(codec, WM8990_POWER_MANAGEMENT_1, 118879d07265SAxel Lin WM8990_VMID_MODE_MASK, 0x4); 1189f10485e7SMark Brown break; 1190f10485e7SMark Brown 1191f10485e7SMark Brown case SND_SOC_BIAS_OFF: 1192f10485e7SMark Brown /* Enable POBCTRL and SOFT_ST */ 11938d50e447SMark Brown snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | 1194f10485e7SMark Brown WM8990_POBCTRL | WM8990_BUFIOEN); 1195f10485e7SMark Brown 1196f10485e7SMark Brown /* Enable POBCTRL, SOFT_ST and BUFDCOPEN */ 11978d50e447SMark Brown snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | 1198f10485e7SMark Brown WM8990_BUFDCOPEN | WM8990_POBCTRL | 1199f10485e7SMark Brown WM8990_BUFIOEN); 1200f10485e7SMark Brown 1201f10485e7SMark Brown /* mute DAC */ 120279d07265SAxel Lin snd_soc_update_bits(codec, WM8990_DAC_CTRL, 120379d07265SAxel Lin WM8990_DAC_MUTE, WM8990_DAC_MUTE); 1204f10485e7SMark Brown 1205f10485e7SMark Brown /* Enable any disabled outputs */ 12068d50e447SMark Brown snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f03); 1207f10485e7SMark Brown 1208f10485e7SMark Brown /* Disable VMID */ 12098d50e447SMark Brown snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f01); 1210f10485e7SMark Brown 12117ebcf5d6SDimitris Papastamos msleep(300); 1212f10485e7SMark Brown 1213f10485e7SMark Brown /* Enable all output discharge bits */ 12148d50e447SMark Brown snd_soc_write(codec, WM8990_ANTIPOP1, WM8990_DIS_LLINE | 1215f10485e7SMark Brown WM8990_DIS_RLINE | WM8990_DIS_OUT3 | 1216f10485e7SMark Brown WM8990_DIS_OUT4 | WM8990_DIS_LOUT | 1217f10485e7SMark Brown WM8990_DIS_ROUT); 1218f10485e7SMark Brown 1219f10485e7SMark Brown /* Disable VREF */ 12208d50e447SMark Brown snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x0); 1221f10485e7SMark Brown 1222f10485e7SMark Brown /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ 12238d50e447SMark Brown snd_soc_write(codec, WM8990_ANTIPOP2, 0x0); 12242ab2b742SMark Brown 12250112b62bSMark Brown regcache_mark_dirty(wm8990->regmap); 1226f10485e7SMark Brown break; 1227f10485e7SMark Brown } 1228f10485e7SMark Brown 1229ce6120ccSLiam Girdwood codec->dapm.bias_level = level; 1230f10485e7SMark Brown return 0; 1231f10485e7SMark Brown } 1232f10485e7SMark Brown 1233f10485e7SMark Brown #define WM8990_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ 1234f10485e7SMark Brown SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \ 1235f10485e7SMark Brown SNDRV_PCM_RATE_48000) 1236f10485e7SMark Brown 1237f10485e7SMark Brown #define WM8990_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 1238f10485e7SMark Brown SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) 1239f10485e7SMark Brown 1240f10485e7SMark Brown /* 1241f10485e7SMark Brown * The WM8990 supports 2 different and mutually exclusive DAI 1242f10485e7SMark Brown * configurations. 1243f10485e7SMark Brown * 1244f10485e7SMark Brown * 1. ADC/DAC on Primary Interface 1245f10485e7SMark Brown * 2. ADC on Primary Interface/DAC on secondary 1246f10485e7SMark Brown */ 124785e7652dSLars-Peter Clausen static const struct snd_soc_dai_ops wm8990_dai_ops = { 12486335d055SEric Miao .hw_params = wm8990_hw_params, 12496335d055SEric Miao .digital_mute = wm8990_mute, 12506335d055SEric Miao .set_fmt = wm8990_set_dai_fmt, 12516335d055SEric Miao .set_clkdiv = wm8990_set_dai_clkdiv, 12526335d055SEric Miao .set_pll = wm8990_set_dai_pll, 12536335d055SEric Miao .set_sysclk = wm8990_set_dai_sysclk, 12546335d055SEric Miao }; 12556335d055SEric Miao 1256f0fba2adSLiam Girdwood static struct snd_soc_dai_driver wm8990_dai = { 1257f10485e7SMark Brown /* ADC/DAC on primary */ 1258f0fba2adSLiam Girdwood .name = "wm8990-hifi", 1259f10485e7SMark Brown .playback = { 1260f10485e7SMark Brown .stream_name = "Playback", 1261f10485e7SMark Brown .channels_min = 1, 1262f10485e7SMark Brown .channels_max = 2, 1263f10485e7SMark Brown .rates = WM8990_RATES, 1264f10485e7SMark Brown .formats = WM8990_FORMATS,}, 1265f10485e7SMark Brown .capture = { 1266f10485e7SMark Brown .stream_name = "Capture", 1267f10485e7SMark Brown .channels_min = 1, 1268f10485e7SMark Brown .channels_max = 2, 1269f10485e7SMark Brown .rates = WM8990_RATES, 1270f10485e7SMark Brown .formats = WM8990_FORMATS,}, 12716335d055SEric Miao .ops = &wm8990_dai_ops, 1272f10485e7SMark Brown }; 1273f10485e7SMark Brown 127484b315eeSLars-Peter Clausen static int wm8990_suspend(struct snd_soc_codec *codec) 1275f10485e7SMark Brown { 1276f10485e7SMark Brown wm8990_set_bias_level(codec, SND_SOC_BIAS_OFF); 1277f10485e7SMark Brown return 0; 1278f10485e7SMark Brown } 1279f10485e7SMark Brown 1280f0fba2adSLiam Girdwood static int wm8990_resume(struct snd_soc_codec *codec) 1281f10485e7SMark Brown { 1282f10485e7SMark Brown wm8990_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 1283f10485e7SMark Brown return 0; 1284f10485e7SMark Brown } 1285f10485e7SMark Brown 1286f10485e7SMark Brown /* 1287f10485e7SMark Brown * initialise the WM8990 driver 1288f10485e7SMark Brown * register the mixer and dsp interfaces with the kernel 1289f10485e7SMark Brown */ 1290f0fba2adSLiam Girdwood static int wm8990_probe(struct snd_soc_codec *codec) 1291f10485e7SMark Brown { 1292f0fba2adSLiam Girdwood int ret; 1293f10485e7SMark Brown 12940112b62bSMark Brown ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP); 12958d50e447SMark Brown if (ret < 0) { 12968d50e447SMark Brown printk(KERN_ERR "wm8990: failed to set cache I/O: %d\n", ret); 1297f0fba2adSLiam Girdwood return ret; 12988d50e447SMark Brown } 12998d50e447SMark Brown 1300f10485e7SMark Brown wm8990_reset(codec); 1301f10485e7SMark Brown 1302f10485e7SMark Brown /* charge output caps */ 1303f10485e7SMark Brown wm8990_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 1304f10485e7SMark Brown 130579d07265SAxel Lin snd_soc_update_bits(codec, WM8990_AUDIO_INTERFACE_4, 130679d07265SAxel Lin WM8990_ALRCGPIO1, WM8990_ALRCGPIO1); 1307f10485e7SMark Brown 130879d07265SAxel Lin snd_soc_update_bits(codec, WM8990_GPIO1_GPIO2, 130979d07265SAxel Lin WM8990_GPIO1_SEL_MASK, 1); 1310f10485e7SMark Brown 131179d07265SAxel Lin snd_soc_update_bits(codec, WM8990_POWER_MANAGEMENT_2, 131279d07265SAxel Lin WM8990_OPCLK_ENA, WM8990_OPCLK_ENA); 1313f10485e7SMark Brown 13148d50e447SMark Brown snd_soc_write(codec, WM8990_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8)); 13158d50e447SMark Brown snd_soc_write(codec, WM8990_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8)); 1316f10485e7SMark Brown 1317f0fba2adSLiam Girdwood return 0; 1318f10485e7SMark Brown } 1319f10485e7SMark Brown 1320f0fba2adSLiam Girdwood /* power down chip */ 1321f0fba2adSLiam Girdwood static int wm8990_remove(struct snd_soc_codec *codec) 1322f0fba2adSLiam Girdwood { 1323f0fba2adSLiam Girdwood wm8990_set_bias_level(codec, SND_SOC_BIAS_OFF); 1324f0fba2adSLiam Girdwood return 0; 1325f0fba2adSLiam Girdwood } 1326f0fba2adSLiam Girdwood 1327f0fba2adSLiam Girdwood static struct snd_soc_codec_driver soc_codec_dev_wm8990 = { 1328f0fba2adSLiam Girdwood .probe = wm8990_probe, 1329f0fba2adSLiam Girdwood .remove = wm8990_remove, 1330f0fba2adSLiam Girdwood .suspend = wm8990_suspend, 1331f0fba2adSLiam Girdwood .resume = wm8990_resume, 1332f0fba2adSLiam Girdwood .set_bias_level = wm8990_set_bias_level, 1333f6b415b6SMark Brown .controls = wm8990_snd_controls, 1334f6b415b6SMark Brown .num_controls = ARRAY_SIZE(wm8990_snd_controls), 1335f6b415b6SMark Brown .dapm_widgets = wm8990_dapm_widgets, 1336f6b415b6SMark Brown .num_dapm_widgets = ARRAY_SIZE(wm8990_dapm_widgets), 1337f6b415b6SMark Brown .dapm_routes = wm8990_dapm_routes, 1338f6b415b6SMark Brown .num_dapm_routes = ARRAY_SIZE(wm8990_dapm_routes), 1339f0fba2adSLiam Girdwood }; 1340f10485e7SMark Brown 13410112b62bSMark Brown static const struct regmap_config wm8990_regmap = { 13420112b62bSMark Brown .reg_bits = 8, 13430112b62bSMark Brown .val_bits = 16, 13440112b62bSMark Brown 13450112b62bSMark Brown .max_register = WM8990_PLL3, 13460112b62bSMark Brown .volatile_reg = wm8990_volatile_register, 13470112b62bSMark Brown .reg_defaults = wm8990_reg_defaults, 13480112b62bSMark Brown .num_reg_defaults = ARRAY_SIZE(wm8990_reg_defaults), 13490112b62bSMark Brown .cache_type = REGCACHE_RBTREE, 13500112b62bSMark Brown }; 13510112b62bSMark Brown 13527a79e94eSBill Pemberton static int wm8990_i2c_probe(struct i2c_client *i2c, 1353e5d3fd38SJean Delvare const struct i2c_device_id *id) 1354f10485e7SMark Brown { 1355f0fba2adSLiam Girdwood struct wm8990_priv *wm8990; 1356f10485e7SMark Brown int ret; 1357f10485e7SMark Brown 1358587cbbb3SMark Brown wm8990 = devm_kzalloc(&i2c->dev, sizeof(struct wm8990_priv), 1359587cbbb3SMark Brown GFP_KERNEL); 1360f0fba2adSLiam Girdwood if (wm8990 == NULL) 1361f0fba2adSLiam Girdwood return -ENOMEM; 1362f10485e7SMark Brown 1363f0fba2adSLiam Girdwood i2c_set_clientdata(i2c, wm8990); 1364f0fba2adSLiam Girdwood 1365f0fba2adSLiam Girdwood ret = snd_soc_register_codec(&i2c->dev, 1366f0fba2adSLiam Girdwood &soc_codec_dev_wm8990, &wm8990_dai, 1); 1367587cbbb3SMark Brown 1368f10485e7SMark Brown return ret; 1369f10485e7SMark Brown } 1370f10485e7SMark Brown 13717a79e94eSBill Pemberton static int wm8990_i2c_remove(struct i2c_client *client) 1372f10485e7SMark Brown { 1373f0fba2adSLiam Girdwood snd_soc_unregister_codec(&client->dev); 1374587cbbb3SMark Brown 1375f10485e7SMark Brown return 0; 1376f10485e7SMark Brown } 1377f10485e7SMark Brown 1378e5d3fd38SJean Delvare static const struct i2c_device_id wm8990_i2c_id[] = { 1379e5d3fd38SJean Delvare { "wm8990", 0 }, 1380e5d3fd38SJean Delvare { } 1381e5d3fd38SJean Delvare }; 1382e5d3fd38SJean Delvare MODULE_DEVICE_TABLE(i2c, wm8990_i2c_id); 1383f10485e7SMark Brown 1384f10485e7SMark Brown static struct i2c_driver wm8990_i2c_driver = { 1385f10485e7SMark Brown .driver = { 1386091edccfSMark Brown .name = "wm8990", 1387f10485e7SMark Brown .owner = THIS_MODULE, 1388f10485e7SMark Brown }, 1389e5d3fd38SJean Delvare .probe = wm8990_i2c_probe, 13907a79e94eSBill Pemberton .remove = wm8990_i2c_remove, 1391e5d3fd38SJean Delvare .id_table = wm8990_i2c_id, 1392f10485e7SMark Brown }; 1393f10485e7SMark Brown 139493818c9aSMark Brown module_i2c_driver(wm8990_i2c_driver); 139564089b84SMark Brown 1396f10485e7SMark Brown MODULE_DESCRIPTION("ASoC WM8990 driver"); 1397f10485e7SMark Brown MODULE_AUTHOR("Liam Girdwood"); 1398f10485e7SMark Brown MODULE_LICENSE("GPL"); 1399