1*2874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 2f10485e7SMark Brown /* 3f10485e7SMark Brown * wm8990.c -- WM8990 ALSA Soc Audio driver 4f10485e7SMark Brown * 5f10485e7SMark Brown * Copyright 2008 Wolfson Microelectronics PLC. 664ca0404SLiam Girdwood * Author: Liam Girdwood <lrg@slimlogic.co.uk> 7f10485e7SMark Brown */ 8f10485e7SMark Brown 9f10485e7SMark Brown #include <linux/module.h> 10f10485e7SMark Brown #include <linux/moduleparam.h> 11f10485e7SMark Brown #include <linux/kernel.h> 12f10485e7SMark Brown #include <linux/init.h> 13f10485e7SMark Brown #include <linux/delay.h> 14f10485e7SMark Brown #include <linux/pm.h> 15f10485e7SMark Brown #include <linux/i2c.h> 160112b62bSMark Brown #include <linux/regmap.h> 175a0e3ad6STejun Heo #include <linux/slab.h> 18f10485e7SMark Brown #include <sound/core.h> 19f10485e7SMark Brown #include <sound/pcm.h> 20f10485e7SMark Brown #include <sound/pcm_params.h> 21f10485e7SMark Brown #include <sound/soc.h> 22f10485e7SMark Brown #include <sound/initval.h> 23f10485e7SMark Brown #include <sound/tlv.h> 24f10485e7SMark Brown #include <asm/div64.h> 25f10485e7SMark Brown 26f10485e7SMark Brown #include "wm8990.h" 27f10485e7SMark Brown 28f10485e7SMark Brown /* codec private data */ 29f10485e7SMark Brown struct wm8990_priv { 300112b62bSMark Brown struct regmap *regmap; 31f10485e7SMark Brown unsigned int sysclk; 32f10485e7SMark Brown unsigned int pcmclk; 33f10485e7SMark Brown }; 34f10485e7SMark Brown 350112b62bSMark Brown static bool wm8990_volatile_register(struct device *dev, unsigned int reg) 36416a0ce5SAxel Lin { 37416a0ce5SAxel Lin switch (reg) { 38416a0ce5SAxel Lin case WM8990_RESET: 39064ee5a3SGustavo A. R. Silva return true; 40416a0ce5SAxel Lin default: 41064ee5a3SGustavo A. R. Silva return false; 42416a0ce5SAxel Lin } 43416a0ce5SAxel Lin } 44416a0ce5SAxel Lin 450112b62bSMark Brown static const struct reg_default wm8990_reg_defaults[] = { 460112b62bSMark Brown { 1, 0x0000 }, /* R1 - Power Management (1) */ 470112b62bSMark Brown { 2, 0x6000 }, /* R2 - Power Management (2) */ 480112b62bSMark Brown { 3, 0x0000 }, /* R3 - Power Management (3) */ 490112b62bSMark Brown { 4, 0x4050 }, /* R4 - Audio Interface (1) */ 500112b62bSMark Brown { 5, 0x4000 }, /* R5 - Audio Interface (2) */ 510112b62bSMark Brown { 6, 0x01C8 }, /* R6 - Clocking (1) */ 520112b62bSMark Brown { 7, 0x0000 }, /* R7 - Clocking (2) */ 530112b62bSMark Brown { 8, 0x0040 }, /* R8 - Audio Interface (3) */ 540112b62bSMark Brown { 9, 0x0040 }, /* R9 - Audio Interface (4) */ 550112b62bSMark Brown { 10, 0x0004 }, /* R10 - DAC CTRL */ 560112b62bSMark Brown { 11, 0x00C0 }, /* R11 - Left DAC Digital Volume */ 570112b62bSMark Brown { 12, 0x00C0 }, /* R12 - Right DAC Digital Volume */ 580112b62bSMark Brown { 13, 0x0000 }, /* R13 - Digital Side Tone */ 590112b62bSMark Brown { 14, 0x0100 }, /* R14 - ADC CTRL */ 600112b62bSMark Brown { 15, 0x00C0 }, /* R15 - Left ADC Digital Volume */ 610112b62bSMark Brown { 16, 0x00C0 }, /* R16 - Right ADC Digital Volume */ 620112b62bSMark Brown 630112b62bSMark Brown { 18, 0x0000 }, /* R18 - GPIO CTRL 1 */ 640112b62bSMark Brown { 19, 0x1000 }, /* R19 - GPIO1 & GPIO2 */ 650112b62bSMark Brown { 20, 0x1010 }, /* R20 - GPIO3 & GPIO4 */ 660112b62bSMark Brown { 21, 0x1010 }, /* R21 - GPIO5 & GPIO6 */ 670112b62bSMark Brown { 22, 0x8000 }, /* R22 - GPIOCTRL 2 */ 680112b62bSMark Brown { 23, 0x0800 }, /* R23 - GPIO_POL */ 690112b62bSMark Brown { 24, 0x008B }, /* R24 - Left Line Input 1&2 Volume */ 700112b62bSMark Brown { 25, 0x008B }, /* R25 - Left Line Input 3&4 Volume */ 710112b62bSMark Brown { 26, 0x008B }, /* R26 - Right Line Input 1&2 Volume */ 720112b62bSMark Brown { 27, 0x008B }, /* R27 - Right Line Input 3&4 Volume */ 730112b62bSMark Brown { 28, 0x0000 }, /* R28 - Left Output Volume */ 740112b62bSMark Brown { 29, 0x0000 }, /* R29 - Right Output Volume */ 750112b62bSMark Brown { 30, 0x0066 }, /* R30 - Line Outputs Volume */ 760112b62bSMark Brown { 31, 0x0022 }, /* R31 - Out3/4 Volume */ 770112b62bSMark Brown { 32, 0x0079 }, /* R32 - Left OPGA Volume */ 780112b62bSMark Brown { 33, 0x0079 }, /* R33 - Right OPGA Volume */ 790112b62bSMark Brown { 34, 0x0003 }, /* R34 - Speaker Volume */ 800112b62bSMark Brown { 35, 0x0003 }, /* R35 - ClassD1 */ 810112b62bSMark Brown 820112b62bSMark Brown { 37, 0x0100 }, /* R37 - ClassD3 */ 830112b62bSMark Brown { 38, 0x0079 }, /* R38 - ClassD4 */ 840112b62bSMark Brown { 39, 0x0000 }, /* R39 - Input Mixer1 */ 850112b62bSMark Brown { 40, 0x0000 }, /* R40 - Input Mixer2 */ 860112b62bSMark Brown { 41, 0x0000 }, /* R41 - Input Mixer3 */ 870112b62bSMark Brown { 42, 0x0000 }, /* R42 - Input Mixer4 */ 880112b62bSMark Brown { 43, 0x0000 }, /* R43 - Input Mixer5 */ 890112b62bSMark Brown { 44, 0x0000 }, /* R44 - Input Mixer6 */ 900112b62bSMark Brown { 45, 0x0000 }, /* R45 - Output Mixer1 */ 910112b62bSMark Brown { 46, 0x0000 }, /* R46 - Output Mixer2 */ 920112b62bSMark Brown { 47, 0x0000 }, /* R47 - Output Mixer3 */ 930112b62bSMark Brown { 48, 0x0000 }, /* R48 - Output Mixer4 */ 940112b62bSMark Brown { 49, 0x0000 }, /* R49 - Output Mixer5 */ 950112b62bSMark Brown { 50, 0x0000 }, /* R50 - Output Mixer6 */ 960112b62bSMark Brown { 51, 0x0180 }, /* R51 - Out3/4 Mixer */ 970112b62bSMark Brown { 52, 0x0000 }, /* R52 - Line Mixer1 */ 980112b62bSMark Brown { 53, 0x0000 }, /* R53 - Line Mixer2 */ 990112b62bSMark Brown { 54, 0x0000 }, /* R54 - Speaker Mixer */ 1000112b62bSMark Brown { 55, 0x0000 }, /* R55 - Additional Control */ 1010112b62bSMark Brown { 56, 0x0000 }, /* R56 - AntiPOP1 */ 1020112b62bSMark Brown { 57, 0x0000 }, /* R57 - AntiPOP2 */ 1030112b62bSMark Brown { 58, 0x0000 }, /* R58 - MICBIAS */ 1040112b62bSMark Brown 1050112b62bSMark Brown { 60, 0x0008 }, /* R60 - PLL1 */ 1060112b62bSMark Brown { 61, 0x0031 }, /* R61 - PLL2 */ 1070112b62bSMark Brown { 62, 0x0026 }, /* R62 - PLL3 */ 108f10485e7SMark Brown }; 109f10485e7SMark Brown 11051bef5c6SKuninori Morimoto #define wm8990_reset(c) snd_soc_component_write(c, WM8990_RESET, 0) 111f10485e7SMark Brown 112021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 600, 0); 113f10485e7SMark Brown 114021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(in_pga_tlv, -1650, 3000, 0); 115f10485e7SMark Brown 116021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(out_mix_tlv, 0, -2100, 0); 117f10485e7SMark Brown 118021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(out_pga_tlv, -7300, 600, 0); 119f10485e7SMark Brown 120021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(out_omix_tlv, -600, 0, 0); 121f10485e7SMark Brown 122021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(out_dac_tlv, -7163, 0, 0); 123f10485e7SMark Brown 124021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(in_adc_tlv, -7163, 1763, 0); 125f10485e7SMark Brown 126021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(out_sidetone_tlv, -3600, 0, 0); 127f10485e7SMark Brown 128f10485e7SMark Brown static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol, 129f10485e7SMark Brown struct snd_ctl_elem_value *ucontrol) 130f10485e7SMark Brown { 13151bef5c6SKuninori Morimoto struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 132397d5aeeSJarkko Nikula struct soc_mixer_control *mc = 133397d5aeeSJarkko Nikula (struct soc_mixer_control *)kcontrol->private_value; 134397d5aeeSJarkko Nikula int reg = mc->reg; 135f10485e7SMark Brown int ret; 136f10485e7SMark Brown u16 val; 137f10485e7SMark Brown 138f10485e7SMark Brown ret = snd_soc_put_volsw(kcontrol, ucontrol); 139f10485e7SMark Brown if (ret < 0) 140f10485e7SMark Brown return ret; 141f10485e7SMark Brown 142f10485e7SMark Brown /* now hit the volume update bits (always bit 8) */ 14351bef5c6SKuninori Morimoto val = snd_soc_component_read32(component, reg); 14451bef5c6SKuninori Morimoto return snd_soc_component_write(component, reg, val | 0x0100); 145f10485e7SMark Brown } 146f10485e7SMark Brown 147f10485e7SMark Brown #define SOC_WM899X_OUTPGA_SINGLE_R_TLV(xname, reg, shift, max, invert,\ 148fc99adc3SLars-Peter Clausen tlv_array) \ 149fc99adc3SLars-Peter Clausen SOC_SINGLE_EXT_TLV(xname, reg, shift, max, invert, \ 150fc99adc3SLars-Peter Clausen snd_soc_get_volsw, wm899x_outpga_put_volsw_vu, tlv_array) 151f10485e7SMark Brown 152f10485e7SMark Brown 153f10485e7SMark Brown static const char *wm8990_digital_sidetone[] = 154f10485e7SMark Brown {"None", "Left ADC", "Right ADC", "Reserved"}; 155f10485e7SMark Brown 156830b5011STakashi Iwai static SOC_ENUM_SINGLE_DECL(wm8990_left_digital_sidetone_enum, 157830b5011STakashi Iwai WM8990_DIGITAL_SIDE_TONE, 158f10485e7SMark Brown WM8990_ADC_TO_DACL_SHIFT, 159f10485e7SMark Brown wm8990_digital_sidetone); 160f10485e7SMark Brown 161830b5011STakashi Iwai static SOC_ENUM_SINGLE_DECL(wm8990_right_digital_sidetone_enum, 162830b5011STakashi Iwai WM8990_DIGITAL_SIDE_TONE, 163f10485e7SMark Brown WM8990_ADC_TO_DACR_SHIFT, 164f10485e7SMark Brown wm8990_digital_sidetone); 165f10485e7SMark Brown 166f10485e7SMark Brown static const char *wm8990_adcmode[] = 167f10485e7SMark Brown {"Hi-fi mode", "Voice mode 1", "Voice mode 2", "Voice mode 3"}; 168f10485e7SMark Brown 169830b5011STakashi Iwai static SOC_ENUM_SINGLE_DECL(wm8990_right_adcmode_enum, 170830b5011STakashi Iwai WM8990_ADC_CTRL, 171f10485e7SMark Brown WM8990_ADC_HPF_CUT_SHIFT, 172f10485e7SMark Brown wm8990_adcmode); 173f10485e7SMark Brown 174f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_snd_controls[] = { 175f10485e7SMark Brown /* INMIXL */ 176f10485e7SMark Brown SOC_SINGLE("LIN12 PGA Boost", WM8990_INPUT_MIXER3, WM8990_L12MNBST_BIT, 1, 0), 177f10485e7SMark Brown SOC_SINGLE("LIN34 PGA Boost", WM8990_INPUT_MIXER3, WM8990_L34MNBST_BIT, 1, 0), 178f10485e7SMark Brown /* INMIXR */ 179f10485e7SMark Brown SOC_SINGLE("RIN12 PGA Boost", WM8990_INPUT_MIXER3, WM8990_R12MNBST_BIT, 1, 0), 180f10485e7SMark Brown SOC_SINGLE("RIN34 PGA Boost", WM8990_INPUT_MIXER3, WM8990_R34MNBST_BIT, 1, 0), 181f10485e7SMark Brown 182f10485e7SMark Brown /* LOMIX */ 183f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER3, 184f10485e7SMark Brown WM8990_LLI3LOVOL_SHIFT, WM8990_LLI3LOVOL_MASK, 1, out_mix_tlv), 185f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3, 186f10485e7SMark Brown WM8990_LR12LOVOL_SHIFT, WM8990_LR12LOVOL_MASK, 1, out_mix_tlv), 187f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3, 188f10485e7SMark Brown WM8990_LL12LOVOL_SHIFT, WM8990_LL12LOVOL_MASK, 1, out_mix_tlv), 189f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER5, 190f10485e7SMark Brown WM8990_LRI3LOVOL_SHIFT, WM8990_LRI3LOVOL_MASK, 1, out_mix_tlv), 191f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8990_OUTPUT_MIXER5, 192f10485e7SMark Brown WM8990_LRBLOVOL_SHIFT, WM8990_LRBLOVOL_MASK, 1, out_mix_tlv), 193f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8990_OUTPUT_MIXER5, 194f10485e7SMark Brown WM8990_LRBLOVOL_SHIFT, WM8990_LRBLOVOL_MASK, 1, out_mix_tlv), 195f10485e7SMark Brown 196f10485e7SMark Brown /* ROMIX */ 197f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER4, 198f10485e7SMark Brown WM8990_RRI3ROVOL_SHIFT, WM8990_RRI3ROVOL_MASK, 1, out_mix_tlv), 199f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4, 200f10485e7SMark Brown WM8990_RL12ROVOL_SHIFT, WM8990_RL12ROVOL_MASK, 1, out_mix_tlv), 201f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4, 202f10485e7SMark Brown WM8990_RR12ROVOL_SHIFT, WM8990_RR12ROVOL_MASK, 1, out_mix_tlv), 203f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER6, 204f10485e7SMark Brown WM8990_RLI3ROVOL_SHIFT, WM8990_RLI3ROVOL_MASK, 1, out_mix_tlv), 205f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX AINLMUX Bypass Volume", WM8990_OUTPUT_MIXER6, 206f10485e7SMark Brown WM8990_RLBROVOL_SHIFT, WM8990_RLBROVOL_MASK, 1, out_mix_tlv), 207f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX AINRMUX Bypass Volume", WM8990_OUTPUT_MIXER6, 208f10485e7SMark Brown WM8990_RRBROVOL_SHIFT, WM8990_RRBROVOL_MASK, 1, out_mix_tlv), 209f10485e7SMark Brown 210f10485e7SMark Brown /* LOUT */ 211f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOUT Volume", WM8990_LEFT_OUTPUT_VOLUME, 212f10485e7SMark Brown WM8990_LOUTVOL_SHIFT, WM8990_LOUTVOL_MASK, 0, out_pga_tlv), 213f10485e7SMark Brown SOC_SINGLE("LOUT ZC", WM8990_LEFT_OUTPUT_VOLUME, WM8990_LOZC_BIT, 1, 0), 214f10485e7SMark Brown 215f10485e7SMark Brown /* ROUT */ 216f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROUT Volume", WM8990_RIGHT_OUTPUT_VOLUME, 217f10485e7SMark Brown WM8990_ROUTVOL_SHIFT, WM8990_ROUTVOL_MASK, 0, out_pga_tlv), 218f10485e7SMark Brown SOC_SINGLE("ROUT ZC", WM8990_RIGHT_OUTPUT_VOLUME, WM8990_ROZC_BIT, 1, 0), 219f10485e7SMark Brown 220f10485e7SMark Brown /* LOPGA */ 221f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOPGA Volume", WM8990_LEFT_OPGA_VOLUME, 222f10485e7SMark Brown WM8990_LOPGAVOL_SHIFT, WM8990_LOPGAVOL_MASK, 0, out_pga_tlv), 223f10485e7SMark Brown SOC_SINGLE("LOPGA ZC Switch", WM8990_LEFT_OPGA_VOLUME, 224f10485e7SMark Brown WM8990_LOPGAZC_BIT, 1, 0), 225f10485e7SMark Brown 226f10485e7SMark Brown /* ROPGA */ 227f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROPGA Volume", WM8990_RIGHT_OPGA_VOLUME, 228f10485e7SMark Brown WM8990_ROPGAVOL_SHIFT, WM8990_ROPGAVOL_MASK, 0, out_pga_tlv), 229f10485e7SMark Brown SOC_SINGLE("ROPGA ZC Switch", WM8990_RIGHT_OPGA_VOLUME, 230f10485e7SMark Brown WM8990_ROPGAZC_BIT, 1, 0), 231f10485e7SMark Brown 232f10485e7SMark Brown SOC_SINGLE("LON Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, 233f10485e7SMark Brown WM8990_LONMUTE_BIT, 1, 0), 234f10485e7SMark Brown SOC_SINGLE("LOP Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, 235f10485e7SMark Brown WM8990_LOPMUTE_BIT, 1, 0), 236f10485e7SMark Brown SOC_SINGLE("LOP Attenuation Switch", WM8990_LINE_OUTPUTS_VOLUME, 237f10485e7SMark Brown WM8990_LOATTN_BIT, 1, 0), 238f10485e7SMark Brown SOC_SINGLE("RON Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, 239f10485e7SMark Brown WM8990_RONMUTE_BIT, 1, 0), 240f10485e7SMark Brown SOC_SINGLE("ROP Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, 241f10485e7SMark Brown WM8990_ROPMUTE_BIT, 1, 0), 242f10485e7SMark Brown SOC_SINGLE("ROP Attenuation Switch", WM8990_LINE_OUTPUTS_VOLUME, 243f10485e7SMark Brown WM8990_ROATTN_BIT, 1, 0), 244f10485e7SMark Brown 245f10485e7SMark Brown SOC_SINGLE("OUT3 Mute Switch", WM8990_OUT3_4_VOLUME, 246f10485e7SMark Brown WM8990_OUT3MUTE_BIT, 1, 0), 247f10485e7SMark Brown SOC_SINGLE("OUT3 Attenuation Switch", WM8990_OUT3_4_VOLUME, 248f10485e7SMark Brown WM8990_OUT3ATTN_BIT, 1, 0), 249f10485e7SMark Brown 250f10485e7SMark Brown SOC_SINGLE("OUT4 Mute Switch", WM8990_OUT3_4_VOLUME, 251f10485e7SMark Brown WM8990_OUT4MUTE_BIT, 1, 0), 252f10485e7SMark Brown SOC_SINGLE("OUT4 Attenuation Switch", WM8990_OUT3_4_VOLUME, 253f10485e7SMark Brown WM8990_OUT4ATTN_BIT, 1, 0), 254f10485e7SMark Brown 255f10485e7SMark Brown SOC_SINGLE("Speaker Mode Switch", WM8990_CLASSD1, 256f10485e7SMark Brown WM8990_CDMODE_BIT, 1, 0), 257f10485e7SMark Brown 258f10485e7SMark Brown SOC_SINGLE("Speaker Output Attenuation Volume", WM8990_SPEAKER_VOLUME, 25997bb8129SMark Brown WM8990_SPKATTN_SHIFT, WM8990_SPKATTN_MASK, 0), 260f10485e7SMark Brown SOC_SINGLE("Speaker DC Boost Volume", WM8990_CLASSD3, 261f10485e7SMark Brown WM8990_DCGAIN_SHIFT, WM8990_DCGAIN_MASK, 0), 262f10485e7SMark Brown SOC_SINGLE("Speaker AC Boost Volume", WM8990_CLASSD3, 263f10485e7SMark Brown WM8990_ACGAIN_SHIFT, WM8990_ACGAIN_MASK, 0), 26497bb8129SMark Brown SOC_SINGLE_TLV("Speaker Volume", WM8990_CLASSD4, 26597bb8129SMark Brown WM8990_SPKVOL_SHIFT, WM8990_SPKVOL_MASK, 0, out_pga_tlv), 26697bb8129SMark Brown SOC_SINGLE("Speaker ZC Switch", WM8990_CLASSD4, 26797bb8129SMark Brown WM8990_SPKZC_SHIFT, WM8990_SPKZC_MASK, 0), 268f10485e7SMark Brown 269f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left DAC Digital Volume", 270f10485e7SMark Brown WM8990_LEFT_DAC_DIGITAL_VOLUME, 271f10485e7SMark Brown WM8990_DACL_VOL_SHIFT, 272f10485e7SMark Brown WM8990_DACL_VOL_MASK, 273f10485e7SMark Brown 0, 274f10485e7SMark Brown out_dac_tlv), 275f10485e7SMark Brown 276f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right DAC Digital Volume", 277f10485e7SMark Brown WM8990_RIGHT_DAC_DIGITAL_VOLUME, 278f10485e7SMark Brown WM8990_DACR_VOL_SHIFT, 279f10485e7SMark Brown WM8990_DACR_VOL_MASK, 280f10485e7SMark Brown 0, 281f10485e7SMark Brown out_dac_tlv), 282f10485e7SMark Brown 283f10485e7SMark Brown SOC_ENUM("Left Digital Sidetone", wm8990_left_digital_sidetone_enum), 284f10485e7SMark Brown SOC_ENUM("Right Digital Sidetone", wm8990_right_digital_sidetone_enum), 285f10485e7SMark Brown 286f10485e7SMark Brown SOC_SINGLE_TLV("Left Digital Sidetone Volume", WM8990_DIGITAL_SIDE_TONE, 287f10485e7SMark Brown WM8990_ADCL_DAC_SVOL_SHIFT, WM8990_ADCL_DAC_SVOL_MASK, 0, 288f10485e7SMark Brown out_sidetone_tlv), 289f10485e7SMark Brown SOC_SINGLE_TLV("Right Digital Sidetone Volume", WM8990_DIGITAL_SIDE_TONE, 290f10485e7SMark Brown WM8990_ADCR_DAC_SVOL_SHIFT, WM8990_ADCR_DAC_SVOL_MASK, 0, 291f10485e7SMark Brown out_sidetone_tlv), 292f10485e7SMark Brown 293f10485e7SMark Brown SOC_SINGLE("ADC Digital High Pass Filter Switch", WM8990_ADC_CTRL, 294f10485e7SMark Brown WM8990_ADC_HPF_ENA_BIT, 1, 0), 295f10485e7SMark Brown 296f10485e7SMark Brown SOC_ENUM("ADC HPF Mode", wm8990_right_adcmode_enum), 297f10485e7SMark Brown 298f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left ADC Digital Volume", 299f10485e7SMark Brown WM8990_LEFT_ADC_DIGITAL_VOLUME, 300f10485e7SMark Brown WM8990_ADCL_VOL_SHIFT, 301f10485e7SMark Brown WM8990_ADCL_VOL_MASK, 302f10485e7SMark Brown 0, 303f10485e7SMark Brown in_adc_tlv), 304f10485e7SMark Brown 305f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right ADC Digital Volume", 306f10485e7SMark Brown WM8990_RIGHT_ADC_DIGITAL_VOLUME, 307f10485e7SMark Brown WM8990_ADCR_VOL_SHIFT, 308f10485e7SMark Brown WM8990_ADCR_VOL_MASK, 309f10485e7SMark Brown 0, 310f10485e7SMark Brown in_adc_tlv), 311f10485e7SMark Brown 312f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN12 Volume", 313f10485e7SMark Brown WM8990_LEFT_LINE_INPUT_1_2_VOLUME, 314f10485e7SMark Brown WM8990_LIN12VOL_SHIFT, 315f10485e7SMark Brown WM8990_LIN12VOL_MASK, 316f10485e7SMark Brown 0, 317f10485e7SMark Brown in_pga_tlv), 318f10485e7SMark Brown 319f10485e7SMark Brown SOC_SINGLE("LIN12 ZC Switch", WM8990_LEFT_LINE_INPUT_1_2_VOLUME, 320f10485e7SMark Brown WM8990_LI12ZC_BIT, 1, 0), 321f10485e7SMark Brown 322f10485e7SMark Brown SOC_SINGLE("LIN12 Mute Switch", WM8990_LEFT_LINE_INPUT_1_2_VOLUME, 323f10485e7SMark Brown WM8990_LI12MUTE_BIT, 1, 0), 324f10485e7SMark Brown 325f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN34 Volume", 326f10485e7SMark Brown WM8990_LEFT_LINE_INPUT_3_4_VOLUME, 327f10485e7SMark Brown WM8990_LIN34VOL_SHIFT, 328f10485e7SMark Brown WM8990_LIN34VOL_MASK, 329f10485e7SMark Brown 0, 330f10485e7SMark Brown in_pga_tlv), 331f10485e7SMark Brown 332f10485e7SMark Brown SOC_SINGLE("LIN34 ZC Switch", WM8990_LEFT_LINE_INPUT_3_4_VOLUME, 333f10485e7SMark Brown WM8990_LI34ZC_BIT, 1, 0), 334f10485e7SMark Brown 335f10485e7SMark Brown SOC_SINGLE("LIN34 Mute Switch", WM8990_LEFT_LINE_INPUT_3_4_VOLUME, 336f10485e7SMark Brown WM8990_LI34MUTE_BIT, 1, 0), 337f10485e7SMark Brown 338f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN12 Volume", 339f10485e7SMark Brown WM8990_RIGHT_LINE_INPUT_1_2_VOLUME, 340f10485e7SMark Brown WM8990_RIN12VOL_SHIFT, 341f10485e7SMark Brown WM8990_RIN12VOL_MASK, 342f10485e7SMark Brown 0, 343f10485e7SMark Brown in_pga_tlv), 344f10485e7SMark Brown 345f10485e7SMark Brown SOC_SINGLE("RIN12 ZC Switch", WM8990_RIGHT_LINE_INPUT_1_2_VOLUME, 346f10485e7SMark Brown WM8990_RI12ZC_BIT, 1, 0), 347f10485e7SMark Brown 348f10485e7SMark Brown SOC_SINGLE("RIN12 Mute Switch", WM8990_RIGHT_LINE_INPUT_1_2_VOLUME, 349f10485e7SMark Brown WM8990_RI12MUTE_BIT, 1, 0), 350f10485e7SMark Brown 351f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN34 Volume", 352f10485e7SMark Brown WM8990_RIGHT_LINE_INPUT_3_4_VOLUME, 353f10485e7SMark Brown WM8990_RIN34VOL_SHIFT, 354f10485e7SMark Brown WM8990_RIN34VOL_MASK, 355f10485e7SMark Brown 0, 356f10485e7SMark Brown in_pga_tlv), 357f10485e7SMark Brown 358f10485e7SMark Brown SOC_SINGLE("RIN34 ZC Switch", WM8990_RIGHT_LINE_INPUT_3_4_VOLUME, 359f10485e7SMark Brown WM8990_RI34ZC_BIT, 1, 0), 360f10485e7SMark Brown 361f10485e7SMark Brown SOC_SINGLE("RIN34 Mute Switch", WM8990_RIGHT_LINE_INPUT_3_4_VOLUME, 362f10485e7SMark Brown WM8990_RI34MUTE_BIT, 1, 0), 363f10485e7SMark Brown 364f10485e7SMark Brown }; 365f10485e7SMark Brown 366f10485e7SMark Brown /* 367f10485e7SMark Brown * _DAPM_ Controls 368f10485e7SMark Brown */ 369f10485e7SMark Brown 370f10485e7SMark Brown static int outmixer_event(struct snd_soc_dapm_widget *w, 371f10485e7SMark Brown struct snd_kcontrol *kcontrol, int event) 372f10485e7SMark Brown { 37351bef5c6SKuninori Morimoto struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 374f10485e7SMark Brown u32 reg_shift = kcontrol->private_value & 0xfff; 375f10485e7SMark Brown int ret = 0; 376f10485e7SMark Brown u16 reg; 377f10485e7SMark Brown 378f10485e7SMark Brown switch (reg_shift) { 379f10485e7SMark Brown case WM8990_SPEAKER_MIXER | (WM8990_LDSPK_BIT << 8) : 38051bef5c6SKuninori Morimoto reg = snd_soc_component_read32(component, WM8990_OUTPUT_MIXER1); 381f10485e7SMark Brown if (reg & WM8990_LDLO) { 382f10485e7SMark Brown printk(KERN_WARNING 383f10485e7SMark Brown "Cannot set as Output Mixer 1 LDLO Set\n"); 384f10485e7SMark Brown ret = -1; 385f10485e7SMark Brown } 386f10485e7SMark Brown break; 387f10485e7SMark Brown case WM8990_SPEAKER_MIXER | (WM8990_RDSPK_BIT << 8): 38851bef5c6SKuninori Morimoto reg = snd_soc_component_read32(component, WM8990_OUTPUT_MIXER2); 389f10485e7SMark Brown if (reg & WM8990_RDRO) { 390f10485e7SMark Brown printk(KERN_WARNING 391f10485e7SMark Brown "Cannot set as Output Mixer 2 RDRO Set\n"); 392f10485e7SMark Brown ret = -1; 393f10485e7SMark Brown } 394f10485e7SMark Brown break; 395f10485e7SMark Brown case WM8990_OUTPUT_MIXER1 | (WM8990_LDLO_BIT << 8): 39651bef5c6SKuninori Morimoto reg = snd_soc_component_read32(component, WM8990_SPEAKER_MIXER); 397f10485e7SMark Brown if (reg & WM8990_LDSPK) { 398f10485e7SMark Brown printk(KERN_WARNING 399f10485e7SMark Brown "Cannot set as Speaker Mixer LDSPK Set\n"); 400f10485e7SMark Brown ret = -1; 401f10485e7SMark Brown } 402f10485e7SMark Brown break; 403f10485e7SMark Brown case WM8990_OUTPUT_MIXER2 | (WM8990_RDRO_BIT << 8): 40451bef5c6SKuninori Morimoto reg = snd_soc_component_read32(component, WM8990_SPEAKER_MIXER); 405f10485e7SMark Brown if (reg & WM8990_RDSPK) { 406f10485e7SMark Brown printk(KERN_WARNING 407f10485e7SMark Brown "Cannot set as Speaker Mixer RDSPK Set\n"); 408f10485e7SMark Brown ret = -1; 409f10485e7SMark Brown } 410f10485e7SMark Brown break; 411f10485e7SMark Brown } 412f10485e7SMark Brown 413f10485e7SMark Brown return ret; 414f10485e7SMark Brown } 415f10485e7SMark Brown 416f10485e7SMark Brown /* INMIX dB values */ 417dfd0eddaSLars-Peter Clausen static const DECLARE_TLV_DB_SCALE(in_mix_tlv, -1200, 600, 0); 418f10485e7SMark Brown 419f10485e7SMark Brown /* Left In PGA Connections */ 420f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lin12_pga_controls[] = { 421f10485e7SMark Brown SOC_DAPM_SINGLE("LIN1 Switch", WM8990_INPUT_MIXER2, WM8990_LMN1_BIT, 1, 0), 422f10485e7SMark Brown SOC_DAPM_SINGLE("LIN2 Switch", WM8990_INPUT_MIXER2, WM8990_LMP2_BIT, 1, 0), 423f10485e7SMark Brown }; 424f10485e7SMark Brown 425f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lin34_pga_controls[] = { 426f10485e7SMark Brown SOC_DAPM_SINGLE("LIN3 Switch", WM8990_INPUT_MIXER2, WM8990_LMN3_BIT, 1, 0), 427f10485e7SMark Brown SOC_DAPM_SINGLE("LIN4 Switch", WM8990_INPUT_MIXER2, WM8990_LMP4_BIT, 1, 0), 428f10485e7SMark Brown }; 429f10485e7SMark Brown 430f10485e7SMark Brown /* Right In PGA Connections */ 431f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_rin12_pga_controls[] = { 432f10485e7SMark Brown SOC_DAPM_SINGLE("RIN1 Switch", WM8990_INPUT_MIXER2, WM8990_RMN1_BIT, 1, 0), 433f10485e7SMark Brown SOC_DAPM_SINGLE("RIN2 Switch", WM8990_INPUT_MIXER2, WM8990_RMP2_BIT, 1, 0), 434f10485e7SMark Brown }; 435f10485e7SMark Brown 436f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_rin34_pga_controls[] = { 437f10485e7SMark Brown SOC_DAPM_SINGLE("RIN3 Switch", WM8990_INPUT_MIXER2, WM8990_RMN3_BIT, 1, 0), 438f10485e7SMark Brown SOC_DAPM_SINGLE("RIN4 Switch", WM8990_INPUT_MIXER2, WM8990_RMP4_BIT, 1, 0), 439f10485e7SMark Brown }; 440f10485e7SMark Brown 441f10485e7SMark Brown /* INMIXL */ 442f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_inmixl_controls[] = { 443f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("Record Left Volume", WM8990_INPUT_MIXER3, 444f10485e7SMark Brown WM8990_LDBVOL_SHIFT, WM8990_LDBVOL_MASK, 0, in_mix_tlv), 445f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("LIN2 Volume", WM8990_INPUT_MIXER5, WM8990_LI2BVOL_SHIFT, 446f10485e7SMark Brown 7, 0, in_mix_tlv), 447f10485e7SMark Brown SOC_DAPM_SINGLE("LINPGA12 Switch", WM8990_INPUT_MIXER3, WM8990_L12MNB_BIT, 448f10485e7SMark Brown 1, 0), 449f10485e7SMark Brown SOC_DAPM_SINGLE("LINPGA34 Switch", WM8990_INPUT_MIXER3, WM8990_L34MNB_BIT, 450f10485e7SMark Brown 1, 0), 451f10485e7SMark Brown }; 452f10485e7SMark Brown 453f10485e7SMark Brown /* INMIXR */ 454f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_inmixr_controls[] = { 455f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("Record Right Volume", WM8990_INPUT_MIXER4, 456f10485e7SMark Brown WM8990_RDBVOL_SHIFT, WM8990_RDBVOL_MASK, 0, in_mix_tlv), 457f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("RIN2 Volume", WM8990_INPUT_MIXER6, WM8990_RI2BVOL_SHIFT, 458f10485e7SMark Brown 7, 0, in_mix_tlv), 459f10485e7SMark Brown SOC_DAPM_SINGLE("RINPGA12 Switch", WM8990_INPUT_MIXER3, WM8990_L12MNB_BIT, 460f10485e7SMark Brown 1, 0), 461f10485e7SMark Brown SOC_DAPM_SINGLE("RINPGA34 Switch", WM8990_INPUT_MIXER3, WM8990_L34MNB_BIT, 462f10485e7SMark Brown 1, 0), 463f10485e7SMark Brown }; 464f10485e7SMark Brown 465f10485e7SMark Brown /* AINLMUX */ 466f10485e7SMark Brown static const char *wm8990_ainlmux[] = 467f10485e7SMark Brown {"INMIXL Mix", "RXVOICE Mix", "DIFFINL Mix"}; 468f10485e7SMark Brown 469830b5011STakashi Iwai static SOC_ENUM_SINGLE_DECL(wm8990_ainlmux_enum, 470830b5011STakashi Iwai WM8990_INPUT_MIXER1, WM8990_AINLMODE_SHIFT, 471830b5011STakashi Iwai wm8990_ainlmux); 472f10485e7SMark Brown 473f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_ainlmux_controls = 474f10485e7SMark Brown SOC_DAPM_ENUM("Route", wm8990_ainlmux_enum); 475f10485e7SMark Brown 476f10485e7SMark Brown /* DIFFINL */ 477f10485e7SMark Brown 478f10485e7SMark Brown /* AINRMUX */ 479f10485e7SMark Brown static const char *wm8990_ainrmux[] = 480f10485e7SMark Brown {"INMIXR Mix", "RXVOICE Mix", "DIFFINR Mix"}; 481f10485e7SMark Brown 482830b5011STakashi Iwai static SOC_ENUM_SINGLE_DECL(wm8990_ainrmux_enum, 483830b5011STakashi Iwai WM8990_INPUT_MIXER1, WM8990_AINRMODE_SHIFT, 484830b5011STakashi Iwai wm8990_ainrmux); 485f10485e7SMark Brown 486f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_ainrmux_controls = 487f10485e7SMark Brown SOC_DAPM_ENUM("Route", wm8990_ainrmux_enum); 488f10485e7SMark Brown 489f10485e7SMark Brown /* RXVOICE */ 490f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_rxvoice_controls[] = { 491f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("LIN4/RXN", WM8990_INPUT_MIXER5, WM8990_LR4BVOL_SHIFT, 492f10485e7SMark Brown WM8990_LR4BVOL_MASK, 0, in_mix_tlv), 493f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("RIN4/RXP", WM8990_INPUT_MIXER6, WM8990_RL4BVOL_SHIFT, 494f10485e7SMark Brown WM8990_RL4BVOL_MASK, 0, in_mix_tlv), 495f10485e7SMark Brown }; 496f10485e7SMark Brown 497f10485e7SMark Brown /* LOMIX */ 498f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lomix_controls[] = { 499f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX Right ADC Bypass Switch", WM8990_OUTPUT_MIXER1, 500f10485e7SMark Brown WM8990_LRBLO_BIT, 1, 0), 501f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX Left ADC Bypass Switch", WM8990_OUTPUT_MIXER1, 502f10485e7SMark Brown WM8990_LLBLO_BIT, 1, 0), 503f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX RIN3 Bypass Switch", WM8990_OUTPUT_MIXER1, 504f10485e7SMark Brown WM8990_LRI3LO_BIT, 1, 0), 505f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX LIN3 Bypass Switch", WM8990_OUTPUT_MIXER1, 506f10485e7SMark Brown WM8990_LLI3LO_BIT, 1, 0), 507f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX RIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER1, 508f10485e7SMark Brown WM8990_LR12LO_BIT, 1, 0), 509f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX LIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER1, 510f10485e7SMark Brown WM8990_LL12LO_BIT, 1, 0), 511f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX Left DAC Switch", WM8990_OUTPUT_MIXER1, 512f10485e7SMark Brown WM8990_LDLO_BIT, 1, 0), 513f10485e7SMark Brown }; 514f10485e7SMark Brown 515f10485e7SMark Brown /* ROMIX */ 516f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_romix_controls[] = { 517f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX Left ADC Bypass Switch", WM8990_OUTPUT_MIXER2, 518f10485e7SMark Brown WM8990_RLBRO_BIT, 1, 0), 519f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX Right ADC Bypass Switch", WM8990_OUTPUT_MIXER2, 520f10485e7SMark Brown WM8990_RRBRO_BIT, 1, 0), 521f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX LIN3 Bypass Switch", WM8990_OUTPUT_MIXER2, 522f10485e7SMark Brown WM8990_RLI3RO_BIT, 1, 0), 523f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX RIN3 Bypass Switch", WM8990_OUTPUT_MIXER2, 524f10485e7SMark Brown WM8990_RRI3RO_BIT, 1, 0), 525f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX LIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER2, 526f10485e7SMark Brown WM8990_RL12RO_BIT, 1, 0), 527f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX RIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER2, 528f10485e7SMark Brown WM8990_RR12RO_BIT, 1, 0), 529f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX Right DAC Switch", WM8990_OUTPUT_MIXER2, 530f10485e7SMark Brown WM8990_RDRO_BIT, 1, 0), 531f10485e7SMark Brown }; 532f10485e7SMark Brown 533f10485e7SMark Brown /* LONMIX */ 534f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lonmix_controls[] = { 535f10485e7SMark Brown SOC_DAPM_SINGLE("LONMIX Left Mixer PGA Switch", WM8990_LINE_MIXER1, 536f10485e7SMark Brown WM8990_LLOPGALON_BIT, 1, 0), 537f10485e7SMark Brown SOC_DAPM_SINGLE("LONMIX Right Mixer PGA Switch", WM8990_LINE_MIXER1, 538f10485e7SMark Brown WM8990_LROPGALON_BIT, 1, 0), 539f10485e7SMark Brown SOC_DAPM_SINGLE("LONMIX Inverted LOP Switch", WM8990_LINE_MIXER1, 540f10485e7SMark Brown WM8990_LOPLON_BIT, 1, 0), 541f10485e7SMark Brown }; 542f10485e7SMark Brown 543f10485e7SMark Brown /* LOPMIX */ 544f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lopmix_controls[] = { 545f10485e7SMark Brown SOC_DAPM_SINGLE("LOPMIX Right Mic Bypass Switch", WM8990_LINE_MIXER1, 546f10485e7SMark Brown WM8990_LR12LOP_BIT, 1, 0), 547f10485e7SMark Brown SOC_DAPM_SINGLE("LOPMIX Left Mic Bypass Switch", WM8990_LINE_MIXER1, 548f10485e7SMark Brown WM8990_LL12LOP_BIT, 1, 0), 549f10485e7SMark Brown SOC_DAPM_SINGLE("LOPMIX Left Mixer PGA Switch", WM8990_LINE_MIXER1, 550f10485e7SMark Brown WM8990_LLOPGALOP_BIT, 1, 0), 551f10485e7SMark Brown }; 552f10485e7SMark Brown 553f10485e7SMark Brown /* RONMIX */ 554f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_ronmix_controls[] = { 555f10485e7SMark Brown SOC_DAPM_SINGLE("RONMIX Right Mixer PGA Switch", WM8990_LINE_MIXER2, 556f10485e7SMark Brown WM8990_RROPGARON_BIT, 1, 0), 557f10485e7SMark Brown SOC_DAPM_SINGLE("RONMIX Left Mixer PGA Switch", WM8990_LINE_MIXER2, 558f10485e7SMark Brown WM8990_RLOPGARON_BIT, 1, 0), 559f10485e7SMark Brown SOC_DAPM_SINGLE("RONMIX Inverted ROP Switch", WM8990_LINE_MIXER2, 560f10485e7SMark Brown WM8990_ROPRON_BIT, 1, 0), 561f10485e7SMark Brown }; 562f10485e7SMark Brown 563f10485e7SMark Brown /* ROPMIX */ 564f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_ropmix_controls[] = { 565f10485e7SMark Brown SOC_DAPM_SINGLE("ROPMIX Left Mic Bypass Switch", WM8990_LINE_MIXER2, 566f10485e7SMark Brown WM8990_RL12ROP_BIT, 1, 0), 567f10485e7SMark Brown SOC_DAPM_SINGLE("ROPMIX Right Mic Bypass Switch", WM8990_LINE_MIXER2, 568f10485e7SMark Brown WM8990_RR12ROP_BIT, 1, 0), 569f10485e7SMark Brown SOC_DAPM_SINGLE("ROPMIX Right Mixer PGA Switch", WM8990_LINE_MIXER2, 570f10485e7SMark Brown WM8990_RROPGAROP_BIT, 1, 0), 571f10485e7SMark Brown }; 572f10485e7SMark Brown 573f10485e7SMark Brown /* OUT3MIX */ 574f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_out3mix_controls[] = { 575f10485e7SMark Brown SOC_DAPM_SINGLE("OUT3MIX LIN4/RXP Bypass Switch", WM8990_OUT3_4_MIXER, 576f10485e7SMark Brown WM8990_LI4O3_BIT, 1, 0), 577f10485e7SMark Brown SOC_DAPM_SINGLE("OUT3MIX Left Out PGA Switch", WM8990_OUT3_4_MIXER, 578f10485e7SMark Brown WM8990_LPGAO3_BIT, 1, 0), 579f10485e7SMark Brown }; 580f10485e7SMark Brown 581f10485e7SMark Brown /* OUT4MIX */ 582f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_out4mix_controls[] = { 583f10485e7SMark Brown SOC_DAPM_SINGLE("OUT4MIX Right Out PGA Switch", WM8990_OUT3_4_MIXER, 584f10485e7SMark Brown WM8990_RPGAO4_BIT, 1, 0), 585f10485e7SMark Brown SOC_DAPM_SINGLE("OUT4MIX RIN4/RXP Bypass Switch", WM8990_OUT3_4_MIXER, 586f10485e7SMark Brown WM8990_RI4O4_BIT, 1, 0), 587f10485e7SMark Brown }; 588f10485e7SMark Brown 589f10485e7SMark Brown /* SPKMIX */ 590f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_spkmix_controls[] = { 591f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX LIN2 Bypass Switch", WM8990_SPEAKER_MIXER, 592f10485e7SMark Brown WM8990_LI2SPK_BIT, 1, 0), 593f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX LADC Bypass Switch", WM8990_SPEAKER_MIXER, 594f10485e7SMark Brown WM8990_LB2SPK_BIT, 1, 0), 595f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX Left Mixer PGA Switch", WM8990_SPEAKER_MIXER, 596f10485e7SMark Brown WM8990_LOPGASPK_BIT, 1, 0), 597f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX Left DAC Switch", WM8990_SPEAKER_MIXER, 598f10485e7SMark Brown WM8990_LDSPK_BIT, 1, 0), 599f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX Right DAC Switch", WM8990_SPEAKER_MIXER, 600f10485e7SMark Brown WM8990_RDSPK_BIT, 1, 0), 601f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX Right Mixer PGA Switch", WM8990_SPEAKER_MIXER, 602f10485e7SMark Brown WM8990_ROPGASPK_BIT, 1, 0), 603f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX RADC Bypass Switch", WM8990_SPEAKER_MIXER, 604f10485e7SMark Brown WM8990_RL12ROP_BIT, 1, 0), 605f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX RIN2 Bypass Switch", WM8990_SPEAKER_MIXER, 606f10485e7SMark Brown WM8990_RI2SPK_BIT, 1, 0), 607f10485e7SMark Brown }; 608f10485e7SMark Brown 609f10485e7SMark Brown static const struct snd_soc_dapm_widget wm8990_dapm_widgets[] = { 610f10485e7SMark Brown /* Input Side */ 611f10485e7SMark Brown /* Input Lines */ 612f10485e7SMark Brown SND_SOC_DAPM_INPUT("LIN1"), 613f10485e7SMark Brown SND_SOC_DAPM_INPUT("LIN2"), 614f10485e7SMark Brown SND_SOC_DAPM_INPUT("LIN3"), 615f10485e7SMark Brown SND_SOC_DAPM_INPUT("LIN4/RXN"), 616f10485e7SMark Brown SND_SOC_DAPM_INPUT("RIN3"), 617f10485e7SMark Brown SND_SOC_DAPM_INPUT("RIN4/RXP"), 618f10485e7SMark Brown SND_SOC_DAPM_INPUT("RIN1"), 619f10485e7SMark Brown SND_SOC_DAPM_INPUT("RIN2"), 620f10485e7SMark Brown SND_SOC_DAPM_INPUT("Internal ADC Source"), 621f10485e7SMark Brown 622d2fd5fe7SMark Brown SND_SOC_DAPM_SUPPLY("INL", WM8990_POWER_MANAGEMENT_2, WM8990_AINL_ENA_BIT, 0, 623d2fd5fe7SMark Brown NULL, 0), 624d2fd5fe7SMark Brown SND_SOC_DAPM_SUPPLY("INR", WM8990_POWER_MANAGEMENT_2, WM8990_AINR_ENA_BIT, 0, 625d2fd5fe7SMark Brown NULL, 0), 626d2fd5fe7SMark Brown 627f10485e7SMark Brown /* DACs */ 628f10485e7SMark Brown SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8990_POWER_MANAGEMENT_2, 629f10485e7SMark Brown WM8990_ADCL_ENA_BIT, 0), 630f10485e7SMark Brown SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8990_POWER_MANAGEMENT_2, 631f10485e7SMark Brown WM8990_ADCR_ENA_BIT, 0), 632f10485e7SMark Brown 633f10485e7SMark Brown /* Input PGAs */ 634f10485e7SMark Brown SND_SOC_DAPM_MIXER("LIN12 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_LIN12_ENA_BIT, 635f10485e7SMark Brown 0, &wm8990_dapm_lin12_pga_controls[0], 636f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lin12_pga_controls)), 637f10485e7SMark Brown SND_SOC_DAPM_MIXER("LIN34 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_LIN34_ENA_BIT, 638f10485e7SMark Brown 0, &wm8990_dapm_lin34_pga_controls[0], 639f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lin34_pga_controls)), 640f10485e7SMark Brown SND_SOC_DAPM_MIXER("RIN12 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_RIN12_ENA_BIT, 641f10485e7SMark Brown 0, &wm8990_dapm_rin12_pga_controls[0], 642f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_rin12_pga_controls)), 643f10485e7SMark Brown SND_SOC_DAPM_MIXER("RIN34 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_RIN34_ENA_BIT, 644f10485e7SMark Brown 0, &wm8990_dapm_rin34_pga_controls[0], 645f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_rin34_pga_controls)), 646f10485e7SMark Brown 647f10485e7SMark Brown /* INMIXL */ 648d2fd5fe7SMark Brown SND_SOC_DAPM_MIXER("INMIXL", SND_SOC_NOPM, 0, 0, 649f10485e7SMark Brown &wm8990_dapm_inmixl_controls[0], 650d2fd5fe7SMark Brown ARRAY_SIZE(wm8990_dapm_inmixl_controls)), 651f10485e7SMark Brown 652f10485e7SMark Brown /* AINLMUX */ 653d2fd5fe7SMark Brown SND_SOC_DAPM_MUX("AINLMUX", SND_SOC_NOPM, 0, 0, &wm8990_dapm_ainlmux_controls), 654f10485e7SMark Brown 655f10485e7SMark Brown /* INMIXR */ 656d2fd5fe7SMark Brown SND_SOC_DAPM_MIXER("INMIXR", SND_SOC_NOPM, 0, 0, 657f10485e7SMark Brown &wm8990_dapm_inmixr_controls[0], 658d2fd5fe7SMark Brown ARRAY_SIZE(wm8990_dapm_inmixr_controls)), 659f10485e7SMark Brown 660f10485e7SMark Brown /* AINRMUX */ 661d2fd5fe7SMark Brown SND_SOC_DAPM_MUX("AINRMUX", SND_SOC_NOPM, 0, 0, &wm8990_dapm_ainrmux_controls), 662f10485e7SMark Brown 663f10485e7SMark Brown /* Output Side */ 664f10485e7SMark Brown /* DACs */ 665f10485e7SMark Brown SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8990_POWER_MANAGEMENT_3, 666f10485e7SMark Brown WM8990_DACL_ENA_BIT, 0), 667f10485e7SMark Brown SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8990_POWER_MANAGEMENT_3, 668f10485e7SMark Brown WM8990_DACR_ENA_BIT, 0), 669f10485e7SMark Brown 670f10485e7SMark Brown /* LOMIX */ 671f10485e7SMark Brown SND_SOC_DAPM_MIXER_E("LOMIX", WM8990_POWER_MANAGEMENT_3, WM8990_LOMIX_ENA_BIT, 672f10485e7SMark Brown 0, &wm8990_dapm_lomix_controls[0], 673f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lomix_controls), 674f10485e7SMark Brown outmixer_event, SND_SOC_DAPM_PRE_REG), 675f10485e7SMark Brown 676f10485e7SMark Brown /* LONMIX */ 677f10485e7SMark Brown SND_SOC_DAPM_MIXER("LONMIX", WM8990_POWER_MANAGEMENT_3, WM8990_LON_ENA_BIT, 0, 678f10485e7SMark Brown &wm8990_dapm_lonmix_controls[0], 679f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lonmix_controls)), 680f10485e7SMark Brown 681f10485e7SMark Brown /* LOPMIX */ 682f10485e7SMark Brown SND_SOC_DAPM_MIXER("LOPMIX", WM8990_POWER_MANAGEMENT_3, WM8990_LOP_ENA_BIT, 0, 683f10485e7SMark Brown &wm8990_dapm_lopmix_controls[0], 684f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lopmix_controls)), 685f10485e7SMark Brown 686f10485e7SMark Brown /* OUT3MIX */ 687f10485e7SMark Brown SND_SOC_DAPM_MIXER("OUT3MIX", WM8990_POWER_MANAGEMENT_1, WM8990_OUT3_ENA_BIT, 0, 688f10485e7SMark Brown &wm8990_dapm_out3mix_controls[0], 689f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_out3mix_controls)), 690f10485e7SMark Brown 691f10485e7SMark Brown /* SPKMIX */ 692f10485e7SMark Brown SND_SOC_DAPM_MIXER_E("SPKMIX", WM8990_POWER_MANAGEMENT_1, WM8990_SPK_ENA_BIT, 0, 693f10485e7SMark Brown &wm8990_dapm_spkmix_controls[0], 694f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_spkmix_controls), outmixer_event, 695f10485e7SMark Brown SND_SOC_DAPM_PRE_REG), 696f10485e7SMark Brown 697f10485e7SMark Brown /* OUT4MIX */ 698f10485e7SMark Brown SND_SOC_DAPM_MIXER("OUT4MIX", WM8990_POWER_MANAGEMENT_1, WM8990_OUT4_ENA_BIT, 0, 699f10485e7SMark Brown &wm8990_dapm_out4mix_controls[0], 700f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_out4mix_controls)), 701f10485e7SMark Brown 702f10485e7SMark Brown /* ROPMIX */ 703f10485e7SMark Brown SND_SOC_DAPM_MIXER("ROPMIX", WM8990_POWER_MANAGEMENT_3, WM8990_ROP_ENA_BIT, 0, 704f10485e7SMark Brown &wm8990_dapm_ropmix_controls[0], 705f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_ropmix_controls)), 706f10485e7SMark Brown 707f10485e7SMark Brown /* RONMIX */ 708f10485e7SMark Brown SND_SOC_DAPM_MIXER("RONMIX", WM8990_POWER_MANAGEMENT_3, WM8990_RON_ENA_BIT, 0, 709f10485e7SMark Brown &wm8990_dapm_ronmix_controls[0], 710f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_ronmix_controls)), 711f10485e7SMark Brown 712f10485e7SMark Brown /* ROMIX */ 713f10485e7SMark Brown SND_SOC_DAPM_MIXER_E("ROMIX", WM8990_POWER_MANAGEMENT_3, WM8990_ROMIX_ENA_BIT, 714f10485e7SMark Brown 0, &wm8990_dapm_romix_controls[0], 715f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_romix_controls), 716f10485e7SMark Brown outmixer_event, SND_SOC_DAPM_PRE_REG), 717f10485e7SMark Brown 718f10485e7SMark Brown /* LOUT PGA */ 719f10485e7SMark Brown SND_SOC_DAPM_PGA("LOUT PGA", WM8990_POWER_MANAGEMENT_1, WM8990_LOUT_ENA_BIT, 0, 720f10485e7SMark Brown NULL, 0), 721f10485e7SMark Brown 722f10485e7SMark Brown /* ROUT PGA */ 723f10485e7SMark Brown SND_SOC_DAPM_PGA("ROUT PGA", WM8990_POWER_MANAGEMENT_1, WM8990_ROUT_ENA_BIT, 0, 724f10485e7SMark Brown NULL, 0), 725f10485e7SMark Brown 726f10485e7SMark Brown /* LOPGA */ 727f10485e7SMark Brown SND_SOC_DAPM_PGA("LOPGA", WM8990_POWER_MANAGEMENT_3, WM8990_LOPGA_ENA_BIT, 0, 728f10485e7SMark Brown NULL, 0), 729f10485e7SMark Brown 730f10485e7SMark Brown /* ROPGA */ 731f10485e7SMark Brown SND_SOC_DAPM_PGA("ROPGA", WM8990_POWER_MANAGEMENT_3, WM8990_ROPGA_ENA_BIT, 0, 732f10485e7SMark Brown NULL, 0), 733f10485e7SMark Brown 734f10485e7SMark Brown /* MICBIAS */ 735e1fc3f21SMark Brown SND_SOC_DAPM_SUPPLY("MICBIAS", WM8990_POWER_MANAGEMENT_1, 736e1fc3f21SMark Brown WM8990_MICBIAS_ENA_BIT, 0, NULL, 0), 737f10485e7SMark Brown 738f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("LON"), 739f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("LOP"), 740f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("OUT3"), 741f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("LOUT"), 742f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("SPKN"), 743f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("SPKP"), 744f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("ROUT"), 745f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("OUT4"), 746f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("ROP"), 747f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("RON"), 748f10485e7SMark Brown 749f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("Internal DAC Sink"), 750f10485e7SMark Brown }; 751f10485e7SMark Brown 752f6b415b6SMark Brown static const struct snd_soc_dapm_route wm8990_dapm_routes[] = { 753f10485e7SMark Brown /* Make DACs turn on when playing even if not mixed into any outputs */ 754f10485e7SMark Brown {"Internal DAC Sink", NULL, "Left DAC"}, 755f10485e7SMark Brown {"Internal DAC Sink", NULL, "Right DAC"}, 756f10485e7SMark Brown 757f10485e7SMark Brown /* Make ADCs turn on when recording even if not mixed from any inputs */ 758f10485e7SMark Brown {"Left ADC", NULL, "Internal ADC Source"}, 759f10485e7SMark Brown {"Right ADC", NULL, "Internal ADC Source"}, 760f10485e7SMark Brown 761d2fd5fe7SMark Brown {"AINLMUX", NULL, "INL"}, 762d2fd5fe7SMark Brown {"INMIXL", NULL, "INL"}, 763d2fd5fe7SMark Brown {"AINRMUX", NULL, "INR"}, 764d2fd5fe7SMark Brown {"INMIXR", NULL, "INR"}, 765d2fd5fe7SMark Brown 766f10485e7SMark Brown /* Input Side */ 767f10485e7SMark Brown /* LIN12 PGA */ 768f10485e7SMark Brown {"LIN12 PGA", "LIN1 Switch", "LIN1"}, 769f10485e7SMark Brown {"LIN12 PGA", "LIN2 Switch", "LIN2"}, 770f10485e7SMark Brown /* LIN34 PGA */ 771f10485e7SMark Brown {"LIN34 PGA", "LIN3 Switch", "LIN3"}, 77297a775c4SJinyoung Park {"LIN34 PGA", "LIN4 Switch", "LIN4/RXN"}, 773f10485e7SMark Brown /* INMIXL */ 774f10485e7SMark Brown {"INMIXL", "Record Left Volume", "LOMIX"}, 775f10485e7SMark Brown {"INMIXL", "LIN2 Volume", "LIN2"}, 776f10485e7SMark Brown {"INMIXL", "LINPGA12 Switch", "LIN12 PGA"}, 777f10485e7SMark Brown {"INMIXL", "LINPGA34 Switch", "LIN34 PGA"}, 77897a775c4SJinyoung Park /* AINLMUX */ 77997a775c4SJinyoung Park {"AINLMUX", "INMIXL Mix", "INMIXL"}, 78097a775c4SJinyoung Park {"AINLMUX", "DIFFINL Mix", "LIN12 PGA"}, 78197a775c4SJinyoung Park {"AINLMUX", "DIFFINL Mix", "LIN34 PGA"}, 78297a775c4SJinyoung Park {"AINLMUX", "RXVOICE Mix", "LIN4/RXN"}, 78397a775c4SJinyoung Park {"AINLMUX", "RXVOICE Mix", "RIN4/RXP"}, 784f10485e7SMark Brown /* ADC */ 78597a775c4SJinyoung Park {"Left ADC", NULL, "AINLMUX"}, 786f10485e7SMark Brown 787f10485e7SMark Brown /* RIN12 PGA */ 788f10485e7SMark Brown {"RIN12 PGA", "RIN1 Switch", "RIN1"}, 789f10485e7SMark Brown {"RIN12 PGA", "RIN2 Switch", "RIN2"}, 790f10485e7SMark Brown /* RIN34 PGA */ 791f10485e7SMark Brown {"RIN34 PGA", "RIN3 Switch", "RIN3"}, 79297a775c4SJinyoung Park {"RIN34 PGA", "RIN4 Switch", "RIN4/RXP"}, 793f10485e7SMark Brown /* INMIXL */ 794f10485e7SMark Brown {"INMIXR", "Record Right Volume", "ROMIX"}, 795f10485e7SMark Brown {"INMIXR", "RIN2 Volume", "RIN2"}, 796f10485e7SMark Brown {"INMIXR", "RINPGA12 Switch", "RIN12 PGA"}, 797f10485e7SMark Brown {"INMIXR", "RINPGA34 Switch", "RIN34 PGA"}, 79897a775c4SJinyoung Park /* AINRMUX */ 79997a775c4SJinyoung Park {"AINRMUX", "INMIXR Mix", "INMIXR"}, 80097a775c4SJinyoung Park {"AINRMUX", "DIFFINR Mix", "RIN12 PGA"}, 80197a775c4SJinyoung Park {"AINRMUX", "DIFFINR Mix", "RIN34 PGA"}, 80297a775c4SJinyoung Park {"AINRMUX", "RXVOICE Mix", "LIN4/RXN"}, 80397a775c4SJinyoung Park {"AINRMUX", "RXVOICE Mix", "RIN4/RXP"}, 804f10485e7SMark Brown /* ADC */ 80597a775c4SJinyoung Park {"Right ADC", NULL, "AINRMUX"}, 806f10485e7SMark Brown 807f10485e7SMark Brown /* LOMIX */ 808f10485e7SMark Brown {"LOMIX", "LOMIX RIN3 Bypass Switch", "RIN3"}, 809f10485e7SMark Brown {"LOMIX", "LOMIX LIN3 Bypass Switch", "LIN3"}, 810f10485e7SMark Brown {"LOMIX", "LOMIX LIN12 PGA Bypass Switch", "LIN12 PGA"}, 811f10485e7SMark Brown {"LOMIX", "LOMIX RIN12 PGA Bypass Switch", "RIN12 PGA"}, 812f10485e7SMark Brown {"LOMIX", "LOMIX Right ADC Bypass Switch", "AINRMUX"}, 813f10485e7SMark Brown {"LOMIX", "LOMIX Left ADC Bypass Switch", "AINLMUX"}, 814f10485e7SMark Brown {"LOMIX", "LOMIX Left DAC Switch", "Left DAC"}, 815f10485e7SMark Brown 816f10485e7SMark Brown /* ROMIX */ 817f10485e7SMark Brown {"ROMIX", "ROMIX RIN3 Bypass Switch", "RIN3"}, 818f10485e7SMark Brown {"ROMIX", "ROMIX LIN3 Bypass Switch", "LIN3"}, 819f10485e7SMark Brown {"ROMIX", "ROMIX LIN12 PGA Bypass Switch", "LIN12 PGA"}, 820f10485e7SMark Brown {"ROMIX", "ROMIX RIN12 PGA Bypass Switch", "RIN12 PGA"}, 821f10485e7SMark Brown {"ROMIX", "ROMIX Right ADC Bypass Switch", "AINRMUX"}, 822f10485e7SMark Brown {"ROMIX", "ROMIX Left ADC Bypass Switch", "AINLMUX"}, 823f10485e7SMark Brown {"ROMIX", "ROMIX Right DAC Switch", "Right DAC"}, 824f10485e7SMark Brown 825f10485e7SMark Brown /* SPKMIX */ 826f10485e7SMark Brown {"SPKMIX", "SPKMIX LIN2 Bypass Switch", "LIN2"}, 827f10485e7SMark Brown {"SPKMIX", "SPKMIX RIN2 Bypass Switch", "RIN2"}, 828f10485e7SMark Brown {"SPKMIX", "SPKMIX LADC Bypass Switch", "AINLMUX"}, 829f10485e7SMark Brown {"SPKMIX", "SPKMIX RADC Bypass Switch", "AINRMUX"}, 830f10485e7SMark Brown {"SPKMIX", "SPKMIX Left Mixer PGA Switch", "LOPGA"}, 831f10485e7SMark Brown {"SPKMIX", "SPKMIX Right Mixer PGA Switch", "ROPGA"}, 832f10485e7SMark Brown {"SPKMIX", "SPKMIX Right DAC Switch", "Right DAC"}, 833436a7459SMark Brown {"SPKMIX", "SPKMIX Left DAC Switch", "Left DAC"}, 834f10485e7SMark Brown 835f10485e7SMark Brown /* LONMIX */ 836f10485e7SMark Brown {"LONMIX", "LONMIX Left Mixer PGA Switch", "LOPGA"}, 837f10485e7SMark Brown {"LONMIX", "LONMIX Right Mixer PGA Switch", "ROPGA"}, 838f10485e7SMark Brown {"LONMIX", "LONMIX Inverted LOP Switch", "LOPMIX"}, 839f10485e7SMark Brown 840f10485e7SMark Brown /* LOPMIX */ 841f10485e7SMark Brown {"LOPMIX", "LOPMIX Right Mic Bypass Switch", "RIN12 PGA"}, 842f10485e7SMark Brown {"LOPMIX", "LOPMIX Left Mic Bypass Switch", "LIN12 PGA"}, 843f10485e7SMark Brown {"LOPMIX", "LOPMIX Left Mixer PGA Switch", "LOPGA"}, 844f10485e7SMark Brown 845f10485e7SMark Brown /* OUT3MIX */ 84697a775c4SJinyoung Park {"OUT3MIX", "OUT3MIX LIN4/RXP Bypass Switch", "LIN4/RXN"}, 847f10485e7SMark Brown {"OUT3MIX", "OUT3MIX Left Out PGA Switch", "LOPGA"}, 848f10485e7SMark Brown 849f10485e7SMark Brown /* OUT4MIX */ 850f10485e7SMark Brown {"OUT4MIX", "OUT4MIX Right Out PGA Switch", "ROPGA"}, 851f10485e7SMark Brown {"OUT4MIX", "OUT4MIX RIN4/RXP Bypass Switch", "RIN4/RXP"}, 852f10485e7SMark Brown 853f10485e7SMark Brown /* RONMIX */ 854f10485e7SMark Brown {"RONMIX", "RONMIX Right Mixer PGA Switch", "ROPGA"}, 855f10485e7SMark Brown {"RONMIX", "RONMIX Left Mixer PGA Switch", "LOPGA"}, 856f10485e7SMark Brown {"RONMIX", "RONMIX Inverted ROP Switch", "ROPMIX"}, 857f10485e7SMark Brown 858f10485e7SMark Brown /* ROPMIX */ 859f10485e7SMark Brown {"ROPMIX", "ROPMIX Left Mic Bypass Switch", "LIN12 PGA"}, 860f10485e7SMark Brown {"ROPMIX", "ROPMIX Right Mic Bypass Switch", "RIN12 PGA"}, 861f10485e7SMark Brown {"ROPMIX", "ROPMIX Right Mixer PGA Switch", "ROPGA"}, 862f10485e7SMark Brown 863f10485e7SMark Brown /* Out Mixer PGAs */ 864f10485e7SMark Brown {"LOPGA", NULL, "LOMIX"}, 865f10485e7SMark Brown {"ROPGA", NULL, "ROMIX"}, 866f10485e7SMark Brown 867f10485e7SMark Brown {"LOUT PGA", NULL, "LOMIX"}, 868f10485e7SMark Brown {"ROUT PGA", NULL, "ROMIX"}, 869f10485e7SMark Brown 870f10485e7SMark Brown /* Output Pins */ 871f10485e7SMark Brown {"LON", NULL, "LONMIX"}, 872f10485e7SMark Brown {"LOP", NULL, "LOPMIX"}, 87397a775c4SJinyoung Park {"OUT3", NULL, "OUT3MIX"}, 874f10485e7SMark Brown {"LOUT", NULL, "LOUT PGA"}, 875f10485e7SMark Brown {"SPKN", NULL, "SPKMIX"}, 876f10485e7SMark Brown {"ROUT", NULL, "ROUT PGA"}, 877f10485e7SMark Brown {"OUT4", NULL, "OUT4MIX"}, 878f10485e7SMark Brown {"ROP", NULL, "ROPMIX"}, 879f10485e7SMark Brown {"RON", NULL, "RONMIX"}, 880f10485e7SMark Brown }; 881f10485e7SMark Brown 882f10485e7SMark Brown /* PLL divisors */ 883f10485e7SMark Brown struct _pll_div { 884f10485e7SMark Brown u32 div2; 885f10485e7SMark Brown u32 n; 886f10485e7SMark Brown u32 k; 887f10485e7SMark Brown }; 888f10485e7SMark Brown 889f10485e7SMark Brown /* The size in bits of the pll divide multiplied by 10 890f10485e7SMark Brown * to allow rounding later */ 891f10485e7SMark Brown #define FIXED_PLL_SIZE ((1 << 16) * 10) 892f10485e7SMark Brown 893f10485e7SMark Brown static void pll_factors(struct _pll_div *pll_div, unsigned int target, 894f10485e7SMark Brown unsigned int source) 895f10485e7SMark Brown { 896f10485e7SMark Brown u64 Kpart; 897f10485e7SMark Brown unsigned int K, Ndiv, Nmod; 898f10485e7SMark Brown 899f10485e7SMark Brown 900f10485e7SMark Brown Ndiv = target / source; 901f10485e7SMark Brown if (Ndiv < 6) { 902f10485e7SMark Brown source >>= 1; 903f10485e7SMark Brown pll_div->div2 = 1; 904f10485e7SMark Brown Ndiv = target / source; 905f10485e7SMark Brown } else 906f10485e7SMark Brown pll_div->div2 = 0; 907f10485e7SMark Brown 908f10485e7SMark Brown if ((Ndiv < 6) || (Ndiv > 12)) 909f10485e7SMark Brown printk(KERN_WARNING 910449bd54dSRoel Kluin "WM8990 N value outwith recommended range! N = %u\n", Ndiv); 911f10485e7SMark Brown 912f10485e7SMark Brown pll_div->n = Ndiv; 913f10485e7SMark Brown Nmod = target % source; 914f10485e7SMark Brown Kpart = FIXED_PLL_SIZE * (long long)Nmod; 915f10485e7SMark Brown 916f10485e7SMark Brown do_div(Kpart, source); 917f10485e7SMark Brown 918f10485e7SMark Brown K = Kpart & 0xFFFFFFFF; 919f10485e7SMark Brown 920f10485e7SMark Brown /* Check if we need to round */ 921f10485e7SMark Brown if ((K % 10) >= 5) 922f10485e7SMark Brown K += 5; 923f10485e7SMark Brown 924f10485e7SMark Brown /* Move down to proper range now rounding is done */ 925f10485e7SMark Brown K /= 10; 926f10485e7SMark Brown 927f10485e7SMark Brown pll_div->k = K; 928f10485e7SMark Brown } 929f10485e7SMark Brown 93085488037SMark Brown static int wm8990_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, 93185488037SMark Brown int source, unsigned int freq_in, unsigned int freq_out) 932f10485e7SMark Brown { 93351bef5c6SKuninori Morimoto struct snd_soc_component *component = codec_dai->component; 934f10485e7SMark Brown struct _pll_div pll_div; 935f10485e7SMark Brown 936f10485e7SMark Brown if (freq_in && freq_out) { 937f10485e7SMark Brown pll_factors(&pll_div, freq_out * 4, freq_in); 938f10485e7SMark Brown 939f10485e7SMark Brown /* Turn on PLL */ 94051bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_POWER_MANAGEMENT_2, 94179d07265SAxel Lin WM8990_PLL_ENA, WM8990_PLL_ENA); 942f10485e7SMark Brown 943f10485e7SMark Brown /* sysclk comes from PLL */ 94451bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_CLOCKING_2, 94579d07265SAxel Lin WM8990_SYSCLK_SRC, WM8990_SYSCLK_SRC); 946f10485e7SMark Brown 9473ad2f3fbSDaniel Mack /* set up N , fractional mode and pre-divisor if necessary */ 94851bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_PLL1, pll_div.n | WM8990_SDM | 949f10485e7SMark Brown (pll_div.div2?WM8990_PRESCALE:0)); 95051bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_PLL2, (u8)(pll_div.k>>8)); 95151bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_PLL3, (u8)(pll_div.k & 0xFF)); 952f10485e7SMark Brown } else { 95379d07265SAxel Lin /* Turn off PLL */ 95451bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_POWER_MANAGEMENT_2, 95579d07265SAxel Lin WM8990_PLL_ENA, 0); 956f10485e7SMark Brown } 957f10485e7SMark Brown return 0; 958f10485e7SMark Brown } 959f10485e7SMark Brown 960f10485e7SMark Brown /* 961f10485e7SMark Brown * Clock after PLL and dividers 962f10485e7SMark Brown */ 963e550e17fSLiam Girdwood static int wm8990_set_dai_sysclk(struct snd_soc_dai *codec_dai, 964f10485e7SMark Brown int clk_id, unsigned int freq, int dir) 965f10485e7SMark Brown { 96651bef5c6SKuninori Morimoto struct snd_soc_component *component = codec_dai->component; 96751bef5c6SKuninori Morimoto struct wm8990_priv *wm8990 = snd_soc_component_get_drvdata(component); 968f10485e7SMark Brown 969f10485e7SMark Brown wm8990->sysclk = freq; 970f10485e7SMark Brown return 0; 971f10485e7SMark Brown } 972f10485e7SMark Brown 973f10485e7SMark Brown /* 974f10485e7SMark Brown * Set's ADC and Voice DAC format. 975f10485e7SMark Brown */ 976e550e17fSLiam Girdwood static int wm8990_set_dai_fmt(struct snd_soc_dai *codec_dai, 977f10485e7SMark Brown unsigned int fmt) 978f10485e7SMark Brown { 97951bef5c6SKuninori Morimoto struct snd_soc_component *component = codec_dai->component; 980f10485e7SMark Brown u16 audio1, audio3; 981f10485e7SMark Brown 98251bef5c6SKuninori Morimoto audio1 = snd_soc_component_read32(component, WM8990_AUDIO_INTERFACE_1); 98351bef5c6SKuninori Morimoto audio3 = snd_soc_component_read32(component, WM8990_AUDIO_INTERFACE_3); 984f10485e7SMark Brown 985f10485e7SMark Brown /* set master/slave audio interface */ 986f10485e7SMark Brown switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 987f10485e7SMark Brown case SND_SOC_DAIFMT_CBS_CFS: 988f10485e7SMark Brown audio3 &= ~WM8990_AIF_MSTR1; 989f10485e7SMark Brown break; 990f10485e7SMark Brown case SND_SOC_DAIFMT_CBM_CFM: 991f10485e7SMark Brown audio3 |= WM8990_AIF_MSTR1; 992f10485e7SMark Brown break; 993f10485e7SMark Brown default: 994f10485e7SMark Brown return -EINVAL; 995f10485e7SMark Brown } 996f10485e7SMark Brown 997f10485e7SMark Brown audio1 &= ~WM8990_AIF_FMT_MASK; 998f10485e7SMark Brown 999f10485e7SMark Brown /* interface format */ 1000f10485e7SMark Brown switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1001f10485e7SMark Brown case SND_SOC_DAIFMT_I2S: 1002f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_I2S; 1003f10485e7SMark Brown audio1 &= ~WM8990_AIF_LRCLK_INV; 1004f10485e7SMark Brown break; 1005f10485e7SMark Brown case SND_SOC_DAIFMT_RIGHT_J: 1006f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_RIGHTJ; 1007f10485e7SMark Brown audio1 &= ~WM8990_AIF_LRCLK_INV; 1008f10485e7SMark Brown break; 1009f10485e7SMark Brown case SND_SOC_DAIFMT_LEFT_J: 1010f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_LEFTJ; 1011f10485e7SMark Brown audio1 &= ~WM8990_AIF_LRCLK_INV; 1012f10485e7SMark Brown break; 1013f10485e7SMark Brown case SND_SOC_DAIFMT_DSP_A: 1014f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_DSP; 1015f10485e7SMark Brown audio1 &= ~WM8990_AIF_LRCLK_INV; 1016f10485e7SMark Brown break; 1017f10485e7SMark Brown case SND_SOC_DAIFMT_DSP_B: 1018f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_DSP | WM8990_AIF_LRCLK_INV; 1019f10485e7SMark Brown break; 1020f10485e7SMark Brown default: 1021f10485e7SMark Brown return -EINVAL; 1022f10485e7SMark Brown } 1023f10485e7SMark Brown 102451bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_AUDIO_INTERFACE_1, audio1); 102551bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_AUDIO_INTERFACE_3, audio3); 1026f10485e7SMark Brown return 0; 1027f10485e7SMark Brown } 1028f10485e7SMark Brown 1029e550e17fSLiam Girdwood static int wm8990_set_dai_clkdiv(struct snd_soc_dai *codec_dai, 1030f10485e7SMark Brown int div_id, int div) 1031f10485e7SMark Brown { 103251bef5c6SKuninori Morimoto struct snd_soc_component *component = codec_dai->component; 1033f10485e7SMark Brown 1034f10485e7SMark Brown switch (div_id) { 1035f10485e7SMark Brown case WM8990_MCLK_DIV: 103651bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_CLOCKING_2, 103779d07265SAxel Lin WM8990_MCLK_DIV_MASK, div); 1038f10485e7SMark Brown break; 1039f10485e7SMark Brown case WM8990_DACCLK_DIV: 104051bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_CLOCKING_2, 104179d07265SAxel Lin WM8990_DAC_CLKDIV_MASK, div); 1042f10485e7SMark Brown break; 1043f10485e7SMark Brown case WM8990_ADCCLK_DIV: 104451bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_CLOCKING_2, 104579d07265SAxel Lin WM8990_ADC_CLKDIV_MASK, div); 1046f10485e7SMark Brown break; 1047f10485e7SMark Brown case WM8990_BCLK_DIV: 104851bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_CLOCKING_1, 104979d07265SAxel Lin WM8990_BCLK_DIV_MASK, div); 1050f10485e7SMark Brown break; 1051f10485e7SMark Brown default: 1052f10485e7SMark Brown return -EINVAL; 1053f10485e7SMark Brown } 1054f10485e7SMark Brown 1055f10485e7SMark Brown return 0; 1056f10485e7SMark Brown } 1057f10485e7SMark Brown 1058f10485e7SMark Brown /* 1059f10485e7SMark Brown * Set PCM DAI bit size and sample rate. 1060f10485e7SMark Brown */ 1061f10485e7SMark Brown static int wm8990_hw_params(struct snd_pcm_substream *substream, 1062dee89c4dSMark Brown struct snd_pcm_hw_params *params, 1063dee89c4dSMark Brown struct snd_soc_dai *dai) 1064f10485e7SMark Brown { 106551bef5c6SKuninori Morimoto struct snd_soc_component *component = dai->component; 106651bef5c6SKuninori Morimoto u16 audio1 = snd_soc_component_read32(component, WM8990_AUDIO_INTERFACE_1); 1067f10485e7SMark Brown 1068f10485e7SMark Brown audio1 &= ~WM8990_AIF_WL_MASK; 1069f10485e7SMark Brown /* bit size */ 1070a351901dSMark Brown switch (params_width(params)) { 1071a351901dSMark Brown case 16: 1072f10485e7SMark Brown break; 1073a351901dSMark Brown case 20: 1074f10485e7SMark Brown audio1 |= WM8990_AIF_WL_20BITS; 1075f10485e7SMark Brown break; 1076a351901dSMark Brown case 24: 1077f10485e7SMark Brown audio1 |= WM8990_AIF_WL_24BITS; 1078f10485e7SMark Brown break; 1079a351901dSMark Brown case 32: 1080f10485e7SMark Brown audio1 |= WM8990_AIF_WL_32BITS; 1081f10485e7SMark Brown break; 1082f10485e7SMark Brown } 1083f10485e7SMark Brown 108451bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_AUDIO_INTERFACE_1, audio1); 1085f10485e7SMark Brown return 0; 1086f10485e7SMark Brown } 1087f10485e7SMark Brown 1088e550e17fSLiam Girdwood static int wm8990_mute(struct snd_soc_dai *dai, int mute) 1089f10485e7SMark Brown { 109051bef5c6SKuninori Morimoto struct snd_soc_component *component = dai->component; 1091f10485e7SMark Brown u16 val; 1092f10485e7SMark Brown 109351bef5c6SKuninori Morimoto val = snd_soc_component_read32(component, WM8990_DAC_CTRL) & ~WM8990_DAC_MUTE; 1094f10485e7SMark Brown 1095f10485e7SMark Brown if (mute) 109651bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_DAC_CTRL, val | WM8990_DAC_MUTE); 1097f10485e7SMark Brown else 109851bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_DAC_CTRL, val); 1099f10485e7SMark Brown 1100f10485e7SMark Brown return 0; 1101f10485e7SMark Brown } 1102f10485e7SMark Brown 110351bef5c6SKuninori Morimoto static int wm8990_set_bias_level(struct snd_soc_component *component, 1104f10485e7SMark Brown enum snd_soc_bias_level level) 1105f10485e7SMark Brown { 110651bef5c6SKuninori Morimoto struct wm8990_priv *wm8990 = snd_soc_component_get_drvdata(component); 1107416a0ce5SAxel Lin int ret; 1108f10485e7SMark Brown 1109f10485e7SMark Brown switch (level) { 1110f10485e7SMark Brown case SND_SOC_BIAS_ON: 1111f10485e7SMark Brown break; 11122adb9833SMark Brown 1113f10485e7SMark Brown case SND_SOC_BIAS_PREPARE: 11142adb9833SMark Brown /* VMID=2*50k */ 111551bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_POWER_MANAGEMENT_1, 111679d07265SAxel Lin WM8990_VMID_MODE_MASK, 0x2); 1117f10485e7SMark Brown break; 11182adb9833SMark Brown 1119f10485e7SMark Brown case SND_SOC_BIAS_STANDBY: 112051bef5c6SKuninori Morimoto if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) { 11210112b62bSMark Brown ret = regcache_sync(wm8990->regmap); 1122416a0ce5SAxel Lin if (ret < 0) { 112351bef5c6SKuninori Morimoto dev_err(component->dev, "Failed to sync cache: %d\n", ret); 1124416a0ce5SAxel Lin return ret; 1125416a0ce5SAxel Lin } 1126416a0ce5SAxel Lin 1127f10485e7SMark Brown /* Enable all output discharge bits */ 112851bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_ANTIPOP1, WM8990_DIS_LLINE | 1129f10485e7SMark Brown WM8990_DIS_RLINE | WM8990_DIS_OUT3 | 1130f10485e7SMark Brown WM8990_DIS_OUT4 | WM8990_DIS_LOUT | 1131f10485e7SMark Brown WM8990_DIS_ROUT); 1132f10485e7SMark Brown 1133f10485e7SMark Brown /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */ 113451bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_ANTIPOP2, WM8990_SOFTST | 1135f10485e7SMark Brown WM8990_BUFDCOPEN | WM8990_POBCTRL | 1136f10485e7SMark Brown WM8990_VMIDTOG); 1137f10485e7SMark Brown 1138f10485e7SMark Brown /* Delay to allow output caps to discharge */ 11397ebcf5d6SDimitris Papastamos msleep(300); 1140f10485e7SMark Brown 1141f10485e7SMark Brown /* Disable VMIDTOG */ 114251bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_ANTIPOP2, WM8990_SOFTST | 1143f10485e7SMark Brown WM8990_BUFDCOPEN | WM8990_POBCTRL); 1144f10485e7SMark Brown 1145f10485e7SMark Brown /* disable all output discharge bits */ 114651bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_ANTIPOP1, 0); 1147f10485e7SMark Brown 1148f10485e7SMark Brown /* Enable outputs */ 114951bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x1b00); 1150f10485e7SMark Brown 11517ebcf5d6SDimitris Papastamos msleep(50); 1152f10485e7SMark Brown 1153f10485e7SMark Brown /* Enable VMID at 2x50k */ 115451bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x1f02); 1155f10485e7SMark Brown 11567ebcf5d6SDimitris Papastamos msleep(100); 1157f10485e7SMark Brown 1158f10485e7SMark Brown /* Enable VREF */ 115951bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x1f03); 1160f10485e7SMark Brown 11617ebcf5d6SDimitris Papastamos msleep(600); 1162f10485e7SMark Brown 1163f10485e7SMark Brown /* Enable BUFIOEN */ 116451bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_ANTIPOP2, WM8990_SOFTST | 1165f10485e7SMark Brown WM8990_BUFDCOPEN | WM8990_POBCTRL | 1166f10485e7SMark Brown WM8990_BUFIOEN); 1167f10485e7SMark Brown 1168f10485e7SMark Brown /* Disable outputs */ 116951bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x3); 1170f10485e7SMark Brown 1171f10485e7SMark Brown /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ 117251bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_ANTIPOP2, WM8990_BUFIOEN); 1173f10485e7SMark Brown 1174be1b87c7SMark Brown /* Enable workaround for ADC clocking issue. */ 117551bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_EXT_ACCESS_ENA, 0x2); 117651bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_EXT_CTL1, 0xa003); 117751bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_EXT_ACCESS_ENA, 0); 1178f10485e7SMark Brown } 11792adb9833SMark Brown 11802adb9833SMark Brown /* VMID=2*250k */ 118151bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_POWER_MANAGEMENT_1, 118279d07265SAxel Lin WM8990_VMID_MODE_MASK, 0x4); 1183f10485e7SMark Brown break; 1184f10485e7SMark Brown 1185f10485e7SMark Brown case SND_SOC_BIAS_OFF: 1186f10485e7SMark Brown /* Enable POBCTRL and SOFT_ST */ 118751bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_ANTIPOP2, WM8990_SOFTST | 1188f10485e7SMark Brown WM8990_POBCTRL | WM8990_BUFIOEN); 1189f10485e7SMark Brown 1190f10485e7SMark Brown /* Enable POBCTRL, SOFT_ST and BUFDCOPEN */ 119151bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_ANTIPOP2, WM8990_SOFTST | 1192f10485e7SMark Brown WM8990_BUFDCOPEN | WM8990_POBCTRL | 1193f10485e7SMark Brown WM8990_BUFIOEN); 1194f10485e7SMark Brown 1195f10485e7SMark Brown /* mute DAC */ 119651bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_DAC_CTRL, 119779d07265SAxel Lin WM8990_DAC_MUTE, WM8990_DAC_MUTE); 1198f10485e7SMark Brown 1199f10485e7SMark Brown /* Enable any disabled outputs */ 120051bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x1f03); 1201f10485e7SMark Brown 1202f10485e7SMark Brown /* Disable VMID */ 120351bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x1f01); 1204f10485e7SMark Brown 12057ebcf5d6SDimitris Papastamos msleep(300); 1206f10485e7SMark Brown 1207f10485e7SMark Brown /* Enable all output discharge bits */ 120851bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_ANTIPOP1, WM8990_DIS_LLINE | 1209f10485e7SMark Brown WM8990_DIS_RLINE | WM8990_DIS_OUT3 | 1210f10485e7SMark Brown WM8990_DIS_OUT4 | WM8990_DIS_LOUT | 1211f10485e7SMark Brown WM8990_DIS_ROUT); 1212f10485e7SMark Brown 1213f10485e7SMark Brown /* Disable VREF */ 121451bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x0); 1215f10485e7SMark Brown 1216f10485e7SMark Brown /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ 121751bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_ANTIPOP2, 0x0); 12182ab2b742SMark Brown 12190112b62bSMark Brown regcache_mark_dirty(wm8990->regmap); 1220f10485e7SMark Brown break; 1221f10485e7SMark Brown } 1222f10485e7SMark Brown 1223f10485e7SMark Brown return 0; 1224f10485e7SMark Brown } 1225f10485e7SMark Brown 1226f10485e7SMark Brown #define WM8990_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ 1227f10485e7SMark Brown SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \ 1228f10485e7SMark Brown SNDRV_PCM_RATE_48000) 1229f10485e7SMark Brown 1230f10485e7SMark Brown #define WM8990_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 1231f10485e7SMark Brown SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) 1232f10485e7SMark Brown 1233f10485e7SMark Brown /* 1234f10485e7SMark Brown * The WM8990 supports 2 different and mutually exclusive DAI 1235f10485e7SMark Brown * configurations. 1236f10485e7SMark Brown * 1237f10485e7SMark Brown * 1. ADC/DAC on Primary Interface 1238f10485e7SMark Brown * 2. ADC on Primary Interface/DAC on secondary 1239f10485e7SMark Brown */ 124085e7652dSLars-Peter Clausen static const struct snd_soc_dai_ops wm8990_dai_ops = { 12416335d055SEric Miao .hw_params = wm8990_hw_params, 12426335d055SEric Miao .digital_mute = wm8990_mute, 12436335d055SEric Miao .set_fmt = wm8990_set_dai_fmt, 12446335d055SEric Miao .set_clkdiv = wm8990_set_dai_clkdiv, 12456335d055SEric Miao .set_pll = wm8990_set_dai_pll, 12466335d055SEric Miao .set_sysclk = wm8990_set_dai_sysclk, 12476335d055SEric Miao }; 12486335d055SEric Miao 1249f0fba2adSLiam Girdwood static struct snd_soc_dai_driver wm8990_dai = { 1250f10485e7SMark Brown /* ADC/DAC on primary */ 1251f0fba2adSLiam Girdwood .name = "wm8990-hifi", 1252f10485e7SMark Brown .playback = { 1253f10485e7SMark Brown .stream_name = "Playback", 1254f10485e7SMark Brown .channels_min = 1, 1255f10485e7SMark Brown .channels_max = 2, 1256f10485e7SMark Brown .rates = WM8990_RATES, 1257f10485e7SMark Brown .formats = WM8990_FORMATS,}, 1258f10485e7SMark Brown .capture = { 1259f10485e7SMark Brown .stream_name = "Capture", 1260f10485e7SMark Brown .channels_min = 1, 1261f10485e7SMark Brown .channels_max = 2, 1262f10485e7SMark Brown .rates = WM8990_RATES, 1263f10485e7SMark Brown .formats = WM8990_FORMATS,}, 12646335d055SEric Miao .ops = &wm8990_dai_ops, 1265f10485e7SMark Brown }; 1266f10485e7SMark Brown 1267f10485e7SMark Brown /* 1268f10485e7SMark Brown * initialise the WM8990 driver 1269f10485e7SMark Brown * register the mixer and dsp interfaces with the kernel 1270f10485e7SMark Brown */ 127151bef5c6SKuninori Morimoto static int wm8990_probe(struct snd_soc_component *component) 1272f10485e7SMark Brown { 127351bef5c6SKuninori Morimoto wm8990_reset(component); 1274f10485e7SMark Brown 1275f10485e7SMark Brown /* charge output caps */ 127651bef5c6SKuninori Morimoto snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY); 1277f10485e7SMark Brown 127851bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_AUDIO_INTERFACE_4, 127979d07265SAxel Lin WM8990_ALRCGPIO1, WM8990_ALRCGPIO1); 1280f10485e7SMark Brown 128151bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_GPIO1_GPIO2, 128279d07265SAxel Lin WM8990_GPIO1_SEL_MASK, 1); 1283f10485e7SMark Brown 128451bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_POWER_MANAGEMENT_2, 128579d07265SAxel Lin WM8990_OPCLK_ENA, WM8990_OPCLK_ENA); 1286f10485e7SMark Brown 128751bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8)); 128851bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8)); 1289f10485e7SMark Brown 1290f0fba2adSLiam Girdwood return 0; 1291f10485e7SMark Brown } 1292f10485e7SMark Brown 129351bef5c6SKuninori Morimoto static const struct snd_soc_component_driver soc_component_dev_wm8990 = { 1294f0fba2adSLiam Girdwood .probe = wm8990_probe, 1295f0fba2adSLiam Girdwood .set_bias_level = wm8990_set_bias_level, 1296f6b415b6SMark Brown .controls = wm8990_snd_controls, 1297f6b415b6SMark Brown .num_controls = ARRAY_SIZE(wm8990_snd_controls), 1298f6b415b6SMark Brown .dapm_widgets = wm8990_dapm_widgets, 1299f6b415b6SMark Brown .num_dapm_widgets = ARRAY_SIZE(wm8990_dapm_widgets), 1300f6b415b6SMark Brown .dapm_routes = wm8990_dapm_routes, 1301f6b415b6SMark Brown .num_dapm_routes = ARRAY_SIZE(wm8990_dapm_routes), 130251bef5c6SKuninori Morimoto .suspend_bias_off = 1, 130351bef5c6SKuninori Morimoto .idle_bias_on = 1, 130451bef5c6SKuninori Morimoto .use_pmdown_time = 1, 130551bef5c6SKuninori Morimoto .endianness = 1, 130651bef5c6SKuninori Morimoto .non_legacy_dai_naming = 1, 1307f0fba2adSLiam Girdwood }; 1308f10485e7SMark Brown 13090112b62bSMark Brown static const struct regmap_config wm8990_regmap = { 13100112b62bSMark Brown .reg_bits = 8, 13110112b62bSMark Brown .val_bits = 16, 13120112b62bSMark Brown 13130112b62bSMark Brown .max_register = WM8990_PLL3, 13140112b62bSMark Brown .volatile_reg = wm8990_volatile_register, 13150112b62bSMark Brown .reg_defaults = wm8990_reg_defaults, 13160112b62bSMark Brown .num_reg_defaults = ARRAY_SIZE(wm8990_reg_defaults), 13170112b62bSMark Brown .cache_type = REGCACHE_RBTREE, 13180112b62bSMark Brown }; 13190112b62bSMark Brown 13207a79e94eSBill Pemberton static int wm8990_i2c_probe(struct i2c_client *i2c, 1321e5d3fd38SJean Delvare const struct i2c_device_id *id) 1322f10485e7SMark Brown { 1323f0fba2adSLiam Girdwood struct wm8990_priv *wm8990; 1324f10485e7SMark Brown int ret; 1325f10485e7SMark Brown 1326587cbbb3SMark Brown wm8990 = devm_kzalloc(&i2c->dev, sizeof(struct wm8990_priv), 1327587cbbb3SMark Brown GFP_KERNEL); 1328f0fba2adSLiam Girdwood if (wm8990 == NULL) 1329f0fba2adSLiam Girdwood return -ENOMEM; 1330f10485e7SMark Brown 1331f0fba2adSLiam Girdwood i2c_set_clientdata(i2c, wm8990); 1332f0fba2adSLiam Girdwood 133351bef5c6SKuninori Morimoto ret = devm_snd_soc_register_component(&i2c->dev, 133451bef5c6SKuninori Morimoto &soc_component_dev_wm8990, &wm8990_dai, 1); 1335587cbbb3SMark Brown 1336f10485e7SMark Brown return ret; 1337f10485e7SMark Brown } 1338f10485e7SMark Brown 1339e5d3fd38SJean Delvare static const struct i2c_device_id wm8990_i2c_id[] = { 1340e5d3fd38SJean Delvare { "wm8990", 0 }, 1341e5d3fd38SJean Delvare { } 1342e5d3fd38SJean Delvare }; 1343e5d3fd38SJean Delvare MODULE_DEVICE_TABLE(i2c, wm8990_i2c_id); 1344f10485e7SMark Brown 1345f10485e7SMark Brown static struct i2c_driver wm8990_i2c_driver = { 1346f10485e7SMark Brown .driver = { 1347091edccfSMark Brown .name = "wm8990", 1348f10485e7SMark Brown }, 1349e5d3fd38SJean Delvare .probe = wm8990_i2c_probe, 1350e5d3fd38SJean Delvare .id_table = wm8990_i2c_id, 1351f10485e7SMark Brown }; 1352f10485e7SMark Brown 135393818c9aSMark Brown module_i2c_driver(wm8990_i2c_driver); 135464089b84SMark Brown 1355f10485e7SMark Brown MODULE_DESCRIPTION("ASoC WM8990 driver"); 1356f10485e7SMark Brown MODULE_AUTHOR("Liam Girdwood"); 1357f10485e7SMark Brown MODULE_LICENSE("GPL"); 1358