12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 2f10485e7SMark Brown /* 3f10485e7SMark Brown * wm8990.c -- WM8990 ALSA Soc Audio driver 4f10485e7SMark Brown * 5f10485e7SMark Brown * Copyright 2008 Wolfson Microelectronics PLC. 664ca0404SLiam Girdwood * Author: Liam Girdwood <lrg@slimlogic.co.uk> 7f10485e7SMark Brown */ 8f10485e7SMark Brown 9f10485e7SMark Brown #include <linux/module.h> 10f10485e7SMark Brown #include <linux/moduleparam.h> 11f10485e7SMark Brown #include <linux/kernel.h> 12f10485e7SMark Brown #include <linux/init.h> 13f10485e7SMark Brown #include <linux/delay.h> 14f10485e7SMark Brown #include <linux/pm.h> 15f10485e7SMark Brown #include <linux/i2c.h> 160112b62bSMark Brown #include <linux/regmap.h> 175a0e3ad6STejun Heo #include <linux/slab.h> 18f10485e7SMark Brown #include <sound/core.h> 19f10485e7SMark Brown #include <sound/pcm.h> 20f10485e7SMark Brown #include <sound/pcm_params.h> 21f10485e7SMark Brown #include <sound/soc.h> 22f10485e7SMark Brown #include <sound/initval.h> 23f10485e7SMark Brown #include <sound/tlv.h> 24f10485e7SMark Brown #include <asm/div64.h> 25f10485e7SMark Brown 26f10485e7SMark Brown #include "wm8990.h" 27f10485e7SMark Brown 28f10485e7SMark Brown /* codec private data */ 29f10485e7SMark Brown struct wm8990_priv { 300112b62bSMark Brown struct regmap *regmap; 31f10485e7SMark Brown unsigned int sysclk; 32f10485e7SMark Brown unsigned int pcmclk; 33f10485e7SMark Brown }; 34f10485e7SMark Brown 3551bef5c6SKuninori Morimoto #define wm8990_reset(c) snd_soc_component_write(c, WM8990_RESET, 0) 36f10485e7SMark Brown 37021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(in_pga_tlv, -1650, 3000, 0); 38f10485e7SMark Brown 39021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(out_mix_tlv, 0, -2100, 0); 40f10485e7SMark Brown 41021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(out_pga_tlv, -7300, 600, 0); 42f10485e7SMark Brown 43021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(out_dac_tlv, -7163, 0, 0); 44f10485e7SMark Brown 45021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(in_adc_tlv, -7163, 1763, 0); 46f10485e7SMark Brown 47021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(out_sidetone_tlv, -3600, 0, 0); 48f10485e7SMark Brown 49f10485e7SMark Brown static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol, 50f10485e7SMark Brown struct snd_ctl_elem_value *ucontrol) 51f10485e7SMark Brown { 5251bef5c6SKuninori Morimoto struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 53397d5aeeSJarkko Nikula struct soc_mixer_control *mc = 54397d5aeeSJarkko Nikula (struct soc_mixer_control *)kcontrol->private_value; 55397d5aeeSJarkko Nikula int reg = mc->reg; 56f10485e7SMark Brown int ret; 57f10485e7SMark Brown u16 val; 58f10485e7SMark Brown 59f10485e7SMark Brown ret = snd_soc_put_volsw(kcontrol, ucontrol); 60f10485e7SMark Brown if (ret < 0) 61f10485e7SMark Brown return ret; 62f10485e7SMark Brown 63f10485e7SMark Brown /* now hit the volume update bits (always bit 8) */ 646d75dfc3SKuninori Morimoto val = snd_soc_component_read(component, reg); 6551bef5c6SKuninori Morimoto return snd_soc_component_write(component, reg, val | 0x0100); 66f10485e7SMark Brown } 67f10485e7SMark Brown 68f10485e7SMark Brown #define SOC_WM899X_OUTPGA_SINGLE_R_TLV(xname, reg, shift, max, invert,\ 69fc99adc3SLars-Peter Clausen tlv_array) \ 70fc99adc3SLars-Peter Clausen SOC_SINGLE_EXT_TLV(xname, reg, shift, max, invert, \ 71fc99adc3SLars-Peter Clausen snd_soc_get_volsw, wm899x_outpga_put_volsw_vu, tlv_array) 72f10485e7SMark Brown 73f10485e7SMark Brown 74f10485e7SMark Brown static const char *wm8990_digital_sidetone[] = 75f10485e7SMark Brown {"None", "Left ADC", "Right ADC", "Reserved"}; 76f10485e7SMark Brown 77830b5011STakashi Iwai static SOC_ENUM_SINGLE_DECL(wm8990_left_digital_sidetone_enum, 78830b5011STakashi Iwai WM8990_DIGITAL_SIDE_TONE, 79f10485e7SMark Brown WM8990_ADC_TO_DACL_SHIFT, 80f10485e7SMark Brown wm8990_digital_sidetone); 81f10485e7SMark Brown 82830b5011STakashi Iwai static SOC_ENUM_SINGLE_DECL(wm8990_right_digital_sidetone_enum, 83830b5011STakashi Iwai WM8990_DIGITAL_SIDE_TONE, 84f10485e7SMark Brown WM8990_ADC_TO_DACR_SHIFT, 85f10485e7SMark Brown wm8990_digital_sidetone); 86f10485e7SMark Brown 87f10485e7SMark Brown static const char *wm8990_adcmode[] = 88f10485e7SMark Brown {"Hi-fi mode", "Voice mode 1", "Voice mode 2", "Voice mode 3"}; 89f10485e7SMark Brown 90830b5011STakashi Iwai static SOC_ENUM_SINGLE_DECL(wm8990_right_adcmode_enum, 91830b5011STakashi Iwai WM8990_ADC_CTRL, 92f10485e7SMark Brown WM8990_ADC_HPF_CUT_SHIFT, 93f10485e7SMark Brown wm8990_adcmode); 94f10485e7SMark Brown 95f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_snd_controls[] = { 96f10485e7SMark Brown /* INMIXL */ 97f10485e7SMark Brown SOC_SINGLE("LIN12 PGA Boost", WM8990_INPUT_MIXER3, WM8990_L12MNBST_BIT, 1, 0), 98f10485e7SMark Brown SOC_SINGLE("LIN34 PGA Boost", WM8990_INPUT_MIXER3, WM8990_L34MNBST_BIT, 1, 0), 99f10485e7SMark Brown /* INMIXR */ 100f10485e7SMark Brown SOC_SINGLE("RIN12 PGA Boost", WM8990_INPUT_MIXER3, WM8990_R12MNBST_BIT, 1, 0), 101f10485e7SMark Brown SOC_SINGLE("RIN34 PGA Boost", WM8990_INPUT_MIXER3, WM8990_R34MNBST_BIT, 1, 0), 102f10485e7SMark Brown 103f10485e7SMark Brown /* LOMIX */ 104f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER3, 105f10485e7SMark Brown WM8990_LLI3LOVOL_SHIFT, WM8990_LLI3LOVOL_MASK, 1, out_mix_tlv), 106f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3, 107f10485e7SMark Brown WM8990_LR12LOVOL_SHIFT, WM8990_LR12LOVOL_MASK, 1, out_mix_tlv), 108f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3, 109f10485e7SMark Brown WM8990_LL12LOVOL_SHIFT, WM8990_LL12LOVOL_MASK, 1, out_mix_tlv), 110f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER5, 111f10485e7SMark Brown WM8990_LRI3LOVOL_SHIFT, WM8990_LRI3LOVOL_MASK, 1, out_mix_tlv), 112f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8990_OUTPUT_MIXER5, 113f10485e7SMark Brown WM8990_LRBLOVOL_SHIFT, WM8990_LRBLOVOL_MASK, 1, out_mix_tlv), 114f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8990_OUTPUT_MIXER5, 115f10485e7SMark Brown WM8990_LRBLOVOL_SHIFT, WM8990_LRBLOVOL_MASK, 1, out_mix_tlv), 116f10485e7SMark Brown 117f10485e7SMark Brown /* ROMIX */ 118f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER4, 119f10485e7SMark Brown WM8990_RRI3ROVOL_SHIFT, WM8990_RRI3ROVOL_MASK, 1, out_mix_tlv), 120f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4, 121f10485e7SMark Brown WM8990_RL12ROVOL_SHIFT, WM8990_RL12ROVOL_MASK, 1, out_mix_tlv), 122f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4, 123f10485e7SMark Brown WM8990_RR12ROVOL_SHIFT, WM8990_RR12ROVOL_MASK, 1, out_mix_tlv), 124f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER6, 125f10485e7SMark Brown WM8990_RLI3ROVOL_SHIFT, WM8990_RLI3ROVOL_MASK, 1, out_mix_tlv), 126f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX AINLMUX Bypass Volume", WM8990_OUTPUT_MIXER6, 127f10485e7SMark Brown WM8990_RLBROVOL_SHIFT, WM8990_RLBROVOL_MASK, 1, out_mix_tlv), 128f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX AINRMUX Bypass Volume", WM8990_OUTPUT_MIXER6, 129f10485e7SMark Brown WM8990_RRBROVOL_SHIFT, WM8990_RRBROVOL_MASK, 1, out_mix_tlv), 130f10485e7SMark Brown 131f10485e7SMark Brown /* LOUT */ 132f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOUT Volume", WM8990_LEFT_OUTPUT_VOLUME, 133f10485e7SMark Brown WM8990_LOUTVOL_SHIFT, WM8990_LOUTVOL_MASK, 0, out_pga_tlv), 134f10485e7SMark Brown SOC_SINGLE("LOUT ZC", WM8990_LEFT_OUTPUT_VOLUME, WM8990_LOZC_BIT, 1, 0), 135f10485e7SMark Brown 136f10485e7SMark Brown /* ROUT */ 137f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROUT Volume", WM8990_RIGHT_OUTPUT_VOLUME, 138f10485e7SMark Brown WM8990_ROUTVOL_SHIFT, WM8990_ROUTVOL_MASK, 0, out_pga_tlv), 139f10485e7SMark Brown SOC_SINGLE("ROUT ZC", WM8990_RIGHT_OUTPUT_VOLUME, WM8990_ROZC_BIT, 1, 0), 140f10485e7SMark Brown 141f10485e7SMark Brown /* LOPGA */ 142f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOPGA Volume", WM8990_LEFT_OPGA_VOLUME, 143f10485e7SMark Brown WM8990_LOPGAVOL_SHIFT, WM8990_LOPGAVOL_MASK, 0, out_pga_tlv), 144f10485e7SMark Brown SOC_SINGLE("LOPGA ZC Switch", WM8990_LEFT_OPGA_VOLUME, 145f10485e7SMark Brown WM8990_LOPGAZC_BIT, 1, 0), 146f10485e7SMark Brown 147f10485e7SMark Brown /* ROPGA */ 148f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROPGA Volume", WM8990_RIGHT_OPGA_VOLUME, 149f10485e7SMark Brown WM8990_ROPGAVOL_SHIFT, WM8990_ROPGAVOL_MASK, 0, out_pga_tlv), 150f10485e7SMark Brown SOC_SINGLE("ROPGA ZC Switch", WM8990_RIGHT_OPGA_VOLUME, 151f10485e7SMark Brown WM8990_ROPGAZC_BIT, 1, 0), 152f10485e7SMark Brown 153f10485e7SMark Brown SOC_SINGLE("LON Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, 154f10485e7SMark Brown WM8990_LONMUTE_BIT, 1, 0), 155f10485e7SMark Brown SOC_SINGLE("LOP Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, 156f10485e7SMark Brown WM8990_LOPMUTE_BIT, 1, 0), 157f10485e7SMark Brown SOC_SINGLE("LOP Attenuation Switch", WM8990_LINE_OUTPUTS_VOLUME, 158f10485e7SMark Brown WM8990_LOATTN_BIT, 1, 0), 159f10485e7SMark Brown SOC_SINGLE("RON Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, 160f10485e7SMark Brown WM8990_RONMUTE_BIT, 1, 0), 161f10485e7SMark Brown SOC_SINGLE("ROP Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, 162f10485e7SMark Brown WM8990_ROPMUTE_BIT, 1, 0), 163f10485e7SMark Brown SOC_SINGLE("ROP Attenuation Switch", WM8990_LINE_OUTPUTS_VOLUME, 164f10485e7SMark Brown WM8990_ROATTN_BIT, 1, 0), 165f10485e7SMark Brown 166f10485e7SMark Brown SOC_SINGLE("OUT3 Mute Switch", WM8990_OUT3_4_VOLUME, 167f10485e7SMark Brown WM8990_OUT3MUTE_BIT, 1, 0), 168f10485e7SMark Brown SOC_SINGLE("OUT3 Attenuation Switch", WM8990_OUT3_4_VOLUME, 169f10485e7SMark Brown WM8990_OUT3ATTN_BIT, 1, 0), 170f10485e7SMark Brown 171f10485e7SMark Brown SOC_SINGLE("OUT4 Mute Switch", WM8990_OUT3_4_VOLUME, 172f10485e7SMark Brown WM8990_OUT4MUTE_BIT, 1, 0), 173f10485e7SMark Brown SOC_SINGLE("OUT4 Attenuation Switch", WM8990_OUT3_4_VOLUME, 174f10485e7SMark Brown WM8990_OUT4ATTN_BIT, 1, 0), 175f10485e7SMark Brown 176f10485e7SMark Brown SOC_SINGLE("Speaker Mode Switch", WM8990_CLASSD1, 177f10485e7SMark Brown WM8990_CDMODE_BIT, 1, 0), 178f10485e7SMark Brown 179f10485e7SMark Brown SOC_SINGLE("Speaker Output Attenuation Volume", WM8990_SPEAKER_VOLUME, 18097bb8129SMark Brown WM8990_SPKATTN_SHIFT, WM8990_SPKATTN_MASK, 0), 181f10485e7SMark Brown SOC_SINGLE("Speaker DC Boost Volume", WM8990_CLASSD3, 182f10485e7SMark Brown WM8990_DCGAIN_SHIFT, WM8990_DCGAIN_MASK, 0), 183f10485e7SMark Brown SOC_SINGLE("Speaker AC Boost Volume", WM8990_CLASSD3, 184f10485e7SMark Brown WM8990_ACGAIN_SHIFT, WM8990_ACGAIN_MASK, 0), 18597bb8129SMark Brown SOC_SINGLE_TLV("Speaker Volume", WM8990_CLASSD4, 18697bb8129SMark Brown WM8990_SPKVOL_SHIFT, WM8990_SPKVOL_MASK, 0, out_pga_tlv), 18797bb8129SMark Brown SOC_SINGLE("Speaker ZC Switch", WM8990_CLASSD4, 18897bb8129SMark Brown WM8990_SPKZC_SHIFT, WM8990_SPKZC_MASK, 0), 189f10485e7SMark Brown 190f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left DAC Digital Volume", 191f10485e7SMark Brown WM8990_LEFT_DAC_DIGITAL_VOLUME, 192f10485e7SMark Brown WM8990_DACL_VOL_SHIFT, 193f10485e7SMark Brown WM8990_DACL_VOL_MASK, 194f10485e7SMark Brown 0, 195f10485e7SMark Brown out_dac_tlv), 196f10485e7SMark Brown 197f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right DAC Digital Volume", 198f10485e7SMark Brown WM8990_RIGHT_DAC_DIGITAL_VOLUME, 199f10485e7SMark Brown WM8990_DACR_VOL_SHIFT, 200f10485e7SMark Brown WM8990_DACR_VOL_MASK, 201f10485e7SMark Brown 0, 202f10485e7SMark Brown out_dac_tlv), 203f10485e7SMark Brown 204f10485e7SMark Brown SOC_ENUM("Left Digital Sidetone", wm8990_left_digital_sidetone_enum), 205f10485e7SMark Brown SOC_ENUM("Right Digital Sidetone", wm8990_right_digital_sidetone_enum), 206f10485e7SMark Brown 207f10485e7SMark Brown SOC_SINGLE_TLV("Left Digital Sidetone Volume", WM8990_DIGITAL_SIDE_TONE, 208f10485e7SMark Brown WM8990_ADCL_DAC_SVOL_SHIFT, WM8990_ADCL_DAC_SVOL_MASK, 0, 209f10485e7SMark Brown out_sidetone_tlv), 210f10485e7SMark Brown SOC_SINGLE_TLV("Right Digital Sidetone Volume", WM8990_DIGITAL_SIDE_TONE, 211f10485e7SMark Brown WM8990_ADCR_DAC_SVOL_SHIFT, WM8990_ADCR_DAC_SVOL_MASK, 0, 212f10485e7SMark Brown out_sidetone_tlv), 213f10485e7SMark Brown 214f10485e7SMark Brown SOC_SINGLE("ADC Digital High Pass Filter Switch", WM8990_ADC_CTRL, 215f10485e7SMark Brown WM8990_ADC_HPF_ENA_BIT, 1, 0), 216f10485e7SMark Brown 217f10485e7SMark Brown SOC_ENUM("ADC HPF Mode", wm8990_right_adcmode_enum), 218f10485e7SMark Brown 219f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left ADC Digital Volume", 220f10485e7SMark Brown WM8990_LEFT_ADC_DIGITAL_VOLUME, 221f10485e7SMark Brown WM8990_ADCL_VOL_SHIFT, 222f10485e7SMark Brown WM8990_ADCL_VOL_MASK, 223f10485e7SMark Brown 0, 224f10485e7SMark Brown in_adc_tlv), 225f10485e7SMark Brown 226f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right ADC Digital Volume", 227f10485e7SMark Brown WM8990_RIGHT_ADC_DIGITAL_VOLUME, 228f10485e7SMark Brown WM8990_ADCR_VOL_SHIFT, 229f10485e7SMark Brown WM8990_ADCR_VOL_MASK, 230f10485e7SMark Brown 0, 231f10485e7SMark Brown in_adc_tlv), 232f10485e7SMark Brown 233f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN12 Volume", 234f10485e7SMark Brown WM8990_LEFT_LINE_INPUT_1_2_VOLUME, 235f10485e7SMark Brown WM8990_LIN12VOL_SHIFT, 236f10485e7SMark Brown WM8990_LIN12VOL_MASK, 237f10485e7SMark Brown 0, 238f10485e7SMark Brown in_pga_tlv), 239f10485e7SMark Brown 240f10485e7SMark Brown SOC_SINGLE("LIN12 ZC Switch", WM8990_LEFT_LINE_INPUT_1_2_VOLUME, 241f10485e7SMark Brown WM8990_LI12ZC_BIT, 1, 0), 242f10485e7SMark Brown 243f10485e7SMark Brown SOC_SINGLE("LIN12 Mute Switch", WM8990_LEFT_LINE_INPUT_1_2_VOLUME, 244f10485e7SMark Brown WM8990_LI12MUTE_BIT, 1, 0), 245f10485e7SMark Brown 246f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN34 Volume", 247f10485e7SMark Brown WM8990_LEFT_LINE_INPUT_3_4_VOLUME, 248f10485e7SMark Brown WM8990_LIN34VOL_SHIFT, 249f10485e7SMark Brown WM8990_LIN34VOL_MASK, 250f10485e7SMark Brown 0, 251f10485e7SMark Brown in_pga_tlv), 252f10485e7SMark Brown 253f10485e7SMark Brown SOC_SINGLE("LIN34 ZC Switch", WM8990_LEFT_LINE_INPUT_3_4_VOLUME, 254f10485e7SMark Brown WM8990_LI34ZC_BIT, 1, 0), 255f10485e7SMark Brown 256f10485e7SMark Brown SOC_SINGLE("LIN34 Mute Switch", WM8990_LEFT_LINE_INPUT_3_4_VOLUME, 257f10485e7SMark Brown WM8990_LI34MUTE_BIT, 1, 0), 258f10485e7SMark Brown 259f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN12 Volume", 260f10485e7SMark Brown WM8990_RIGHT_LINE_INPUT_1_2_VOLUME, 261f10485e7SMark Brown WM8990_RIN12VOL_SHIFT, 262f10485e7SMark Brown WM8990_RIN12VOL_MASK, 263f10485e7SMark Brown 0, 264f10485e7SMark Brown in_pga_tlv), 265f10485e7SMark Brown 266f10485e7SMark Brown SOC_SINGLE("RIN12 ZC Switch", WM8990_RIGHT_LINE_INPUT_1_2_VOLUME, 267f10485e7SMark Brown WM8990_RI12ZC_BIT, 1, 0), 268f10485e7SMark Brown 269f10485e7SMark Brown SOC_SINGLE("RIN12 Mute Switch", WM8990_RIGHT_LINE_INPUT_1_2_VOLUME, 270f10485e7SMark Brown WM8990_RI12MUTE_BIT, 1, 0), 271f10485e7SMark Brown 272f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN34 Volume", 273f10485e7SMark Brown WM8990_RIGHT_LINE_INPUT_3_4_VOLUME, 274f10485e7SMark Brown WM8990_RIN34VOL_SHIFT, 275f10485e7SMark Brown WM8990_RIN34VOL_MASK, 276f10485e7SMark Brown 0, 277f10485e7SMark Brown in_pga_tlv), 278f10485e7SMark Brown 279f10485e7SMark Brown SOC_SINGLE("RIN34 ZC Switch", WM8990_RIGHT_LINE_INPUT_3_4_VOLUME, 280f10485e7SMark Brown WM8990_RI34ZC_BIT, 1, 0), 281f10485e7SMark Brown 282f10485e7SMark Brown SOC_SINGLE("RIN34 Mute Switch", WM8990_RIGHT_LINE_INPUT_3_4_VOLUME, 283f10485e7SMark Brown WM8990_RI34MUTE_BIT, 1, 0), 284f10485e7SMark Brown 285f10485e7SMark Brown }; 286f10485e7SMark Brown 287f10485e7SMark Brown /* 288f10485e7SMark Brown * _DAPM_ Controls 289f10485e7SMark Brown */ 290f10485e7SMark Brown 291f10485e7SMark Brown static int outmixer_event(struct snd_soc_dapm_widget *w, 292f10485e7SMark Brown struct snd_kcontrol *kcontrol, int event) 293f10485e7SMark Brown { 29451bef5c6SKuninori Morimoto struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 295f10485e7SMark Brown u32 reg_shift = kcontrol->private_value & 0xfff; 296f10485e7SMark Brown int ret = 0; 297f10485e7SMark Brown u16 reg; 298f10485e7SMark Brown 299f10485e7SMark Brown switch (reg_shift) { 300f10485e7SMark Brown case WM8990_SPEAKER_MIXER | (WM8990_LDSPK_BIT << 8) : 3016d75dfc3SKuninori Morimoto reg = snd_soc_component_read(component, WM8990_OUTPUT_MIXER1); 302f10485e7SMark Brown if (reg & WM8990_LDLO) { 303f10485e7SMark Brown printk(KERN_WARNING 304f10485e7SMark Brown "Cannot set as Output Mixer 1 LDLO Set\n"); 305f10485e7SMark Brown ret = -1; 306f10485e7SMark Brown } 307f10485e7SMark Brown break; 308f10485e7SMark Brown case WM8990_SPEAKER_MIXER | (WM8990_RDSPK_BIT << 8): 3096d75dfc3SKuninori Morimoto reg = snd_soc_component_read(component, WM8990_OUTPUT_MIXER2); 310f10485e7SMark Brown if (reg & WM8990_RDRO) { 311f10485e7SMark Brown printk(KERN_WARNING 312f10485e7SMark Brown "Cannot set as Output Mixer 2 RDRO Set\n"); 313f10485e7SMark Brown ret = -1; 314f10485e7SMark Brown } 315f10485e7SMark Brown break; 316f10485e7SMark Brown case WM8990_OUTPUT_MIXER1 | (WM8990_LDLO_BIT << 8): 3176d75dfc3SKuninori Morimoto reg = snd_soc_component_read(component, WM8990_SPEAKER_MIXER); 318f10485e7SMark Brown if (reg & WM8990_LDSPK) { 319f10485e7SMark Brown printk(KERN_WARNING 320f10485e7SMark Brown "Cannot set as Speaker Mixer LDSPK Set\n"); 321f10485e7SMark Brown ret = -1; 322f10485e7SMark Brown } 323f10485e7SMark Brown break; 324f10485e7SMark Brown case WM8990_OUTPUT_MIXER2 | (WM8990_RDRO_BIT << 8): 3256d75dfc3SKuninori Morimoto reg = snd_soc_component_read(component, WM8990_SPEAKER_MIXER); 326f10485e7SMark Brown if (reg & WM8990_RDSPK) { 327f10485e7SMark Brown printk(KERN_WARNING 328f10485e7SMark Brown "Cannot set as Speaker Mixer RDSPK Set\n"); 329f10485e7SMark Brown ret = -1; 330f10485e7SMark Brown } 331f10485e7SMark Brown break; 332f10485e7SMark Brown } 333f10485e7SMark Brown 334f10485e7SMark Brown return ret; 335f10485e7SMark Brown } 336f10485e7SMark Brown 337f10485e7SMark Brown /* INMIX dB values */ 338dfd0eddaSLars-Peter Clausen static const DECLARE_TLV_DB_SCALE(in_mix_tlv, -1200, 600, 0); 339f10485e7SMark Brown 340f10485e7SMark Brown /* Left In PGA Connections */ 341f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lin12_pga_controls[] = { 342f10485e7SMark Brown SOC_DAPM_SINGLE("LIN1 Switch", WM8990_INPUT_MIXER2, WM8990_LMN1_BIT, 1, 0), 343f10485e7SMark Brown SOC_DAPM_SINGLE("LIN2 Switch", WM8990_INPUT_MIXER2, WM8990_LMP2_BIT, 1, 0), 344f10485e7SMark Brown }; 345f10485e7SMark Brown 346f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lin34_pga_controls[] = { 347f10485e7SMark Brown SOC_DAPM_SINGLE("LIN3 Switch", WM8990_INPUT_MIXER2, WM8990_LMN3_BIT, 1, 0), 348f10485e7SMark Brown SOC_DAPM_SINGLE("LIN4 Switch", WM8990_INPUT_MIXER2, WM8990_LMP4_BIT, 1, 0), 349f10485e7SMark Brown }; 350f10485e7SMark Brown 351f10485e7SMark Brown /* Right In PGA Connections */ 352f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_rin12_pga_controls[] = { 353f10485e7SMark Brown SOC_DAPM_SINGLE("RIN1 Switch", WM8990_INPUT_MIXER2, WM8990_RMN1_BIT, 1, 0), 354f10485e7SMark Brown SOC_DAPM_SINGLE("RIN2 Switch", WM8990_INPUT_MIXER2, WM8990_RMP2_BIT, 1, 0), 355f10485e7SMark Brown }; 356f10485e7SMark Brown 357f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_rin34_pga_controls[] = { 358f10485e7SMark Brown SOC_DAPM_SINGLE("RIN3 Switch", WM8990_INPUT_MIXER2, WM8990_RMN3_BIT, 1, 0), 359f10485e7SMark Brown SOC_DAPM_SINGLE("RIN4 Switch", WM8990_INPUT_MIXER2, WM8990_RMP4_BIT, 1, 0), 360f10485e7SMark Brown }; 361f10485e7SMark Brown 362f10485e7SMark Brown /* INMIXL */ 363f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_inmixl_controls[] = { 364f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("Record Left Volume", WM8990_INPUT_MIXER3, 365f10485e7SMark Brown WM8990_LDBVOL_SHIFT, WM8990_LDBVOL_MASK, 0, in_mix_tlv), 366f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("LIN2 Volume", WM8990_INPUT_MIXER5, WM8990_LI2BVOL_SHIFT, 367f10485e7SMark Brown 7, 0, in_mix_tlv), 368f10485e7SMark Brown SOC_DAPM_SINGLE("LINPGA12 Switch", WM8990_INPUT_MIXER3, WM8990_L12MNB_BIT, 369f10485e7SMark Brown 1, 0), 370f10485e7SMark Brown SOC_DAPM_SINGLE("LINPGA34 Switch", WM8990_INPUT_MIXER3, WM8990_L34MNB_BIT, 371f10485e7SMark Brown 1, 0), 372f10485e7SMark Brown }; 373f10485e7SMark Brown 374f10485e7SMark Brown /* INMIXR */ 375f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_inmixr_controls[] = { 376f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("Record Right Volume", WM8990_INPUT_MIXER4, 377f10485e7SMark Brown WM8990_RDBVOL_SHIFT, WM8990_RDBVOL_MASK, 0, in_mix_tlv), 378f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("RIN2 Volume", WM8990_INPUT_MIXER6, WM8990_RI2BVOL_SHIFT, 379f10485e7SMark Brown 7, 0, in_mix_tlv), 380f10485e7SMark Brown SOC_DAPM_SINGLE("RINPGA12 Switch", WM8990_INPUT_MIXER3, WM8990_L12MNB_BIT, 381f10485e7SMark Brown 1, 0), 382f10485e7SMark Brown SOC_DAPM_SINGLE("RINPGA34 Switch", WM8990_INPUT_MIXER3, WM8990_L34MNB_BIT, 383f10485e7SMark Brown 1, 0), 384f10485e7SMark Brown }; 385f10485e7SMark Brown 386f10485e7SMark Brown /* AINLMUX */ 387f10485e7SMark Brown static const char *wm8990_ainlmux[] = 388f10485e7SMark Brown {"INMIXL Mix", "RXVOICE Mix", "DIFFINL Mix"}; 389f10485e7SMark Brown 390830b5011STakashi Iwai static SOC_ENUM_SINGLE_DECL(wm8990_ainlmux_enum, 391830b5011STakashi Iwai WM8990_INPUT_MIXER1, WM8990_AINLMODE_SHIFT, 392830b5011STakashi Iwai wm8990_ainlmux); 393f10485e7SMark Brown 394f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_ainlmux_controls = 395f10485e7SMark Brown SOC_DAPM_ENUM("Route", wm8990_ainlmux_enum); 396f10485e7SMark Brown 397f10485e7SMark Brown /* DIFFINL */ 398f10485e7SMark Brown 399f10485e7SMark Brown /* AINRMUX */ 400f10485e7SMark Brown static const char *wm8990_ainrmux[] = 401f10485e7SMark Brown {"INMIXR Mix", "RXVOICE Mix", "DIFFINR Mix"}; 402f10485e7SMark Brown 403830b5011STakashi Iwai static SOC_ENUM_SINGLE_DECL(wm8990_ainrmux_enum, 404830b5011STakashi Iwai WM8990_INPUT_MIXER1, WM8990_AINRMODE_SHIFT, 405830b5011STakashi Iwai wm8990_ainrmux); 406f10485e7SMark Brown 407f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_ainrmux_controls = 408f10485e7SMark Brown SOC_DAPM_ENUM("Route", wm8990_ainrmux_enum); 409f10485e7SMark Brown 410f10485e7SMark Brown /* LOMIX */ 411f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lomix_controls[] = { 412f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX Right ADC Bypass Switch", WM8990_OUTPUT_MIXER1, 413f10485e7SMark Brown WM8990_LRBLO_BIT, 1, 0), 414f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX Left ADC Bypass Switch", WM8990_OUTPUT_MIXER1, 415f10485e7SMark Brown WM8990_LLBLO_BIT, 1, 0), 416f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX RIN3 Bypass Switch", WM8990_OUTPUT_MIXER1, 417f10485e7SMark Brown WM8990_LRI3LO_BIT, 1, 0), 418f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX LIN3 Bypass Switch", WM8990_OUTPUT_MIXER1, 419f10485e7SMark Brown WM8990_LLI3LO_BIT, 1, 0), 420f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX RIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER1, 421f10485e7SMark Brown WM8990_LR12LO_BIT, 1, 0), 422f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX LIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER1, 423f10485e7SMark Brown WM8990_LL12LO_BIT, 1, 0), 424f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX Left DAC Switch", WM8990_OUTPUT_MIXER1, 425f10485e7SMark Brown WM8990_LDLO_BIT, 1, 0), 426f10485e7SMark Brown }; 427f10485e7SMark Brown 428f10485e7SMark Brown /* ROMIX */ 429f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_romix_controls[] = { 430f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX Left ADC Bypass Switch", WM8990_OUTPUT_MIXER2, 431f10485e7SMark Brown WM8990_RLBRO_BIT, 1, 0), 432f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX Right ADC Bypass Switch", WM8990_OUTPUT_MIXER2, 433f10485e7SMark Brown WM8990_RRBRO_BIT, 1, 0), 434f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX LIN3 Bypass Switch", WM8990_OUTPUT_MIXER2, 435f10485e7SMark Brown WM8990_RLI3RO_BIT, 1, 0), 436f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX RIN3 Bypass Switch", WM8990_OUTPUT_MIXER2, 437f10485e7SMark Brown WM8990_RRI3RO_BIT, 1, 0), 438f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX LIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER2, 439f10485e7SMark Brown WM8990_RL12RO_BIT, 1, 0), 440f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX RIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER2, 441f10485e7SMark Brown WM8990_RR12RO_BIT, 1, 0), 442f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX Right DAC Switch", WM8990_OUTPUT_MIXER2, 443f10485e7SMark Brown WM8990_RDRO_BIT, 1, 0), 444f10485e7SMark Brown }; 445f10485e7SMark Brown 446f10485e7SMark Brown /* LONMIX */ 447f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lonmix_controls[] = { 448f10485e7SMark Brown SOC_DAPM_SINGLE("LONMIX Left Mixer PGA Switch", WM8990_LINE_MIXER1, 449f10485e7SMark Brown WM8990_LLOPGALON_BIT, 1, 0), 450f10485e7SMark Brown SOC_DAPM_SINGLE("LONMIX Right Mixer PGA Switch", WM8990_LINE_MIXER1, 451f10485e7SMark Brown WM8990_LROPGALON_BIT, 1, 0), 452f10485e7SMark Brown SOC_DAPM_SINGLE("LONMIX Inverted LOP Switch", WM8990_LINE_MIXER1, 453f10485e7SMark Brown WM8990_LOPLON_BIT, 1, 0), 454f10485e7SMark Brown }; 455f10485e7SMark Brown 456f10485e7SMark Brown /* LOPMIX */ 457f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lopmix_controls[] = { 458f10485e7SMark Brown SOC_DAPM_SINGLE("LOPMIX Right Mic Bypass Switch", WM8990_LINE_MIXER1, 459f10485e7SMark Brown WM8990_LR12LOP_BIT, 1, 0), 460f10485e7SMark Brown SOC_DAPM_SINGLE("LOPMIX Left Mic Bypass Switch", WM8990_LINE_MIXER1, 461f10485e7SMark Brown WM8990_LL12LOP_BIT, 1, 0), 462f10485e7SMark Brown SOC_DAPM_SINGLE("LOPMIX Left Mixer PGA Switch", WM8990_LINE_MIXER1, 463f10485e7SMark Brown WM8990_LLOPGALOP_BIT, 1, 0), 464f10485e7SMark Brown }; 465f10485e7SMark Brown 466f10485e7SMark Brown /* RONMIX */ 467f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_ronmix_controls[] = { 468f10485e7SMark Brown SOC_DAPM_SINGLE("RONMIX Right Mixer PGA Switch", WM8990_LINE_MIXER2, 469f10485e7SMark Brown WM8990_RROPGARON_BIT, 1, 0), 470f10485e7SMark Brown SOC_DAPM_SINGLE("RONMIX Left Mixer PGA Switch", WM8990_LINE_MIXER2, 471f10485e7SMark Brown WM8990_RLOPGARON_BIT, 1, 0), 472f10485e7SMark Brown SOC_DAPM_SINGLE("RONMIX Inverted ROP Switch", WM8990_LINE_MIXER2, 473f10485e7SMark Brown WM8990_ROPRON_BIT, 1, 0), 474f10485e7SMark Brown }; 475f10485e7SMark Brown 476f10485e7SMark Brown /* ROPMIX */ 477f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_ropmix_controls[] = { 478f10485e7SMark Brown SOC_DAPM_SINGLE("ROPMIX Left Mic Bypass Switch", WM8990_LINE_MIXER2, 479f10485e7SMark Brown WM8990_RL12ROP_BIT, 1, 0), 480f10485e7SMark Brown SOC_DAPM_SINGLE("ROPMIX Right Mic Bypass Switch", WM8990_LINE_MIXER2, 481f10485e7SMark Brown WM8990_RR12ROP_BIT, 1, 0), 482f10485e7SMark Brown SOC_DAPM_SINGLE("ROPMIX Right Mixer PGA Switch", WM8990_LINE_MIXER2, 483f10485e7SMark Brown WM8990_RROPGAROP_BIT, 1, 0), 484f10485e7SMark Brown }; 485f10485e7SMark Brown 486f10485e7SMark Brown /* OUT3MIX */ 487f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_out3mix_controls[] = { 488f10485e7SMark Brown SOC_DAPM_SINGLE("OUT3MIX LIN4/RXP Bypass Switch", WM8990_OUT3_4_MIXER, 489f10485e7SMark Brown WM8990_LI4O3_BIT, 1, 0), 490f10485e7SMark Brown SOC_DAPM_SINGLE("OUT3MIX Left Out PGA Switch", WM8990_OUT3_4_MIXER, 491f10485e7SMark Brown WM8990_LPGAO3_BIT, 1, 0), 492f10485e7SMark Brown }; 493f10485e7SMark Brown 494f10485e7SMark Brown /* OUT4MIX */ 495f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_out4mix_controls[] = { 496f10485e7SMark Brown SOC_DAPM_SINGLE("OUT4MIX Right Out PGA Switch", WM8990_OUT3_4_MIXER, 497f10485e7SMark Brown WM8990_RPGAO4_BIT, 1, 0), 498f10485e7SMark Brown SOC_DAPM_SINGLE("OUT4MIX RIN4/RXP Bypass Switch", WM8990_OUT3_4_MIXER, 499f10485e7SMark Brown WM8990_RI4O4_BIT, 1, 0), 500f10485e7SMark Brown }; 501f10485e7SMark Brown 502f10485e7SMark Brown /* SPKMIX */ 503f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_spkmix_controls[] = { 504f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX LIN2 Bypass Switch", WM8990_SPEAKER_MIXER, 505f10485e7SMark Brown WM8990_LI2SPK_BIT, 1, 0), 506f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX LADC Bypass Switch", WM8990_SPEAKER_MIXER, 507f10485e7SMark Brown WM8990_LB2SPK_BIT, 1, 0), 508f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX Left Mixer PGA Switch", WM8990_SPEAKER_MIXER, 509f10485e7SMark Brown WM8990_LOPGASPK_BIT, 1, 0), 510f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX Left DAC Switch", WM8990_SPEAKER_MIXER, 511f10485e7SMark Brown WM8990_LDSPK_BIT, 1, 0), 512f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX Right DAC Switch", WM8990_SPEAKER_MIXER, 513f10485e7SMark Brown WM8990_RDSPK_BIT, 1, 0), 514f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX Right Mixer PGA Switch", WM8990_SPEAKER_MIXER, 515f10485e7SMark Brown WM8990_ROPGASPK_BIT, 1, 0), 516f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX RADC Bypass Switch", WM8990_SPEAKER_MIXER, 517f10485e7SMark Brown WM8990_RL12ROP_BIT, 1, 0), 518f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX RIN2 Bypass Switch", WM8990_SPEAKER_MIXER, 519f10485e7SMark Brown WM8990_RI2SPK_BIT, 1, 0), 520f10485e7SMark Brown }; 521f10485e7SMark Brown 522f10485e7SMark Brown static const struct snd_soc_dapm_widget wm8990_dapm_widgets[] = { 523f10485e7SMark Brown /* Input Side */ 524f10485e7SMark Brown /* Input Lines */ 525f10485e7SMark Brown SND_SOC_DAPM_INPUT("LIN1"), 526f10485e7SMark Brown SND_SOC_DAPM_INPUT("LIN2"), 527f10485e7SMark Brown SND_SOC_DAPM_INPUT("LIN3"), 528f10485e7SMark Brown SND_SOC_DAPM_INPUT("LIN4/RXN"), 529f10485e7SMark Brown SND_SOC_DAPM_INPUT("RIN3"), 530f10485e7SMark Brown SND_SOC_DAPM_INPUT("RIN4/RXP"), 531f10485e7SMark Brown SND_SOC_DAPM_INPUT("RIN1"), 532f10485e7SMark Brown SND_SOC_DAPM_INPUT("RIN2"), 533f10485e7SMark Brown SND_SOC_DAPM_INPUT("Internal ADC Source"), 534f10485e7SMark Brown 535d2fd5fe7SMark Brown SND_SOC_DAPM_SUPPLY("INL", WM8990_POWER_MANAGEMENT_2, WM8990_AINL_ENA_BIT, 0, 536d2fd5fe7SMark Brown NULL, 0), 537d2fd5fe7SMark Brown SND_SOC_DAPM_SUPPLY("INR", WM8990_POWER_MANAGEMENT_2, WM8990_AINR_ENA_BIT, 0, 538d2fd5fe7SMark Brown NULL, 0), 539d2fd5fe7SMark Brown 540f10485e7SMark Brown /* DACs */ 541f10485e7SMark Brown SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8990_POWER_MANAGEMENT_2, 542f10485e7SMark Brown WM8990_ADCL_ENA_BIT, 0), 543f10485e7SMark Brown SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8990_POWER_MANAGEMENT_2, 544f10485e7SMark Brown WM8990_ADCR_ENA_BIT, 0), 545f10485e7SMark Brown 546f10485e7SMark Brown /* Input PGAs */ 547f10485e7SMark Brown SND_SOC_DAPM_MIXER("LIN12 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_LIN12_ENA_BIT, 548f10485e7SMark Brown 0, &wm8990_dapm_lin12_pga_controls[0], 549f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lin12_pga_controls)), 550f10485e7SMark Brown SND_SOC_DAPM_MIXER("LIN34 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_LIN34_ENA_BIT, 551f10485e7SMark Brown 0, &wm8990_dapm_lin34_pga_controls[0], 552f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lin34_pga_controls)), 553f10485e7SMark Brown SND_SOC_DAPM_MIXER("RIN12 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_RIN12_ENA_BIT, 554f10485e7SMark Brown 0, &wm8990_dapm_rin12_pga_controls[0], 555f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_rin12_pga_controls)), 556f10485e7SMark Brown SND_SOC_DAPM_MIXER("RIN34 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_RIN34_ENA_BIT, 557f10485e7SMark Brown 0, &wm8990_dapm_rin34_pga_controls[0], 558f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_rin34_pga_controls)), 559f10485e7SMark Brown 560f10485e7SMark Brown /* INMIXL */ 561d2fd5fe7SMark Brown SND_SOC_DAPM_MIXER("INMIXL", SND_SOC_NOPM, 0, 0, 562f10485e7SMark Brown &wm8990_dapm_inmixl_controls[0], 563d2fd5fe7SMark Brown ARRAY_SIZE(wm8990_dapm_inmixl_controls)), 564f10485e7SMark Brown 565f10485e7SMark Brown /* AINLMUX */ 566d2fd5fe7SMark Brown SND_SOC_DAPM_MUX("AINLMUX", SND_SOC_NOPM, 0, 0, &wm8990_dapm_ainlmux_controls), 567f10485e7SMark Brown 568f10485e7SMark Brown /* INMIXR */ 569d2fd5fe7SMark Brown SND_SOC_DAPM_MIXER("INMIXR", SND_SOC_NOPM, 0, 0, 570f10485e7SMark Brown &wm8990_dapm_inmixr_controls[0], 571d2fd5fe7SMark Brown ARRAY_SIZE(wm8990_dapm_inmixr_controls)), 572f10485e7SMark Brown 573f10485e7SMark Brown /* AINRMUX */ 574d2fd5fe7SMark Brown SND_SOC_DAPM_MUX("AINRMUX", SND_SOC_NOPM, 0, 0, &wm8990_dapm_ainrmux_controls), 575f10485e7SMark Brown 576f10485e7SMark Brown /* Output Side */ 577f10485e7SMark Brown /* DACs */ 578f10485e7SMark Brown SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8990_POWER_MANAGEMENT_3, 579f10485e7SMark Brown WM8990_DACL_ENA_BIT, 0), 580f10485e7SMark Brown SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8990_POWER_MANAGEMENT_3, 581f10485e7SMark Brown WM8990_DACR_ENA_BIT, 0), 582f10485e7SMark Brown 583f10485e7SMark Brown /* LOMIX */ 584f10485e7SMark Brown SND_SOC_DAPM_MIXER_E("LOMIX", WM8990_POWER_MANAGEMENT_3, WM8990_LOMIX_ENA_BIT, 585f10485e7SMark Brown 0, &wm8990_dapm_lomix_controls[0], 586f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lomix_controls), 587f10485e7SMark Brown outmixer_event, SND_SOC_DAPM_PRE_REG), 588f10485e7SMark Brown 589f10485e7SMark Brown /* LONMIX */ 590f10485e7SMark Brown SND_SOC_DAPM_MIXER("LONMIX", WM8990_POWER_MANAGEMENT_3, WM8990_LON_ENA_BIT, 0, 591f10485e7SMark Brown &wm8990_dapm_lonmix_controls[0], 592f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lonmix_controls)), 593f10485e7SMark Brown 594f10485e7SMark Brown /* LOPMIX */ 595f10485e7SMark Brown SND_SOC_DAPM_MIXER("LOPMIX", WM8990_POWER_MANAGEMENT_3, WM8990_LOP_ENA_BIT, 0, 596f10485e7SMark Brown &wm8990_dapm_lopmix_controls[0], 597f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lopmix_controls)), 598f10485e7SMark Brown 599f10485e7SMark Brown /* OUT3MIX */ 600f10485e7SMark Brown SND_SOC_DAPM_MIXER("OUT3MIX", WM8990_POWER_MANAGEMENT_1, WM8990_OUT3_ENA_BIT, 0, 601f10485e7SMark Brown &wm8990_dapm_out3mix_controls[0], 602f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_out3mix_controls)), 603f10485e7SMark Brown 604f10485e7SMark Brown /* SPKMIX */ 605f10485e7SMark Brown SND_SOC_DAPM_MIXER_E("SPKMIX", WM8990_POWER_MANAGEMENT_1, WM8990_SPK_ENA_BIT, 0, 606f10485e7SMark Brown &wm8990_dapm_spkmix_controls[0], 607f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_spkmix_controls), outmixer_event, 608f10485e7SMark Brown SND_SOC_DAPM_PRE_REG), 609f10485e7SMark Brown 610f10485e7SMark Brown /* OUT4MIX */ 611f10485e7SMark Brown SND_SOC_DAPM_MIXER("OUT4MIX", WM8990_POWER_MANAGEMENT_1, WM8990_OUT4_ENA_BIT, 0, 612f10485e7SMark Brown &wm8990_dapm_out4mix_controls[0], 613f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_out4mix_controls)), 614f10485e7SMark Brown 615f10485e7SMark Brown /* ROPMIX */ 616f10485e7SMark Brown SND_SOC_DAPM_MIXER("ROPMIX", WM8990_POWER_MANAGEMENT_3, WM8990_ROP_ENA_BIT, 0, 617f10485e7SMark Brown &wm8990_dapm_ropmix_controls[0], 618f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_ropmix_controls)), 619f10485e7SMark Brown 620f10485e7SMark Brown /* RONMIX */ 621f10485e7SMark Brown SND_SOC_DAPM_MIXER("RONMIX", WM8990_POWER_MANAGEMENT_3, WM8990_RON_ENA_BIT, 0, 622f10485e7SMark Brown &wm8990_dapm_ronmix_controls[0], 623f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_ronmix_controls)), 624f10485e7SMark Brown 625f10485e7SMark Brown /* ROMIX */ 626f10485e7SMark Brown SND_SOC_DAPM_MIXER_E("ROMIX", WM8990_POWER_MANAGEMENT_3, WM8990_ROMIX_ENA_BIT, 627f10485e7SMark Brown 0, &wm8990_dapm_romix_controls[0], 628f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_romix_controls), 629f10485e7SMark Brown outmixer_event, SND_SOC_DAPM_PRE_REG), 630f10485e7SMark Brown 631f10485e7SMark Brown /* LOUT PGA */ 632f10485e7SMark Brown SND_SOC_DAPM_PGA("LOUT PGA", WM8990_POWER_MANAGEMENT_1, WM8990_LOUT_ENA_BIT, 0, 633f10485e7SMark Brown NULL, 0), 634f10485e7SMark Brown 635f10485e7SMark Brown /* ROUT PGA */ 636f10485e7SMark Brown SND_SOC_DAPM_PGA("ROUT PGA", WM8990_POWER_MANAGEMENT_1, WM8990_ROUT_ENA_BIT, 0, 637f10485e7SMark Brown NULL, 0), 638f10485e7SMark Brown 639f10485e7SMark Brown /* LOPGA */ 640f10485e7SMark Brown SND_SOC_DAPM_PGA("LOPGA", WM8990_POWER_MANAGEMENT_3, WM8990_LOPGA_ENA_BIT, 0, 641f10485e7SMark Brown NULL, 0), 642f10485e7SMark Brown 643f10485e7SMark Brown /* ROPGA */ 644f10485e7SMark Brown SND_SOC_DAPM_PGA("ROPGA", WM8990_POWER_MANAGEMENT_3, WM8990_ROPGA_ENA_BIT, 0, 645f10485e7SMark Brown NULL, 0), 646f10485e7SMark Brown 647f10485e7SMark Brown /* MICBIAS */ 648e1fc3f21SMark Brown SND_SOC_DAPM_SUPPLY("MICBIAS", WM8990_POWER_MANAGEMENT_1, 649e1fc3f21SMark Brown WM8990_MICBIAS_ENA_BIT, 0, NULL, 0), 650f10485e7SMark Brown 651f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("LON"), 652f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("LOP"), 653f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("OUT3"), 654f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("LOUT"), 655f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("SPKN"), 656f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("SPKP"), 657f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("ROUT"), 658f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("OUT4"), 659f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("ROP"), 660f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("RON"), 661f10485e7SMark Brown 662f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("Internal DAC Sink"), 663f10485e7SMark Brown }; 664f10485e7SMark Brown 665f6b415b6SMark Brown static const struct snd_soc_dapm_route wm8990_dapm_routes[] = { 666f10485e7SMark Brown /* Make DACs turn on when playing even if not mixed into any outputs */ 667f10485e7SMark Brown {"Internal DAC Sink", NULL, "Left DAC"}, 668f10485e7SMark Brown {"Internal DAC Sink", NULL, "Right DAC"}, 669f10485e7SMark Brown 670f10485e7SMark Brown /* Make ADCs turn on when recording even if not mixed from any inputs */ 671f10485e7SMark Brown {"Left ADC", NULL, "Internal ADC Source"}, 672f10485e7SMark Brown {"Right ADC", NULL, "Internal ADC Source"}, 673f10485e7SMark Brown 674d2fd5fe7SMark Brown {"AINLMUX", NULL, "INL"}, 675d2fd5fe7SMark Brown {"INMIXL", NULL, "INL"}, 676d2fd5fe7SMark Brown {"AINRMUX", NULL, "INR"}, 677d2fd5fe7SMark Brown {"INMIXR", NULL, "INR"}, 678d2fd5fe7SMark Brown 679f10485e7SMark Brown /* Input Side */ 680f10485e7SMark Brown /* LIN12 PGA */ 681f10485e7SMark Brown {"LIN12 PGA", "LIN1 Switch", "LIN1"}, 682f10485e7SMark Brown {"LIN12 PGA", "LIN2 Switch", "LIN2"}, 683f10485e7SMark Brown /* LIN34 PGA */ 684f10485e7SMark Brown {"LIN34 PGA", "LIN3 Switch", "LIN3"}, 68597a775c4SJinyoung Park {"LIN34 PGA", "LIN4 Switch", "LIN4/RXN"}, 686f10485e7SMark Brown /* INMIXL */ 687f10485e7SMark Brown {"INMIXL", "Record Left Volume", "LOMIX"}, 688f10485e7SMark Brown {"INMIXL", "LIN2 Volume", "LIN2"}, 689f10485e7SMark Brown {"INMIXL", "LINPGA12 Switch", "LIN12 PGA"}, 690f10485e7SMark Brown {"INMIXL", "LINPGA34 Switch", "LIN34 PGA"}, 69197a775c4SJinyoung Park /* AINLMUX */ 69297a775c4SJinyoung Park {"AINLMUX", "INMIXL Mix", "INMIXL"}, 69397a775c4SJinyoung Park {"AINLMUX", "DIFFINL Mix", "LIN12 PGA"}, 69497a775c4SJinyoung Park {"AINLMUX", "DIFFINL Mix", "LIN34 PGA"}, 69597a775c4SJinyoung Park {"AINLMUX", "RXVOICE Mix", "LIN4/RXN"}, 69697a775c4SJinyoung Park {"AINLMUX", "RXVOICE Mix", "RIN4/RXP"}, 697f10485e7SMark Brown /* ADC */ 69897a775c4SJinyoung Park {"Left ADC", NULL, "AINLMUX"}, 699f10485e7SMark Brown 700f10485e7SMark Brown /* RIN12 PGA */ 701f10485e7SMark Brown {"RIN12 PGA", "RIN1 Switch", "RIN1"}, 702f10485e7SMark Brown {"RIN12 PGA", "RIN2 Switch", "RIN2"}, 703f10485e7SMark Brown /* RIN34 PGA */ 704f10485e7SMark Brown {"RIN34 PGA", "RIN3 Switch", "RIN3"}, 70597a775c4SJinyoung Park {"RIN34 PGA", "RIN4 Switch", "RIN4/RXP"}, 706f10485e7SMark Brown /* INMIXL */ 707f10485e7SMark Brown {"INMIXR", "Record Right Volume", "ROMIX"}, 708f10485e7SMark Brown {"INMIXR", "RIN2 Volume", "RIN2"}, 709f10485e7SMark Brown {"INMIXR", "RINPGA12 Switch", "RIN12 PGA"}, 710f10485e7SMark Brown {"INMIXR", "RINPGA34 Switch", "RIN34 PGA"}, 71197a775c4SJinyoung Park /* AINRMUX */ 71297a775c4SJinyoung Park {"AINRMUX", "INMIXR Mix", "INMIXR"}, 71397a775c4SJinyoung Park {"AINRMUX", "DIFFINR Mix", "RIN12 PGA"}, 71497a775c4SJinyoung Park {"AINRMUX", "DIFFINR Mix", "RIN34 PGA"}, 71597a775c4SJinyoung Park {"AINRMUX", "RXVOICE Mix", "LIN4/RXN"}, 71697a775c4SJinyoung Park {"AINRMUX", "RXVOICE Mix", "RIN4/RXP"}, 717f10485e7SMark Brown /* ADC */ 71897a775c4SJinyoung Park {"Right ADC", NULL, "AINRMUX"}, 719f10485e7SMark Brown 720f10485e7SMark Brown /* LOMIX */ 721f10485e7SMark Brown {"LOMIX", "LOMIX RIN3 Bypass Switch", "RIN3"}, 722f10485e7SMark Brown {"LOMIX", "LOMIX LIN3 Bypass Switch", "LIN3"}, 723f10485e7SMark Brown {"LOMIX", "LOMIX LIN12 PGA Bypass Switch", "LIN12 PGA"}, 724f10485e7SMark Brown {"LOMIX", "LOMIX RIN12 PGA Bypass Switch", "RIN12 PGA"}, 725f10485e7SMark Brown {"LOMIX", "LOMIX Right ADC Bypass Switch", "AINRMUX"}, 726f10485e7SMark Brown {"LOMIX", "LOMIX Left ADC Bypass Switch", "AINLMUX"}, 727f10485e7SMark Brown {"LOMIX", "LOMIX Left DAC Switch", "Left DAC"}, 728f10485e7SMark Brown 729f10485e7SMark Brown /* ROMIX */ 730f10485e7SMark Brown {"ROMIX", "ROMIX RIN3 Bypass Switch", "RIN3"}, 731f10485e7SMark Brown {"ROMIX", "ROMIX LIN3 Bypass Switch", "LIN3"}, 732f10485e7SMark Brown {"ROMIX", "ROMIX LIN12 PGA Bypass Switch", "LIN12 PGA"}, 733f10485e7SMark Brown {"ROMIX", "ROMIX RIN12 PGA Bypass Switch", "RIN12 PGA"}, 734f10485e7SMark Brown {"ROMIX", "ROMIX Right ADC Bypass Switch", "AINRMUX"}, 735f10485e7SMark Brown {"ROMIX", "ROMIX Left ADC Bypass Switch", "AINLMUX"}, 736f10485e7SMark Brown {"ROMIX", "ROMIX Right DAC Switch", "Right DAC"}, 737f10485e7SMark Brown 738f10485e7SMark Brown /* SPKMIX */ 739f10485e7SMark Brown {"SPKMIX", "SPKMIX LIN2 Bypass Switch", "LIN2"}, 740f10485e7SMark Brown {"SPKMIX", "SPKMIX RIN2 Bypass Switch", "RIN2"}, 741f10485e7SMark Brown {"SPKMIX", "SPKMIX LADC Bypass Switch", "AINLMUX"}, 742f10485e7SMark Brown {"SPKMIX", "SPKMIX RADC Bypass Switch", "AINRMUX"}, 743f10485e7SMark Brown {"SPKMIX", "SPKMIX Left Mixer PGA Switch", "LOPGA"}, 744f10485e7SMark Brown {"SPKMIX", "SPKMIX Right Mixer PGA Switch", "ROPGA"}, 745f10485e7SMark Brown {"SPKMIX", "SPKMIX Right DAC Switch", "Right DAC"}, 746436a7459SMark Brown {"SPKMIX", "SPKMIX Left DAC Switch", "Left DAC"}, 747f10485e7SMark Brown 748f10485e7SMark Brown /* LONMIX */ 749f10485e7SMark Brown {"LONMIX", "LONMIX Left Mixer PGA Switch", "LOPGA"}, 750f10485e7SMark Brown {"LONMIX", "LONMIX Right Mixer PGA Switch", "ROPGA"}, 751f10485e7SMark Brown {"LONMIX", "LONMIX Inverted LOP Switch", "LOPMIX"}, 752f10485e7SMark Brown 753f10485e7SMark Brown /* LOPMIX */ 754f10485e7SMark Brown {"LOPMIX", "LOPMIX Right Mic Bypass Switch", "RIN12 PGA"}, 755f10485e7SMark Brown {"LOPMIX", "LOPMIX Left Mic Bypass Switch", "LIN12 PGA"}, 756f10485e7SMark Brown {"LOPMIX", "LOPMIX Left Mixer PGA Switch", "LOPGA"}, 757f10485e7SMark Brown 758f10485e7SMark Brown /* OUT3MIX */ 75997a775c4SJinyoung Park {"OUT3MIX", "OUT3MIX LIN4/RXP Bypass Switch", "LIN4/RXN"}, 760f10485e7SMark Brown {"OUT3MIX", "OUT3MIX Left Out PGA Switch", "LOPGA"}, 761f10485e7SMark Brown 762f10485e7SMark Brown /* OUT4MIX */ 763f10485e7SMark Brown {"OUT4MIX", "OUT4MIX Right Out PGA Switch", "ROPGA"}, 764f10485e7SMark Brown {"OUT4MIX", "OUT4MIX RIN4/RXP Bypass Switch", "RIN4/RXP"}, 765f10485e7SMark Brown 766f10485e7SMark Brown /* RONMIX */ 767f10485e7SMark Brown {"RONMIX", "RONMIX Right Mixer PGA Switch", "ROPGA"}, 768f10485e7SMark Brown {"RONMIX", "RONMIX Left Mixer PGA Switch", "LOPGA"}, 769f10485e7SMark Brown {"RONMIX", "RONMIX Inverted ROP Switch", "ROPMIX"}, 770f10485e7SMark Brown 771f10485e7SMark Brown /* ROPMIX */ 772f10485e7SMark Brown {"ROPMIX", "ROPMIX Left Mic Bypass Switch", "LIN12 PGA"}, 773f10485e7SMark Brown {"ROPMIX", "ROPMIX Right Mic Bypass Switch", "RIN12 PGA"}, 774f10485e7SMark Brown {"ROPMIX", "ROPMIX Right Mixer PGA Switch", "ROPGA"}, 775f10485e7SMark Brown 776f10485e7SMark Brown /* Out Mixer PGAs */ 777f10485e7SMark Brown {"LOPGA", NULL, "LOMIX"}, 778f10485e7SMark Brown {"ROPGA", NULL, "ROMIX"}, 779f10485e7SMark Brown 780f10485e7SMark Brown {"LOUT PGA", NULL, "LOMIX"}, 781f10485e7SMark Brown {"ROUT PGA", NULL, "ROMIX"}, 782f10485e7SMark Brown 783f10485e7SMark Brown /* Output Pins */ 784f10485e7SMark Brown {"LON", NULL, "LONMIX"}, 785f10485e7SMark Brown {"LOP", NULL, "LOPMIX"}, 78697a775c4SJinyoung Park {"OUT3", NULL, "OUT3MIX"}, 787f10485e7SMark Brown {"LOUT", NULL, "LOUT PGA"}, 788f10485e7SMark Brown {"SPKN", NULL, "SPKMIX"}, 789f10485e7SMark Brown {"ROUT", NULL, "ROUT PGA"}, 790f10485e7SMark Brown {"OUT4", NULL, "OUT4MIX"}, 791f10485e7SMark Brown {"ROP", NULL, "ROPMIX"}, 792f10485e7SMark Brown {"RON", NULL, "RONMIX"}, 793f10485e7SMark Brown }; 794f10485e7SMark Brown 795f10485e7SMark Brown /* PLL divisors */ 796f10485e7SMark Brown struct _pll_div { 797f10485e7SMark Brown u32 div2; 798f10485e7SMark Brown u32 n; 799f10485e7SMark Brown u32 k; 800f10485e7SMark Brown }; 801f10485e7SMark Brown 802f10485e7SMark Brown /* The size in bits of the pll divide multiplied by 10 803f10485e7SMark Brown * to allow rounding later */ 804f10485e7SMark Brown #define FIXED_PLL_SIZE ((1 << 16) * 10) 805f10485e7SMark Brown 806f10485e7SMark Brown static void pll_factors(struct _pll_div *pll_div, unsigned int target, 807f10485e7SMark Brown unsigned int source) 808f10485e7SMark Brown { 809f10485e7SMark Brown u64 Kpart; 810f10485e7SMark Brown unsigned int K, Ndiv, Nmod; 811f10485e7SMark Brown 812f10485e7SMark Brown 813f10485e7SMark Brown Ndiv = target / source; 814f10485e7SMark Brown if (Ndiv < 6) { 815f10485e7SMark Brown source >>= 1; 816f10485e7SMark Brown pll_div->div2 = 1; 817f10485e7SMark Brown Ndiv = target / source; 818f10485e7SMark Brown } else 819f10485e7SMark Brown pll_div->div2 = 0; 820f10485e7SMark Brown 821f10485e7SMark Brown if ((Ndiv < 6) || (Ndiv > 12)) 822f10485e7SMark Brown printk(KERN_WARNING 823449bd54dSRoel Kluin "WM8990 N value outwith recommended range! N = %u\n", Ndiv); 824f10485e7SMark Brown 825f10485e7SMark Brown pll_div->n = Ndiv; 826f10485e7SMark Brown Nmod = target % source; 827f10485e7SMark Brown Kpart = FIXED_PLL_SIZE * (long long)Nmod; 828f10485e7SMark Brown 829f10485e7SMark Brown do_div(Kpart, source); 830f10485e7SMark Brown 831f10485e7SMark Brown K = Kpart & 0xFFFFFFFF; 832f10485e7SMark Brown 833f10485e7SMark Brown /* Check if we need to round */ 834f10485e7SMark Brown if ((K % 10) >= 5) 835f10485e7SMark Brown K += 5; 836f10485e7SMark Brown 837f10485e7SMark Brown /* Move down to proper range now rounding is done */ 838f10485e7SMark Brown K /= 10; 839f10485e7SMark Brown 840f10485e7SMark Brown pll_div->k = K; 841f10485e7SMark Brown } 842f10485e7SMark Brown 84385488037SMark Brown static int wm8990_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, 84485488037SMark Brown int source, unsigned int freq_in, unsigned int freq_out) 845f10485e7SMark Brown { 84651bef5c6SKuninori Morimoto struct snd_soc_component *component = codec_dai->component; 847f10485e7SMark Brown struct _pll_div pll_div; 848f10485e7SMark Brown 849f10485e7SMark Brown if (freq_in && freq_out) { 850f10485e7SMark Brown pll_factors(&pll_div, freq_out * 4, freq_in); 851f10485e7SMark Brown 852f10485e7SMark Brown /* Turn on PLL */ 85351bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_POWER_MANAGEMENT_2, 85479d07265SAxel Lin WM8990_PLL_ENA, WM8990_PLL_ENA); 855f10485e7SMark Brown 856f10485e7SMark Brown /* sysclk comes from PLL */ 85751bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_CLOCKING_2, 85879d07265SAxel Lin WM8990_SYSCLK_SRC, WM8990_SYSCLK_SRC); 859f10485e7SMark Brown 8603ad2f3fbSDaniel Mack /* set up N , fractional mode and pre-divisor if necessary */ 86151bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_PLL1, pll_div.n | WM8990_SDM | 862f10485e7SMark Brown (pll_div.div2?WM8990_PRESCALE:0)); 86351bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_PLL2, (u8)(pll_div.k>>8)); 86451bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_PLL3, (u8)(pll_div.k & 0xFF)); 865f10485e7SMark Brown } else { 86679d07265SAxel Lin /* Turn off PLL */ 86751bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_POWER_MANAGEMENT_2, 86879d07265SAxel Lin WM8990_PLL_ENA, 0); 869f10485e7SMark Brown } 870f10485e7SMark Brown return 0; 871f10485e7SMark Brown } 872f10485e7SMark Brown 873f10485e7SMark Brown /* 874f10485e7SMark Brown * Clock after PLL and dividers 875f10485e7SMark Brown */ 876e550e17fSLiam Girdwood static int wm8990_set_dai_sysclk(struct snd_soc_dai *codec_dai, 877f10485e7SMark Brown int clk_id, unsigned int freq, int dir) 878f10485e7SMark Brown { 87951bef5c6SKuninori Morimoto struct snd_soc_component *component = codec_dai->component; 88051bef5c6SKuninori Morimoto struct wm8990_priv *wm8990 = snd_soc_component_get_drvdata(component); 881f10485e7SMark Brown 882f10485e7SMark Brown wm8990->sysclk = freq; 883f10485e7SMark Brown return 0; 884f10485e7SMark Brown } 885f10485e7SMark Brown 886f10485e7SMark Brown /* 887f10485e7SMark Brown * Set's ADC and Voice DAC format. 888f10485e7SMark Brown */ 889e550e17fSLiam Girdwood static int wm8990_set_dai_fmt(struct snd_soc_dai *codec_dai, 890f10485e7SMark Brown unsigned int fmt) 891f10485e7SMark Brown { 89251bef5c6SKuninori Morimoto struct snd_soc_component *component = codec_dai->component; 893f10485e7SMark Brown u16 audio1, audio3; 894f10485e7SMark Brown 8956d75dfc3SKuninori Morimoto audio1 = snd_soc_component_read(component, WM8990_AUDIO_INTERFACE_1); 8966d75dfc3SKuninori Morimoto audio3 = snd_soc_component_read(component, WM8990_AUDIO_INTERFACE_3); 897f10485e7SMark Brown 898f10485e7SMark Brown /* set master/slave audio interface */ 899f10485e7SMark Brown switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 900f10485e7SMark Brown case SND_SOC_DAIFMT_CBS_CFS: 901f10485e7SMark Brown audio3 &= ~WM8990_AIF_MSTR1; 902f10485e7SMark Brown break; 903f10485e7SMark Brown case SND_SOC_DAIFMT_CBM_CFM: 904f10485e7SMark Brown audio3 |= WM8990_AIF_MSTR1; 905f10485e7SMark Brown break; 906f10485e7SMark Brown default: 907f10485e7SMark Brown return -EINVAL; 908f10485e7SMark Brown } 909f10485e7SMark Brown 910f10485e7SMark Brown audio1 &= ~WM8990_AIF_FMT_MASK; 911f10485e7SMark Brown 912f10485e7SMark Brown /* interface format */ 913f10485e7SMark Brown switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 914f10485e7SMark Brown case SND_SOC_DAIFMT_I2S: 915f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_I2S; 916f10485e7SMark Brown audio1 &= ~WM8990_AIF_LRCLK_INV; 917f10485e7SMark Brown break; 918f10485e7SMark Brown case SND_SOC_DAIFMT_RIGHT_J: 919f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_RIGHTJ; 920f10485e7SMark Brown audio1 &= ~WM8990_AIF_LRCLK_INV; 921f10485e7SMark Brown break; 922f10485e7SMark Brown case SND_SOC_DAIFMT_LEFT_J: 923f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_LEFTJ; 924f10485e7SMark Brown audio1 &= ~WM8990_AIF_LRCLK_INV; 925f10485e7SMark Brown break; 926f10485e7SMark Brown case SND_SOC_DAIFMT_DSP_A: 927f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_DSP; 928f10485e7SMark Brown audio1 &= ~WM8990_AIF_LRCLK_INV; 929f10485e7SMark Brown break; 930f10485e7SMark Brown case SND_SOC_DAIFMT_DSP_B: 931f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_DSP | WM8990_AIF_LRCLK_INV; 932f10485e7SMark Brown break; 933f10485e7SMark Brown default: 934f10485e7SMark Brown return -EINVAL; 935f10485e7SMark Brown } 936f10485e7SMark Brown 93751bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_AUDIO_INTERFACE_1, audio1); 93851bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_AUDIO_INTERFACE_3, audio3); 939f10485e7SMark Brown return 0; 940f10485e7SMark Brown } 941f10485e7SMark Brown 942e550e17fSLiam Girdwood static int wm8990_set_dai_clkdiv(struct snd_soc_dai *codec_dai, 943f10485e7SMark Brown int div_id, int div) 944f10485e7SMark Brown { 94551bef5c6SKuninori Morimoto struct snd_soc_component *component = codec_dai->component; 946f10485e7SMark Brown 947f10485e7SMark Brown switch (div_id) { 948f10485e7SMark Brown case WM8990_MCLK_DIV: 94951bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_CLOCKING_2, 95079d07265SAxel Lin WM8990_MCLK_DIV_MASK, div); 951f10485e7SMark Brown break; 952f10485e7SMark Brown case WM8990_DACCLK_DIV: 95351bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_CLOCKING_2, 95479d07265SAxel Lin WM8990_DAC_CLKDIV_MASK, div); 955f10485e7SMark Brown break; 956f10485e7SMark Brown case WM8990_ADCCLK_DIV: 95751bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_CLOCKING_2, 95879d07265SAxel Lin WM8990_ADC_CLKDIV_MASK, div); 959f10485e7SMark Brown break; 960f10485e7SMark Brown case WM8990_BCLK_DIV: 96151bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_CLOCKING_1, 96279d07265SAxel Lin WM8990_BCLK_DIV_MASK, div); 963f10485e7SMark Brown break; 964f10485e7SMark Brown default: 965f10485e7SMark Brown return -EINVAL; 966f10485e7SMark Brown } 967f10485e7SMark Brown 968f10485e7SMark Brown return 0; 969f10485e7SMark Brown } 970f10485e7SMark Brown 971f10485e7SMark Brown /* 972f10485e7SMark Brown * Set PCM DAI bit size and sample rate. 973f10485e7SMark Brown */ 974f10485e7SMark Brown static int wm8990_hw_params(struct snd_pcm_substream *substream, 975dee89c4dSMark Brown struct snd_pcm_hw_params *params, 976dee89c4dSMark Brown struct snd_soc_dai *dai) 977f10485e7SMark Brown { 97851bef5c6SKuninori Morimoto struct snd_soc_component *component = dai->component; 9796d75dfc3SKuninori Morimoto u16 audio1 = snd_soc_component_read(component, WM8990_AUDIO_INTERFACE_1); 980f10485e7SMark Brown 981f10485e7SMark Brown audio1 &= ~WM8990_AIF_WL_MASK; 982f10485e7SMark Brown /* bit size */ 983a351901dSMark Brown switch (params_width(params)) { 984a351901dSMark Brown case 16: 985f10485e7SMark Brown break; 986a351901dSMark Brown case 20: 987f10485e7SMark Brown audio1 |= WM8990_AIF_WL_20BITS; 988f10485e7SMark Brown break; 989a351901dSMark Brown case 24: 990f10485e7SMark Brown audio1 |= WM8990_AIF_WL_24BITS; 991f10485e7SMark Brown break; 992a351901dSMark Brown case 32: 993f10485e7SMark Brown audio1 |= WM8990_AIF_WL_32BITS; 994f10485e7SMark Brown break; 995f10485e7SMark Brown } 996f10485e7SMark Brown 99751bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_AUDIO_INTERFACE_1, audio1); 998f10485e7SMark Brown return 0; 999f10485e7SMark Brown } 1000f10485e7SMark Brown 1001*26d3c16eSKuninori Morimoto static int wm8990_mute(struct snd_soc_dai *dai, int mute, int direction) 1002f10485e7SMark Brown { 100351bef5c6SKuninori Morimoto struct snd_soc_component *component = dai->component; 1004f10485e7SMark Brown u16 val; 1005f10485e7SMark Brown 10066d75dfc3SKuninori Morimoto val = snd_soc_component_read(component, WM8990_DAC_CTRL) & ~WM8990_DAC_MUTE; 1007f10485e7SMark Brown 1008f10485e7SMark Brown if (mute) 100951bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_DAC_CTRL, val | WM8990_DAC_MUTE); 1010f10485e7SMark Brown else 101151bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_DAC_CTRL, val); 1012f10485e7SMark Brown 1013f10485e7SMark Brown return 0; 1014f10485e7SMark Brown } 1015f10485e7SMark Brown 101651bef5c6SKuninori Morimoto static int wm8990_set_bias_level(struct snd_soc_component *component, 1017f10485e7SMark Brown enum snd_soc_bias_level level) 1018f10485e7SMark Brown { 101951bef5c6SKuninori Morimoto struct wm8990_priv *wm8990 = snd_soc_component_get_drvdata(component); 1020416a0ce5SAxel Lin int ret; 1021f10485e7SMark Brown 1022f10485e7SMark Brown switch (level) { 1023f10485e7SMark Brown case SND_SOC_BIAS_ON: 1024f10485e7SMark Brown break; 10252adb9833SMark Brown 1026f10485e7SMark Brown case SND_SOC_BIAS_PREPARE: 10272adb9833SMark Brown /* VMID=2*50k */ 102851bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_POWER_MANAGEMENT_1, 102979d07265SAxel Lin WM8990_VMID_MODE_MASK, 0x2); 1030f10485e7SMark Brown break; 10312adb9833SMark Brown 1032f10485e7SMark Brown case SND_SOC_BIAS_STANDBY: 103351bef5c6SKuninori Morimoto if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) { 10340112b62bSMark Brown ret = regcache_sync(wm8990->regmap); 1035416a0ce5SAxel Lin if (ret < 0) { 103651bef5c6SKuninori Morimoto dev_err(component->dev, "Failed to sync cache: %d\n", ret); 1037416a0ce5SAxel Lin return ret; 1038416a0ce5SAxel Lin } 1039416a0ce5SAxel Lin 1040f10485e7SMark Brown /* Enable all output discharge bits */ 104151bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_ANTIPOP1, WM8990_DIS_LLINE | 1042f10485e7SMark Brown WM8990_DIS_RLINE | WM8990_DIS_OUT3 | 1043f10485e7SMark Brown WM8990_DIS_OUT4 | WM8990_DIS_LOUT | 1044f10485e7SMark Brown WM8990_DIS_ROUT); 1045f10485e7SMark Brown 1046f10485e7SMark Brown /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */ 104751bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_ANTIPOP2, WM8990_SOFTST | 1048f10485e7SMark Brown WM8990_BUFDCOPEN | WM8990_POBCTRL | 1049f10485e7SMark Brown WM8990_VMIDTOG); 1050f10485e7SMark Brown 1051f10485e7SMark Brown /* Delay to allow output caps to discharge */ 10527ebcf5d6SDimitris Papastamos msleep(300); 1053f10485e7SMark Brown 1054f10485e7SMark Brown /* Disable VMIDTOG */ 105551bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_ANTIPOP2, WM8990_SOFTST | 1056f10485e7SMark Brown WM8990_BUFDCOPEN | WM8990_POBCTRL); 1057f10485e7SMark Brown 1058f10485e7SMark Brown /* disable all output discharge bits */ 105951bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_ANTIPOP1, 0); 1060f10485e7SMark Brown 1061f10485e7SMark Brown /* Enable outputs */ 106251bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x1b00); 1063f10485e7SMark Brown 10647ebcf5d6SDimitris Papastamos msleep(50); 1065f10485e7SMark Brown 1066f10485e7SMark Brown /* Enable VMID at 2x50k */ 106751bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x1f02); 1068f10485e7SMark Brown 10697ebcf5d6SDimitris Papastamos msleep(100); 1070f10485e7SMark Brown 1071f10485e7SMark Brown /* Enable VREF */ 107251bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x1f03); 1073f10485e7SMark Brown 10747ebcf5d6SDimitris Papastamos msleep(600); 1075f10485e7SMark Brown 1076f10485e7SMark Brown /* Enable BUFIOEN */ 107751bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_ANTIPOP2, WM8990_SOFTST | 1078f10485e7SMark Brown WM8990_BUFDCOPEN | WM8990_POBCTRL | 1079f10485e7SMark Brown WM8990_BUFIOEN); 1080f10485e7SMark Brown 1081f10485e7SMark Brown /* Disable outputs */ 108251bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x3); 1083f10485e7SMark Brown 1084f10485e7SMark Brown /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ 108551bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_ANTIPOP2, WM8990_BUFIOEN); 1086f10485e7SMark Brown 1087be1b87c7SMark Brown /* Enable workaround for ADC clocking issue. */ 108851bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_EXT_ACCESS_ENA, 0x2); 108951bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_EXT_CTL1, 0xa003); 109051bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_EXT_ACCESS_ENA, 0); 1091f10485e7SMark Brown } 10922adb9833SMark Brown 10932adb9833SMark Brown /* VMID=2*250k */ 109451bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_POWER_MANAGEMENT_1, 109579d07265SAxel Lin WM8990_VMID_MODE_MASK, 0x4); 1096f10485e7SMark Brown break; 1097f10485e7SMark Brown 1098f10485e7SMark Brown case SND_SOC_BIAS_OFF: 1099f10485e7SMark Brown /* Enable POBCTRL and SOFT_ST */ 110051bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_ANTIPOP2, WM8990_SOFTST | 1101f10485e7SMark Brown WM8990_POBCTRL | WM8990_BUFIOEN); 1102f10485e7SMark Brown 1103f10485e7SMark Brown /* Enable POBCTRL, SOFT_ST and BUFDCOPEN */ 110451bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_ANTIPOP2, WM8990_SOFTST | 1105f10485e7SMark Brown WM8990_BUFDCOPEN | WM8990_POBCTRL | 1106f10485e7SMark Brown WM8990_BUFIOEN); 1107f10485e7SMark Brown 1108f10485e7SMark Brown /* mute DAC */ 110951bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_DAC_CTRL, 111079d07265SAxel Lin WM8990_DAC_MUTE, WM8990_DAC_MUTE); 1111f10485e7SMark Brown 1112f10485e7SMark Brown /* Enable any disabled outputs */ 111351bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x1f03); 1114f10485e7SMark Brown 1115f10485e7SMark Brown /* Disable VMID */ 111651bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x1f01); 1117f10485e7SMark Brown 11187ebcf5d6SDimitris Papastamos msleep(300); 1119f10485e7SMark Brown 1120f10485e7SMark Brown /* Enable all output discharge bits */ 112151bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_ANTIPOP1, WM8990_DIS_LLINE | 1122f10485e7SMark Brown WM8990_DIS_RLINE | WM8990_DIS_OUT3 | 1123f10485e7SMark Brown WM8990_DIS_OUT4 | WM8990_DIS_LOUT | 1124f10485e7SMark Brown WM8990_DIS_ROUT); 1125f10485e7SMark Brown 1126f10485e7SMark Brown /* Disable VREF */ 112751bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x0); 1128f10485e7SMark Brown 1129f10485e7SMark Brown /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ 113051bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_ANTIPOP2, 0x0); 11312ab2b742SMark Brown 11320112b62bSMark Brown regcache_mark_dirty(wm8990->regmap); 1133f10485e7SMark Brown break; 1134f10485e7SMark Brown } 1135f10485e7SMark Brown 1136f10485e7SMark Brown return 0; 1137f10485e7SMark Brown } 1138f10485e7SMark Brown 1139f10485e7SMark Brown #define WM8990_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ 1140f10485e7SMark Brown SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \ 1141f10485e7SMark Brown SNDRV_PCM_RATE_48000) 1142f10485e7SMark Brown 1143f10485e7SMark Brown #define WM8990_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 1144f10485e7SMark Brown SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) 1145f10485e7SMark Brown 1146f10485e7SMark Brown /* 1147f10485e7SMark Brown * The WM8990 supports 2 different and mutually exclusive DAI 1148f10485e7SMark Brown * configurations. 1149f10485e7SMark Brown * 1150f10485e7SMark Brown * 1. ADC/DAC on Primary Interface 1151f10485e7SMark Brown * 2. ADC on Primary Interface/DAC on secondary 1152f10485e7SMark Brown */ 115385e7652dSLars-Peter Clausen static const struct snd_soc_dai_ops wm8990_dai_ops = { 11546335d055SEric Miao .hw_params = wm8990_hw_params, 1155*26d3c16eSKuninori Morimoto .mute_stream = wm8990_mute, 11566335d055SEric Miao .set_fmt = wm8990_set_dai_fmt, 11576335d055SEric Miao .set_clkdiv = wm8990_set_dai_clkdiv, 11586335d055SEric Miao .set_pll = wm8990_set_dai_pll, 11596335d055SEric Miao .set_sysclk = wm8990_set_dai_sysclk, 1160*26d3c16eSKuninori Morimoto .no_capture_mute = 1, 11616335d055SEric Miao }; 11626335d055SEric Miao 1163f0fba2adSLiam Girdwood static struct snd_soc_dai_driver wm8990_dai = { 1164f10485e7SMark Brown /* ADC/DAC on primary */ 1165f0fba2adSLiam Girdwood .name = "wm8990-hifi", 1166f10485e7SMark Brown .playback = { 1167f10485e7SMark Brown .stream_name = "Playback", 1168f10485e7SMark Brown .channels_min = 1, 1169f10485e7SMark Brown .channels_max = 2, 1170f10485e7SMark Brown .rates = WM8990_RATES, 1171f10485e7SMark Brown .formats = WM8990_FORMATS,}, 1172f10485e7SMark Brown .capture = { 1173f10485e7SMark Brown .stream_name = "Capture", 1174f10485e7SMark Brown .channels_min = 1, 1175f10485e7SMark Brown .channels_max = 2, 1176f10485e7SMark Brown .rates = WM8990_RATES, 1177f10485e7SMark Brown .formats = WM8990_FORMATS,}, 11786335d055SEric Miao .ops = &wm8990_dai_ops, 1179f10485e7SMark Brown }; 1180f10485e7SMark Brown 1181f10485e7SMark Brown /* 1182f10485e7SMark Brown * initialise the WM8990 driver 1183f10485e7SMark Brown * register the mixer and dsp interfaces with the kernel 1184f10485e7SMark Brown */ 118551bef5c6SKuninori Morimoto static int wm8990_probe(struct snd_soc_component *component) 1186f10485e7SMark Brown { 118751bef5c6SKuninori Morimoto wm8990_reset(component); 1188f10485e7SMark Brown 1189f10485e7SMark Brown /* charge output caps */ 119051bef5c6SKuninori Morimoto snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY); 1191f10485e7SMark Brown 119251bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_AUDIO_INTERFACE_4, 119379d07265SAxel Lin WM8990_ALRCGPIO1, WM8990_ALRCGPIO1); 1194f10485e7SMark Brown 119551bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_GPIO1_GPIO2, 119679d07265SAxel Lin WM8990_GPIO1_SEL_MASK, 1); 1197f10485e7SMark Brown 119851bef5c6SKuninori Morimoto snd_soc_component_update_bits(component, WM8990_POWER_MANAGEMENT_2, 119979d07265SAxel Lin WM8990_OPCLK_ENA, WM8990_OPCLK_ENA); 1200f10485e7SMark Brown 120151bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8)); 120251bef5c6SKuninori Morimoto snd_soc_component_write(component, WM8990_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8)); 1203f10485e7SMark Brown 1204f0fba2adSLiam Girdwood return 0; 1205f10485e7SMark Brown } 1206f10485e7SMark Brown 120751bef5c6SKuninori Morimoto static const struct snd_soc_component_driver soc_component_dev_wm8990 = { 1208f0fba2adSLiam Girdwood .probe = wm8990_probe, 1209f0fba2adSLiam Girdwood .set_bias_level = wm8990_set_bias_level, 1210f6b415b6SMark Brown .controls = wm8990_snd_controls, 1211f6b415b6SMark Brown .num_controls = ARRAY_SIZE(wm8990_snd_controls), 1212f6b415b6SMark Brown .dapm_widgets = wm8990_dapm_widgets, 1213f6b415b6SMark Brown .num_dapm_widgets = ARRAY_SIZE(wm8990_dapm_widgets), 1214f6b415b6SMark Brown .dapm_routes = wm8990_dapm_routes, 1215f6b415b6SMark Brown .num_dapm_routes = ARRAY_SIZE(wm8990_dapm_routes), 121651bef5c6SKuninori Morimoto .suspend_bias_off = 1, 121751bef5c6SKuninori Morimoto .idle_bias_on = 1, 121851bef5c6SKuninori Morimoto .use_pmdown_time = 1, 121951bef5c6SKuninori Morimoto .endianness = 1, 122051bef5c6SKuninori Morimoto .non_legacy_dai_naming = 1, 1221f0fba2adSLiam Girdwood }; 1222f10485e7SMark Brown 12237a79e94eSBill Pemberton static int wm8990_i2c_probe(struct i2c_client *i2c, 1224e5d3fd38SJean Delvare const struct i2c_device_id *id) 1225f10485e7SMark Brown { 1226f0fba2adSLiam Girdwood struct wm8990_priv *wm8990; 1227f10485e7SMark Brown int ret; 1228f10485e7SMark Brown 1229587cbbb3SMark Brown wm8990 = devm_kzalloc(&i2c->dev, sizeof(struct wm8990_priv), 1230587cbbb3SMark Brown GFP_KERNEL); 1231f0fba2adSLiam Girdwood if (wm8990 == NULL) 1232f0fba2adSLiam Girdwood return -ENOMEM; 1233f10485e7SMark Brown 1234f0fba2adSLiam Girdwood i2c_set_clientdata(i2c, wm8990); 1235f0fba2adSLiam Girdwood 123651bef5c6SKuninori Morimoto ret = devm_snd_soc_register_component(&i2c->dev, 123751bef5c6SKuninori Morimoto &soc_component_dev_wm8990, &wm8990_dai, 1); 1238587cbbb3SMark Brown 1239f10485e7SMark Brown return ret; 1240f10485e7SMark Brown } 1241f10485e7SMark Brown 1242e5d3fd38SJean Delvare static const struct i2c_device_id wm8990_i2c_id[] = { 1243e5d3fd38SJean Delvare { "wm8990", 0 }, 1244e5d3fd38SJean Delvare { } 1245e5d3fd38SJean Delvare }; 1246e5d3fd38SJean Delvare MODULE_DEVICE_TABLE(i2c, wm8990_i2c_id); 1247f10485e7SMark Brown 1248f10485e7SMark Brown static struct i2c_driver wm8990_i2c_driver = { 1249f10485e7SMark Brown .driver = { 1250091edccfSMark Brown .name = "wm8990", 1251f10485e7SMark Brown }, 1252e5d3fd38SJean Delvare .probe = wm8990_i2c_probe, 1253e5d3fd38SJean Delvare .id_table = wm8990_i2c_id, 1254f10485e7SMark Brown }; 1255f10485e7SMark Brown 125693818c9aSMark Brown module_i2c_driver(wm8990_i2c_driver); 125764089b84SMark Brown 1258f10485e7SMark Brown MODULE_DESCRIPTION("ASoC WM8990 driver"); 1259f10485e7SMark Brown MODULE_AUTHOR("Liam Girdwood"); 1260f10485e7SMark Brown MODULE_LICENSE("GPL"); 1261