1f10485e7SMark Brown /* 2f10485e7SMark Brown * wm8990.c -- WM8990 ALSA Soc Audio driver 3f10485e7SMark Brown * 4f10485e7SMark Brown * Copyright 2008 Wolfson Microelectronics PLC. 564ca0404SLiam Girdwood * Author: Liam Girdwood <lrg@slimlogic.co.uk> 6f10485e7SMark Brown * 7f10485e7SMark Brown * This program is free software; you can redistribute it and/or modify it 8f10485e7SMark Brown * under the terms of the GNU General Public License as published by the 9f10485e7SMark Brown * Free Software Foundation; either version 2 of the License, or (at your 10f10485e7SMark Brown * option) any later version. 11f10485e7SMark Brown */ 12f10485e7SMark Brown 13f10485e7SMark Brown #include <linux/module.h> 14f10485e7SMark Brown #include <linux/moduleparam.h> 15f10485e7SMark Brown #include <linux/kernel.h> 16f10485e7SMark Brown #include <linux/init.h> 17f10485e7SMark Brown #include <linux/delay.h> 18f10485e7SMark Brown #include <linux/pm.h> 19f10485e7SMark Brown #include <linux/i2c.h> 205a0e3ad6STejun Heo #include <linux/slab.h> 21f10485e7SMark Brown #include <sound/core.h> 22f10485e7SMark Brown #include <sound/pcm.h> 23f10485e7SMark Brown #include <sound/pcm_params.h> 24f10485e7SMark Brown #include <sound/soc.h> 25f10485e7SMark Brown #include <sound/initval.h> 26f10485e7SMark Brown #include <sound/tlv.h> 27f10485e7SMark Brown #include <asm/div64.h> 28f10485e7SMark Brown 29f10485e7SMark Brown #include "wm8990.h" 30f10485e7SMark Brown 31f10485e7SMark Brown /* codec private data */ 32f10485e7SMark Brown struct wm8990_priv { 33f0fba2adSLiam Girdwood enum snd_soc_control_type control_type; 34f10485e7SMark Brown unsigned int sysclk; 35f10485e7SMark Brown unsigned int pcmclk; 36f10485e7SMark Brown }; 37f10485e7SMark Brown 38416a0ce5SAxel Lin static int wm8990_volatile_register(struct snd_soc_codec *codec, 39416a0ce5SAxel Lin unsigned int reg) 40416a0ce5SAxel Lin { 41416a0ce5SAxel Lin switch (reg) { 42416a0ce5SAxel Lin case WM8990_RESET: 43416a0ce5SAxel Lin return 1; 44416a0ce5SAxel Lin default: 45416a0ce5SAxel Lin return 0; 46416a0ce5SAxel Lin } 47416a0ce5SAxel Lin } 48416a0ce5SAxel Lin 49f10485e7SMark Brown static const u16 wm8990_reg[] = { 50f10485e7SMark Brown 0x8990, /* R0 - Reset */ 51f10485e7SMark Brown 0x0000, /* R1 - Power Management (1) */ 52f10485e7SMark Brown 0x6000, /* R2 - Power Management (2) */ 53f10485e7SMark Brown 0x0000, /* R3 - Power Management (3) */ 54f10485e7SMark Brown 0x4050, /* R4 - Audio Interface (1) */ 55f10485e7SMark Brown 0x4000, /* R5 - Audio Interface (2) */ 56f10485e7SMark Brown 0x01C8, /* R6 - Clocking (1) */ 57f10485e7SMark Brown 0x0000, /* R7 - Clocking (2) */ 58f10485e7SMark Brown 0x0040, /* R8 - Audio Interface (3) */ 59f10485e7SMark Brown 0x0040, /* R9 - Audio Interface (4) */ 60f10485e7SMark Brown 0x0004, /* R10 - DAC CTRL */ 61f10485e7SMark Brown 0x00C0, /* R11 - Left DAC Digital Volume */ 62f10485e7SMark Brown 0x00C0, /* R12 - Right DAC Digital Volume */ 63f10485e7SMark Brown 0x0000, /* R13 - Digital Side Tone */ 64f10485e7SMark Brown 0x0100, /* R14 - ADC CTRL */ 65f10485e7SMark Brown 0x00C0, /* R15 - Left ADC Digital Volume */ 66f10485e7SMark Brown 0x00C0, /* R16 - Right ADC Digital Volume */ 67f10485e7SMark Brown 0x0000, /* R17 */ 68f10485e7SMark Brown 0x0000, /* R18 - GPIO CTRL 1 */ 69f10485e7SMark Brown 0x1000, /* R19 - GPIO1 & GPIO2 */ 70f10485e7SMark Brown 0x1010, /* R20 - GPIO3 & GPIO4 */ 71f10485e7SMark Brown 0x1010, /* R21 - GPIO5 & GPIO6 */ 72f10485e7SMark Brown 0x8000, /* R22 - GPIOCTRL 2 */ 73f10485e7SMark Brown 0x0800, /* R23 - GPIO_POL */ 74f10485e7SMark Brown 0x008B, /* R24 - Left Line Input 1&2 Volume */ 75f10485e7SMark Brown 0x008B, /* R25 - Left Line Input 3&4 Volume */ 76f10485e7SMark Brown 0x008B, /* R26 - Right Line Input 1&2 Volume */ 77f10485e7SMark Brown 0x008B, /* R27 - Right Line Input 3&4 Volume */ 78f10485e7SMark Brown 0x0000, /* R28 - Left Output Volume */ 79f10485e7SMark Brown 0x0000, /* R29 - Right Output Volume */ 80f10485e7SMark Brown 0x0066, /* R30 - Line Outputs Volume */ 81f10485e7SMark Brown 0x0022, /* R31 - Out3/4 Volume */ 82f10485e7SMark Brown 0x0079, /* R32 - Left OPGA Volume */ 83f10485e7SMark Brown 0x0079, /* R33 - Right OPGA Volume */ 84f10485e7SMark Brown 0x0003, /* R34 - Speaker Volume */ 85f10485e7SMark Brown 0x0003, /* R35 - ClassD1 */ 86f10485e7SMark Brown 0x0000, /* R36 */ 87f10485e7SMark Brown 0x0100, /* R37 - ClassD3 */ 8897bb8129SMark Brown 0x0079, /* R38 - ClassD4 */ 89f10485e7SMark Brown 0x0000, /* R39 - Input Mixer1 */ 90f10485e7SMark Brown 0x0000, /* R40 - Input Mixer2 */ 91f10485e7SMark Brown 0x0000, /* R41 - Input Mixer3 */ 92f10485e7SMark Brown 0x0000, /* R42 - Input Mixer4 */ 93f10485e7SMark Brown 0x0000, /* R43 - Input Mixer5 */ 94f10485e7SMark Brown 0x0000, /* R44 - Input Mixer6 */ 95f10485e7SMark Brown 0x0000, /* R45 - Output Mixer1 */ 96f10485e7SMark Brown 0x0000, /* R46 - Output Mixer2 */ 97f10485e7SMark Brown 0x0000, /* R47 - Output Mixer3 */ 98f10485e7SMark Brown 0x0000, /* R48 - Output Mixer4 */ 99f10485e7SMark Brown 0x0000, /* R49 - Output Mixer5 */ 100f10485e7SMark Brown 0x0000, /* R50 - Output Mixer6 */ 101f10485e7SMark Brown 0x0180, /* R51 - Out3/4 Mixer */ 102f10485e7SMark Brown 0x0000, /* R52 - Line Mixer1 */ 103f10485e7SMark Brown 0x0000, /* R53 - Line Mixer2 */ 104f10485e7SMark Brown 0x0000, /* R54 - Speaker Mixer */ 105f10485e7SMark Brown 0x0000, /* R55 - Additional Control */ 106f10485e7SMark Brown 0x0000, /* R56 - AntiPOP1 */ 107f10485e7SMark Brown 0x0000, /* R57 - AntiPOP2 */ 108f10485e7SMark Brown 0x0000, /* R58 - MICBIAS */ 109f10485e7SMark Brown 0x0000, /* R59 */ 110f10485e7SMark Brown 0x0008, /* R60 - PLL1 */ 111f10485e7SMark Brown 0x0031, /* R61 - PLL2 */ 112f10485e7SMark Brown 0x0026, /* R62 - PLL3 */ 113ba533e95SMark Brown 0x0000, /* R63 - Driver internal */ 114f10485e7SMark Brown }; 115f10485e7SMark Brown 1168d50e447SMark Brown #define wm8990_reset(c) snd_soc_write(c, WM8990_RESET, 0) 117f10485e7SMark Brown 118021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 600, 0); 119f10485e7SMark Brown 120021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(in_pga_tlv, -1650, 3000, 0); 121f10485e7SMark Brown 122021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(out_mix_tlv, 0, -2100, 0); 123f10485e7SMark Brown 124021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(out_pga_tlv, -7300, 600, 0); 125f10485e7SMark Brown 126021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(out_omix_tlv, -600, 0, 0); 127f10485e7SMark Brown 128021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(out_dac_tlv, -7163, 0, 0); 129f10485e7SMark Brown 130021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(in_adc_tlv, -7163, 1763, 0); 131f10485e7SMark Brown 132021f80ccSMark Brown static const DECLARE_TLV_DB_SCALE(out_sidetone_tlv, -3600, 0, 0); 133f10485e7SMark Brown 134f10485e7SMark Brown static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol, 135f10485e7SMark Brown struct snd_ctl_elem_value *ucontrol) 136f10485e7SMark Brown { 137f10485e7SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 138397d5aeeSJarkko Nikula struct soc_mixer_control *mc = 139397d5aeeSJarkko Nikula (struct soc_mixer_control *)kcontrol->private_value; 140397d5aeeSJarkko Nikula int reg = mc->reg; 141f10485e7SMark Brown int ret; 142f10485e7SMark Brown u16 val; 143f10485e7SMark Brown 144f10485e7SMark Brown ret = snd_soc_put_volsw(kcontrol, ucontrol); 145f10485e7SMark Brown if (ret < 0) 146f10485e7SMark Brown return ret; 147f10485e7SMark Brown 148f10485e7SMark Brown /* now hit the volume update bits (always bit 8) */ 1498d50e447SMark Brown val = snd_soc_read(codec, reg); 1508d50e447SMark Brown return snd_soc_write(codec, reg, val | 0x0100); 151f10485e7SMark Brown } 152f10485e7SMark Brown 153f10485e7SMark Brown #define SOC_WM899X_OUTPGA_SINGLE_R_TLV(xname, reg, shift, max, invert,\ 154f10485e7SMark Brown tlv_array) {\ 155f10485e7SMark Brown .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ 156f10485e7SMark Brown .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ 157f10485e7SMark Brown SNDRV_CTL_ELEM_ACCESS_READWRITE,\ 158f10485e7SMark Brown .tlv.p = (tlv_array), \ 159f10485e7SMark Brown .info = snd_soc_info_volsw, \ 160f10485e7SMark Brown .get = snd_soc_get_volsw, .put = wm899x_outpga_put_volsw_vu, \ 161f10485e7SMark Brown .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) } 162f10485e7SMark Brown 163f10485e7SMark Brown 164f10485e7SMark Brown static const char *wm8990_digital_sidetone[] = 165f10485e7SMark Brown {"None", "Left ADC", "Right ADC", "Reserved"}; 166f10485e7SMark Brown 167f10485e7SMark Brown static const struct soc_enum wm8990_left_digital_sidetone_enum = 168f10485e7SMark Brown SOC_ENUM_SINGLE(WM8990_DIGITAL_SIDE_TONE, 169f10485e7SMark Brown WM8990_ADC_TO_DACL_SHIFT, 170f10485e7SMark Brown WM8990_ADC_TO_DACL_MASK, 171f10485e7SMark Brown wm8990_digital_sidetone); 172f10485e7SMark Brown 173f10485e7SMark Brown static const struct soc_enum wm8990_right_digital_sidetone_enum = 174f10485e7SMark Brown SOC_ENUM_SINGLE(WM8990_DIGITAL_SIDE_TONE, 175f10485e7SMark Brown WM8990_ADC_TO_DACR_SHIFT, 176f10485e7SMark Brown WM8990_ADC_TO_DACR_MASK, 177f10485e7SMark Brown wm8990_digital_sidetone); 178f10485e7SMark Brown 179f10485e7SMark Brown static const char *wm8990_adcmode[] = 180f10485e7SMark Brown {"Hi-fi mode", "Voice mode 1", "Voice mode 2", "Voice mode 3"}; 181f10485e7SMark Brown 182f10485e7SMark Brown static const struct soc_enum wm8990_right_adcmode_enum = 183f10485e7SMark Brown SOC_ENUM_SINGLE(WM8990_ADC_CTRL, 184f10485e7SMark Brown WM8990_ADC_HPF_CUT_SHIFT, 185f10485e7SMark Brown WM8990_ADC_HPF_CUT_MASK, 186f10485e7SMark Brown wm8990_adcmode); 187f10485e7SMark Brown 188f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_snd_controls[] = { 189f10485e7SMark Brown /* INMIXL */ 190f10485e7SMark Brown SOC_SINGLE("LIN12 PGA Boost", WM8990_INPUT_MIXER3, WM8990_L12MNBST_BIT, 1, 0), 191f10485e7SMark Brown SOC_SINGLE("LIN34 PGA Boost", WM8990_INPUT_MIXER3, WM8990_L34MNBST_BIT, 1, 0), 192f10485e7SMark Brown /* INMIXR */ 193f10485e7SMark Brown SOC_SINGLE("RIN12 PGA Boost", WM8990_INPUT_MIXER3, WM8990_R12MNBST_BIT, 1, 0), 194f10485e7SMark Brown SOC_SINGLE("RIN34 PGA Boost", WM8990_INPUT_MIXER3, WM8990_R34MNBST_BIT, 1, 0), 195f10485e7SMark Brown 196f10485e7SMark Brown /* LOMIX */ 197f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER3, 198f10485e7SMark Brown WM8990_LLI3LOVOL_SHIFT, WM8990_LLI3LOVOL_MASK, 1, out_mix_tlv), 199f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3, 200f10485e7SMark Brown WM8990_LR12LOVOL_SHIFT, WM8990_LR12LOVOL_MASK, 1, out_mix_tlv), 201f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3, 202f10485e7SMark Brown WM8990_LL12LOVOL_SHIFT, WM8990_LL12LOVOL_MASK, 1, out_mix_tlv), 203f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER5, 204f10485e7SMark Brown WM8990_LRI3LOVOL_SHIFT, WM8990_LRI3LOVOL_MASK, 1, out_mix_tlv), 205f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8990_OUTPUT_MIXER5, 206f10485e7SMark Brown WM8990_LRBLOVOL_SHIFT, WM8990_LRBLOVOL_MASK, 1, out_mix_tlv), 207f10485e7SMark Brown SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8990_OUTPUT_MIXER5, 208f10485e7SMark Brown WM8990_LRBLOVOL_SHIFT, WM8990_LRBLOVOL_MASK, 1, out_mix_tlv), 209f10485e7SMark Brown 210f10485e7SMark Brown /* ROMIX */ 211f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER4, 212f10485e7SMark Brown WM8990_RRI3ROVOL_SHIFT, WM8990_RRI3ROVOL_MASK, 1, out_mix_tlv), 213f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4, 214f10485e7SMark Brown WM8990_RL12ROVOL_SHIFT, WM8990_RL12ROVOL_MASK, 1, out_mix_tlv), 215f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4, 216f10485e7SMark Brown WM8990_RR12ROVOL_SHIFT, WM8990_RR12ROVOL_MASK, 1, out_mix_tlv), 217f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER6, 218f10485e7SMark Brown WM8990_RLI3ROVOL_SHIFT, WM8990_RLI3ROVOL_MASK, 1, out_mix_tlv), 219f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX AINLMUX Bypass Volume", WM8990_OUTPUT_MIXER6, 220f10485e7SMark Brown WM8990_RLBROVOL_SHIFT, WM8990_RLBROVOL_MASK, 1, out_mix_tlv), 221f10485e7SMark Brown SOC_SINGLE_TLV("ROMIX AINRMUX Bypass Volume", WM8990_OUTPUT_MIXER6, 222f10485e7SMark Brown WM8990_RRBROVOL_SHIFT, WM8990_RRBROVOL_MASK, 1, out_mix_tlv), 223f10485e7SMark Brown 224f10485e7SMark Brown /* LOUT */ 225f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOUT Volume", WM8990_LEFT_OUTPUT_VOLUME, 226f10485e7SMark Brown WM8990_LOUTVOL_SHIFT, WM8990_LOUTVOL_MASK, 0, out_pga_tlv), 227f10485e7SMark Brown SOC_SINGLE("LOUT ZC", WM8990_LEFT_OUTPUT_VOLUME, WM8990_LOZC_BIT, 1, 0), 228f10485e7SMark Brown 229f10485e7SMark Brown /* ROUT */ 230f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROUT Volume", WM8990_RIGHT_OUTPUT_VOLUME, 231f10485e7SMark Brown WM8990_ROUTVOL_SHIFT, WM8990_ROUTVOL_MASK, 0, out_pga_tlv), 232f10485e7SMark Brown SOC_SINGLE("ROUT ZC", WM8990_RIGHT_OUTPUT_VOLUME, WM8990_ROZC_BIT, 1, 0), 233f10485e7SMark Brown 234f10485e7SMark Brown /* LOPGA */ 235f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOPGA Volume", WM8990_LEFT_OPGA_VOLUME, 236f10485e7SMark Brown WM8990_LOPGAVOL_SHIFT, WM8990_LOPGAVOL_MASK, 0, out_pga_tlv), 237f10485e7SMark Brown SOC_SINGLE("LOPGA ZC Switch", WM8990_LEFT_OPGA_VOLUME, 238f10485e7SMark Brown WM8990_LOPGAZC_BIT, 1, 0), 239f10485e7SMark Brown 240f10485e7SMark Brown /* ROPGA */ 241f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROPGA Volume", WM8990_RIGHT_OPGA_VOLUME, 242f10485e7SMark Brown WM8990_ROPGAVOL_SHIFT, WM8990_ROPGAVOL_MASK, 0, out_pga_tlv), 243f10485e7SMark Brown SOC_SINGLE("ROPGA ZC Switch", WM8990_RIGHT_OPGA_VOLUME, 244f10485e7SMark Brown WM8990_ROPGAZC_BIT, 1, 0), 245f10485e7SMark Brown 246f10485e7SMark Brown SOC_SINGLE("LON Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, 247f10485e7SMark Brown WM8990_LONMUTE_BIT, 1, 0), 248f10485e7SMark Brown SOC_SINGLE("LOP Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, 249f10485e7SMark Brown WM8990_LOPMUTE_BIT, 1, 0), 250f10485e7SMark Brown SOC_SINGLE("LOP Attenuation Switch", WM8990_LINE_OUTPUTS_VOLUME, 251f10485e7SMark Brown WM8990_LOATTN_BIT, 1, 0), 252f10485e7SMark Brown SOC_SINGLE("RON Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, 253f10485e7SMark Brown WM8990_RONMUTE_BIT, 1, 0), 254f10485e7SMark Brown SOC_SINGLE("ROP Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, 255f10485e7SMark Brown WM8990_ROPMUTE_BIT, 1, 0), 256f10485e7SMark Brown SOC_SINGLE("ROP Attenuation Switch", WM8990_LINE_OUTPUTS_VOLUME, 257f10485e7SMark Brown WM8990_ROATTN_BIT, 1, 0), 258f10485e7SMark Brown 259f10485e7SMark Brown SOC_SINGLE("OUT3 Mute Switch", WM8990_OUT3_4_VOLUME, 260f10485e7SMark Brown WM8990_OUT3MUTE_BIT, 1, 0), 261f10485e7SMark Brown SOC_SINGLE("OUT3 Attenuation Switch", WM8990_OUT3_4_VOLUME, 262f10485e7SMark Brown WM8990_OUT3ATTN_BIT, 1, 0), 263f10485e7SMark Brown 264f10485e7SMark Brown SOC_SINGLE("OUT4 Mute Switch", WM8990_OUT3_4_VOLUME, 265f10485e7SMark Brown WM8990_OUT4MUTE_BIT, 1, 0), 266f10485e7SMark Brown SOC_SINGLE("OUT4 Attenuation Switch", WM8990_OUT3_4_VOLUME, 267f10485e7SMark Brown WM8990_OUT4ATTN_BIT, 1, 0), 268f10485e7SMark Brown 269f10485e7SMark Brown SOC_SINGLE("Speaker Mode Switch", WM8990_CLASSD1, 270f10485e7SMark Brown WM8990_CDMODE_BIT, 1, 0), 271f10485e7SMark Brown 272f10485e7SMark Brown SOC_SINGLE("Speaker Output Attenuation Volume", WM8990_SPEAKER_VOLUME, 27397bb8129SMark Brown WM8990_SPKATTN_SHIFT, WM8990_SPKATTN_MASK, 0), 274f10485e7SMark Brown SOC_SINGLE("Speaker DC Boost Volume", WM8990_CLASSD3, 275f10485e7SMark Brown WM8990_DCGAIN_SHIFT, WM8990_DCGAIN_MASK, 0), 276f10485e7SMark Brown SOC_SINGLE("Speaker AC Boost Volume", WM8990_CLASSD3, 277f10485e7SMark Brown WM8990_ACGAIN_SHIFT, WM8990_ACGAIN_MASK, 0), 27897bb8129SMark Brown SOC_SINGLE_TLV("Speaker Volume", WM8990_CLASSD4, 27997bb8129SMark Brown WM8990_SPKVOL_SHIFT, WM8990_SPKVOL_MASK, 0, out_pga_tlv), 28097bb8129SMark Brown SOC_SINGLE("Speaker ZC Switch", WM8990_CLASSD4, 28197bb8129SMark Brown WM8990_SPKZC_SHIFT, WM8990_SPKZC_MASK, 0), 282f10485e7SMark Brown 283f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left DAC Digital Volume", 284f10485e7SMark Brown WM8990_LEFT_DAC_DIGITAL_VOLUME, 285f10485e7SMark Brown WM8990_DACL_VOL_SHIFT, 286f10485e7SMark Brown WM8990_DACL_VOL_MASK, 287f10485e7SMark Brown 0, 288f10485e7SMark Brown out_dac_tlv), 289f10485e7SMark Brown 290f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right DAC Digital Volume", 291f10485e7SMark Brown WM8990_RIGHT_DAC_DIGITAL_VOLUME, 292f10485e7SMark Brown WM8990_DACR_VOL_SHIFT, 293f10485e7SMark Brown WM8990_DACR_VOL_MASK, 294f10485e7SMark Brown 0, 295f10485e7SMark Brown out_dac_tlv), 296f10485e7SMark Brown 297f10485e7SMark Brown SOC_ENUM("Left Digital Sidetone", wm8990_left_digital_sidetone_enum), 298f10485e7SMark Brown SOC_ENUM("Right Digital Sidetone", wm8990_right_digital_sidetone_enum), 299f10485e7SMark Brown 300f10485e7SMark Brown SOC_SINGLE_TLV("Left Digital Sidetone Volume", WM8990_DIGITAL_SIDE_TONE, 301f10485e7SMark Brown WM8990_ADCL_DAC_SVOL_SHIFT, WM8990_ADCL_DAC_SVOL_MASK, 0, 302f10485e7SMark Brown out_sidetone_tlv), 303f10485e7SMark Brown SOC_SINGLE_TLV("Right Digital Sidetone Volume", WM8990_DIGITAL_SIDE_TONE, 304f10485e7SMark Brown WM8990_ADCR_DAC_SVOL_SHIFT, WM8990_ADCR_DAC_SVOL_MASK, 0, 305f10485e7SMark Brown out_sidetone_tlv), 306f10485e7SMark Brown 307f10485e7SMark Brown SOC_SINGLE("ADC Digital High Pass Filter Switch", WM8990_ADC_CTRL, 308f10485e7SMark Brown WM8990_ADC_HPF_ENA_BIT, 1, 0), 309f10485e7SMark Brown 310f10485e7SMark Brown SOC_ENUM("ADC HPF Mode", wm8990_right_adcmode_enum), 311f10485e7SMark Brown 312f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left ADC Digital Volume", 313f10485e7SMark Brown WM8990_LEFT_ADC_DIGITAL_VOLUME, 314f10485e7SMark Brown WM8990_ADCL_VOL_SHIFT, 315f10485e7SMark Brown WM8990_ADCL_VOL_MASK, 316f10485e7SMark Brown 0, 317f10485e7SMark Brown in_adc_tlv), 318f10485e7SMark Brown 319f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right ADC Digital Volume", 320f10485e7SMark Brown WM8990_RIGHT_ADC_DIGITAL_VOLUME, 321f10485e7SMark Brown WM8990_ADCR_VOL_SHIFT, 322f10485e7SMark Brown WM8990_ADCR_VOL_MASK, 323f10485e7SMark Brown 0, 324f10485e7SMark Brown in_adc_tlv), 325f10485e7SMark Brown 326f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN12 Volume", 327f10485e7SMark Brown WM8990_LEFT_LINE_INPUT_1_2_VOLUME, 328f10485e7SMark Brown WM8990_LIN12VOL_SHIFT, 329f10485e7SMark Brown WM8990_LIN12VOL_MASK, 330f10485e7SMark Brown 0, 331f10485e7SMark Brown in_pga_tlv), 332f10485e7SMark Brown 333f10485e7SMark Brown SOC_SINGLE("LIN12 ZC Switch", WM8990_LEFT_LINE_INPUT_1_2_VOLUME, 334f10485e7SMark Brown WM8990_LI12ZC_BIT, 1, 0), 335f10485e7SMark Brown 336f10485e7SMark Brown SOC_SINGLE("LIN12 Mute Switch", WM8990_LEFT_LINE_INPUT_1_2_VOLUME, 337f10485e7SMark Brown WM8990_LI12MUTE_BIT, 1, 0), 338f10485e7SMark Brown 339f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN34 Volume", 340f10485e7SMark Brown WM8990_LEFT_LINE_INPUT_3_4_VOLUME, 341f10485e7SMark Brown WM8990_LIN34VOL_SHIFT, 342f10485e7SMark Brown WM8990_LIN34VOL_MASK, 343f10485e7SMark Brown 0, 344f10485e7SMark Brown in_pga_tlv), 345f10485e7SMark Brown 346f10485e7SMark Brown SOC_SINGLE("LIN34 ZC Switch", WM8990_LEFT_LINE_INPUT_3_4_VOLUME, 347f10485e7SMark Brown WM8990_LI34ZC_BIT, 1, 0), 348f10485e7SMark Brown 349f10485e7SMark Brown SOC_SINGLE("LIN34 Mute Switch", WM8990_LEFT_LINE_INPUT_3_4_VOLUME, 350f10485e7SMark Brown WM8990_LI34MUTE_BIT, 1, 0), 351f10485e7SMark Brown 352f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN12 Volume", 353f10485e7SMark Brown WM8990_RIGHT_LINE_INPUT_1_2_VOLUME, 354f10485e7SMark Brown WM8990_RIN12VOL_SHIFT, 355f10485e7SMark Brown WM8990_RIN12VOL_MASK, 356f10485e7SMark Brown 0, 357f10485e7SMark Brown in_pga_tlv), 358f10485e7SMark Brown 359f10485e7SMark Brown SOC_SINGLE("RIN12 ZC Switch", WM8990_RIGHT_LINE_INPUT_1_2_VOLUME, 360f10485e7SMark Brown WM8990_RI12ZC_BIT, 1, 0), 361f10485e7SMark Brown 362f10485e7SMark Brown SOC_SINGLE("RIN12 Mute Switch", WM8990_RIGHT_LINE_INPUT_1_2_VOLUME, 363f10485e7SMark Brown WM8990_RI12MUTE_BIT, 1, 0), 364f10485e7SMark Brown 365f10485e7SMark Brown SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN34 Volume", 366f10485e7SMark Brown WM8990_RIGHT_LINE_INPUT_3_4_VOLUME, 367f10485e7SMark Brown WM8990_RIN34VOL_SHIFT, 368f10485e7SMark Brown WM8990_RIN34VOL_MASK, 369f10485e7SMark Brown 0, 370f10485e7SMark Brown in_pga_tlv), 371f10485e7SMark Brown 372f10485e7SMark Brown SOC_SINGLE("RIN34 ZC Switch", WM8990_RIGHT_LINE_INPUT_3_4_VOLUME, 373f10485e7SMark Brown WM8990_RI34ZC_BIT, 1, 0), 374f10485e7SMark Brown 375f10485e7SMark Brown SOC_SINGLE("RIN34 Mute Switch", WM8990_RIGHT_LINE_INPUT_3_4_VOLUME, 376f10485e7SMark Brown WM8990_RI34MUTE_BIT, 1, 0), 377f10485e7SMark Brown 378f10485e7SMark Brown }; 379f10485e7SMark Brown 380f10485e7SMark Brown /* 381f10485e7SMark Brown * _DAPM_ Controls 382f10485e7SMark Brown */ 383f10485e7SMark Brown 384f10485e7SMark Brown static int inmixer_event(struct snd_soc_dapm_widget *w, 385f10485e7SMark Brown struct snd_kcontrol *kcontrol, int event) 386f10485e7SMark Brown { 387f10485e7SMark Brown u16 reg, fakepower; 388f10485e7SMark Brown 3898d50e447SMark Brown reg = snd_soc_read(w->codec, WM8990_POWER_MANAGEMENT_2); 3908d50e447SMark Brown fakepower = snd_soc_read(w->codec, WM8990_INTDRIVBITS); 391f10485e7SMark Brown 392f10485e7SMark Brown if (fakepower & ((1 << WM8990_INMIXL_PWR_BIT) | 393f10485e7SMark Brown (1 << WM8990_AINLMUX_PWR_BIT))) { 394f10485e7SMark Brown reg |= WM8990_AINL_ENA; 395f10485e7SMark Brown } else { 396f10485e7SMark Brown reg &= ~WM8990_AINL_ENA; 397f10485e7SMark Brown } 398f10485e7SMark Brown 399f10485e7SMark Brown if (fakepower & ((1 << WM8990_INMIXR_PWR_BIT) | 400f10485e7SMark Brown (1 << WM8990_AINRMUX_PWR_BIT))) { 401f10485e7SMark Brown reg |= WM8990_AINR_ENA; 402f10485e7SMark Brown } else { 403790f9325SAxel Lin reg &= ~WM8990_AINR_ENA; 404f10485e7SMark Brown } 4058d50e447SMark Brown snd_soc_write(w->codec, WM8990_POWER_MANAGEMENT_2, reg); 406f10485e7SMark Brown 407f10485e7SMark Brown return 0; 408f10485e7SMark Brown } 409f10485e7SMark Brown 410f10485e7SMark Brown static int outmixer_event(struct snd_soc_dapm_widget *w, 411f10485e7SMark Brown struct snd_kcontrol *kcontrol, int event) 412f10485e7SMark Brown { 413f10485e7SMark Brown u32 reg_shift = kcontrol->private_value & 0xfff; 414f10485e7SMark Brown int ret = 0; 415f10485e7SMark Brown u16 reg; 416f10485e7SMark Brown 417f10485e7SMark Brown switch (reg_shift) { 418f10485e7SMark Brown case WM8990_SPEAKER_MIXER | (WM8990_LDSPK_BIT << 8) : 4198d50e447SMark Brown reg = snd_soc_read(w->codec, WM8990_OUTPUT_MIXER1); 420f10485e7SMark Brown if (reg & WM8990_LDLO) { 421f10485e7SMark Brown printk(KERN_WARNING 422f10485e7SMark Brown "Cannot set as Output Mixer 1 LDLO Set\n"); 423f10485e7SMark Brown ret = -1; 424f10485e7SMark Brown } 425f10485e7SMark Brown break; 426f10485e7SMark Brown case WM8990_SPEAKER_MIXER | (WM8990_RDSPK_BIT << 8): 4278d50e447SMark Brown reg = snd_soc_read(w->codec, WM8990_OUTPUT_MIXER2); 428f10485e7SMark Brown if (reg & WM8990_RDRO) { 429f10485e7SMark Brown printk(KERN_WARNING 430f10485e7SMark Brown "Cannot set as Output Mixer 2 RDRO Set\n"); 431f10485e7SMark Brown ret = -1; 432f10485e7SMark Brown } 433f10485e7SMark Brown break; 434f10485e7SMark Brown case WM8990_OUTPUT_MIXER1 | (WM8990_LDLO_BIT << 8): 4358d50e447SMark Brown reg = snd_soc_read(w->codec, WM8990_SPEAKER_MIXER); 436f10485e7SMark Brown if (reg & WM8990_LDSPK) { 437f10485e7SMark Brown printk(KERN_WARNING 438f10485e7SMark Brown "Cannot set as Speaker Mixer LDSPK Set\n"); 439f10485e7SMark Brown ret = -1; 440f10485e7SMark Brown } 441f10485e7SMark Brown break; 442f10485e7SMark Brown case WM8990_OUTPUT_MIXER2 | (WM8990_RDRO_BIT << 8): 4438d50e447SMark Brown reg = snd_soc_read(w->codec, WM8990_SPEAKER_MIXER); 444f10485e7SMark Brown if (reg & WM8990_RDSPK) { 445f10485e7SMark Brown printk(KERN_WARNING 446f10485e7SMark Brown "Cannot set as Speaker Mixer RDSPK Set\n"); 447f10485e7SMark Brown ret = -1; 448f10485e7SMark Brown } 449f10485e7SMark Brown break; 450f10485e7SMark Brown } 451f10485e7SMark Brown 452f10485e7SMark Brown return ret; 453f10485e7SMark Brown } 454f10485e7SMark Brown 455f10485e7SMark Brown /* INMIX dB values */ 456f10485e7SMark Brown static const unsigned int in_mix_tlv[] = { 457f10485e7SMark Brown TLV_DB_RANGE_HEAD(1), 458021f80ccSMark Brown 0, 7, TLV_DB_SCALE_ITEM(-1200, 600, 0), 459f10485e7SMark Brown }; 460f10485e7SMark Brown 461f10485e7SMark Brown /* Left In PGA Connections */ 462f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lin12_pga_controls[] = { 463f10485e7SMark Brown SOC_DAPM_SINGLE("LIN1 Switch", WM8990_INPUT_MIXER2, WM8990_LMN1_BIT, 1, 0), 464f10485e7SMark Brown SOC_DAPM_SINGLE("LIN2 Switch", WM8990_INPUT_MIXER2, WM8990_LMP2_BIT, 1, 0), 465f10485e7SMark Brown }; 466f10485e7SMark Brown 467f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lin34_pga_controls[] = { 468f10485e7SMark Brown SOC_DAPM_SINGLE("LIN3 Switch", WM8990_INPUT_MIXER2, WM8990_LMN3_BIT, 1, 0), 469f10485e7SMark Brown SOC_DAPM_SINGLE("LIN4 Switch", WM8990_INPUT_MIXER2, WM8990_LMP4_BIT, 1, 0), 470f10485e7SMark Brown }; 471f10485e7SMark Brown 472f10485e7SMark Brown /* Right In PGA Connections */ 473f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_rin12_pga_controls[] = { 474f10485e7SMark Brown SOC_DAPM_SINGLE("RIN1 Switch", WM8990_INPUT_MIXER2, WM8990_RMN1_BIT, 1, 0), 475f10485e7SMark Brown SOC_DAPM_SINGLE("RIN2 Switch", WM8990_INPUT_MIXER2, WM8990_RMP2_BIT, 1, 0), 476f10485e7SMark Brown }; 477f10485e7SMark Brown 478f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_rin34_pga_controls[] = { 479f10485e7SMark Brown SOC_DAPM_SINGLE("RIN3 Switch", WM8990_INPUT_MIXER2, WM8990_RMN3_BIT, 1, 0), 480f10485e7SMark Brown SOC_DAPM_SINGLE("RIN4 Switch", WM8990_INPUT_MIXER2, WM8990_RMP4_BIT, 1, 0), 481f10485e7SMark Brown }; 482f10485e7SMark Brown 483f10485e7SMark Brown /* INMIXL */ 484f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_inmixl_controls[] = { 485f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("Record Left Volume", WM8990_INPUT_MIXER3, 486f10485e7SMark Brown WM8990_LDBVOL_SHIFT, WM8990_LDBVOL_MASK, 0, in_mix_tlv), 487f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("LIN2 Volume", WM8990_INPUT_MIXER5, WM8990_LI2BVOL_SHIFT, 488f10485e7SMark Brown 7, 0, in_mix_tlv), 489f10485e7SMark Brown SOC_DAPM_SINGLE("LINPGA12 Switch", WM8990_INPUT_MIXER3, WM8990_L12MNB_BIT, 490f10485e7SMark Brown 1, 0), 491f10485e7SMark Brown SOC_DAPM_SINGLE("LINPGA34 Switch", WM8990_INPUT_MIXER3, WM8990_L34MNB_BIT, 492f10485e7SMark Brown 1, 0), 493f10485e7SMark Brown }; 494f10485e7SMark Brown 495f10485e7SMark Brown /* INMIXR */ 496f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_inmixr_controls[] = { 497f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("Record Right Volume", WM8990_INPUT_MIXER4, 498f10485e7SMark Brown WM8990_RDBVOL_SHIFT, WM8990_RDBVOL_MASK, 0, in_mix_tlv), 499f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("RIN2 Volume", WM8990_INPUT_MIXER6, WM8990_RI2BVOL_SHIFT, 500f10485e7SMark Brown 7, 0, in_mix_tlv), 501f10485e7SMark Brown SOC_DAPM_SINGLE("RINPGA12 Switch", WM8990_INPUT_MIXER3, WM8990_L12MNB_BIT, 502f10485e7SMark Brown 1, 0), 503f10485e7SMark Brown SOC_DAPM_SINGLE("RINPGA34 Switch", WM8990_INPUT_MIXER3, WM8990_L34MNB_BIT, 504f10485e7SMark Brown 1, 0), 505f10485e7SMark Brown }; 506f10485e7SMark Brown 507f10485e7SMark Brown /* AINLMUX */ 508f10485e7SMark Brown static const char *wm8990_ainlmux[] = 509f10485e7SMark Brown {"INMIXL Mix", "RXVOICE Mix", "DIFFINL Mix"}; 510f10485e7SMark Brown 511f10485e7SMark Brown static const struct soc_enum wm8990_ainlmux_enum = 512f10485e7SMark Brown SOC_ENUM_SINGLE(WM8990_INPUT_MIXER1, WM8990_AINLMODE_SHIFT, 513f10485e7SMark Brown ARRAY_SIZE(wm8990_ainlmux), wm8990_ainlmux); 514f10485e7SMark Brown 515f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_ainlmux_controls = 516f10485e7SMark Brown SOC_DAPM_ENUM("Route", wm8990_ainlmux_enum); 517f10485e7SMark Brown 518f10485e7SMark Brown /* DIFFINL */ 519f10485e7SMark Brown 520f10485e7SMark Brown /* AINRMUX */ 521f10485e7SMark Brown static const char *wm8990_ainrmux[] = 522f10485e7SMark Brown {"INMIXR Mix", "RXVOICE Mix", "DIFFINR Mix"}; 523f10485e7SMark Brown 524f10485e7SMark Brown static const struct soc_enum wm8990_ainrmux_enum = 525f10485e7SMark Brown SOC_ENUM_SINGLE(WM8990_INPUT_MIXER1, WM8990_AINRMODE_SHIFT, 526f10485e7SMark Brown ARRAY_SIZE(wm8990_ainrmux), wm8990_ainrmux); 527f10485e7SMark Brown 528f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_ainrmux_controls = 529f10485e7SMark Brown SOC_DAPM_ENUM("Route", wm8990_ainrmux_enum); 530f10485e7SMark Brown 531f10485e7SMark Brown /* RXVOICE */ 532f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_rxvoice_controls[] = { 533f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("LIN4/RXN", WM8990_INPUT_MIXER5, WM8990_LR4BVOL_SHIFT, 534f10485e7SMark Brown WM8990_LR4BVOL_MASK, 0, in_mix_tlv), 535f10485e7SMark Brown SOC_DAPM_SINGLE_TLV("RIN4/RXP", WM8990_INPUT_MIXER6, WM8990_RL4BVOL_SHIFT, 536f10485e7SMark Brown WM8990_RL4BVOL_MASK, 0, in_mix_tlv), 537f10485e7SMark Brown }; 538f10485e7SMark Brown 539f10485e7SMark Brown /* LOMIX */ 540f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lomix_controls[] = { 541f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX Right ADC Bypass Switch", WM8990_OUTPUT_MIXER1, 542f10485e7SMark Brown WM8990_LRBLO_BIT, 1, 0), 543f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX Left ADC Bypass Switch", WM8990_OUTPUT_MIXER1, 544f10485e7SMark Brown WM8990_LLBLO_BIT, 1, 0), 545f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX RIN3 Bypass Switch", WM8990_OUTPUT_MIXER1, 546f10485e7SMark Brown WM8990_LRI3LO_BIT, 1, 0), 547f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX LIN3 Bypass Switch", WM8990_OUTPUT_MIXER1, 548f10485e7SMark Brown WM8990_LLI3LO_BIT, 1, 0), 549f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX RIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER1, 550f10485e7SMark Brown WM8990_LR12LO_BIT, 1, 0), 551f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX LIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER1, 552f10485e7SMark Brown WM8990_LL12LO_BIT, 1, 0), 553f10485e7SMark Brown SOC_DAPM_SINGLE("LOMIX Left DAC Switch", WM8990_OUTPUT_MIXER1, 554f10485e7SMark Brown WM8990_LDLO_BIT, 1, 0), 555f10485e7SMark Brown }; 556f10485e7SMark Brown 557f10485e7SMark Brown /* ROMIX */ 558f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_romix_controls[] = { 559f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX Left ADC Bypass Switch", WM8990_OUTPUT_MIXER2, 560f10485e7SMark Brown WM8990_RLBRO_BIT, 1, 0), 561f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX Right ADC Bypass Switch", WM8990_OUTPUT_MIXER2, 562f10485e7SMark Brown WM8990_RRBRO_BIT, 1, 0), 563f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX LIN3 Bypass Switch", WM8990_OUTPUT_MIXER2, 564f10485e7SMark Brown WM8990_RLI3RO_BIT, 1, 0), 565f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX RIN3 Bypass Switch", WM8990_OUTPUT_MIXER2, 566f10485e7SMark Brown WM8990_RRI3RO_BIT, 1, 0), 567f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX LIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER2, 568f10485e7SMark Brown WM8990_RL12RO_BIT, 1, 0), 569f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX RIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER2, 570f10485e7SMark Brown WM8990_RR12RO_BIT, 1, 0), 571f10485e7SMark Brown SOC_DAPM_SINGLE("ROMIX Right DAC Switch", WM8990_OUTPUT_MIXER2, 572f10485e7SMark Brown WM8990_RDRO_BIT, 1, 0), 573f10485e7SMark Brown }; 574f10485e7SMark Brown 575f10485e7SMark Brown /* LONMIX */ 576f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lonmix_controls[] = { 577f10485e7SMark Brown SOC_DAPM_SINGLE("LONMIX Left Mixer PGA Switch", WM8990_LINE_MIXER1, 578f10485e7SMark Brown WM8990_LLOPGALON_BIT, 1, 0), 579f10485e7SMark Brown SOC_DAPM_SINGLE("LONMIX Right Mixer PGA Switch", WM8990_LINE_MIXER1, 580f10485e7SMark Brown WM8990_LROPGALON_BIT, 1, 0), 581f10485e7SMark Brown SOC_DAPM_SINGLE("LONMIX Inverted LOP Switch", WM8990_LINE_MIXER1, 582f10485e7SMark Brown WM8990_LOPLON_BIT, 1, 0), 583f10485e7SMark Brown }; 584f10485e7SMark Brown 585f10485e7SMark Brown /* LOPMIX */ 586f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_lopmix_controls[] = { 587f10485e7SMark Brown SOC_DAPM_SINGLE("LOPMIX Right Mic Bypass Switch", WM8990_LINE_MIXER1, 588f10485e7SMark Brown WM8990_LR12LOP_BIT, 1, 0), 589f10485e7SMark Brown SOC_DAPM_SINGLE("LOPMIX Left Mic Bypass Switch", WM8990_LINE_MIXER1, 590f10485e7SMark Brown WM8990_LL12LOP_BIT, 1, 0), 591f10485e7SMark Brown SOC_DAPM_SINGLE("LOPMIX Left Mixer PGA Switch", WM8990_LINE_MIXER1, 592f10485e7SMark Brown WM8990_LLOPGALOP_BIT, 1, 0), 593f10485e7SMark Brown }; 594f10485e7SMark Brown 595f10485e7SMark Brown /* RONMIX */ 596f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_ronmix_controls[] = { 597f10485e7SMark Brown SOC_DAPM_SINGLE("RONMIX Right Mixer PGA Switch", WM8990_LINE_MIXER2, 598f10485e7SMark Brown WM8990_RROPGARON_BIT, 1, 0), 599f10485e7SMark Brown SOC_DAPM_SINGLE("RONMIX Left Mixer PGA Switch", WM8990_LINE_MIXER2, 600f10485e7SMark Brown WM8990_RLOPGARON_BIT, 1, 0), 601f10485e7SMark Brown SOC_DAPM_SINGLE("RONMIX Inverted ROP Switch", WM8990_LINE_MIXER2, 602f10485e7SMark Brown WM8990_ROPRON_BIT, 1, 0), 603f10485e7SMark Brown }; 604f10485e7SMark Brown 605f10485e7SMark Brown /* ROPMIX */ 606f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_ropmix_controls[] = { 607f10485e7SMark Brown SOC_DAPM_SINGLE("ROPMIX Left Mic Bypass Switch", WM8990_LINE_MIXER2, 608f10485e7SMark Brown WM8990_RL12ROP_BIT, 1, 0), 609f10485e7SMark Brown SOC_DAPM_SINGLE("ROPMIX Right Mic Bypass Switch", WM8990_LINE_MIXER2, 610f10485e7SMark Brown WM8990_RR12ROP_BIT, 1, 0), 611f10485e7SMark Brown SOC_DAPM_SINGLE("ROPMIX Right Mixer PGA Switch", WM8990_LINE_MIXER2, 612f10485e7SMark Brown WM8990_RROPGAROP_BIT, 1, 0), 613f10485e7SMark Brown }; 614f10485e7SMark Brown 615f10485e7SMark Brown /* OUT3MIX */ 616f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_out3mix_controls[] = { 617f10485e7SMark Brown SOC_DAPM_SINGLE("OUT3MIX LIN4/RXP Bypass Switch", WM8990_OUT3_4_MIXER, 618f10485e7SMark Brown WM8990_LI4O3_BIT, 1, 0), 619f10485e7SMark Brown SOC_DAPM_SINGLE("OUT3MIX Left Out PGA Switch", WM8990_OUT3_4_MIXER, 620f10485e7SMark Brown WM8990_LPGAO3_BIT, 1, 0), 621f10485e7SMark Brown }; 622f10485e7SMark Brown 623f10485e7SMark Brown /* OUT4MIX */ 624f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_out4mix_controls[] = { 625f10485e7SMark Brown SOC_DAPM_SINGLE("OUT4MIX Right Out PGA Switch", WM8990_OUT3_4_MIXER, 626f10485e7SMark Brown WM8990_RPGAO4_BIT, 1, 0), 627f10485e7SMark Brown SOC_DAPM_SINGLE("OUT4MIX RIN4/RXP Bypass Switch", WM8990_OUT3_4_MIXER, 628f10485e7SMark Brown WM8990_RI4O4_BIT, 1, 0), 629f10485e7SMark Brown }; 630f10485e7SMark Brown 631f10485e7SMark Brown /* SPKMIX */ 632f10485e7SMark Brown static const struct snd_kcontrol_new wm8990_dapm_spkmix_controls[] = { 633f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX LIN2 Bypass Switch", WM8990_SPEAKER_MIXER, 634f10485e7SMark Brown WM8990_LI2SPK_BIT, 1, 0), 635f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX LADC Bypass Switch", WM8990_SPEAKER_MIXER, 636f10485e7SMark Brown WM8990_LB2SPK_BIT, 1, 0), 637f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX Left Mixer PGA Switch", WM8990_SPEAKER_MIXER, 638f10485e7SMark Brown WM8990_LOPGASPK_BIT, 1, 0), 639f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX Left DAC Switch", WM8990_SPEAKER_MIXER, 640f10485e7SMark Brown WM8990_LDSPK_BIT, 1, 0), 641f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX Right DAC Switch", WM8990_SPEAKER_MIXER, 642f10485e7SMark Brown WM8990_RDSPK_BIT, 1, 0), 643f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX Right Mixer PGA Switch", WM8990_SPEAKER_MIXER, 644f10485e7SMark Brown WM8990_ROPGASPK_BIT, 1, 0), 645f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX RADC Bypass Switch", WM8990_SPEAKER_MIXER, 646f10485e7SMark Brown WM8990_RL12ROP_BIT, 1, 0), 647f10485e7SMark Brown SOC_DAPM_SINGLE("SPKMIX RIN2 Bypass Switch", WM8990_SPEAKER_MIXER, 648f10485e7SMark Brown WM8990_RI2SPK_BIT, 1, 0), 649f10485e7SMark Brown }; 650f10485e7SMark Brown 651f10485e7SMark Brown static const struct snd_soc_dapm_widget wm8990_dapm_widgets[] = { 652f10485e7SMark Brown /* Input Side */ 653f10485e7SMark Brown /* Input Lines */ 654f10485e7SMark Brown SND_SOC_DAPM_INPUT("LIN1"), 655f10485e7SMark Brown SND_SOC_DAPM_INPUT("LIN2"), 656f10485e7SMark Brown SND_SOC_DAPM_INPUT("LIN3"), 657f10485e7SMark Brown SND_SOC_DAPM_INPUT("LIN4/RXN"), 658f10485e7SMark Brown SND_SOC_DAPM_INPUT("RIN3"), 659f10485e7SMark Brown SND_SOC_DAPM_INPUT("RIN4/RXP"), 660f10485e7SMark Brown SND_SOC_DAPM_INPUT("RIN1"), 661f10485e7SMark Brown SND_SOC_DAPM_INPUT("RIN2"), 662f10485e7SMark Brown SND_SOC_DAPM_INPUT("Internal ADC Source"), 663f10485e7SMark Brown 664f10485e7SMark Brown /* DACs */ 665f10485e7SMark Brown SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8990_POWER_MANAGEMENT_2, 666f10485e7SMark Brown WM8990_ADCL_ENA_BIT, 0), 667f10485e7SMark Brown SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8990_POWER_MANAGEMENT_2, 668f10485e7SMark Brown WM8990_ADCR_ENA_BIT, 0), 669f10485e7SMark Brown 670f10485e7SMark Brown /* Input PGAs */ 671f10485e7SMark Brown SND_SOC_DAPM_MIXER("LIN12 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_LIN12_ENA_BIT, 672f10485e7SMark Brown 0, &wm8990_dapm_lin12_pga_controls[0], 673f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lin12_pga_controls)), 674f10485e7SMark Brown SND_SOC_DAPM_MIXER("LIN34 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_LIN34_ENA_BIT, 675f10485e7SMark Brown 0, &wm8990_dapm_lin34_pga_controls[0], 676f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lin34_pga_controls)), 677f10485e7SMark Brown SND_SOC_DAPM_MIXER("RIN12 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_RIN12_ENA_BIT, 678f10485e7SMark Brown 0, &wm8990_dapm_rin12_pga_controls[0], 679f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_rin12_pga_controls)), 680f10485e7SMark Brown SND_SOC_DAPM_MIXER("RIN34 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_RIN34_ENA_BIT, 681f10485e7SMark Brown 0, &wm8990_dapm_rin34_pga_controls[0], 682f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_rin34_pga_controls)), 683f10485e7SMark Brown 684f10485e7SMark Brown /* INMIXL */ 685f10485e7SMark Brown SND_SOC_DAPM_MIXER_E("INMIXL", WM8990_INTDRIVBITS, WM8990_INMIXL_PWR_BIT, 0, 686f10485e7SMark Brown &wm8990_dapm_inmixl_controls[0], 687f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_inmixl_controls), 688f10485e7SMark Brown inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), 689f10485e7SMark Brown 690f10485e7SMark Brown /* AINLMUX */ 69197a775c4SJinyoung Park SND_SOC_DAPM_MUX_E("AINLMUX", WM8990_INTDRIVBITS, WM8990_AINLMUX_PWR_BIT, 0, 692f10485e7SMark Brown &wm8990_dapm_ainlmux_controls, inmixer_event, 693f10485e7SMark Brown SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), 694f10485e7SMark Brown 695f10485e7SMark Brown /* INMIXR */ 696f10485e7SMark Brown SND_SOC_DAPM_MIXER_E("INMIXR", WM8990_INTDRIVBITS, WM8990_INMIXR_PWR_BIT, 0, 697f10485e7SMark Brown &wm8990_dapm_inmixr_controls[0], 698f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_inmixr_controls), 699f10485e7SMark Brown inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), 700f10485e7SMark Brown 701f10485e7SMark Brown /* AINRMUX */ 70297a775c4SJinyoung Park SND_SOC_DAPM_MUX_E("AINRMUX", WM8990_INTDRIVBITS, WM8990_AINRMUX_PWR_BIT, 0, 703f10485e7SMark Brown &wm8990_dapm_ainrmux_controls, inmixer_event, 704f10485e7SMark Brown SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), 705f10485e7SMark Brown 706f10485e7SMark Brown /* Output Side */ 707f10485e7SMark Brown /* DACs */ 708f10485e7SMark Brown SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8990_POWER_MANAGEMENT_3, 709f10485e7SMark Brown WM8990_DACL_ENA_BIT, 0), 710f10485e7SMark Brown SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8990_POWER_MANAGEMENT_3, 711f10485e7SMark Brown WM8990_DACR_ENA_BIT, 0), 712f10485e7SMark Brown 713f10485e7SMark Brown /* LOMIX */ 714f10485e7SMark Brown SND_SOC_DAPM_MIXER_E("LOMIX", WM8990_POWER_MANAGEMENT_3, WM8990_LOMIX_ENA_BIT, 715f10485e7SMark Brown 0, &wm8990_dapm_lomix_controls[0], 716f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lomix_controls), 717f10485e7SMark Brown outmixer_event, SND_SOC_DAPM_PRE_REG), 718f10485e7SMark Brown 719f10485e7SMark Brown /* LONMIX */ 720f10485e7SMark Brown SND_SOC_DAPM_MIXER("LONMIX", WM8990_POWER_MANAGEMENT_3, WM8990_LON_ENA_BIT, 0, 721f10485e7SMark Brown &wm8990_dapm_lonmix_controls[0], 722f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lonmix_controls)), 723f10485e7SMark Brown 724f10485e7SMark Brown /* LOPMIX */ 725f10485e7SMark Brown SND_SOC_DAPM_MIXER("LOPMIX", WM8990_POWER_MANAGEMENT_3, WM8990_LOP_ENA_BIT, 0, 726f10485e7SMark Brown &wm8990_dapm_lopmix_controls[0], 727f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_lopmix_controls)), 728f10485e7SMark Brown 729f10485e7SMark Brown /* OUT3MIX */ 730f10485e7SMark Brown SND_SOC_DAPM_MIXER("OUT3MIX", WM8990_POWER_MANAGEMENT_1, WM8990_OUT3_ENA_BIT, 0, 731f10485e7SMark Brown &wm8990_dapm_out3mix_controls[0], 732f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_out3mix_controls)), 733f10485e7SMark Brown 734f10485e7SMark Brown /* SPKMIX */ 735f10485e7SMark Brown SND_SOC_DAPM_MIXER_E("SPKMIX", WM8990_POWER_MANAGEMENT_1, WM8990_SPK_ENA_BIT, 0, 736f10485e7SMark Brown &wm8990_dapm_spkmix_controls[0], 737f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_spkmix_controls), outmixer_event, 738f10485e7SMark Brown SND_SOC_DAPM_PRE_REG), 739f10485e7SMark Brown 740f10485e7SMark Brown /* OUT4MIX */ 741f10485e7SMark Brown SND_SOC_DAPM_MIXER("OUT4MIX", WM8990_POWER_MANAGEMENT_1, WM8990_OUT4_ENA_BIT, 0, 742f10485e7SMark Brown &wm8990_dapm_out4mix_controls[0], 743f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_out4mix_controls)), 744f10485e7SMark Brown 745f10485e7SMark Brown /* ROPMIX */ 746f10485e7SMark Brown SND_SOC_DAPM_MIXER("ROPMIX", WM8990_POWER_MANAGEMENT_3, WM8990_ROP_ENA_BIT, 0, 747f10485e7SMark Brown &wm8990_dapm_ropmix_controls[0], 748f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_ropmix_controls)), 749f10485e7SMark Brown 750f10485e7SMark Brown /* RONMIX */ 751f10485e7SMark Brown SND_SOC_DAPM_MIXER("RONMIX", WM8990_POWER_MANAGEMENT_3, WM8990_RON_ENA_BIT, 0, 752f10485e7SMark Brown &wm8990_dapm_ronmix_controls[0], 753f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_ronmix_controls)), 754f10485e7SMark Brown 755f10485e7SMark Brown /* ROMIX */ 756f10485e7SMark Brown SND_SOC_DAPM_MIXER_E("ROMIX", WM8990_POWER_MANAGEMENT_3, WM8990_ROMIX_ENA_BIT, 757f10485e7SMark Brown 0, &wm8990_dapm_romix_controls[0], 758f10485e7SMark Brown ARRAY_SIZE(wm8990_dapm_romix_controls), 759f10485e7SMark Brown outmixer_event, SND_SOC_DAPM_PRE_REG), 760f10485e7SMark Brown 761f10485e7SMark Brown /* LOUT PGA */ 762f10485e7SMark Brown SND_SOC_DAPM_PGA("LOUT PGA", WM8990_POWER_MANAGEMENT_1, WM8990_LOUT_ENA_BIT, 0, 763f10485e7SMark Brown NULL, 0), 764f10485e7SMark Brown 765f10485e7SMark Brown /* ROUT PGA */ 766f10485e7SMark Brown SND_SOC_DAPM_PGA("ROUT PGA", WM8990_POWER_MANAGEMENT_1, WM8990_ROUT_ENA_BIT, 0, 767f10485e7SMark Brown NULL, 0), 768f10485e7SMark Brown 769f10485e7SMark Brown /* LOPGA */ 770f10485e7SMark Brown SND_SOC_DAPM_PGA("LOPGA", WM8990_POWER_MANAGEMENT_3, WM8990_LOPGA_ENA_BIT, 0, 771f10485e7SMark Brown NULL, 0), 772f10485e7SMark Brown 773f10485e7SMark Brown /* ROPGA */ 774f10485e7SMark Brown SND_SOC_DAPM_PGA("ROPGA", WM8990_POWER_MANAGEMENT_3, WM8990_ROPGA_ENA_BIT, 0, 775f10485e7SMark Brown NULL, 0), 776f10485e7SMark Brown 777f10485e7SMark Brown /* MICBIAS */ 778e1fc3f21SMark Brown SND_SOC_DAPM_SUPPLY("MICBIAS", WM8990_POWER_MANAGEMENT_1, 779e1fc3f21SMark Brown WM8990_MICBIAS_ENA_BIT, 0, NULL, 0), 780f10485e7SMark Brown 781f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("LON"), 782f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("LOP"), 783f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("OUT3"), 784f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("LOUT"), 785f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("SPKN"), 786f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("SPKP"), 787f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("ROUT"), 788f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("OUT4"), 789f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("ROP"), 790f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("RON"), 791f10485e7SMark Brown 792f10485e7SMark Brown SND_SOC_DAPM_OUTPUT("Internal DAC Sink"), 793f10485e7SMark Brown }; 794f10485e7SMark Brown 795f10485e7SMark Brown static const struct snd_soc_dapm_route audio_map[] = { 796f10485e7SMark Brown /* Make DACs turn on when playing even if not mixed into any outputs */ 797f10485e7SMark Brown {"Internal DAC Sink", NULL, "Left DAC"}, 798f10485e7SMark Brown {"Internal DAC Sink", NULL, "Right DAC"}, 799f10485e7SMark Brown 800f10485e7SMark Brown /* Make ADCs turn on when recording even if not mixed from any inputs */ 801f10485e7SMark Brown {"Left ADC", NULL, "Internal ADC Source"}, 802f10485e7SMark Brown {"Right ADC", NULL, "Internal ADC Source"}, 803f10485e7SMark Brown 804f10485e7SMark Brown /* Input Side */ 805f10485e7SMark Brown /* LIN12 PGA */ 806f10485e7SMark Brown {"LIN12 PGA", "LIN1 Switch", "LIN1"}, 807f10485e7SMark Brown {"LIN12 PGA", "LIN2 Switch", "LIN2"}, 808f10485e7SMark Brown /* LIN34 PGA */ 809f10485e7SMark Brown {"LIN34 PGA", "LIN3 Switch", "LIN3"}, 81097a775c4SJinyoung Park {"LIN34 PGA", "LIN4 Switch", "LIN4/RXN"}, 811f10485e7SMark Brown /* INMIXL */ 812f10485e7SMark Brown {"INMIXL", "Record Left Volume", "LOMIX"}, 813f10485e7SMark Brown {"INMIXL", "LIN2 Volume", "LIN2"}, 814f10485e7SMark Brown {"INMIXL", "LINPGA12 Switch", "LIN12 PGA"}, 815f10485e7SMark Brown {"INMIXL", "LINPGA34 Switch", "LIN34 PGA"}, 81697a775c4SJinyoung Park /* AINLMUX */ 81797a775c4SJinyoung Park {"AINLMUX", "INMIXL Mix", "INMIXL"}, 81897a775c4SJinyoung Park {"AINLMUX", "DIFFINL Mix", "LIN12 PGA"}, 81997a775c4SJinyoung Park {"AINLMUX", "DIFFINL Mix", "LIN34 PGA"}, 82097a775c4SJinyoung Park {"AINLMUX", "RXVOICE Mix", "LIN4/RXN"}, 82197a775c4SJinyoung Park {"AINLMUX", "RXVOICE Mix", "RIN4/RXP"}, 822f10485e7SMark Brown /* ADC */ 82397a775c4SJinyoung Park {"Left ADC", NULL, "AINLMUX"}, 824f10485e7SMark Brown 825f10485e7SMark Brown /* RIN12 PGA */ 826f10485e7SMark Brown {"RIN12 PGA", "RIN1 Switch", "RIN1"}, 827f10485e7SMark Brown {"RIN12 PGA", "RIN2 Switch", "RIN2"}, 828f10485e7SMark Brown /* RIN34 PGA */ 829f10485e7SMark Brown {"RIN34 PGA", "RIN3 Switch", "RIN3"}, 83097a775c4SJinyoung Park {"RIN34 PGA", "RIN4 Switch", "RIN4/RXP"}, 831f10485e7SMark Brown /* INMIXL */ 832f10485e7SMark Brown {"INMIXR", "Record Right Volume", "ROMIX"}, 833f10485e7SMark Brown {"INMIXR", "RIN2 Volume", "RIN2"}, 834f10485e7SMark Brown {"INMIXR", "RINPGA12 Switch", "RIN12 PGA"}, 835f10485e7SMark Brown {"INMIXR", "RINPGA34 Switch", "RIN34 PGA"}, 83697a775c4SJinyoung Park /* AINRMUX */ 83797a775c4SJinyoung Park {"AINRMUX", "INMIXR Mix", "INMIXR"}, 83897a775c4SJinyoung Park {"AINRMUX", "DIFFINR Mix", "RIN12 PGA"}, 83997a775c4SJinyoung Park {"AINRMUX", "DIFFINR Mix", "RIN34 PGA"}, 84097a775c4SJinyoung Park {"AINRMUX", "RXVOICE Mix", "LIN4/RXN"}, 84197a775c4SJinyoung Park {"AINRMUX", "RXVOICE Mix", "RIN4/RXP"}, 842f10485e7SMark Brown /* ADC */ 84397a775c4SJinyoung Park {"Right ADC", NULL, "AINRMUX"}, 844f10485e7SMark Brown 845f10485e7SMark Brown /* LOMIX */ 846f10485e7SMark Brown {"LOMIX", "LOMIX RIN3 Bypass Switch", "RIN3"}, 847f10485e7SMark Brown {"LOMIX", "LOMIX LIN3 Bypass Switch", "LIN3"}, 848f10485e7SMark Brown {"LOMIX", "LOMIX LIN12 PGA Bypass Switch", "LIN12 PGA"}, 849f10485e7SMark Brown {"LOMIX", "LOMIX RIN12 PGA Bypass Switch", "RIN12 PGA"}, 850f10485e7SMark Brown {"LOMIX", "LOMIX Right ADC Bypass Switch", "AINRMUX"}, 851f10485e7SMark Brown {"LOMIX", "LOMIX Left ADC Bypass Switch", "AINLMUX"}, 852f10485e7SMark Brown {"LOMIX", "LOMIX Left DAC Switch", "Left DAC"}, 853f10485e7SMark Brown 854f10485e7SMark Brown /* ROMIX */ 855f10485e7SMark Brown {"ROMIX", "ROMIX RIN3 Bypass Switch", "RIN3"}, 856f10485e7SMark Brown {"ROMIX", "ROMIX LIN3 Bypass Switch", "LIN3"}, 857f10485e7SMark Brown {"ROMIX", "ROMIX LIN12 PGA Bypass Switch", "LIN12 PGA"}, 858f10485e7SMark Brown {"ROMIX", "ROMIX RIN12 PGA Bypass Switch", "RIN12 PGA"}, 859f10485e7SMark Brown {"ROMIX", "ROMIX Right ADC Bypass Switch", "AINRMUX"}, 860f10485e7SMark Brown {"ROMIX", "ROMIX Left ADC Bypass Switch", "AINLMUX"}, 861f10485e7SMark Brown {"ROMIX", "ROMIX Right DAC Switch", "Right DAC"}, 862f10485e7SMark Brown 863f10485e7SMark Brown /* SPKMIX */ 864f10485e7SMark Brown {"SPKMIX", "SPKMIX LIN2 Bypass Switch", "LIN2"}, 865f10485e7SMark Brown {"SPKMIX", "SPKMIX RIN2 Bypass Switch", "RIN2"}, 866f10485e7SMark Brown {"SPKMIX", "SPKMIX LADC Bypass Switch", "AINLMUX"}, 867f10485e7SMark Brown {"SPKMIX", "SPKMIX RADC Bypass Switch", "AINRMUX"}, 868f10485e7SMark Brown {"SPKMIX", "SPKMIX Left Mixer PGA Switch", "LOPGA"}, 869f10485e7SMark Brown {"SPKMIX", "SPKMIX Right Mixer PGA Switch", "ROPGA"}, 870f10485e7SMark Brown {"SPKMIX", "SPKMIX Right DAC Switch", "Right DAC"}, 871436a7459SMark Brown {"SPKMIX", "SPKMIX Left DAC Switch", "Left DAC"}, 872f10485e7SMark Brown 873f10485e7SMark Brown /* LONMIX */ 874f10485e7SMark Brown {"LONMIX", "LONMIX Left Mixer PGA Switch", "LOPGA"}, 875f10485e7SMark Brown {"LONMIX", "LONMIX Right Mixer PGA Switch", "ROPGA"}, 876f10485e7SMark Brown {"LONMIX", "LONMIX Inverted LOP Switch", "LOPMIX"}, 877f10485e7SMark Brown 878f10485e7SMark Brown /* LOPMIX */ 879f10485e7SMark Brown {"LOPMIX", "LOPMIX Right Mic Bypass Switch", "RIN12 PGA"}, 880f10485e7SMark Brown {"LOPMIX", "LOPMIX Left Mic Bypass Switch", "LIN12 PGA"}, 881f10485e7SMark Brown {"LOPMIX", "LOPMIX Left Mixer PGA Switch", "LOPGA"}, 882f10485e7SMark Brown 883f10485e7SMark Brown /* OUT3MIX */ 88497a775c4SJinyoung Park {"OUT3MIX", "OUT3MIX LIN4/RXP Bypass Switch", "LIN4/RXN"}, 885f10485e7SMark Brown {"OUT3MIX", "OUT3MIX Left Out PGA Switch", "LOPGA"}, 886f10485e7SMark Brown 887f10485e7SMark Brown /* OUT4MIX */ 888f10485e7SMark Brown {"OUT4MIX", "OUT4MIX Right Out PGA Switch", "ROPGA"}, 889f10485e7SMark Brown {"OUT4MIX", "OUT4MIX RIN4/RXP Bypass Switch", "RIN4/RXP"}, 890f10485e7SMark Brown 891f10485e7SMark Brown /* RONMIX */ 892f10485e7SMark Brown {"RONMIX", "RONMIX Right Mixer PGA Switch", "ROPGA"}, 893f10485e7SMark Brown {"RONMIX", "RONMIX Left Mixer PGA Switch", "LOPGA"}, 894f10485e7SMark Brown {"RONMIX", "RONMIX Inverted ROP Switch", "ROPMIX"}, 895f10485e7SMark Brown 896f10485e7SMark Brown /* ROPMIX */ 897f10485e7SMark Brown {"ROPMIX", "ROPMIX Left Mic Bypass Switch", "LIN12 PGA"}, 898f10485e7SMark Brown {"ROPMIX", "ROPMIX Right Mic Bypass Switch", "RIN12 PGA"}, 899f10485e7SMark Brown {"ROPMIX", "ROPMIX Right Mixer PGA Switch", "ROPGA"}, 900f10485e7SMark Brown 901f10485e7SMark Brown /* Out Mixer PGAs */ 902f10485e7SMark Brown {"LOPGA", NULL, "LOMIX"}, 903f10485e7SMark Brown {"ROPGA", NULL, "ROMIX"}, 904f10485e7SMark Brown 905f10485e7SMark Brown {"LOUT PGA", NULL, "LOMIX"}, 906f10485e7SMark Brown {"ROUT PGA", NULL, "ROMIX"}, 907f10485e7SMark Brown 908f10485e7SMark Brown /* Output Pins */ 909f10485e7SMark Brown {"LON", NULL, "LONMIX"}, 910f10485e7SMark Brown {"LOP", NULL, "LOPMIX"}, 91197a775c4SJinyoung Park {"OUT3", NULL, "OUT3MIX"}, 912f10485e7SMark Brown {"LOUT", NULL, "LOUT PGA"}, 913f10485e7SMark Brown {"SPKN", NULL, "SPKMIX"}, 914f10485e7SMark Brown {"ROUT", NULL, "ROUT PGA"}, 915f10485e7SMark Brown {"OUT4", NULL, "OUT4MIX"}, 916f10485e7SMark Brown {"ROP", NULL, "ROPMIX"}, 917f10485e7SMark Brown {"RON", NULL, "RONMIX"}, 918f10485e7SMark Brown }; 919f10485e7SMark Brown 920f10485e7SMark Brown static int wm8990_add_widgets(struct snd_soc_codec *codec) 921f10485e7SMark Brown { 922ce6120ccSLiam Girdwood struct snd_soc_dapm_context *dapm = &codec->dapm; 923f10485e7SMark Brown 924ce6120ccSLiam Girdwood snd_soc_dapm_new_controls(dapm, wm8990_dapm_widgets, 925ce6120ccSLiam Girdwood ARRAY_SIZE(wm8990_dapm_widgets)); 926f10485e7SMark Brown /* set up the WM8990 audio map */ 927ce6120ccSLiam Girdwood snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map)); 928f10485e7SMark Brown 929f10485e7SMark Brown return 0; 930f10485e7SMark Brown } 931f10485e7SMark Brown 932f10485e7SMark Brown /* PLL divisors */ 933f10485e7SMark Brown struct _pll_div { 934f10485e7SMark Brown u32 div2; 935f10485e7SMark Brown u32 n; 936f10485e7SMark Brown u32 k; 937f10485e7SMark Brown }; 938f10485e7SMark Brown 939f10485e7SMark Brown /* The size in bits of the pll divide multiplied by 10 940f10485e7SMark Brown * to allow rounding later */ 941f10485e7SMark Brown #define FIXED_PLL_SIZE ((1 << 16) * 10) 942f10485e7SMark Brown 943f10485e7SMark Brown static void pll_factors(struct _pll_div *pll_div, unsigned int target, 944f10485e7SMark Brown unsigned int source) 945f10485e7SMark Brown { 946f10485e7SMark Brown u64 Kpart; 947f10485e7SMark Brown unsigned int K, Ndiv, Nmod; 948f10485e7SMark Brown 949f10485e7SMark Brown 950f10485e7SMark Brown Ndiv = target / source; 951f10485e7SMark Brown if (Ndiv < 6) { 952f10485e7SMark Brown source >>= 1; 953f10485e7SMark Brown pll_div->div2 = 1; 954f10485e7SMark Brown Ndiv = target / source; 955f10485e7SMark Brown } else 956f10485e7SMark Brown pll_div->div2 = 0; 957f10485e7SMark Brown 958f10485e7SMark Brown if ((Ndiv < 6) || (Ndiv > 12)) 959f10485e7SMark Brown printk(KERN_WARNING 960449bd54dSRoel Kluin "WM8990 N value outwith recommended range! N = %u\n", Ndiv); 961f10485e7SMark Brown 962f10485e7SMark Brown pll_div->n = Ndiv; 963f10485e7SMark Brown Nmod = target % source; 964f10485e7SMark Brown Kpart = FIXED_PLL_SIZE * (long long)Nmod; 965f10485e7SMark Brown 966f10485e7SMark Brown do_div(Kpart, source); 967f10485e7SMark Brown 968f10485e7SMark Brown K = Kpart & 0xFFFFFFFF; 969f10485e7SMark Brown 970f10485e7SMark Brown /* Check if we need to round */ 971f10485e7SMark Brown if ((K % 10) >= 5) 972f10485e7SMark Brown K += 5; 973f10485e7SMark Brown 974f10485e7SMark Brown /* Move down to proper range now rounding is done */ 975f10485e7SMark Brown K /= 10; 976f10485e7SMark Brown 977f10485e7SMark Brown pll_div->k = K; 978f10485e7SMark Brown } 979f10485e7SMark Brown 98085488037SMark Brown static int wm8990_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, 98185488037SMark Brown int source, unsigned int freq_in, unsigned int freq_out) 982f10485e7SMark Brown { 983f10485e7SMark Brown struct snd_soc_codec *codec = codec_dai->codec; 984f10485e7SMark Brown struct _pll_div pll_div; 985f10485e7SMark Brown 986f10485e7SMark Brown if (freq_in && freq_out) { 987f10485e7SMark Brown pll_factors(&pll_div, freq_out * 4, freq_in); 988f10485e7SMark Brown 989f10485e7SMark Brown /* Turn on PLL */ 99079d07265SAxel Lin snd_soc_update_bits(codec, WM8990_POWER_MANAGEMENT_2, 99179d07265SAxel Lin WM8990_PLL_ENA, WM8990_PLL_ENA); 992f10485e7SMark Brown 993f10485e7SMark Brown /* sysclk comes from PLL */ 99479d07265SAxel Lin snd_soc_update_bits(codec, WM8990_CLOCKING_2, 99579d07265SAxel Lin WM8990_SYSCLK_SRC, WM8990_SYSCLK_SRC); 996f10485e7SMark Brown 9973ad2f3fbSDaniel Mack /* set up N , fractional mode and pre-divisor if necessary */ 9988d50e447SMark Brown snd_soc_write(codec, WM8990_PLL1, pll_div.n | WM8990_SDM | 999f10485e7SMark Brown (pll_div.div2?WM8990_PRESCALE:0)); 10008d50e447SMark Brown snd_soc_write(codec, WM8990_PLL2, (u8)(pll_div.k>>8)); 10018d50e447SMark Brown snd_soc_write(codec, WM8990_PLL3, (u8)(pll_div.k & 0xFF)); 1002f10485e7SMark Brown } else { 100379d07265SAxel Lin /* Turn off PLL */ 100479d07265SAxel Lin snd_soc_update_bits(codec, WM8990_POWER_MANAGEMENT_2, 100579d07265SAxel Lin WM8990_PLL_ENA, 0); 1006f10485e7SMark Brown } 1007f10485e7SMark Brown return 0; 1008f10485e7SMark Brown } 1009f10485e7SMark Brown 1010f10485e7SMark Brown /* 1011f10485e7SMark Brown * Clock after PLL and dividers 1012f10485e7SMark Brown */ 1013e550e17fSLiam Girdwood static int wm8990_set_dai_sysclk(struct snd_soc_dai *codec_dai, 1014f10485e7SMark Brown int clk_id, unsigned int freq, int dir) 1015f10485e7SMark Brown { 1016f10485e7SMark Brown struct snd_soc_codec *codec = codec_dai->codec; 1017b2c812e2SMark Brown struct wm8990_priv *wm8990 = snd_soc_codec_get_drvdata(codec); 1018f10485e7SMark Brown 1019f10485e7SMark Brown wm8990->sysclk = freq; 1020f10485e7SMark Brown return 0; 1021f10485e7SMark Brown } 1022f10485e7SMark Brown 1023f10485e7SMark Brown /* 1024f10485e7SMark Brown * Set's ADC and Voice DAC format. 1025f10485e7SMark Brown */ 1026e550e17fSLiam Girdwood static int wm8990_set_dai_fmt(struct snd_soc_dai *codec_dai, 1027f10485e7SMark Brown unsigned int fmt) 1028f10485e7SMark Brown { 1029f10485e7SMark Brown struct snd_soc_codec *codec = codec_dai->codec; 1030f10485e7SMark Brown u16 audio1, audio3; 1031f10485e7SMark Brown 10328d50e447SMark Brown audio1 = snd_soc_read(codec, WM8990_AUDIO_INTERFACE_1); 10338d50e447SMark Brown audio3 = snd_soc_read(codec, WM8990_AUDIO_INTERFACE_3); 1034f10485e7SMark Brown 1035f10485e7SMark Brown /* set master/slave audio interface */ 1036f10485e7SMark Brown switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1037f10485e7SMark Brown case SND_SOC_DAIFMT_CBS_CFS: 1038f10485e7SMark Brown audio3 &= ~WM8990_AIF_MSTR1; 1039f10485e7SMark Brown break; 1040f10485e7SMark Brown case SND_SOC_DAIFMT_CBM_CFM: 1041f10485e7SMark Brown audio3 |= WM8990_AIF_MSTR1; 1042f10485e7SMark Brown break; 1043f10485e7SMark Brown default: 1044f10485e7SMark Brown return -EINVAL; 1045f10485e7SMark Brown } 1046f10485e7SMark Brown 1047f10485e7SMark Brown audio1 &= ~WM8990_AIF_FMT_MASK; 1048f10485e7SMark Brown 1049f10485e7SMark Brown /* interface format */ 1050f10485e7SMark Brown switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1051f10485e7SMark Brown case SND_SOC_DAIFMT_I2S: 1052f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_I2S; 1053f10485e7SMark Brown audio1 &= ~WM8990_AIF_LRCLK_INV; 1054f10485e7SMark Brown break; 1055f10485e7SMark Brown case SND_SOC_DAIFMT_RIGHT_J: 1056f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_RIGHTJ; 1057f10485e7SMark Brown audio1 &= ~WM8990_AIF_LRCLK_INV; 1058f10485e7SMark Brown break; 1059f10485e7SMark Brown case SND_SOC_DAIFMT_LEFT_J: 1060f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_LEFTJ; 1061f10485e7SMark Brown audio1 &= ~WM8990_AIF_LRCLK_INV; 1062f10485e7SMark Brown break; 1063f10485e7SMark Brown case SND_SOC_DAIFMT_DSP_A: 1064f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_DSP; 1065f10485e7SMark Brown audio1 &= ~WM8990_AIF_LRCLK_INV; 1066f10485e7SMark Brown break; 1067f10485e7SMark Brown case SND_SOC_DAIFMT_DSP_B: 1068f10485e7SMark Brown audio1 |= WM8990_AIF_TMF_DSP | WM8990_AIF_LRCLK_INV; 1069f10485e7SMark Brown break; 1070f10485e7SMark Brown default: 1071f10485e7SMark Brown return -EINVAL; 1072f10485e7SMark Brown } 1073f10485e7SMark Brown 10748d50e447SMark Brown snd_soc_write(codec, WM8990_AUDIO_INTERFACE_1, audio1); 10758d50e447SMark Brown snd_soc_write(codec, WM8990_AUDIO_INTERFACE_3, audio3); 1076f10485e7SMark Brown return 0; 1077f10485e7SMark Brown } 1078f10485e7SMark Brown 1079e550e17fSLiam Girdwood static int wm8990_set_dai_clkdiv(struct snd_soc_dai *codec_dai, 1080f10485e7SMark Brown int div_id, int div) 1081f10485e7SMark Brown { 1082f10485e7SMark Brown struct snd_soc_codec *codec = codec_dai->codec; 1083f10485e7SMark Brown 1084f10485e7SMark Brown switch (div_id) { 1085f10485e7SMark Brown case WM8990_MCLK_DIV: 108679d07265SAxel Lin snd_soc_update_bits(codec, WM8990_CLOCKING_2, 108779d07265SAxel Lin WM8990_MCLK_DIV_MASK, div); 1088f10485e7SMark Brown break; 1089f10485e7SMark Brown case WM8990_DACCLK_DIV: 109079d07265SAxel Lin snd_soc_update_bits(codec, WM8990_CLOCKING_2, 109179d07265SAxel Lin WM8990_DAC_CLKDIV_MASK, div); 1092f10485e7SMark Brown break; 1093f10485e7SMark Brown case WM8990_ADCCLK_DIV: 109479d07265SAxel Lin snd_soc_update_bits(codec, WM8990_CLOCKING_2, 109579d07265SAxel Lin WM8990_ADC_CLKDIV_MASK, div); 1096f10485e7SMark Brown break; 1097f10485e7SMark Brown case WM8990_BCLK_DIV: 109879d07265SAxel Lin snd_soc_update_bits(codec, WM8990_CLOCKING_1, 109979d07265SAxel Lin WM8990_BCLK_DIV_MASK, div); 1100f10485e7SMark Brown break; 1101f10485e7SMark Brown default: 1102f10485e7SMark Brown return -EINVAL; 1103f10485e7SMark Brown } 1104f10485e7SMark Brown 1105f10485e7SMark Brown return 0; 1106f10485e7SMark Brown } 1107f10485e7SMark Brown 1108f10485e7SMark Brown /* 1109f10485e7SMark Brown * Set PCM DAI bit size and sample rate. 1110f10485e7SMark Brown */ 1111f10485e7SMark Brown static int wm8990_hw_params(struct snd_pcm_substream *substream, 1112dee89c4dSMark Brown struct snd_pcm_hw_params *params, 1113dee89c4dSMark Brown struct snd_soc_dai *dai) 1114f10485e7SMark Brown { 1115f10485e7SMark Brown struct snd_soc_pcm_runtime *rtd = substream->private_data; 1116f0fba2adSLiam Girdwood struct snd_soc_codec *codec = rtd->codec; 11178d50e447SMark Brown u16 audio1 = snd_soc_read(codec, WM8990_AUDIO_INTERFACE_1); 1118f10485e7SMark Brown 1119f10485e7SMark Brown audio1 &= ~WM8990_AIF_WL_MASK; 1120f10485e7SMark Brown /* bit size */ 1121f10485e7SMark Brown switch (params_format(params)) { 1122f10485e7SMark Brown case SNDRV_PCM_FORMAT_S16_LE: 1123f10485e7SMark Brown break; 1124f10485e7SMark Brown case SNDRV_PCM_FORMAT_S20_3LE: 1125f10485e7SMark Brown audio1 |= WM8990_AIF_WL_20BITS; 1126f10485e7SMark Brown break; 1127f10485e7SMark Brown case SNDRV_PCM_FORMAT_S24_LE: 1128f10485e7SMark Brown audio1 |= WM8990_AIF_WL_24BITS; 1129f10485e7SMark Brown break; 1130f10485e7SMark Brown case SNDRV_PCM_FORMAT_S32_LE: 1131f10485e7SMark Brown audio1 |= WM8990_AIF_WL_32BITS; 1132f10485e7SMark Brown break; 1133f10485e7SMark Brown } 1134f10485e7SMark Brown 11358d50e447SMark Brown snd_soc_write(codec, WM8990_AUDIO_INTERFACE_1, audio1); 1136f10485e7SMark Brown return 0; 1137f10485e7SMark Brown } 1138f10485e7SMark Brown 1139e550e17fSLiam Girdwood static int wm8990_mute(struct snd_soc_dai *dai, int mute) 1140f10485e7SMark Brown { 1141f10485e7SMark Brown struct snd_soc_codec *codec = dai->codec; 1142f10485e7SMark Brown u16 val; 1143f10485e7SMark Brown 11448d50e447SMark Brown val = snd_soc_read(codec, WM8990_DAC_CTRL) & ~WM8990_DAC_MUTE; 1145f10485e7SMark Brown 1146f10485e7SMark Brown if (mute) 11478d50e447SMark Brown snd_soc_write(codec, WM8990_DAC_CTRL, val | WM8990_DAC_MUTE); 1148f10485e7SMark Brown else 11498d50e447SMark Brown snd_soc_write(codec, WM8990_DAC_CTRL, val); 1150f10485e7SMark Brown 1151f10485e7SMark Brown return 0; 1152f10485e7SMark Brown } 1153f10485e7SMark Brown 1154f10485e7SMark Brown static int wm8990_set_bias_level(struct snd_soc_codec *codec, 1155f10485e7SMark Brown enum snd_soc_bias_level level) 1156f10485e7SMark Brown { 1157416a0ce5SAxel Lin int ret; 1158f10485e7SMark Brown 1159f10485e7SMark Brown switch (level) { 1160f10485e7SMark Brown case SND_SOC_BIAS_ON: 1161f10485e7SMark Brown break; 11622adb9833SMark Brown 1163f10485e7SMark Brown case SND_SOC_BIAS_PREPARE: 11642adb9833SMark Brown /* VMID=2*50k */ 116579d07265SAxel Lin snd_soc_update_bits(codec, WM8990_POWER_MANAGEMENT_1, 116679d07265SAxel Lin WM8990_VMID_MODE_MASK, 0x2); 1167f10485e7SMark Brown break; 11682adb9833SMark Brown 1169f10485e7SMark Brown case SND_SOC_BIAS_STANDBY: 1170ce6120ccSLiam Girdwood if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { 1171416a0ce5SAxel Lin ret = snd_soc_cache_sync(codec); 1172416a0ce5SAxel Lin if (ret < 0) { 1173416a0ce5SAxel Lin dev_err(codec->dev, "Failed to sync cache: %d\n", ret); 1174416a0ce5SAxel Lin return ret; 1175416a0ce5SAxel Lin } 1176416a0ce5SAxel Lin 1177f10485e7SMark Brown /* Enable all output discharge bits */ 11788d50e447SMark Brown snd_soc_write(codec, WM8990_ANTIPOP1, WM8990_DIS_LLINE | 1179f10485e7SMark Brown WM8990_DIS_RLINE | WM8990_DIS_OUT3 | 1180f10485e7SMark Brown WM8990_DIS_OUT4 | WM8990_DIS_LOUT | 1181f10485e7SMark Brown WM8990_DIS_ROUT); 1182f10485e7SMark Brown 1183f10485e7SMark Brown /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */ 11848d50e447SMark Brown snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | 1185f10485e7SMark Brown WM8990_BUFDCOPEN | WM8990_POBCTRL | 1186f10485e7SMark Brown WM8990_VMIDTOG); 1187f10485e7SMark Brown 1188f10485e7SMark Brown /* Delay to allow output caps to discharge */ 11897ebcf5d6SDimitris Papastamos msleep(300); 1190f10485e7SMark Brown 1191f10485e7SMark Brown /* Disable VMIDTOG */ 11928d50e447SMark Brown snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | 1193f10485e7SMark Brown WM8990_BUFDCOPEN | WM8990_POBCTRL); 1194f10485e7SMark Brown 1195f10485e7SMark Brown /* disable all output discharge bits */ 11968d50e447SMark Brown snd_soc_write(codec, WM8990_ANTIPOP1, 0); 1197f10485e7SMark Brown 1198f10485e7SMark Brown /* Enable outputs */ 11998d50e447SMark Brown snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1b00); 1200f10485e7SMark Brown 12017ebcf5d6SDimitris Papastamos msleep(50); 1202f10485e7SMark Brown 1203f10485e7SMark Brown /* Enable VMID at 2x50k */ 12048d50e447SMark Brown snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f02); 1205f10485e7SMark Brown 12067ebcf5d6SDimitris Papastamos msleep(100); 1207f10485e7SMark Brown 1208f10485e7SMark Brown /* Enable VREF */ 12098d50e447SMark Brown snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f03); 1210f10485e7SMark Brown 12117ebcf5d6SDimitris Papastamos msleep(600); 1212f10485e7SMark Brown 1213f10485e7SMark Brown /* Enable BUFIOEN */ 12148d50e447SMark Brown snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | 1215f10485e7SMark Brown WM8990_BUFDCOPEN | WM8990_POBCTRL | 1216f10485e7SMark Brown WM8990_BUFIOEN); 1217f10485e7SMark Brown 1218f10485e7SMark Brown /* Disable outputs */ 12198d50e447SMark Brown snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x3); 1220f10485e7SMark Brown 1221f10485e7SMark Brown /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ 12228d50e447SMark Brown snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_BUFIOEN); 1223f10485e7SMark Brown 1224be1b87c7SMark Brown /* Enable workaround for ADC clocking issue. */ 12258d50e447SMark Brown snd_soc_write(codec, WM8990_EXT_ACCESS_ENA, 0x2); 12268d50e447SMark Brown snd_soc_write(codec, WM8990_EXT_CTL1, 0xa003); 12278d50e447SMark Brown snd_soc_write(codec, WM8990_EXT_ACCESS_ENA, 0); 1228f10485e7SMark Brown } 12292adb9833SMark Brown 12302adb9833SMark Brown /* VMID=2*250k */ 123179d07265SAxel Lin snd_soc_update_bits(codec, WM8990_POWER_MANAGEMENT_1, 123279d07265SAxel Lin WM8990_VMID_MODE_MASK, 0x4); 1233f10485e7SMark Brown break; 1234f10485e7SMark Brown 1235f10485e7SMark Brown case SND_SOC_BIAS_OFF: 1236f10485e7SMark Brown /* Enable POBCTRL and SOFT_ST */ 12378d50e447SMark Brown snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | 1238f10485e7SMark Brown WM8990_POBCTRL | WM8990_BUFIOEN); 1239f10485e7SMark Brown 1240f10485e7SMark Brown /* Enable POBCTRL, SOFT_ST and BUFDCOPEN */ 12418d50e447SMark Brown snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | 1242f10485e7SMark Brown WM8990_BUFDCOPEN | WM8990_POBCTRL | 1243f10485e7SMark Brown WM8990_BUFIOEN); 1244f10485e7SMark Brown 1245f10485e7SMark Brown /* mute DAC */ 124679d07265SAxel Lin snd_soc_update_bits(codec, WM8990_DAC_CTRL, 124779d07265SAxel Lin WM8990_DAC_MUTE, WM8990_DAC_MUTE); 1248f10485e7SMark Brown 1249f10485e7SMark Brown /* Enable any disabled outputs */ 12508d50e447SMark Brown snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f03); 1251f10485e7SMark Brown 1252f10485e7SMark Brown /* Disable VMID */ 12538d50e447SMark Brown snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f01); 1254f10485e7SMark Brown 12557ebcf5d6SDimitris Papastamos msleep(300); 1256f10485e7SMark Brown 1257f10485e7SMark Brown /* Enable all output discharge bits */ 12588d50e447SMark Brown snd_soc_write(codec, WM8990_ANTIPOP1, WM8990_DIS_LLINE | 1259f10485e7SMark Brown WM8990_DIS_RLINE | WM8990_DIS_OUT3 | 1260f10485e7SMark Brown WM8990_DIS_OUT4 | WM8990_DIS_LOUT | 1261f10485e7SMark Brown WM8990_DIS_ROUT); 1262f10485e7SMark Brown 1263f10485e7SMark Brown /* Disable VREF */ 12648d50e447SMark Brown snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x0); 1265f10485e7SMark Brown 1266f10485e7SMark Brown /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ 12678d50e447SMark Brown snd_soc_write(codec, WM8990_ANTIPOP2, 0x0); 1268f10485e7SMark Brown break; 1269f10485e7SMark Brown } 1270f10485e7SMark Brown 1271ce6120ccSLiam Girdwood codec->dapm.bias_level = level; 1272f10485e7SMark Brown return 0; 1273f10485e7SMark Brown } 1274f10485e7SMark Brown 1275f10485e7SMark Brown #define WM8990_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ 1276f10485e7SMark Brown SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \ 1277f10485e7SMark Brown SNDRV_PCM_RATE_48000) 1278f10485e7SMark Brown 1279f10485e7SMark Brown #define WM8990_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 1280f10485e7SMark Brown SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) 1281f10485e7SMark Brown 1282f10485e7SMark Brown /* 1283f10485e7SMark Brown * The WM8990 supports 2 different and mutually exclusive DAI 1284f10485e7SMark Brown * configurations. 1285f10485e7SMark Brown * 1286f10485e7SMark Brown * 1. ADC/DAC on Primary Interface 1287f10485e7SMark Brown * 2. ADC on Primary Interface/DAC on secondary 1288f10485e7SMark Brown */ 128985e7652dSLars-Peter Clausen static const struct snd_soc_dai_ops wm8990_dai_ops = { 12906335d055SEric Miao .hw_params = wm8990_hw_params, 12916335d055SEric Miao .digital_mute = wm8990_mute, 12926335d055SEric Miao .set_fmt = wm8990_set_dai_fmt, 12936335d055SEric Miao .set_clkdiv = wm8990_set_dai_clkdiv, 12946335d055SEric Miao .set_pll = wm8990_set_dai_pll, 12956335d055SEric Miao .set_sysclk = wm8990_set_dai_sysclk, 12966335d055SEric Miao }; 12976335d055SEric Miao 1298f0fba2adSLiam Girdwood static struct snd_soc_dai_driver wm8990_dai = { 1299f10485e7SMark Brown /* ADC/DAC on primary */ 1300f0fba2adSLiam Girdwood .name = "wm8990-hifi", 1301f10485e7SMark Brown .playback = { 1302f10485e7SMark Brown .stream_name = "Playback", 1303f10485e7SMark Brown .channels_min = 1, 1304f10485e7SMark Brown .channels_max = 2, 1305f10485e7SMark Brown .rates = WM8990_RATES, 1306f10485e7SMark Brown .formats = WM8990_FORMATS,}, 1307f10485e7SMark Brown .capture = { 1308f10485e7SMark Brown .stream_name = "Capture", 1309f10485e7SMark Brown .channels_min = 1, 1310f10485e7SMark Brown .channels_max = 2, 1311f10485e7SMark Brown .rates = WM8990_RATES, 1312f10485e7SMark Brown .formats = WM8990_FORMATS,}, 13136335d055SEric Miao .ops = &wm8990_dai_ops, 1314f10485e7SMark Brown }; 1315f10485e7SMark Brown 131684b315eeSLars-Peter Clausen static int wm8990_suspend(struct snd_soc_codec *codec) 1317f10485e7SMark Brown { 1318f10485e7SMark Brown wm8990_set_bias_level(codec, SND_SOC_BIAS_OFF); 1319f10485e7SMark Brown return 0; 1320f10485e7SMark Brown } 1321f10485e7SMark Brown 1322f0fba2adSLiam Girdwood static int wm8990_resume(struct snd_soc_codec *codec) 1323f10485e7SMark Brown { 1324f10485e7SMark Brown wm8990_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 1325f10485e7SMark Brown return 0; 1326f10485e7SMark Brown } 1327f10485e7SMark Brown 1328f10485e7SMark Brown /* 1329f10485e7SMark Brown * initialise the WM8990 driver 1330f10485e7SMark Brown * register the mixer and dsp interfaces with the kernel 1331f10485e7SMark Brown */ 1332f0fba2adSLiam Girdwood static int wm8990_probe(struct snd_soc_codec *codec) 1333f10485e7SMark Brown { 1334f0fba2adSLiam Girdwood int ret; 1335f10485e7SMark Brown 13368d50e447SMark Brown ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C); 13378d50e447SMark Brown if (ret < 0) { 13388d50e447SMark Brown printk(KERN_ERR "wm8990: failed to set cache I/O: %d\n", ret); 1339f0fba2adSLiam Girdwood return ret; 13408d50e447SMark Brown } 13418d50e447SMark Brown 1342f10485e7SMark Brown wm8990_reset(codec); 1343f10485e7SMark Brown 1344f10485e7SMark Brown /* charge output caps */ 1345f10485e7SMark Brown wm8990_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 1346f10485e7SMark Brown 134779d07265SAxel Lin snd_soc_update_bits(codec, WM8990_AUDIO_INTERFACE_4, 134879d07265SAxel Lin WM8990_ALRCGPIO1, WM8990_ALRCGPIO1); 1349f10485e7SMark Brown 135079d07265SAxel Lin snd_soc_update_bits(codec, WM8990_GPIO1_GPIO2, 135179d07265SAxel Lin WM8990_GPIO1_SEL_MASK, 1); 1352f10485e7SMark Brown 135379d07265SAxel Lin snd_soc_update_bits(codec, WM8990_POWER_MANAGEMENT_2, 135479d07265SAxel Lin WM8990_OPCLK_ENA, WM8990_OPCLK_ENA); 1355f10485e7SMark Brown 13568d50e447SMark Brown snd_soc_write(codec, WM8990_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8)); 13578d50e447SMark Brown snd_soc_write(codec, WM8990_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8)); 1358f10485e7SMark Brown 13593e8e1952SIan Molton snd_soc_add_controls(codec, wm8990_snd_controls, 13603e8e1952SIan Molton ARRAY_SIZE(wm8990_snd_controls)); 1361f10485e7SMark Brown wm8990_add_widgets(codec); 1362fe3e78e0SMark Brown 1363f0fba2adSLiam Girdwood return 0; 1364f10485e7SMark Brown } 1365f10485e7SMark Brown 1366f0fba2adSLiam Girdwood /* power down chip */ 1367f0fba2adSLiam Girdwood static int wm8990_remove(struct snd_soc_codec *codec) 1368f0fba2adSLiam Girdwood { 1369f0fba2adSLiam Girdwood wm8990_set_bias_level(codec, SND_SOC_BIAS_OFF); 1370f0fba2adSLiam Girdwood return 0; 1371f0fba2adSLiam Girdwood } 1372f0fba2adSLiam Girdwood 1373f0fba2adSLiam Girdwood static struct snd_soc_codec_driver soc_codec_dev_wm8990 = { 1374f0fba2adSLiam Girdwood .probe = wm8990_probe, 1375f0fba2adSLiam Girdwood .remove = wm8990_remove, 1376f0fba2adSLiam Girdwood .suspend = wm8990_suspend, 1377f0fba2adSLiam Girdwood .resume = wm8990_resume, 1378f0fba2adSLiam Girdwood .set_bias_level = wm8990_set_bias_level, 1379f0fba2adSLiam Girdwood .reg_cache_size = ARRAY_SIZE(wm8990_reg), 1380f0fba2adSLiam Girdwood .reg_word_size = sizeof(u16), 1381f0fba2adSLiam Girdwood .reg_cache_default = wm8990_reg, 1382416a0ce5SAxel Lin .volatile_register = wm8990_volatile_register, 1383f0fba2adSLiam Girdwood }; 1384f10485e7SMark Brown 1385f10485e7SMark Brown #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 1386f0fba2adSLiam Girdwood static __devinit int wm8990_i2c_probe(struct i2c_client *i2c, 1387e5d3fd38SJean Delvare const struct i2c_device_id *id) 1388f10485e7SMark Brown { 1389f0fba2adSLiam Girdwood struct wm8990_priv *wm8990; 1390f10485e7SMark Brown int ret; 1391f10485e7SMark Brown 1392f0fba2adSLiam Girdwood wm8990 = kzalloc(sizeof(struct wm8990_priv), GFP_KERNEL); 1393f0fba2adSLiam Girdwood if (wm8990 == NULL) 1394f0fba2adSLiam Girdwood return -ENOMEM; 1395f10485e7SMark Brown 1396f0fba2adSLiam Girdwood i2c_set_clientdata(i2c, wm8990); 1397f0fba2adSLiam Girdwood 1398f0fba2adSLiam Girdwood ret = snd_soc_register_codec(&i2c->dev, 1399f0fba2adSLiam Girdwood &soc_codec_dev_wm8990, &wm8990_dai, 1); 1400e5d3fd38SJean Delvare if (ret < 0) 1401f0fba2adSLiam Girdwood kfree(wm8990); 1402f10485e7SMark Brown return ret; 1403f10485e7SMark Brown } 1404f10485e7SMark Brown 1405f0fba2adSLiam Girdwood static __devexit int wm8990_i2c_remove(struct i2c_client *client) 1406f10485e7SMark Brown { 1407f0fba2adSLiam Girdwood snd_soc_unregister_codec(&client->dev); 1408f0fba2adSLiam Girdwood kfree(i2c_get_clientdata(client)); 1409f10485e7SMark Brown return 0; 1410f10485e7SMark Brown } 1411f10485e7SMark Brown 1412e5d3fd38SJean Delvare static const struct i2c_device_id wm8990_i2c_id[] = { 1413e5d3fd38SJean Delvare { "wm8990", 0 }, 1414e5d3fd38SJean Delvare { } 1415e5d3fd38SJean Delvare }; 1416e5d3fd38SJean Delvare MODULE_DEVICE_TABLE(i2c, wm8990_i2c_id); 1417f10485e7SMark Brown 1418f10485e7SMark Brown static struct i2c_driver wm8990_i2c_driver = { 1419f10485e7SMark Brown .driver = { 1420*091edccfSMark Brown .name = "wm8990", 1421f10485e7SMark Brown .owner = THIS_MODULE, 1422f10485e7SMark Brown }, 1423e5d3fd38SJean Delvare .probe = wm8990_i2c_probe, 1424f0fba2adSLiam Girdwood .remove = __devexit_p(wm8990_i2c_remove), 1425e5d3fd38SJean Delvare .id_table = wm8990_i2c_id, 1426f10485e7SMark Brown }; 1427f10485e7SMark Brown #endif 1428f10485e7SMark Brown 1429c9b3a40fSTakashi Iwai static int __init wm8990_modinit(void) 143064089b84SMark Brown { 1431f0fba2adSLiam Girdwood int ret = 0; 1432f0fba2adSLiam Girdwood #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 1433f0fba2adSLiam Girdwood ret = i2c_add_driver(&wm8990_i2c_driver); 1434f0fba2adSLiam Girdwood if (ret != 0) { 1435f0fba2adSLiam Girdwood printk(KERN_ERR "Failed to register wm8990 I2C driver: %d\n", 1436f0fba2adSLiam Girdwood ret); 1437f0fba2adSLiam Girdwood } 1438f0fba2adSLiam Girdwood #endif 1439f0fba2adSLiam Girdwood return ret; 144064089b84SMark Brown } 144164089b84SMark Brown module_init(wm8990_modinit); 144264089b84SMark Brown 144364089b84SMark Brown static void __exit wm8990_exit(void) 144464089b84SMark Brown { 1445f0fba2adSLiam Girdwood #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 1446f0fba2adSLiam Girdwood i2c_del_driver(&wm8990_i2c_driver); 1447f0fba2adSLiam Girdwood #endif 144864089b84SMark Brown } 144964089b84SMark Brown module_exit(wm8990_exit); 145064089b84SMark Brown 1451f10485e7SMark Brown MODULE_DESCRIPTION("ASoC WM8990 driver"); 1452f10485e7SMark Brown MODULE_AUTHOR("Liam Girdwood"); 1453f10485e7SMark Brown MODULE_LICENSE("GPL"); 1454