1 /* 2 * wm8988.c -- WM8988 ALSA SoC audio driver 3 * 4 * Copyright 2009 Wolfson Microelectronics plc 5 * Copyright 2005 Openedhand Ltd. 6 * 7 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14 #include <linux/module.h> 15 #include <linux/moduleparam.h> 16 #include <linux/init.h> 17 #include <linux/delay.h> 18 #include <linux/pm.h> 19 #include <linux/i2c.h> 20 #include <linux/spi/spi.h> 21 #include <linux/platform_device.h> 22 #include <linux/slab.h> 23 #include <sound/core.h> 24 #include <sound/pcm.h> 25 #include <sound/pcm_params.h> 26 #include <sound/tlv.h> 27 #include <sound/soc.h> 28 #include <sound/initval.h> 29 30 #include "wm8988.h" 31 32 /* 33 * wm8988 register cache 34 * We can't read the WM8988 register space when we 35 * are using 2 wire for device control, so we cache them instead. 36 */ 37 static const u16 wm8988_reg[] = { 38 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */ 39 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */ 40 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */ 41 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */ 42 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */ 43 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */ 44 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */ 45 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */ 46 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */ 47 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */ 48 0x0079, 0x0079, 0x0079, /* 40 */ 49 }; 50 51 /* codec private data */ 52 struct wm8988_priv { 53 unsigned int sysclk; 54 enum snd_soc_control_type control_type; 55 struct snd_pcm_hw_constraint_list *sysclk_constraints; 56 }; 57 58 #define wm8988_reset(c) snd_soc_write(c, WM8988_RESET, 0) 59 60 /* 61 * WM8988 Controls 62 */ 63 64 static const char *bass_boost_txt[] = {"Linear Control", "Adaptive Boost"}; 65 static const struct soc_enum bass_boost = 66 SOC_ENUM_SINGLE(WM8988_BASS, 7, 2, bass_boost_txt); 67 68 static const char *bass_filter_txt[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" }; 69 static const struct soc_enum bass_filter = 70 SOC_ENUM_SINGLE(WM8988_BASS, 6, 2, bass_filter_txt); 71 72 static const char *treble_txt[] = {"8kHz", "4kHz"}; 73 static const struct soc_enum treble = 74 SOC_ENUM_SINGLE(WM8988_TREBLE, 6, 2, treble_txt); 75 76 static const char *stereo_3d_lc_txt[] = {"200Hz", "500Hz"}; 77 static const struct soc_enum stereo_3d_lc = 78 SOC_ENUM_SINGLE(WM8988_3D, 5, 2, stereo_3d_lc_txt); 79 80 static const char *stereo_3d_uc_txt[] = {"2.2kHz", "1.5kHz"}; 81 static const struct soc_enum stereo_3d_uc = 82 SOC_ENUM_SINGLE(WM8988_3D, 6, 2, stereo_3d_uc_txt); 83 84 static const char *stereo_3d_func_txt[] = {"Capture", "Playback"}; 85 static const struct soc_enum stereo_3d_func = 86 SOC_ENUM_SINGLE(WM8988_3D, 7, 2, stereo_3d_func_txt); 87 88 static const char *alc_func_txt[] = {"Off", "Right", "Left", "Stereo"}; 89 static const struct soc_enum alc_func = 90 SOC_ENUM_SINGLE(WM8988_ALC1, 7, 4, alc_func_txt); 91 92 static const char *ng_type_txt[] = {"Constant PGA Gain", 93 "Mute ADC Output"}; 94 static const struct soc_enum ng_type = 95 SOC_ENUM_SINGLE(WM8988_NGATE, 1, 2, ng_type_txt); 96 97 static const char *deemph_txt[] = {"None", "32Khz", "44.1Khz", "48Khz"}; 98 static const struct soc_enum deemph = 99 SOC_ENUM_SINGLE(WM8988_ADCDAC, 1, 4, deemph_txt); 100 101 static const char *adcpol_txt[] = {"Normal", "L Invert", "R Invert", 102 "L + R Invert"}; 103 static const struct soc_enum adcpol = 104 SOC_ENUM_SINGLE(WM8988_ADCDAC, 5, 4, adcpol_txt); 105 106 static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0); 107 static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1); 108 static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1); 109 static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1); 110 static const DECLARE_TLV_DB_SCALE(bypass_tlv, -1500, 300, 0); 111 112 static const struct snd_kcontrol_new wm8988_snd_controls[] = { 113 114 SOC_ENUM("Bass Boost", bass_boost), 115 SOC_ENUM("Bass Filter", bass_filter), 116 SOC_SINGLE("Bass Volume", WM8988_BASS, 0, 15, 1), 117 118 SOC_SINGLE("Treble Volume", WM8988_TREBLE, 0, 15, 0), 119 SOC_ENUM("Treble Cut-off", treble), 120 121 SOC_SINGLE("3D Switch", WM8988_3D, 0, 1, 0), 122 SOC_SINGLE("3D Volume", WM8988_3D, 1, 15, 0), 123 SOC_ENUM("3D Lower Cut-off", stereo_3d_lc), 124 SOC_ENUM("3D Upper Cut-off", stereo_3d_uc), 125 SOC_ENUM("3D Mode", stereo_3d_func), 126 127 SOC_SINGLE("ALC Capture Target Volume", WM8988_ALC1, 0, 7, 0), 128 SOC_SINGLE("ALC Capture Max Volume", WM8988_ALC1, 4, 7, 0), 129 SOC_ENUM("ALC Capture Function", alc_func), 130 SOC_SINGLE("ALC Capture ZC Switch", WM8988_ALC2, 7, 1, 0), 131 SOC_SINGLE("ALC Capture Hold Time", WM8988_ALC2, 0, 15, 0), 132 SOC_SINGLE("ALC Capture Decay Time", WM8988_ALC3, 4, 15, 0), 133 SOC_SINGLE("ALC Capture Attack Time", WM8988_ALC3, 0, 15, 0), 134 SOC_SINGLE("ALC Capture NG Threshold", WM8988_NGATE, 3, 31, 0), 135 SOC_ENUM("ALC Capture NG Type", ng_type), 136 SOC_SINGLE("ALC Capture NG Switch", WM8988_NGATE, 0, 1, 0), 137 138 SOC_SINGLE("ZC Timeout Switch", WM8988_ADCTL1, 0, 1, 0), 139 140 SOC_DOUBLE_R_TLV("Capture Digital Volume", WM8988_LADC, WM8988_RADC, 141 0, 255, 0, adc_tlv), 142 SOC_DOUBLE_R_TLV("Capture Volume", WM8988_LINVOL, WM8988_RINVOL, 143 0, 63, 0, pga_tlv), 144 SOC_DOUBLE_R("Capture ZC Switch", WM8988_LINVOL, WM8988_RINVOL, 6, 1, 0), 145 SOC_DOUBLE_R("Capture Switch", WM8988_LINVOL, WM8988_RINVOL, 7, 1, 1), 146 147 SOC_ENUM("Playback De-emphasis", deemph), 148 149 SOC_ENUM("Capture Polarity", adcpol), 150 SOC_SINGLE("Playback 6dB Attenuate", WM8988_ADCDAC, 7, 1, 0), 151 SOC_SINGLE("Capture 6dB Attenuate", WM8988_ADCDAC, 8, 1, 0), 152 153 SOC_DOUBLE_R_TLV("PCM Volume", WM8988_LDAC, WM8988_RDAC, 0, 255, 0, dac_tlv), 154 155 SOC_SINGLE_TLV("Left Mixer Left Bypass Volume", WM8988_LOUTM1, 4, 7, 1, 156 bypass_tlv), 157 SOC_SINGLE_TLV("Left Mixer Right Bypass Volume", WM8988_LOUTM2, 4, 7, 1, 158 bypass_tlv), 159 SOC_SINGLE_TLV("Right Mixer Left Bypass Volume", WM8988_ROUTM1, 4, 7, 1, 160 bypass_tlv), 161 SOC_SINGLE_TLV("Right Mixer Right Bypass Volume", WM8988_ROUTM2, 4, 7, 1, 162 bypass_tlv), 163 164 SOC_DOUBLE_R("Output 1 Playback ZC Switch", WM8988_LOUT1V, 165 WM8988_ROUT1V, 7, 1, 0), 166 SOC_DOUBLE_R_TLV("Output 1 Playback Volume", WM8988_LOUT1V, WM8988_ROUT1V, 167 0, 127, 0, out_tlv), 168 169 SOC_DOUBLE_R("Output 2 Playback ZC Switch", WM8988_LOUT2V, 170 WM8988_ROUT2V, 7, 1, 0), 171 SOC_DOUBLE_R_TLV("Output 2 Playback Volume", WM8988_LOUT2V, WM8988_ROUT2V, 172 0, 127, 0, out_tlv), 173 174 }; 175 176 /* 177 * DAPM Controls 178 */ 179 180 static int wm8988_lrc_control(struct snd_soc_dapm_widget *w, 181 struct snd_kcontrol *kcontrol, int event) 182 { 183 struct snd_soc_codec *codec = w->codec; 184 u16 adctl2 = snd_soc_read(codec, WM8988_ADCTL2); 185 186 /* Use the DAC to gate LRC if active, otherwise use ADC */ 187 if (snd_soc_read(codec, WM8988_PWR2) & 0x180) 188 adctl2 &= ~0x4; 189 else 190 adctl2 |= 0x4; 191 192 return snd_soc_write(codec, WM8988_ADCTL2, adctl2); 193 } 194 195 static const char *wm8988_line_texts[] = { 196 "Line 1", "Line 2", "PGA", "Differential"}; 197 198 static const unsigned int wm8988_line_values[] = { 199 0, 1, 3, 4}; 200 201 static const struct soc_enum wm8988_lline_enum = 202 SOC_VALUE_ENUM_SINGLE(WM8988_LOUTM1, 0, 7, 203 ARRAY_SIZE(wm8988_line_texts), 204 wm8988_line_texts, 205 wm8988_line_values); 206 static const struct snd_kcontrol_new wm8988_left_line_controls = 207 SOC_DAPM_VALUE_ENUM("Route", wm8988_lline_enum); 208 209 static const struct soc_enum wm8988_rline_enum = 210 SOC_VALUE_ENUM_SINGLE(WM8988_ROUTM1, 0, 7, 211 ARRAY_SIZE(wm8988_line_texts), 212 wm8988_line_texts, 213 wm8988_line_values); 214 static const struct snd_kcontrol_new wm8988_right_line_controls = 215 SOC_DAPM_VALUE_ENUM("Route", wm8988_lline_enum); 216 217 /* Left Mixer */ 218 static const struct snd_kcontrol_new wm8988_left_mixer_controls[] = { 219 SOC_DAPM_SINGLE("Playback Switch", WM8988_LOUTM1, 8, 1, 0), 220 SOC_DAPM_SINGLE("Left Bypass Switch", WM8988_LOUTM1, 7, 1, 0), 221 SOC_DAPM_SINGLE("Right Playback Switch", WM8988_LOUTM2, 8, 1, 0), 222 SOC_DAPM_SINGLE("Right Bypass Switch", WM8988_LOUTM2, 7, 1, 0), 223 }; 224 225 /* Right Mixer */ 226 static const struct snd_kcontrol_new wm8988_right_mixer_controls[] = { 227 SOC_DAPM_SINGLE("Left Playback Switch", WM8988_ROUTM1, 8, 1, 0), 228 SOC_DAPM_SINGLE("Left Bypass Switch", WM8988_ROUTM1, 7, 1, 0), 229 SOC_DAPM_SINGLE("Playback Switch", WM8988_ROUTM2, 8, 1, 0), 230 SOC_DAPM_SINGLE("Right Bypass Switch", WM8988_ROUTM2, 7, 1, 0), 231 }; 232 233 static const char *wm8988_pga_sel[] = {"Line 1", "Line 2", "Differential"}; 234 static const unsigned int wm8988_pga_val[] = { 0, 1, 3 }; 235 236 /* Left PGA Mux */ 237 static const struct soc_enum wm8988_lpga_enum = 238 SOC_VALUE_ENUM_SINGLE(WM8988_LADCIN, 6, 3, 239 ARRAY_SIZE(wm8988_pga_sel), 240 wm8988_pga_sel, 241 wm8988_pga_val); 242 static const struct snd_kcontrol_new wm8988_left_pga_controls = 243 SOC_DAPM_VALUE_ENUM("Route", wm8988_lpga_enum); 244 245 /* Right PGA Mux */ 246 static const struct soc_enum wm8988_rpga_enum = 247 SOC_VALUE_ENUM_SINGLE(WM8988_RADCIN, 6, 3, 248 ARRAY_SIZE(wm8988_pga_sel), 249 wm8988_pga_sel, 250 wm8988_pga_val); 251 static const struct snd_kcontrol_new wm8988_right_pga_controls = 252 SOC_DAPM_VALUE_ENUM("Route", wm8988_rpga_enum); 253 254 /* Differential Mux */ 255 static const char *wm8988_diff_sel[] = {"Line 1", "Line 2"}; 256 static const struct soc_enum diffmux = 257 SOC_ENUM_SINGLE(WM8988_ADCIN, 8, 2, wm8988_diff_sel); 258 static const struct snd_kcontrol_new wm8988_diffmux_controls = 259 SOC_DAPM_ENUM("Route", diffmux); 260 261 /* Mono ADC Mux */ 262 static const char *wm8988_mono_mux[] = {"Stereo", "Mono (Left)", 263 "Mono (Right)", "Digital Mono"}; 264 static const struct soc_enum monomux = 265 SOC_ENUM_SINGLE(WM8988_ADCIN, 6, 4, wm8988_mono_mux); 266 static const struct snd_kcontrol_new wm8988_monomux_controls = 267 SOC_DAPM_ENUM("Route", monomux); 268 269 static const struct snd_soc_dapm_widget wm8988_dapm_widgets[] = { 270 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8988_PWR1, 1, 0), 271 272 SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0, 273 &wm8988_diffmux_controls), 274 SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0, 275 &wm8988_monomux_controls), 276 SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0, 277 &wm8988_monomux_controls), 278 279 SND_SOC_DAPM_MUX("Left PGA Mux", WM8988_PWR1, 5, 0, 280 &wm8988_left_pga_controls), 281 SND_SOC_DAPM_MUX("Right PGA Mux", WM8988_PWR1, 4, 0, 282 &wm8988_right_pga_controls), 283 284 SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0, 285 &wm8988_left_line_controls), 286 SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0, 287 &wm8988_right_line_controls), 288 289 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8988_PWR1, 2, 0), 290 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8988_PWR1, 3, 0), 291 292 SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8988_PWR2, 7, 0), 293 SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8988_PWR2, 8, 0), 294 295 SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0, 296 &wm8988_left_mixer_controls[0], 297 ARRAY_SIZE(wm8988_left_mixer_controls)), 298 SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0, 299 &wm8988_right_mixer_controls[0], 300 ARRAY_SIZE(wm8988_right_mixer_controls)), 301 302 SND_SOC_DAPM_PGA("Right Out 2", WM8988_PWR2, 3, 0, NULL, 0), 303 SND_SOC_DAPM_PGA("Left Out 2", WM8988_PWR2, 4, 0, NULL, 0), 304 SND_SOC_DAPM_PGA("Right Out 1", WM8988_PWR2, 5, 0, NULL, 0), 305 SND_SOC_DAPM_PGA("Left Out 1", WM8988_PWR2, 6, 0, NULL, 0), 306 307 SND_SOC_DAPM_POST("LRC control", wm8988_lrc_control), 308 309 SND_SOC_DAPM_OUTPUT("LOUT1"), 310 SND_SOC_DAPM_OUTPUT("ROUT1"), 311 SND_SOC_DAPM_OUTPUT("LOUT2"), 312 SND_SOC_DAPM_OUTPUT("ROUT2"), 313 SND_SOC_DAPM_OUTPUT("VREF"), 314 315 SND_SOC_DAPM_INPUT("LINPUT1"), 316 SND_SOC_DAPM_INPUT("LINPUT2"), 317 SND_SOC_DAPM_INPUT("RINPUT1"), 318 SND_SOC_DAPM_INPUT("RINPUT2"), 319 }; 320 321 static const struct snd_soc_dapm_route audio_map[] = { 322 323 { "Left Line Mux", "Line 1", "LINPUT1" }, 324 { "Left Line Mux", "Line 2", "LINPUT2" }, 325 { "Left Line Mux", "PGA", "Left PGA Mux" }, 326 { "Left Line Mux", "Differential", "Differential Mux" }, 327 328 { "Right Line Mux", "Line 1", "RINPUT1" }, 329 { "Right Line Mux", "Line 2", "RINPUT2" }, 330 { "Right Line Mux", "PGA", "Right PGA Mux" }, 331 { "Right Line Mux", "Differential", "Differential Mux" }, 332 333 { "Left PGA Mux", "Line 1", "LINPUT1" }, 334 { "Left PGA Mux", "Line 2", "LINPUT2" }, 335 { "Left PGA Mux", "Differential", "Differential Mux" }, 336 337 { "Right PGA Mux", "Line 1", "RINPUT1" }, 338 { "Right PGA Mux", "Line 2", "RINPUT2" }, 339 { "Right PGA Mux", "Differential", "Differential Mux" }, 340 341 { "Differential Mux", "Line 1", "LINPUT1" }, 342 { "Differential Mux", "Line 1", "RINPUT1" }, 343 { "Differential Mux", "Line 2", "LINPUT2" }, 344 { "Differential Mux", "Line 2", "RINPUT2" }, 345 346 { "Left ADC Mux", "Stereo", "Left PGA Mux" }, 347 { "Left ADC Mux", "Mono (Left)", "Left PGA Mux" }, 348 { "Left ADC Mux", "Digital Mono", "Left PGA Mux" }, 349 350 { "Right ADC Mux", "Stereo", "Right PGA Mux" }, 351 { "Right ADC Mux", "Mono (Right)", "Right PGA Mux" }, 352 { "Right ADC Mux", "Digital Mono", "Right PGA Mux" }, 353 354 { "Left ADC", NULL, "Left ADC Mux" }, 355 { "Right ADC", NULL, "Right ADC Mux" }, 356 357 { "Left Line Mux", "Line 1", "LINPUT1" }, 358 { "Left Line Mux", "Line 2", "LINPUT2" }, 359 { "Left Line Mux", "PGA", "Left PGA Mux" }, 360 { "Left Line Mux", "Differential", "Differential Mux" }, 361 362 { "Right Line Mux", "Line 1", "RINPUT1" }, 363 { "Right Line Mux", "Line 2", "RINPUT2" }, 364 { "Right Line Mux", "PGA", "Right PGA Mux" }, 365 { "Right Line Mux", "Differential", "Differential Mux" }, 366 367 { "Left Mixer", "Playback Switch", "Left DAC" }, 368 { "Left Mixer", "Left Bypass Switch", "Left Line Mux" }, 369 { "Left Mixer", "Right Playback Switch", "Right DAC" }, 370 { "Left Mixer", "Right Bypass Switch", "Right Line Mux" }, 371 372 { "Right Mixer", "Left Playback Switch", "Left DAC" }, 373 { "Right Mixer", "Left Bypass Switch", "Left Line Mux" }, 374 { "Right Mixer", "Playback Switch", "Right DAC" }, 375 { "Right Mixer", "Right Bypass Switch", "Right Line Mux" }, 376 377 { "Left Out 1", NULL, "Left Mixer" }, 378 { "LOUT1", NULL, "Left Out 1" }, 379 { "Right Out 1", NULL, "Right Mixer" }, 380 { "ROUT1", NULL, "Right Out 1" }, 381 382 { "Left Out 2", NULL, "Left Mixer" }, 383 { "LOUT2", NULL, "Left Out 2" }, 384 { "Right Out 2", NULL, "Right Mixer" }, 385 { "ROUT2", NULL, "Right Out 2" }, 386 }; 387 388 struct _coeff_div { 389 u32 mclk; 390 u32 rate; 391 u16 fs; 392 u8 sr:5; 393 u8 usb:1; 394 }; 395 396 /* codec hifi mclk clock divider coefficients */ 397 static const struct _coeff_div coeff_div[] = { 398 /* 8k */ 399 {12288000, 8000, 1536, 0x6, 0x0}, 400 {11289600, 8000, 1408, 0x16, 0x0}, 401 {18432000, 8000, 2304, 0x7, 0x0}, 402 {16934400, 8000, 2112, 0x17, 0x0}, 403 {12000000, 8000, 1500, 0x6, 0x1}, 404 405 /* 11.025k */ 406 {11289600, 11025, 1024, 0x18, 0x0}, 407 {16934400, 11025, 1536, 0x19, 0x0}, 408 {12000000, 11025, 1088, 0x19, 0x1}, 409 410 /* 16k */ 411 {12288000, 16000, 768, 0xa, 0x0}, 412 {18432000, 16000, 1152, 0xb, 0x0}, 413 {12000000, 16000, 750, 0xa, 0x1}, 414 415 /* 22.05k */ 416 {11289600, 22050, 512, 0x1a, 0x0}, 417 {16934400, 22050, 768, 0x1b, 0x0}, 418 {12000000, 22050, 544, 0x1b, 0x1}, 419 420 /* 32k */ 421 {12288000, 32000, 384, 0xc, 0x0}, 422 {18432000, 32000, 576, 0xd, 0x0}, 423 {12000000, 32000, 375, 0xa, 0x1}, 424 425 /* 44.1k */ 426 {11289600, 44100, 256, 0x10, 0x0}, 427 {16934400, 44100, 384, 0x11, 0x0}, 428 {12000000, 44100, 272, 0x11, 0x1}, 429 430 /* 48k */ 431 {12288000, 48000, 256, 0x0, 0x0}, 432 {18432000, 48000, 384, 0x1, 0x0}, 433 {12000000, 48000, 250, 0x0, 0x1}, 434 435 /* 88.2k */ 436 {11289600, 88200, 128, 0x1e, 0x0}, 437 {16934400, 88200, 192, 0x1f, 0x0}, 438 {12000000, 88200, 136, 0x1f, 0x1}, 439 440 /* 96k */ 441 {12288000, 96000, 128, 0xe, 0x0}, 442 {18432000, 96000, 192, 0xf, 0x0}, 443 {12000000, 96000, 125, 0xe, 0x1}, 444 }; 445 446 static inline int get_coeff(int mclk, int rate) 447 { 448 int i; 449 450 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { 451 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) 452 return i; 453 } 454 455 return -EINVAL; 456 } 457 458 /* The set of rates we can generate from the above for each SYSCLK */ 459 460 static unsigned int rates_12288[] = { 461 8000, 12000, 16000, 24000, 24000, 32000, 48000, 96000, 462 }; 463 464 static struct snd_pcm_hw_constraint_list constraints_12288 = { 465 .count = ARRAY_SIZE(rates_12288), 466 .list = rates_12288, 467 }; 468 469 static unsigned int rates_112896[] = { 470 8000, 11025, 22050, 44100, 471 }; 472 473 static struct snd_pcm_hw_constraint_list constraints_112896 = { 474 .count = ARRAY_SIZE(rates_112896), 475 .list = rates_112896, 476 }; 477 478 static unsigned int rates_12[] = { 479 8000, 11025, 12000, 16000, 22050, 2400, 32000, 41100, 48000, 480 48000, 88235, 96000, 481 }; 482 483 static struct snd_pcm_hw_constraint_list constraints_12 = { 484 .count = ARRAY_SIZE(rates_12), 485 .list = rates_12, 486 }; 487 488 /* 489 * Note that this should be called from init rather than from hw_params. 490 */ 491 static int wm8988_set_dai_sysclk(struct snd_soc_dai *codec_dai, 492 int clk_id, unsigned int freq, int dir) 493 { 494 struct snd_soc_codec *codec = codec_dai->codec; 495 struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec); 496 497 switch (freq) { 498 case 11289600: 499 case 18432000: 500 case 22579200: 501 case 36864000: 502 wm8988->sysclk_constraints = &constraints_112896; 503 wm8988->sysclk = freq; 504 return 0; 505 506 case 12288000: 507 case 16934400: 508 case 24576000: 509 case 33868800: 510 wm8988->sysclk_constraints = &constraints_12288; 511 wm8988->sysclk = freq; 512 return 0; 513 514 case 12000000: 515 case 24000000: 516 wm8988->sysclk_constraints = &constraints_12; 517 wm8988->sysclk = freq; 518 return 0; 519 } 520 return -EINVAL; 521 } 522 523 static int wm8988_set_dai_fmt(struct snd_soc_dai *codec_dai, 524 unsigned int fmt) 525 { 526 struct snd_soc_codec *codec = codec_dai->codec; 527 u16 iface = 0; 528 529 /* set master/slave audio interface */ 530 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 531 case SND_SOC_DAIFMT_CBM_CFM: 532 iface = 0x0040; 533 break; 534 case SND_SOC_DAIFMT_CBS_CFS: 535 break; 536 default: 537 return -EINVAL; 538 } 539 540 /* interface format */ 541 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 542 case SND_SOC_DAIFMT_I2S: 543 iface |= 0x0002; 544 break; 545 case SND_SOC_DAIFMT_RIGHT_J: 546 break; 547 case SND_SOC_DAIFMT_LEFT_J: 548 iface |= 0x0001; 549 break; 550 case SND_SOC_DAIFMT_DSP_A: 551 iface |= 0x0003; 552 break; 553 case SND_SOC_DAIFMT_DSP_B: 554 iface |= 0x0013; 555 break; 556 default: 557 return -EINVAL; 558 } 559 560 /* clock inversion */ 561 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 562 case SND_SOC_DAIFMT_NB_NF: 563 break; 564 case SND_SOC_DAIFMT_IB_IF: 565 iface |= 0x0090; 566 break; 567 case SND_SOC_DAIFMT_IB_NF: 568 iface |= 0x0080; 569 break; 570 case SND_SOC_DAIFMT_NB_IF: 571 iface |= 0x0010; 572 break; 573 default: 574 return -EINVAL; 575 } 576 577 snd_soc_write(codec, WM8988_IFACE, iface); 578 return 0; 579 } 580 581 static int wm8988_pcm_startup(struct snd_pcm_substream *substream, 582 struct snd_soc_dai *dai) 583 { 584 struct snd_soc_codec *codec = dai->codec; 585 struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec); 586 587 /* The set of sample rates that can be supported depends on the 588 * MCLK supplied to the CODEC - enforce this. 589 */ 590 if (!wm8988->sysclk) { 591 dev_err(codec->dev, 592 "No MCLK configured, call set_sysclk() on init\n"); 593 return -EINVAL; 594 } 595 596 snd_pcm_hw_constraint_list(substream->runtime, 0, 597 SNDRV_PCM_HW_PARAM_RATE, 598 wm8988->sysclk_constraints); 599 600 return 0; 601 } 602 603 static int wm8988_pcm_hw_params(struct snd_pcm_substream *substream, 604 struct snd_pcm_hw_params *params, 605 struct snd_soc_dai *dai) 606 { 607 struct snd_soc_pcm_runtime *rtd = substream->private_data; 608 struct snd_soc_codec *codec = rtd->codec; 609 struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec); 610 u16 iface = snd_soc_read(codec, WM8988_IFACE) & 0x1f3; 611 u16 srate = snd_soc_read(codec, WM8988_SRATE) & 0x180; 612 int coeff; 613 614 coeff = get_coeff(wm8988->sysclk, params_rate(params)); 615 if (coeff < 0) { 616 coeff = get_coeff(wm8988->sysclk / 2, params_rate(params)); 617 srate |= 0x40; 618 } 619 if (coeff < 0) { 620 dev_err(codec->dev, 621 "Unable to configure sample rate %dHz with %dHz MCLK\n", 622 params_rate(params), wm8988->sysclk); 623 return coeff; 624 } 625 626 /* bit size */ 627 switch (params_format(params)) { 628 case SNDRV_PCM_FORMAT_S16_LE: 629 break; 630 case SNDRV_PCM_FORMAT_S20_3LE: 631 iface |= 0x0004; 632 break; 633 case SNDRV_PCM_FORMAT_S24_LE: 634 iface |= 0x0008; 635 break; 636 case SNDRV_PCM_FORMAT_S32_LE: 637 iface |= 0x000c; 638 break; 639 } 640 641 /* set iface & srate */ 642 snd_soc_write(codec, WM8988_IFACE, iface); 643 if (coeff >= 0) 644 snd_soc_write(codec, WM8988_SRATE, srate | 645 (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb); 646 647 return 0; 648 } 649 650 static int wm8988_mute(struct snd_soc_dai *dai, int mute) 651 { 652 struct snd_soc_codec *codec = dai->codec; 653 u16 mute_reg = snd_soc_read(codec, WM8988_ADCDAC) & 0xfff7; 654 655 if (mute) 656 snd_soc_write(codec, WM8988_ADCDAC, mute_reg | 0x8); 657 else 658 snd_soc_write(codec, WM8988_ADCDAC, mute_reg); 659 return 0; 660 } 661 662 static int wm8988_set_bias_level(struct snd_soc_codec *codec, 663 enum snd_soc_bias_level level) 664 { 665 u16 pwr_reg = snd_soc_read(codec, WM8988_PWR1) & ~0x1c1; 666 667 switch (level) { 668 case SND_SOC_BIAS_ON: 669 break; 670 671 case SND_SOC_BIAS_PREPARE: 672 /* VREF, VMID=2x50k, digital enabled */ 673 snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x00c0); 674 break; 675 676 case SND_SOC_BIAS_STANDBY: 677 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { 678 snd_soc_cache_sync(codec); 679 680 /* VREF, VMID=2x5k */ 681 snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x1c1); 682 683 /* Charge caps */ 684 msleep(100); 685 } 686 687 /* VREF, VMID=2*500k, digital stopped */ 688 snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x0141); 689 break; 690 691 case SND_SOC_BIAS_OFF: 692 snd_soc_write(codec, WM8988_PWR1, 0x0000); 693 break; 694 } 695 codec->dapm.bias_level = level; 696 return 0; 697 } 698 699 #define WM8988_RATES SNDRV_PCM_RATE_8000_96000 700 701 #define WM8988_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 702 SNDRV_PCM_FMTBIT_S24_LE) 703 704 static struct snd_soc_dai_ops wm8988_ops = { 705 .startup = wm8988_pcm_startup, 706 .hw_params = wm8988_pcm_hw_params, 707 .set_fmt = wm8988_set_dai_fmt, 708 .set_sysclk = wm8988_set_dai_sysclk, 709 .digital_mute = wm8988_mute, 710 }; 711 712 static struct snd_soc_dai_driver wm8988_dai = { 713 .name = "wm8988-hifi", 714 .playback = { 715 .stream_name = "Playback", 716 .channels_min = 1, 717 .channels_max = 2, 718 .rates = WM8988_RATES, 719 .formats = WM8988_FORMATS, 720 }, 721 .capture = { 722 .stream_name = "Capture", 723 .channels_min = 1, 724 .channels_max = 2, 725 .rates = WM8988_RATES, 726 .formats = WM8988_FORMATS, 727 }, 728 .ops = &wm8988_ops, 729 .symmetric_rates = 1, 730 }; 731 732 static int wm8988_suspend(struct snd_soc_codec *codec, pm_message_t state) 733 { 734 wm8988_set_bias_level(codec, SND_SOC_BIAS_OFF); 735 return 0; 736 } 737 738 static int wm8988_resume(struct snd_soc_codec *codec) 739 { 740 wm8988_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 741 return 0; 742 } 743 744 static int wm8988_probe(struct snd_soc_codec *codec) 745 { 746 struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec); 747 struct snd_soc_dapm_context *dapm = &codec->dapm; 748 int ret = 0; 749 750 ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8988->control_type); 751 if (ret < 0) { 752 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); 753 return ret; 754 } 755 756 ret = wm8988_reset(codec); 757 if (ret < 0) { 758 dev_err(codec->dev, "Failed to issue reset\n"); 759 return ret; 760 } 761 762 /* set the update bits (we always update left then right) */ 763 snd_soc_update_bits(codec, WM8988_RADC, 0x0100, 0x0100); 764 snd_soc_update_bits(codec, WM8988_RDAC, 0x0100, 0x0100); 765 snd_soc_update_bits(codec, WM8988_ROUT1V, 0x0100, 0x0100); 766 snd_soc_update_bits(codec, WM8988_ROUT2V, 0x0100, 0x0100); 767 snd_soc_update_bits(codec, WM8988_RINVOL, 0x0100, 0x0100); 768 769 wm8988_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 770 771 snd_soc_add_controls(codec, wm8988_snd_controls, 772 ARRAY_SIZE(wm8988_snd_controls)); 773 snd_soc_dapm_new_controls(dapm, wm8988_dapm_widgets, 774 ARRAY_SIZE(wm8988_dapm_widgets)); 775 snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map)); 776 777 return 0; 778 } 779 780 static int wm8988_remove(struct snd_soc_codec *codec) 781 { 782 wm8988_set_bias_level(codec, SND_SOC_BIAS_OFF); 783 return 0; 784 } 785 786 static struct snd_soc_codec_driver soc_codec_dev_wm8988 = { 787 .probe = wm8988_probe, 788 .remove = wm8988_remove, 789 .suspend = wm8988_suspend, 790 .resume = wm8988_resume, 791 .set_bias_level = wm8988_set_bias_level, 792 .reg_cache_size = ARRAY_SIZE(wm8988_reg), 793 .reg_word_size = sizeof(u16), 794 .reg_cache_default = wm8988_reg, 795 }; 796 797 #if defined(CONFIG_SPI_MASTER) 798 static int __devinit wm8988_spi_probe(struct spi_device *spi) 799 { 800 struct wm8988_priv *wm8988; 801 int ret; 802 803 wm8988 = kzalloc(sizeof(struct wm8988_priv), GFP_KERNEL); 804 if (wm8988 == NULL) 805 return -ENOMEM; 806 807 wm8988->control_type = SND_SOC_SPI; 808 spi_set_drvdata(spi, wm8988); 809 810 ret = snd_soc_register_codec(&spi->dev, 811 &soc_codec_dev_wm8988, &wm8988_dai, 1); 812 if (ret < 0) 813 kfree(wm8988); 814 return ret; 815 } 816 817 static int __devexit wm8988_spi_remove(struct spi_device *spi) 818 { 819 snd_soc_unregister_codec(&spi->dev); 820 kfree(spi_get_drvdata(spi)); 821 return 0; 822 } 823 824 static struct spi_driver wm8988_spi_driver = { 825 .driver = { 826 .name = "wm8988-codec", 827 .owner = THIS_MODULE, 828 }, 829 .probe = wm8988_spi_probe, 830 .remove = __devexit_p(wm8988_spi_remove), 831 }; 832 #endif /* CONFIG_SPI_MASTER */ 833 834 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 835 static __devinit int wm8988_i2c_probe(struct i2c_client *i2c, 836 const struct i2c_device_id *id) 837 { 838 struct wm8988_priv *wm8988; 839 int ret; 840 841 wm8988 = kzalloc(sizeof(struct wm8988_priv), GFP_KERNEL); 842 if (wm8988 == NULL) 843 return -ENOMEM; 844 845 i2c_set_clientdata(i2c, wm8988); 846 wm8988->control_type = SND_SOC_I2C; 847 848 ret = snd_soc_register_codec(&i2c->dev, 849 &soc_codec_dev_wm8988, &wm8988_dai, 1); 850 if (ret < 0) 851 kfree(wm8988); 852 return ret; 853 } 854 855 static __devexit int wm8988_i2c_remove(struct i2c_client *client) 856 { 857 snd_soc_unregister_codec(&client->dev); 858 kfree(i2c_get_clientdata(client)); 859 return 0; 860 } 861 862 static const struct i2c_device_id wm8988_i2c_id[] = { 863 { "wm8988", 0 }, 864 { } 865 }; 866 MODULE_DEVICE_TABLE(i2c, wm8988_i2c_id); 867 868 static struct i2c_driver wm8988_i2c_driver = { 869 .driver = { 870 .name = "wm8988-codec", 871 .owner = THIS_MODULE, 872 }, 873 .probe = wm8988_i2c_probe, 874 .remove = __devexit_p(wm8988_i2c_remove), 875 .id_table = wm8988_i2c_id, 876 }; 877 #endif 878 879 static int __init wm8988_modinit(void) 880 { 881 int ret = 0; 882 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 883 ret = i2c_add_driver(&wm8988_i2c_driver); 884 if (ret != 0) { 885 printk(KERN_ERR "Failed to register WM8988 I2C driver: %d\n", 886 ret); 887 } 888 #endif 889 #if defined(CONFIG_SPI_MASTER) 890 ret = spi_register_driver(&wm8988_spi_driver); 891 if (ret != 0) { 892 printk(KERN_ERR "Failed to register WM8988 SPI driver: %d\n", 893 ret); 894 } 895 #endif 896 return ret; 897 } 898 module_init(wm8988_modinit); 899 900 static void __exit wm8988_exit(void) 901 { 902 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 903 i2c_del_driver(&wm8988_i2c_driver); 904 #endif 905 #if defined(CONFIG_SPI_MASTER) 906 spi_unregister_driver(&wm8988_spi_driver); 907 #endif 908 } 909 module_exit(wm8988_exit); 910 911 912 MODULE_DESCRIPTION("ASoC WM8988 driver"); 913 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); 914 MODULE_LICENSE("GPL"); 915