xref: /linux/sound/soc/codecs/wm8978.h (revision 93d90ad708b8da6efc0e487b66111aa9db7f70c7)
1 /*
2  * wm8978.h		--  codec driver for WM8978
3  *
4  * Copyright 2009 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10 
11 #ifndef __WM8978_H__
12 #define __WM8978_H__
13 
14 /*
15  * Register values.
16  */
17 #define WM8978_RESET				0x00
18 #define WM8978_POWER_MANAGEMENT_1		0x01
19 #define WM8978_POWER_MANAGEMENT_2		0x02
20 #define WM8978_POWER_MANAGEMENT_3		0x03
21 #define WM8978_AUDIO_INTERFACE			0x04
22 #define WM8978_COMPANDING_CONTROL		0x05
23 #define WM8978_CLOCKING				0x06
24 #define WM8978_ADDITIONAL_CONTROL		0x07
25 #define WM8978_GPIO_CONTROL			0x08
26 #define WM8978_JACK_DETECT_CONTROL_1		0x09
27 #define WM8978_DAC_CONTROL			0x0A
28 #define WM8978_LEFT_DAC_DIGITAL_VOLUME		0x0B
29 #define WM8978_RIGHT_DAC_DIGITAL_VOLUME		0x0C
30 #define WM8978_JACK_DETECT_CONTROL_2		0x0D
31 #define WM8978_ADC_CONTROL			0x0E
32 #define WM8978_LEFT_ADC_DIGITAL_VOLUME		0x0F
33 #define WM8978_RIGHT_ADC_DIGITAL_VOLUME		0x10
34 #define WM8978_EQ1				0x12
35 #define WM8978_EQ2				0x13
36 #define WM8978_EQ3				0x14
37 #define WM8978_EQ4				0x15
38 #define WM8978_EQ5				0x16
39 #define WM8978_DAC_LIMITER_1			0x18
40 #define WM8978_DAC_LIMITER_2			0x19
41 #define WM8978_NOTCH_FILTER_1			0x1b
42 #define WM8978_NOTCH_FILTER_2			0x1c
43 #define WM8978_NOTCH_FILTER_3			0x1d
44 #define WM8978_NOTCH_FILTER_4			0x1e
45 #define WM8978_ALC_CONTROL_1			0x20
46 #define WM8978_ALC_CONTROL_2			0x21
47 #define WM8978_ALC_CONTROL_3			0x22
48 #define WM8978_NOISE_GATE			0x23
49 #define WM8978_PLL_N				0x24
50 #define WM8978_PLL_K1				0x25
51 #define WM8978_PLL_K2				0x26
52 #define WM8978_PLL_K3				0x27
53 #define WM8978_3D_CONTROL			0x29
54 #define WM8978_BEEP_CONTROL			0x2b
55 #define WM8978_INPUT_CONTROL			0x2c
56 #define WM8978_LEFT_INP_PGA_CONTROL		0x2d
57 #define WM8978_RIGHT_INP_PGA_CONTROL		0x2e
58 #define WM8978_LEFT_ADC_BOOST_CONTROL		0x2f
59 #define WM8978_RIGHT_ADC_BOOST_CONTROL		0x30
60 #define WM8978_OUTPUT_CONTROL			0x31
61 #define WM8978_LEFT_MIXER_CONTROL		0x32
62 #define WM8978_RIGHT_MIXER_CONTROL		0x33
63 #define WM8978_LOUT1_HP_CONTROL			0x34
64 #define WM8978_ROUT1_HP_CONTROL			0x35
65 #define WM8978_LOUT2_SPK_CONTROL		0x36
66 #define WM8978_ROUT2_SPK_CONTROL		0x37
67 #define WM8978_OUT3_MIXER_CONTROL		0x38
68 #define WM8978_OUT4_MIXER_CONTROL		0x39
69 
70 #define WM8978_MAX_REGISTER			0x39
71 
72 #define WM8978_CACHEREGNUM			58
73 
74 /* Clock divider Id's */
75 enum wm8978_clk_id {
76 	WM8978_OPCLKRATE,
77 	WM8978_BCLKDIV,
78 };
79 
80 enum wm8978_sysclk_src {
81 	WM8978_PLL,
82 	WM8978_MCLK
83 };
84 
85 #endif	/* __WM8978_H__ */
86