xref: /linux/sound/soc/codecs/wm8974.h (revision 0a1bf553359013621c8c5cf745354212c6ef51d3)
1*0a1bf553SMark Brown /*
2*0a1bf553SMark Brown  * wm8974.h  --  WM8974 Soc Audio driver
3*0a1bf553SMark Brown  *
4*0a1bf553SMark Brown  * This program is free software; you can redistribute it and/or modify
5*0a1bf553SMark Brown  * it under the terms of the GNU General Public License version 2 as
6*0a1bf553SMark Brown  * published by the Free Software Foundation.
7*0a1bf553SMark Brown  */
8*0a1bf553SMark Brown 
9*0a1bf553SMark Brown #ifndef _WM8974_H
10*0a1bf553SMark Brown #define _WM8974_H
11*0a1bf553SMark Brown 
12*0a1bf553SMark Brown /* WM8974 register space */
13*0a1bf553SMark Brown 
14*0a1bf553SMark Brown #define WM8974_RESET		0x0
15*0a1bf553SMark Brown #define WM8974_POWER1		0x1
16*0a1bf553SMark Brown #define WM8974_POWER2		0x2
17*0a1bf553SMark Brown #define WM8974_POWER3		0x3
18*0a1bf553SMark Brown #define WM8974_IFACE		0x4
19*0a1bf553SMark Brown #define WM8974_COMP			0x5
20*0a1bf553SMark Brown #define WM8974_CLOCK		0x6
21*0a1bf553SMark Brown #define WM8974_ADD			0x7
22*0a1bf553SMark Brown #define WM8974_GPIO			0x8
23*0a1bf553SMark Brown #define WM8974_DAC			0xa
24*0a1bf553SMark Brown #define WM8974_DACVOL		0xb
25*0a1bf553SMark Brown #define WM8974_ADC			0xe
26*0a1bf553SMark Brown #define WM8974_ADCVOL		0xf
27*0a1bf553SMark Brown #define WM8974_EQ1			0x12
28*0a1bf553SMark Brown #define WM8974_EQ2			0x13
29*0a1bf553SMark Brown #define WM8974_EQ3			0x14
30*0a1bf553SMark Brown #define WM8974_EQ4			0x15
31*0a1bf553SMark Brown #define WM8974_EQ5			0x16
32*0a1bf553SMark Brown #define WM8974_DACLIM1		0x18
33*0a1bf553SMark Brown #define WM8974_DACLIM2		0x19
34*0a1bf553SMark Brown #define WM8974_NOTCH1		0x1b
35*0a1bf553SMark Brown #define WM8974_NOTCH2		0x1c
36*0a1bf553SMark Brown #define WM8974_NOTCH3		0x1d
37*0a1bf553SMark Brown #define WM8974_NOTCH4		0x1e
38*0a1bf553SMark Brown #define WM8974_ALC1			0x20
39*0a1bf553SMark Brown #define WM8974_ALC2			0x21
40*0a1bf553SMark Brown #define WM8974_ALC3			0x22
41*0a1bf553SMark Brown #define WM8974_NGATE		0x23
42*0a1bf553SMark Brown #define WM8974_PLLN			0x24
43*0a1bf553SMark Brown #define WM8974_PLLK1		0x25
44*0a1bf553SMark Brown #define WM8974_PLLK2		0x26
45*0a1bf553SMark Brown #define WM8974_PLLK3		0x27
46*0a1bf553SMark Brown #define WM8974_ATTEN		0x28
47*0a1bf553SMark Brown #define WM8974_INPUT		0x2c
48*0a1bf553SMark Brown #define WM8974_INPPGA		0x2d
49*0a1bf553SMark Brown #define WM8974_ADCBOOST		0x2f
50*0a1bf553SMark Brown #define WM8974_OUTPUT		0x31
51*0a1bf553SMark Brown #define WM8974_SPKMIX		0x32
52*0a1bf553SMark Brown #define WM8974_SPKVOL		0x36
53*0a1bf553SMark Brown #define WM8974_MONOMIX		0x38
54*0a1bf553SMark Brown 
55*0a1bf553SMark Brown #define WM8974_CACHEREGNUM 	57
56*0a1bf553SMark Brown 
57*0a1bf553SMark Brown /* Clock divider Id's */
58*0a1bf553SMark Brown #define WM8974_OPCLKDIV		0
59*0a1bf553SMark Brown #define WM8974_MCLKDIV		1
60*0a1bf553SMark Brown #define WM8974_ADCCLK		2
61*0a1bf553SMark Brown #define WM8974_DACCLK		3
62*0a1bf553SMark Brown #define WM8974_BCLKDIV		4
63*0a1bf553SMark Brown 
64*0a1bf553SMark Brown /* DAC clock dividers */
65*0a1bf553SMark Brown #define WM8974_DACCLK_F2	(1 << 3)
66*0a1bf553SMark Brown #define WM8974_DACCLK_F4	(0 << 3)
67*0a1bf553SMark Brown 
68*0a1bf553SMark Brown /* ADC clock dividers */
69*0a1bf553SMark Brown #define WM8974_ADCCLK_F2	(1 << 3)
70*0a1bf553SMark Brown #define WM8974_ADCCLK_F4	(0 << 3)
71*0a1bf553SMark Brown 
72*0a1bf553SMark Brown /* PLL Out dividers */
73*0a1bf553SMark Brown #define WM8974_OPCLKDIV_1	(0 << 4)
74*0a1bf553SMark Brown #define WM8974_OPCLKDIV_2	(1 << 4)
75*0a1bf553SMark Brown #define WM8974_OPCLKDIV_3	(2 << 4)
76*0a1bf553SMark Brown #define WM8974_OPCLKDIV_4	(3 << 4)
77*0a1bf553SMark Brown 
78*0a1bf553SMark Brown /* BCLK clock dividers */
79*0a1bf553SMark Brown #define WM8974_BCLKDIV_1	(0 << 2)
80*0a1bf553SMark Brown #define WM8974_BCLKDIV_2	(1 << 2)
81*0a1bf553SMark Brown #define WM8974_BCLKDIV_4	(2 << 2)
82*0a1bf553SMark Brown #define WM8974_BCLKDIV_8	(3 << 2)
83*0a1bf553SMark Brown #define WM8974_BCLKDIV_16	(4 << 2)
84*0a1bf553SMark Brown #define WM8974_BCLKDIV_32	(5 << 2)
85*0a1bf553SMark Brown 
86*0a1bf553SMark Brown /* MCLK clock dividers */
87*0a1bf553SMark Brown #define WM8974_MCLKDIV_1	(0 << 5)
88*0a1bf553SMark Brown #define WM8974_MCLKDIV_1_5	(1 << 5)
89*0a1bf553SMark Brown #define WM8974_MCLKDIV_2	(2 << 5)
90*0a1bf553SMark Brown #define WM8974_MCLKDIV_3	(3 << 5)
91*0a1bf553SMark Brown #define WM8974_MCLKDIV_4	(4 << 5)
92*0a1bf553SMark Brown #define WM8974_MCLKDIV_6	(5 << 5)
93*0a1bf553SMark Brown #define WM8974_MCLKDIV_8	(6 << 5)
94*0a1bf553SMark Brown #define WM8974_MCLKDIV_12	(7 << 5)
95*0a1bf553SMark Brown 
96*0a1bf553SMark Brown 
97*0a1bf553SMark Brown struct wm8974_setup_data {
98*0a1bf553SMark Brown 	unsigned short i2c_address;
99*0a1bf553SMark Brown };
100*0a1bf553SMark Brown 
101*0a1bf553SMark Brown extern struct snd_soc_dai wm8974_dai;
102*0a1bf553SMark Brown extern struct snd_soc_codec_device soc_codec_dev_wm8974;
103*0a1bf553SMark Brown 
104*0a1bf553SMark Brown #endif
105