1a91eb199SMark Brown /* 2a91eb199SMark Brown * wm8904.c -- WM8904 ALSA SoC Audio driver 3a91eb199SMark Brown * 4656baaebSMark Brown * Copyright 2009-12 Wolfson Microelectronics plc 5a91eb199SMark Brown * 6a91eb199SMark Brown * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 7a91eb199SMark Brown * 8a91eb199SMark Brown * 9a91eb199SMark Brown * This program is free software; you can redistribute it and/or modify 10a91eb199SMark Brown * it under the terms of the GNU General Public License version 2 as 11a91eb199SMark Brown * published by the Free Software Foundation. 12a91eb199SMark Brown */ 13a91eb199SMark Brown 148b9920e3SBo Shen #include <linux/clk.h> 15a91eb199SMark Brown #include <linux/module.h> 16a91eb199SMark Brown #include <linux/moduleparam.h> 17a91eb199SMark Brown #include <linux/init.h> 18a91eb199SMark Brown #include <linux/delay.h> 19a91eb199SMark Brown #include <linux/pm.h> 20a91eb199SMark Brown #include <linux/i2c.h> 2184d0d831SMark Brown #include <linux/regmap.h> 22a91eb199SMark Brown #include <linux/regulator/consumer.h> 235a0e3ad6STejun Heo #include <linux/slab.h> 24a91eb199SMark Brown #include <sound/core.h> 25a91eb199SMark Brown #include <sound/pcm.h> 26a91eb199SMark Brown #include <sound/pcm_params.h> 27a91eb199SMark Brown #include <sound/soc.h> 28a91eb199SMark Brown #include <sound/initval.h> 29a91eb199SMark Brown #include <sound/tlv.h> 30a91eb199SMark Brown #include <sound/wm8904.h> 31a91eb199SMark Brown 32a91eb199SMark Brown #include "wm8904.h" 33a91eb199SMark Brown 348c126474SMark Brown enum wm8904_type { 358c126474SMark Brown WM8904, 368c126474SMark Brown WM8912, 378c126474SMark Brown }; 388c126474SMark Brown 39a91eb199SMark Brown #define WM8904_NUM_DCS_CHANNELS 4 40a91eb199SMark Brown 41a91eb199SMark Brown #define WM8904_NUM_SUPPLIES 5 42a91eb199SMark Brown static const char *wm8904_supply_names[WM8904_NUM_SUPPLIES] = { 43a91eb199SMark Brown "DCVDD", 44a91eb199SMark Brown "DBVDD", 45a91eb199SMark Brown "AVDD", 46a91eb199SMark Brown "CPVDD", 47a91eb199SMark Brown "MICVDD", 48a91eb199SMark Brown }; 49a91eb199SMark Brown 50a91eb199SMark Brown /* codec private data */ 51a91eb199SMark Brown struct wm8904_priv { 5284d0d831SMark Brown struct regmap *regmap; 538b9920e3SBo Shen struct clk *mclk; 54f0fba2adSLiam Girdwood 558c126474SMark Brown enum wm8904_type devtype; 568c126474SMark Brown 57a91eb199SMark Brown struct regulator_bulk_data supplies[WM8904_NUM_SUPPLIES]; 58a91eb199SMark Brown 59a91eb199SMark Brown struct wm8904_pdata *pdata; 60a91eb199SMark Brown 61a91eb199SMark Brown int deemph; 62a91eb199SMark Brown 63a91eb199SMark Brown /* Platform provided DRC configuration */ 64a91eb199SMark Brown const char **drc_texts; 65a91eb199SMark Brown int drc_cfg; 66a91eb199SMark Brown struct soc_enum drc_enum; 67a91eb199SMark Brown 68a91eb199SMark Brown /* Platform provided ReTune mobile configuration */ 69a91eb199SMark Brown int num_retune_mobile_texts; 70a91eb199SMark Brown const char **retune_mobile_texts; 71a91eb199SMark Brown int retune_mobile_cfg; 72a91eb199SMark Brown struct soc_enum retune_mobile_enum; 73a91eb199SMark Brown 74a91eb199SMark Brown /* FLL setup */ 75a91eb199SMark Brown int fll_src; 76a91eb199SMark Brown int fll_fref; 77a91eb199SMark Brown int fll_fout; 78a91eb199SMark Brown 79a91eb199SMark Brown /* Clocking configuration */ 80a91eb199SMark Brown unsigned int mclk_rate; 81a91eb199SMark Brown int sysclk_src; 82a91eb199SMark Brown unsigned int sysclk_rate; 83a91eb199SMark Brown 84a91eb199SMark Brown int tdm_width; 85a91eb199SMark Brown int tdm_slots; 86a91eb199SMark Brown int bclk; 87a91eb199SMark Brown int fs; 88a91eb199SMark Brown 89a91eb199SMark Brown /* DC servo configuration - cached offset values */ 90a91eb199SMark Brown int dcs_state[WM8904_NUM_DCS_CHANNELS]; 91a91eb199SMark Brown }; 92a91eb199SMark Brown 9384d0d831SMark Brown static const struct reg_default wm8904_reg_defaults[] = { 9484d0d831SMark Brown { 4, 0x0018 }, /* R4 - Bias Control 0 */ 9584d0d831SMark Brown { 5, 0x0000 }, /* R5 - VMID Control 0 */ 9684d0d831SMark Brown { 6, 0x0000 }, /* R6 - Mic Bias Control 0 */ 9784d0d831SMark Brown { 7, 0x0000 }, /* R7 - Mic Bias Control 1 */ 9884d0d831SMark Brown { 8, 0x0001 }, /* R8 - Analogue DAC 0 */ 9984d0d831SMark Brown { 9, 0x9696 }, /* R9 - mic Filter Control */ 10084d0d831SMark Brown { 10, 0x0001 }, /* R10 - Analogue ADC 0 */ 10184d0d831SMark Brown { 12, 0x0000 }, /* R12 - Power Management 0 */ 10284d0d831SMark Brown { 14, 0x0000 }, /* R14 - Power Management 2 */ 10384d0d831SMark Brown { 15, 0x0000 }, /* R15 - Power Management 3 */ 10484d0d831SMark Brown { 18, 0x0000 }, /* R18 - Power Management 6 */ 105985b11faSBo Shen { 20, 0x945E }, /* R20 - Clock Rates 0 */ 10684d0d831SMark Brown { 21, 0x0C05 }, /* R21 - Clock Rates 1 */ 10784d0d831SMark Brown { 22, 0x0006 }, /* R22 - Clock Rates 2 */ 10884d0d831SMark Brown { 24, 0x0050 }, /* R24 - Audio Interface 0 */ 10984d0d831SMark Brown { 25, 0x000A }, /* R25 - Audio Interface 1 */ 11084d0d831SMark Brown { 26, 0x00E4 }, /* R26 - Audio Interface 2 */ 11184d0d831SMark Brown { 27, 0x0040 }, /* R27 - Audio Interface 3 */ 11284d0d831SMark Brown { 30, 0x00C0 }, /* R30 - DAC Digital Volume Left */ 11384d0d831SMark Brown { 31, 0x00C0 }, /* R31 - DAC Digital Volume Right */ 11484d0d831SMark Brown { 32, 0x0000 }, /* R32 - DAC Digital 0 */ 11584d0d831SMark Brown { 33, 0x0008 }, /* R33 - DAC Digital 1 */ 11684d0d831SMark Brown { 36, 0x00C0 }, /* R36 - ADC Digital Volume Left */ 11784d0d831SMark Brown { 37, 0x00C0 }, /* R37 - ADC Digital Volume Right */ 11884d0d831SMark Brown { 38, 0x0010 }, /* R38 - ADC Digital 0 */ 11984d0d831SMark Brown { 39, 0x0000 }, /* R39 - Digital Microphone 0 */ 12084d0d831SMark Brown { 40, 0x01AF }, /* R40 - DRC 0 */ 12184d0d831SMark Brown { 41, 0x3248 }, /* R41 - DRC 1 */ 12284d0d831SMark Brown { 42, 0x0000 }, /* R42 - DRC 2 */ 12384d0d831SMark Brown { 43, 0x0000 }, /* R43 - DRC 3 */ 12484d0d831SMark Brown { 44, 0x0085 }, /* R44 - Analogue Left Input 0 */ 12584d0d831SMark Brown { 45, 0x0085 }, /* R45 - Analogue Right Input 0 */ 12684d0d831SMark Brown { 46, 0x0044 }, /* R46 - Analogue Left Input 1 */ 12784d0d831SMark Brown { 47, 0x0044 }, /* R47 - Analogue Right Input 1 */ 12884d0d831SMark Brown { 57, 0x002D }, /* R57 - Analogue OUT1 Left */ 12984d0d831SMark Brown { 58, 0x002D }, /* R58 - Analogue OUT1 Right */ 13084d0d831SMark Brown { 59, 0x0039 }, /* R59 - Analogue OUT2 Left */ 13184d0d831SMark Brown { 60, 0x0039 }, /* R60 - Analogue OUT2 Right */ 13284d0d831SMark Brown { 61, 0x0000 }, /* R61 - Analogue OUT12 ZC */ 13384d0d831SMark Brown { 67, 0x0000 }, /* R67 - DC Servo 0 */ 13484d0d831SMark Brown { 69, 0xAAAA }, /* R69 - DC Servo 2 */ 13584d0d831SMark Brown { 71, 0xAAAA }, /* R71 - DC Servo 4 */ 13684d0d831SMark Brown { 72, 0xAAAA }, /* R72 - DC Servo 5 */ 13784d0d831SMark Brown { 90, 0x0000 }, /* R90 - Analogue HP 0 */ 13884d0d831SMark Brown { 94, 0x0000 }, /* R94 - Analogue Lineout 0 */ 13984d0d831SMark Brown { 98, 0x0000 }, /* R98 - Charge Pump 0 */ 14084d0d831SMark Brown { 104, 0x0004 }, /* R104 - Class W 0 */ 14184d0d831SMark Brown { 108, 0x0000 }, /* R108 - Write Sequencer 0 */ 14284d0d831SMark Brown { 109, 0x0000 }, /* R109 - Write Sequencer 1 */ 14384d0d831SMark Brown { 110, 0x0000 }, /* R110 - Write Sequencer 2 */ 14484d0d831SMark Brown { 111, 0x0000 }, /* R111 - Write Sequencer 3 */ 14584d0d831SMark Brown { 112, 0x0000 }, /* R112 - Write Sequencer 4 */ 14684d0d831SMark Brown { 116, 0x0000 }, /* R116 - FLL Control 1 */ 14784d0d831SMark Brown { 117, 0x0007 }, /* R117 - FLL Control 2 */ 14884d0d831SMark Brown { 118, 0x0000 }, /* R118 - FLL Control 3 */ 14984d0d831SMark Brown { 119, 0x2EE0 }, /* R119 - FLL Control 4 */ 15084d0d831SMark Brown { 120, 0x0004 }, /* R120 - FLL Control 5 */ 15184d0d831SMark Brown { 121, 0x0014 }, /* R121 - GPIO Control 1 */ 15284d0d831SMark Brown { 122, 0x0010 }, /* R122 - GPIO Control 2 */ 15384d0d831SMark Brown { 123, 0x0010 }, /* R123 - GPIO Control 3 */ 15484d0d831SMark Brown { 124, 0x0000 }, /* R124 - GPIO Control 4 */ 15584d0d831SMark Brown { 126, 0x0000 }, /* R126 - Digital Pulls */ 15684d0d831SMark Brown { 128, 0xFFFF }, /* R128 - Interrupt Status Mask */ 15784d0d831SMark Brown { 129, 0x0000 }, /* R129 - Interrupt Polarity */ 15884d0d831SMark Brown { 130, 0x0000 }, /* R130 - Interrupt Debounce */ 15984d0d831SMark Brown { 134, 0x0000 }, /* R134 - EQ1 */ 16084d0d831SMark Brown { 135, 0x000C }, /* R135 - EQ2 */ 16184d0d831SMark Brown { 136, 0x000C }, /* R136 - EQ3 */ 16284d0d831SMark Brown { 137, 0x000C }, /* R137 - EQ4 */ 16384d0d831SMark Brown { 138, 0x000C }, /* R138 - EQ5 */ 16484d0d831SMark Brown { 139, 0x000C }, /* R139 - EQ6 */ 16584d0d831SMark Brown { 140, 0x0FCA }, /* R140 - EQ7 */ 16684d0d831SMark Brown { 141, 0x0400 }, /* R141 - EQ8 */ 16784d0d831SMark Brown { 142, 0x00D8 }, /* R142 - EQ9 */ 16884d0d831SMark Brown { 143, 0x1EB5 }, /* R143 - EQ10 */ 16984d0d831SMark Brown { 144, 0xF145 }, /* R144 - EQ11 */ 17084d0d831SMark Brown { 145, 0x0B75 }, /* R145 - EQ12 */ 17184d0d831SMark Brown { 146, 0x01C5 }, /* R146 - EQ13 */ 17284d0d831SMark Brown { 147, 0x1C58 }, /* R147 - EQ14 */ 17384d0d831SMark Brown { 148, 0xF373 }, /* R148 - EQ15 */ 17484d0d831SMark Brown { 149, 0x0A54 }, /* R149 - EQ16 */ 17584d0d831SMark Brown { 150, 0x0558 }, /* R150 - EQ17 */ 17684d0d831SMark Brown { 151, 0x168E }, /* R151 - EQ18 */ 17784d0d831SMark Brown { 152, 0xF829 }, /* R152 - EQ19 */ 17884d0d831SMark Brown { 153, 0x07AD }, /* R153 - EQ20 */ 17984d0d831SMark Brown { 154, 0x1103 }, /* R154 - EQ21 */ 18084d0d831SMark Brown { 155, 0x0564 }, /* R155 - EQ22 */ 18184d0d831SMark Brown { 156, 0x0559 }, /* R156 - EQ23 */ 18284d0d831SMark Brown { 157, 0x4000 }, /* R157 - EQ24 */ 18384d0d831SMark Brown { 161, 0x0000 }, /* R161 - Control Interface Test 1 */ 18484d0d831SMark Brown { 204, 0x0000 }, /* R204 - Analogue Output Bias 0 */ 18584d0d831SMark Brown { 247, 0x0000 }, /* R247 - FLL NCO Test 0 */ 18684d0d831SMark Brown { 248, 0x0019 }, /* R248 - FLL NCO Test 1 */ 187a91eb199SMark Brown }; 188a91eb199SMark Brown 18984d0d831SMark Brown static bool wm8904_volatile_register(struct device *dev, unsigned int reg) 190a91eb199SMark Brown { 19184d0d831SMark Brown switch (reg) { 19284d0d831SMark Brown case WM8904_SW_RESET_AND_ID: 19384d0d831SMark Brown case WM8904_REVISION: 19484d0d831SMark Brown case WM8904_DC_SERVO_1: 19584d0d831SMark Brown case WM8904_DC_SERVO_6: 19684d0d831SMark Brown case WM8904_DC_SERVO_7: 19784d0d831SMark Brown case WM8904_DC_SERVO_8: 19884d0d831SMark Brown case WM8904_DC_SERVO_9: 19984d0d831SMark Brown case WM8904_DC_SERVO_READBACK_0: 20084d0d831SMark Brown case WM8904_INTERRUPT_STATUS: 20184d0d831SMark Brown return true; 20284d0d831SMark Brown default: 20384d0d831SMark Brown return false; 20484d0d831SMark Brown } 20584d0d831SMark Brown } 20684d0d831SMark Brown 20784d0d831SMark Brown static bool wm8904_readable_register(struct device *dev, unsigned int reg) 20884d0d831SMark Brown { 20984d0d831SMark Brown switch (reg) { 21084d0d831SMark Brown case WM8904_SW_RESET_AND_ID: 21184d0d831SMark Brown case WM8904_REVISION: 21284d0d831SMark Brown case WM8904_BIAS_CONTROL_0: 21384d0d831SMark Brown case WM8904_VMID_CONTROL_0: 21484d0d831SMark Brown case WM8904_MIC_BIAS_CONTROL_0: 21584d0d831SMark Brown case WM8904_MIC_BIAS_CONTROL_1: 21684d0d831SMark Brown case WM8904_ANALOGUE_DAC_0: 21784d0d831SMark Brown case WM8904_MIC_FILTER_CONTROL: 21884d0d831SMark Brown case WM8904_ANALOGUE_ADC_0: 21984d0d831SMark Brown case WM8904_POWER_MANAGEMENT_0: 22084d0d831SMark Brown case WM8904_POWER_MANAGEMENT_2: 22184d0d831SMark Brown case WM8904_POWER_MANAGEMENT_3: 22284d0d831SMark Brown case WM8904_POWER_MANAGEMENT_6: 22384d0d831SMark Brown case WM8904_CLOCK_RATES_0: 22484d0d831SMark Brown case WM8904_CLOCK_RATES_1: 22584d0d831SMark Brown case WM8904_CLOCK_RATES_2: 22684d0d831SMark Brown case WM8904_AUDIO_INTERFACE_0: 22784d0d831SMark Brown case WM8904_AUDIO_INTERFACE_1: 22884d0d831SMark Brown case WM8904_AUDIO_INTERFACE_2: 22984d0d831SMark Brown case WM8904_AUDIO_INTERFACE_3: 23084d0d831SMark Brown case WM8904_DAC_DIGITAL_VOLUME_LEFT: 23184d0d831SMark Brown case WM8904_DAC_DIGITAL_VOLUME_RIGHT: 23284d0d831SMark Brown case WM8904_DAC_DIGITAL_0: 23384d0d831SMark Brown case WM8904_DAC_DIGITAL_1: 23484d0d831SMark Brown case WM8904_ADC_DIGITAL_VOLUME_LEFT: 23584d0d831SMark Brown case WM8904_ADC_DIGITAL_VOLUME_RIGHT: 23684d0d831SMark Brown case WM8904_ADC_DIGITAL_0: 23784d0d831SMark Brown case WM8904_DIGITAL_MICROPHONE_0: 23884d0d831SMark Brown case WM8904_DRC_0: 23984d0d831SMark Brown case WM8904_DRC_1: 24084d0d831SMark Brown case WM8904_DRC_2: 24184d0d831SMark Brown case WM8904_DRC_3: 24284d0d831SMark Brown case WM8904_ANALOGUE_LEFT_INPUT_0: 24384d0d831SMark Brown case WM8904_ANALOGUE_RIGHT_INPUT_0: 24484d0d831SMark Brown case WM8904_ANALOGUE_LEFT_INPUT_1: 24584d0d831SMark Brown case WM8904_ANALOGUE_RIGHT_INPUT_1: 24684d0d831SMark Brown case WM8904_ANALOGUE_OUT1_LEFT: 24784d0d831SMark Brown case WM8904_ANALOGUE_OUT1_RIGHT: 24884d0d831SMark Brown case WM8904_ANALOGUE_OUT2_LEFT: 24984d0d831SMark Brown case WM8904_ANALOGUE_OUT2_RIGHT: 25084d0d831SMark Brown case WM8904_ANALOGUE_OUT12_ZC: 25184d0d831SMark Brown case WM8904_DC_SERVO_0: 25284d0d831SMark Brown case WM8904_DC_SERVO_1: 25384d0d831SMark Brown case WM8904_DC_SERVO_2: 25484d0d831SMark Brown case WM8904_DC_SERVO_4: 25584d0d831SMark Brown case WM8904_DC_SERVO_5: 25684d0d831SMark Brown case WM8904_DC_SERVO_6: 25784d0d831SMark Brown case WM8904_DC_SERVO_7: 25884d0d831SMark Brown case WM8904_DC_SERVO_8: 25984d0d831SMark Brown case WM8904_DC_SERVO_9: 26084d0d831SMark Brown case WM8904_DC_SERVO_READBACK_0: 26184d0d831SMark Brown case WM8904_ANALOGUE_HP_0: 26284d0d831SMark Brown case WM8904_ANALOGUE_LINEOUT_0: 26384d0d831SMark Brown case WM8904_CHARGE_PUMP_0: 26484d0d831SMark Brown case WM8904_CLASS_W_0: 26584d0d831SMark Brown case WM8904_WRITE_SEQUENCER_0: 26684d0d831SMark Brown case WM8904_WRITE_SEQUENCER_1: 26784d0d831SMark Brown case WM8904_WRITE_SEQUENCER_2: 26884d0d831SMark Brown case WM8904_WRITE_SEQUENCER_3: 26984d0d831SMark Brown case WM8904_WRITE_SEQUENCER_4: 27084d0d831SMark Brown case WM8904_FLL_CONTROL_1: 27184d0d831SMark Brown case WM8904_FLL_CONTROL_2: 27284d0d831SMark Brown case WM8904_FLL_CONTROL_3: 27384d0d831SMark Brown case WM8904_FLL_CONTROL_4: 27484d0d831SMark Brown case WM8904_FLL_CONTROL_5: 27584d0d831SMark Brown case WM8904_GPIO_CONTROL_1: 27684d0d831SMark Brown case WM8904_GPIO_CONTROL_2: 27784d0d831SMark Brown case WM8904_GPIO_CONTROL_3: 27884d0d831SMark Brown case WM8904_GPIO_CONTROL_4: 27984d0d831SMark Brown case WM8904_DIGITAL_PULLS: 28084d0d831SMark Brown case WM8904_INTERRUPT_STATUS: 28184d0d831SMark Brown case WM8904_INTERRUPT_STATUS_MASK: 28284d0d831SMark Brown case WM8904_INTERRUPT_POLARITY: 28384d0d831SMark Brown case WM8904_INTERRUPT_DEBOUNCE: 28484d0d831SMark Brown case WM8904_EQ1: 28584d0d831SMark Brown case WM8904_EQ2: 28684d0d831SMark Brown case WM8904_EQ3: 28784d0d831SMark Brown case WM8904_EQ4: 28884d0d831SMark Brown case WM8904_EQ5: 28984d0d831SMark Brown case WM8904_EQ6: 29084d0d831SMark Brown case WM8904_EQ7: 29184d0d831SMark Brown case WM8904_EQ8: 29284d0d831SMark Brown case WM8904_EQ9: 29384d0d831SMark Brown case WM8904_EQ10: 29484d0d831SMark Brown case WM8904_EQ11: 29584d0d831SMark Brown case WM8904_EQ12: 29684d0d831SMark Brown case WM8904_EQ13: 29784d0d831SMark Brown case WM8904_EQ14: 29884d0d831SMark Brown case WM8904_EQ15: 29984d0d831SMark Brown case WM8904_EQ16: 30084d0d831SMark Brown case WM8904_EQ17: 30184d0d831SMark Brown case WM8904_EQ18: 30284d0d831SMark Brown case WM8904_EQ19: 30384d0d831SMark Brown case WM8904_EQ20: 30484d0d831SMark Brown case WM8904_EQ21: 30584d0d831SMark Brown case WM8904_EQ22: 30684d0d831SMark Brown case WM8904_EQ23: 30784d0d831SMark Brown case WM8904_EQ24: 30884d0d831SMark Brown case WM8904_CONTROL_INTERFACE_TEST_1: 3099b85fc90SMark Brown case WM8904_ADC_TEST_0: 31084d0d831SMark Brown case WM8904_ANALOGUE_OUTPUT_BIAS_0: 31184d0d831SMark Brown case WM8904_FLL_NCO_TEST_0: 31284d0d831SMark Brown case WM8904_FLL_NCO_TEST_1: 31384d0d831SMark Brown return true; 31484d0d831SMark Brown default: 31528b5df18SAxel Lin return false; 31684d0d831SMark Brown } 317a91eb199SMark Brown } 318a91eb199SMark Brown 319a91eb199SMark Brown static int wm8904_configure_clocking(struct snd_soc_codec *codec) 320a91eb199SMark Brown { 321b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 322a91eb199SMark Brown unsigned int clock0, clock2, rate; 323a91eb199SMark Brown 324a91eb199SMark Brown /* Gate the clock while we're updating to avoid misclocking */ 325a91eb199SMark Brown clock2 = snd_soc_read(codec, WM8904_CLOCK_RATES_2); 326a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 327a91eb199SMark Brown WM8904_SYSCLK_SRC, 0); 328a91eb199SMark Brown 329a91eb199SMark Brown /* This should be done on init() for bypass paths */ 330a91eb199SMark Brown switch (wm8904->sysclk_src) { 331a91eb199SMark Brown case WM8904_CLK_MCLK: 332a91eb199SMark Brown dev_dbg(codec->dev, "Using %dHz MCLK\n", wm8904->mclk_rate); 333a91eb199SMark Brown 334a91eb199SMark Brown clock2 &= ~WM8904_SYSCLK_SRC; 335a91eb199SMark Brown rate = wm8904->mclk_rate; 336a91eb199SMark Brown 337a91eb199SMark Brown /* Ensure the FLL is stopped */ 338a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 339a91eb199SMark Brown WM8904_FLL_OSC_ENA | WM8904_FLL_ENA, 0); 340a91eb199SMark Brown break; 341a91eb199SMark Brown 342a91eb199SMark Brown case WM8904_CLK_FLL: 343a91eb199SMark Brown dev_dbg(codec->dev, "Using %dHz FLL clock\n", 344a91eb199SMark Brown wm8904->fll_fout); 345a91eb199SMark Brown 346a91eb199SMark Brown clock2 |= WM8904_SYSCLK_SRC; 347a91eb199SMark Brown rate = wm8904->fll_fout; 348a91eb199SMark Brown break; 349a91eb199SMark Brown 350a91eb199SMark Brown default: 351a91eb199SMark Brown dev_err(codec->dev, "System clock not configured\n"); 352a91eb199SMark Brown return -EINVAL; 353a91eb199SMark Brown } 354a91eb199SMark Brown 355a91eb199SMark Brown /* SYSCLK shouldn't be over 13.5MHz */ 356a91eb199SMark Brown if (rate > 13500000) { 357a91eb199SMark Brown clock0 = WM8904_MCLK_DIV; 358a91eb199SMark Brown wm8904->sysclk_rate = rate / 2; 359a91eb199SMark Brown } else { 360a91eb199SMark Brown clock0 = 0; 361a91eb199SMark Brown wm8904->sysclk_rate = rate; 362a91eb199SMark Brown } 363a91eb199SMark Brown 364a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_0, WM8904_MCLK_DIV, 365a91eb199SMark Brown clock0); 366a91eb199SMark Brown 367a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 368a91eb199SMark Brown WM8904_CLK_SYS_ENA | WM8904_SYSCLK_SRC, clock2); 369a91eb199SMark Brown 370a91eb199SMark Brown dev_dbg(codec->dev, "CLK_SYS is %dHz\n", wm8904->sysclk_rate); 371a91eb199SMark Brown 372a91eb199SMark Brown return 0; 373a91eb199SMark Brown } 374a91eb199SMark Brown 375a91eb199SMark Brown static void wm8904_set_drc(struct snd_soc_codec *codec) 376a91eb199SMark Brown { 377b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 378a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 379a91eb199SMark Brown int save, i; 380a91eb199SMark Brown 381a91eb199SMark Brown /* Save any enables; the configuration should clear them. */ 382a91eb199SMark Brown save = snd_soc_read(codec, WM8904_DRC_0); 383a91eb199SMark Brown 384a91eb199SMark Brown for (i = 0; i < WM8904_DRC_REGS; i++) 385a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DRC_0 + i, 0xffff, 386a91eb199SMark Brown pdata->drc_cfgs[wm8904->drc_cfg].regs[i]); 387a91eb199SMark Brown 388a91eb199SMark Brown /* Reenable the DRC */ 389a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DRC_0, 390a91eb199SMark Brown WM8904_DRC_ENA | WM8904_DRC_DAC_PATH, save); 391a91eb199SMark Brown } 392a91eb199SMark Brown 393a91eb199SMark Brown static int wm8904_put_drc_enum(struct snd_kcontrol *kcontrol, 394a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 395a91eb199SMark Brown { 396ea53bf77SLars-Peter Clausen struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 397b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 398a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 399*c41a024cSTakashi Iwai int value = ucontrol->value.enumerated.item[0]; 400a91eb199SMark Brown 401a91eb199SMark Brown if (value >= pdata->num_drc_cfgs) 402a91eb199SMark Brown return -EINVAL; 403a91eb199SMark Brown 404a91eb199SMark Brown wm8904->drc_cfg = value; 405a91eb199SMark Brown 406a91eb199SMark Brown wm8904_set_drc(codec); 407a91eb199SMark Brown 408a91eb199SMark Brown return 0; 409a91eb199SMark Brown } 410a91eb199SMark Brown 411a91eb199SMark Brown static int wm8904_get_drc_enum(struct snd_kcontrol *kcontrol, 412a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 413a91eb199SMark Brown { 414ea53bf77SLars-Peter Clausen struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 415b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 416a91eb199SMark Brown 417a91eb199SMark Brown ucontrol->value.enumerated.item[0] = wm8904->drc_cfg; 418a91eb199SMark Brown 419a91eb199SMark Brown return 0; 420a91eb199SMark Brown } 421a91eb199SMark Brown 422a91eb199SMark Brown static void wm8904_set_retune_mobile(struct snd_soc_codec *codec) 423a91eb199SMark Brown { 424b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 425a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 426a91eb199SMark Brown int best, best_val, save, i, cfg; 427a91eb199SMark Brown 428a91eb199SMark Brown if (!pdata || !wm8904->num_retune_mobile_texts) 429a91eb199SMark Brown return; 430a91eb199SMark Brown 431a91eb199SMark Brown /* Find the version of the currently selected configuration 432a91eb199SMark Brown * with the nearest sample rate. */ 433a91eb199SMark Brown cfg = wm8904->retune_mobile_cfg; 434a91eb199SMark Brown best = 0; 435a91eb199SMark Brown best_val = INT_MAX; 436a91eb199SMark Brown for (i = 0; i < pdata->num_retune_mobile_cfgs; i++) { 437a91eb199SMark Brown if (strcmp(pdata->retune_mobile_cfgs[i].name, 438a91eb199SMark Brown wm8904->retune_mobile_texts[cfg]) == 0 && 439a91eb199SMark Brown abs(pdata->retune_mobile_cfgs[i].rate 440a91eb199SMark Brown - wm8904->fs) < best_val) { 441a91eb199SMark Brown best = i; 442a91eb199SMark Brown best_val = abs(pdata->retune_mobile_cfgs[i].rate 443a91eb199SMark Brown - wm8904->fs); 444a91eb199SMark Brown } 445a91eb199SMark Brown } 446a91eb199SMark Brown 447a91eb199SMark Brown dev_dbg(codec->dev, "ReTune Mobile %s/%dHz for %dHz sample rate\n", 448a91eb199SMark Brown pdata->retune_mobile_cfgs[best].name, 449a91eb199SMark Brown pdata->retune_mobile_cfgs[best].rate, 450a91eb199SMark Brown wm8904->fs); 451a91eb199SMark Brown 452a91eb199SMark Brown /* The EQ will be disabled while reconfiguring it, remember the 453a91eb199SMark Brown * current configuration. 454a91eb199SMark Brown */ 455a91eb199SMark Brown save = snd_soc_read(codec, WM8904_EQ1); 456a91eb199SMark Brown 457a91eb199SMark Brown for (i = 0; i < WM8904_EQ_REGS; i++) 458a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_EQ1 + i, 0xffff, 459a91eb199SMark Brown pdata->retune_mobile_cfgs[best].regs[i]); 460a91eb199SMark Brown 461a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_EQ1, WM8904_EQ_ENA, save); 462a91eb199SMark Brown } 463a91eb199SMark Brown 464a91eb199SMark Brown static int wm8904_put_retune_mobile_enum(struct snd_kcontrol *kcontrol, 465a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 466a91eb199SMark Brown { 467ea53bf77SLars-Peter Clausen struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 468b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 469a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 470*c41a024cSTakashi Iwai int value = ucontrol->value.enumerated.item[0]; 471a91eb199SMark Brown 472a91eb199SMark Brown if (value >= pdata->num_retune_mobile_cfgs) 473a91eb199SMark Brown return -EINVAL; 474a91eb199SMark Brown 475a91eb199SMark Brown wm8904->retune_mobile_cfg = value; 476a91eb199SMark Brown 477a91eb199SMark Brown wm8904_set_retune_mobile(codec); 478a91eb199SMark Brown 479a91eb199SMark Brown return 0; 480a91eb199SMark Brown } 481a91eb199SMark Brown 482a91eb199SMark Brown static int wm8904_get_retune_mobile_enum(struct snd_kcontrol *kcontrol, 483a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 484a91eb199SMark Brown { 485ea53bf77SLars-Peter Clausen struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 486b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 487a91eb199SMark Brown 488a91eb199SMark Brown ucontrol->value.enumerated.item[0] = wm8904->retune_mobile_cfg; 489a91eb199SMark Brown 490a91eb199SMark Brown return 0; 491a91eb199SMark Brown } 492a91eb199SMark Brown 493a91eb199SMark Brown static int deemph_settings[] = { 0, 32000, 44100, 48000 }; 494a91eb199SMark Brown 495a91eb199SMark Brown static int wm8904_set_deemph(struct snd_soc_codec *codec) 496a91eb199SMark Brown { 497b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 498a91eb199SMark Brown int val, i, best; 499a91eb199SMark Brown 500a91eb199SMark Brown /* If we're using deemphasis select the nearest available sample 501a91eb199SMark Brown * rate. 502a91eb199SMark Brown */ 503a91eb199SMark Brown if (wm8904->deemph) { 504a91eb199SMark Brown best = 1; 505a91eb199SMark Brown for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) { 506a91eb199SMark Brown if (abs(deemph_settings[i] - wm8904->fs) < 507a91eb199SMark Brown abs(deemph_settings[best] - wm8904->fs)) 508a91eb199SMark Brown best = i; 509a91eb199SMark Brown } 510a91eb199SMark Brown 511a91eb199SMark Brown val = best << WM8904_DEEMPH_SHIFT; 512a91eb199SMark Brown } else { 513a91eb199SMark Brown val = 0; 514a91eb199SMark Brown } 515a91eb199SMark Brown 516a91eb199SMark Brown dev_dbg(codec->dev, "Set deemphasis %d\n", val); 517a91eb199SMark Brown 518a91eb199SMark Brown return snd_soc_update_bits(codec, WM8904_DAC_DIGITAL_1, 519a91eb199SMark Brown WM8904_DEEMPH_MASK, val); 520a91eb199SMark Brown } 521a91eb199SMark Brown 522a91eb199SMark Brown static int wm8904_get_deemph(struct snd_kcontrol *kcontrol, 523a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 524a91eb199SMark Brown { 525ea53bf77SLars-Peter Clausen struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 526b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 527a91eb199SMark Brown 528eaddf6fdSTakashi Iwai ucontrol->value.integer.value[0] = wm8904->deemph; 5293f343f85SDmitry Artamonow return 0; 530a91eb199SMark Brown } 531a91eb199SMark Brown 532a91eb199SMark Brown static int wm8904_put_deemph(struct snd_kcontrol *kcontrol, 533a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 534a91eb199SMark Brown { 535ea53bf77SLars-Peter Clausen struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 536b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 537931dfa69SDan Carpenter unsigned int deemph = ucontrol->value.integer.value[0]; 538a91eb199SMark Brown 539a91eb199SMark Brown if (deemph > 1) 540a91eb199SMark Brown return -EINVAL; 541a91eb199SMark Brown 542a91eb199SMark Brown wm8904->deemph = deemph; 543a91eb199SMark Brown 544a91eb199SMark Brown return wm8904_set_deemph(codec); 545a91eb199SMark Brown } 546a91eb199SMark Brown 547a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(dac_boost_tlv, 0, 600, 0); 548a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(digital_tlv, -7200, 75, 1); 549a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(out_tlv, -5700, 100, 0); 550a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -3600, 300, 0); 551a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); 552a91eb199SMark Brown 553a91eb199SMark Brown static const char *input_mode_text[] = { 554a91eb199SMark Brown "Single-Ended", "Differential Line", "Differential Mic" 555a91eb199SMark Brown }; 556a91eb199SMark Brown 557d12bfd62STakashi Iwai static SOC_ENUM_SINGLE_DECL(lin_mode, 558d12bfd62STakashi Iwai WM8904_ANALOGUE_LEFT_INPUT_1, 0, 559d12bfd62STakashi Iwai input_mode_text); 560a91eb199SMark Brown 561d12bfd62STakashi Iwai static SOC_ENUM_SINGLE_DECL(rin_mode, 562d12bfd62STakashi Iwai WM8904_ANALOGUE_RIGHT_INPUT_1, 0, 563d12bfd62STakashi Iwai input_mode_text); 564a91eb199SMark Brown 565a91eb199SMark Brown static const char *hpf_mode_text[] = { 566a91eb199SMark Brown "Hi-fi", "Voice 1", "Voice 2", "Voice 3" 567a91eb199SMark Brown }; 568a91eb199SMark Brown 569d12bfd62STakashi Iwai static SOC_ENUM_SINGLE_DECL(hpf_mode, WM8904_ADC_DIGITAL_0, 5, 570d12bfd62STakashi Iwai hpf_mode_text); 571a91eb199SMark Brown 5729b85fc90SMark Brown static int wm8904_adc_osr_put(struct snd_kcontrol *kcontrol, 5739b85fc90SMark Brown struct snd_ctl_elem_value *ucontrol) 5749b85fc90SMark Brown { 575ea53bf77SLars-Peter Clausen struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 5769b85fc90SMark Brown unsigned int val; 5779b85fc90SMark Brown int ret; 5789b85fc90SMark Brown 5799b85fc90SMark Brown ret = snd_soc_put_volsw(kcontrol, ucontrol); 5809b85fc90SMark Brown if (ret < 0) 5819b85fc90SMark Brown return ret; 5829b85fc90SMark Brown 5839b85fc90SMark Brown if (ucontrol->value.integer.value[0]) 5849b85fc90SMark Brown val = 0; 5859b85fc90SMark Brown else 5869b85fc90SMark Brown val = WM8904_ADC_128_OSR_TST_MODE | WM8904_ADC_BIASX1P5; 5879b85fc90SMark Brown 5889b85fc90SMark Brown snd_soc_update_bits(codec, WM8904_ADC_TEST_0, 5899b85fc90SMark Brown WM8904_ADC_128_OSR_TST_MODE | WM8904_ADC_BIASX1P5, 5909b85fc90SMark Brown val); 5919b85fc90SMark Brown 5929b85fc90SMark Brown return ret; 5939b85fc90SMark Brown } 5949b85fc90SMark Brown 595a91eb199SMark Brown static const struct snd_kcontrol_new wm8904_adc_snd_controls[] = { 596a91eb199SMark Brown SOC_DOUBLE_R_TLV("Digital Capture Volume", WM8904_ADC_DIGITAL_VOLUME_LEFT, 597a91eb199SMark Brown WM8904_ADC_DIGITAL_VOLUME_RIGHT, 1, 119, 0, digital_tlv), 598a91eb199SMark Brown 599a91eb199SMark Brown SOC_ENUM("Left Caputure Mode", lin_mode), 600a91eb199SMark Brown SOC_ENUM("Right Capture Mode", rin_mode), 601a91eb199SMark Brown 602a91eb199SMark Brown /* No TLV since it depends on mode */ 603a91eb199SMark Brown SOC_DOUBLE_R("Capture Volume", WM8904_ANALOGUE_LEFT_INPUT_0, 604a91eb199SMark Brown WM8904_ANALOGUE_RIGHT_INPUT_0, 0, 31, 0), 605a91eb199SMark Brown SOC_DOUBLE_R("Capture Switch", WM8904_ANALOGUE_LEFT_INPUT_0, 6065a7c5f26SHong Xu WM8904_ANALOGUE_RIGHT_INPUT_0, 7, 1, 1), 607a91eb199SMark Brown 608a91eb199SMark Brown SOC_SINGLE("High Pass Filter Switch", WM8904_ADC_DIGITAL_0, 4, 1, 0), 609a91eb199SMark Brown SOC_ENUM("High Pass Filter Mode", hpf_mode), 6105a68bae2SLars-Peter Clausen SOC_SINGLE_EXT("ADC 128x OSR Switch", WM8904_ANALOGUE_ADC_0, 0, 1, 0, 6115a68bae2SLars-Peter Clausen snd_soc_get_volsw, wm8904_adc_osr_put), 612a91eb199SMark Brown }; 613a91eb199SMark Brown 614a91eb199SMark Brown static const char *drc_path_text[] = { 615a91eb199SMark Brown "ADC", "DAC" 616a91eb199SMark Brown }; 617a91eb199SMark Brown 618d12bfd62STakashi Iwai static SOC_ENUM_SINGLE_DECL(drc_path, WM8904_DRC_0, 14, drc_path_text); 619a91eb199SMark Brown 620a91eb199SMark Brown static const struct snd_kcontrol_new wm8904_dac_snd_controls[] = { 621a91eb199SMark Brown SOC_SINGLE_TLV("Digital Playback Boost Volume", 622a91eb199SMark Brown WM8904_AUDIO_INTERFACE_0, 9, 3, 0, dac_boost_tlv), 623a91eb199SMark Brown SOC_DOUBLE_R_TLV("Digital Playback Volume", WM8904_DAC_DIGITAL_VOLUME_LEFT, 624a91eb199SMark Brown WM8904_DAC_DIGITAL_VOLUME_RIGHT, 1, 96, 0, digital_tlv), 625a91eb199SMark Brown 626a91eb199SMark Brown SOC_DOUBLE_R_TLV("Headphone Volume", WM8904_ANALOGUE_OUT1_LEFT, 627a91eb199SMark Brown WM8904_ANALOGUE_OUT1_RIGHT, 0, 63, 0, out_tlv), 628a91eb199SMark Brown SOC_DOUBLE_R("Headphone Switch", WM8904_ANALOGUE_OUT1_LEFT, 629a91eb199SMark Brown WM8904_ANALOGUE_OUT1_RIGHT, 8, 1, 1), 630a91eb199SMark Brown SOC_DOUBLE_R("Headphone ZC Switch", WM8904_ANALOGUE_OUT1_LEFT, 631a91eb199SMark Brown WM8904_ANALOGUE_OUT1_RIGHT, 6, 1, 0), 632a91eb199SMark Brown 633a91eb199SMark Brown SOC_DOUBLE_R_TLV("Line Output Volume", WM8904_ANALOGUE_OUT2_LEFT, 634a91eb199SMark Brown WM8904_ANALOGUE_OUT2_RIGHT, 0, 63, 0, out_tlv), 635a91eb199SMark Brown SOC_DOUBLE_R("Line Output Switch", WM8904_ANALOGUE_OUT2_LEFT, 636a91eb199SMark Brown WM8904_ANALOGUE_OUT2_RIGHT, 8, 1, 1), 637a91eb199SMark Brown SOC_DOUBLE_R("Line Output ZC Switch", WM8904_ANALOGUE_OUT2_LEFT, 638a91eb199SMark Brown WM8904_ANALOGUE_OUT2_RIGHT, 6, 1, 0), 639a91eb199SMark Brown 640a91eb199SMark Brown SOC_SINGLE("EQ Switch", WM8904_EQ1, 0, 1, 0), 641a91eb199SMark Brown SOC_SINGLE("DRC Switch", WM8904_DRC_0, 15, 1, 0), 642a91eb199SMark Brown SOC_ENUM("DRC Path", drc_path), 643a91eb199SMark Brown SOC_SINGLE("DAC OSRx2 Switch", WM8904_DAC_DIGITAL_1, 6, 1, 0), 644a91eb199SMark Brown SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0, 645a91eb199SMark Brown wm8904_get_deemph, wm8904_put_deemph), 646a91eb199SMark Brown }; 647a91eb199SMark Brown 648a91eb199SMark Brown static const struct snd_kcontrol_new wm8904_snd_controls[] = { 649a91eb199SMark Brown SOC_DOUBLE_TLV("Digital Sidetone Volume", WM8904_DAC_DIGITAL_0, 4, 8, 15, 0, 650a91eb199SMark Brown sidetone_tlv), 651a91eb199SMark Brown }; 652a91eb199SMark Brown 653a91eb199SMark Brown static const struct snd_kcontrol_new wm8904_eq_controls[] = { 654a91eb199SMark Brown SOC_SINGLE_TLV("EQ1 Volume", WM8904_EQ2, 0, 24, 0, eq_tlv), 655a91eb199SMark Brown SOC_SINGLE_TLV("EQ2 Volume", WM8904_EQ3, 0, 24, 0, eq_tlv), 656a91eb199SMark Brown SOC_SINGLE_TLV("EQ3 Volume", WM8904_EQ4, 0, 24, 0, eq_tlv), 657a91eb199SMark Brown SOC_SINGLE_TLV("EQ4 Volume", WM8904_EQ5, 0, 24, 0, eq_tlv), 658a91eb199SMark Brown SOC_SINGLE_TLV("EQ5 Volume", WM8904_EQ6, 0, 24, 0, eq_tlv), 659a91eb199SMark Brown }; 660a91eb199SMark Brown 661a91eb199SMark Brown static int cp_event(struct snd_soc_dapm_widget *w, 662a91eb199SMark Brown struct snd_kcontrol *kcontrol, int event) 663a91eb199SMark Brown { 6644c8d620aSTakashi Iwai if (WARN_ON(event != SND_SOC_DAPM_POST_PMU)) 6654c8d620aSTakashi Iwai return -EINVAL; 666a91eb199SMark Brown 667a91eb199SMark Brown /* Maximum startup time */ 668a91eb199SMark Brown udelay(500); 669a91eb199SMark Brown 670a91eb199SMark Brown return 0; 671a91eb199SMark Brown } 672a91eb199SMark Brown 673a91eb199SMark Brown static int sysclk_event(struct snd_soc_dapm_widget *w, 674a91eb199SMark Brown struct snd_kcontrol *kcontrol, int event) 675a91eb199SMark Brown { 6768f13bd4eSLars-Peter Clausen struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 677b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 678a91eb199SMark Brown 679a91eb199SMark Brown switch (event) { 680a91eb199SMark Brown case SND_SOC_DAPM_PRE_PMU: 681a91eb199SMark Brown /* If we're using the FLL then we only start it when 682a91eb199SMark Brown * required; we assume that the configuration has been 683a91eb199SMark Brown * done previously and all we need to do is kick it 684a91eb199SMark Brown * off. 685a91eb199SMark Brown */ 686a91eb199SMark Brown switch (wm8904->sysclk_src) { 687a91eb199SMark Brown case WM8904_CLK_FLL: 688a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 689a91eb199SMark Brown WM8904_FLL_OSC_ENA, 690a91eb199SMark Brown WM8904_FLL_OSC_ENA); 691a91eb199SMark Brown 692a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 693a91eb199SMark Brown WM8904_FLL_ENA, 694a91eb199SMark Brown WM8904_FLL_ENA); 695a91eb199SMark Brown break; 696a91eb199SMark Brown 697a91eb199SMark Brown default: 698a91eb199SMark Brown break; 699a91eb199SMark Brown } 700a91eb199SMark Brown break; 701a91eb199SMark Brown 702a91eb199SMark Brown case SND_SOC_DAPM_POST_PMD: 703a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 704a91eb199SMark Brown WM8904_FLL_OSC_ENA | WM8904_FLL_ENA, 0); 705a91eb199SMark Brown break; 706a91eb199SMark Brown } 707a91eb199SMark Brown 708a91eb199SMark Brown return 0; 709a91eb199SMark Brown } 710a91eb199SMark Brown 711a91eb199SMark Brown static int out_pga_event(struct snd_soc_dapm_widget *w, 712a91eb199SMark Brown struct snd_kcontrol *kcontrol, int event) 713a91eb199SMark Brown { 7148f13bd4eSLars-Peter Clausen struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 715b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 716a91eb199SMark Brown int reg, val; 717a91eb199SMark Brown int dcs_mask; 718a91eb199SMark Brown int dcs_l, dcs_r; 719a91eb199SMark Brown int dcs_l_reg, dcs_r_reg; 720a91eb199SMark Brown int timeout; 721e4bc6696SMark Brown int pwr_reg; 722a91eb199SMark Brown 723a91eb199SMark Brown /* This code is shared between HP and LINEOUT; we do all our 724a91eb199SMark Brown * power management in stereo pairs to avoid latency issues so 725a91eb199SMark Brown * we reuse shift to identify which rather than strcmp() the 726a91eb199SMark Brown * name. */ 727a91eb199SMark Brown reg = w->shift; 728a91eb199SMark Brown 729a91eb199SMark Brown switch (reg) { 730a91eb199SMark Brown case WM8904_ANALOGUE_HP_0: 731e4bc6696SMark Brown pwr_reg = WM8904_POWER_MANAGEMENT_2; 732a91eb199SMark Brown dcs_mask = WM8904_DCS_ENA_CHAN_0 | WM8904_DCS_ENA_CHAN_1; 733a91eb199SMark Brown dcs_r_reg = WM8904_DC_SERVO_8; 734a91eb199SMark Brown dcs_l_reg = WM8904_DC_SERVO_9; 735a91eb199SMark Brown dcs_l = 0; 736a91eb199SMark Brown dcs_r = 1; 737a91eb199SMark Brown break; 738a91eb199SMark Brown case WM8904_ANALOGUE_LINEOUT_0: 739e4bc6696SMark Brown pwr_reg = WM8904_POWER_MANAGEMENT_3; 740a91eb199SMark Brown dcs_mask = WM8904_DCS_ENA_CHAN_2 | WM8904_DCS_ENA_CHAN_3; 741a91eb199SMark Brown dcs_r_reg = WM8904_DC_SERVO_6; 742a91eb199SMark Brown dcs_l_reg = WM8904_DC_SERVO_7; 743a91eb199SMark Brown dcs_l = 2; 744a91eb199SMark Brown dcs_r = 3; 745a91eb199SMark Brown break; 746a91eb199SMark Brown default: 7478d8bb1adSTakashi Iwai WARN(1, "Invalid reg %d\n", reg); 748a91eb199SMark Brown return -EINVAL; 749a91eb199SMark Brown } 750a91eb199SMark Brown 751a91eb199SMark Brown switch (event) { 752e4bc6696SMark Brown case SND_SOC_DAPM_PRE_PMU: 753e4bc6696SMark Brown /* Power on the PGAs */ 754e4bc6696SMark Brown snd_soc_update_bits(codec, pwr_reg, 755e4bc6696SMark Brown WM8904_HPL_PGA_ENA | WM8904_HPR_PGA_ENA, 756e4bc6696SMark Brown WM8904_HPL_PGA_ENA | WM8904_HPR_PGA_ENA); 757e4bc6696SMark Brown 758a91eb199SMark Brown /* Power on the amplifier */ 759a91eb199SMark Brown snd_soc_update_bits(codec, reg, 760a91eb199SMark Brown WM8904_HPL_ENA | WM8904_HPR_ENA, 761a91eb199SMark Brown WM8904_HPL_ENA | WM8904_HPR_ENA); 762a91eb199SMark Brown 763e4bc6696SMark Brown 764a91eb199SMark Brown /* Enable the first stage */ 765a91eb199SMark Brown snd_soc_update_bits(codec, reg, 766a91eb199SMark Brown WM8904_HPL_ENA_DLY | WM8904_HPR_ENA_DLY, 767a91eb199SMark Brown WM8904_HPL_ENA_DLY | WM8904_HPR_ENA_DLY); 768a91eb199SMark Brown 769a91eb199SMark Brown /* Power up the DC servo */ 770a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DC_SERVO_0, 771a91eb199SMark Brown dcs_mask, dcs_mask); 772a91eb199SMark Brown 773a91eb199SMark Brown /* Either calibrate the DC servo or restore cached state 774a91eb199SMark Brown * if we have that. 775a91eb199SMark Brown */ 776a91eb199SMark Brown if (wm8904->dcs_state[dcs_l] || wm8904->dcs_state[dcs_r]) { 777a91eb199SMark Brown dev_dbg(codec->dev, "Restoring DC servo state\n"); 778a91eb199SMark Brown 779a91eb199SMark Brown snd_soc_write(codec, dcs_l_reg, 780a91eb199SMark Brown wm8904->dcs_state[dcs_l]); 781a91eb199SMark Brown snd_soc_write(codec, dcs_r_reg, 782a91eb199SMark Brown wm8904->dcs_state[dcs_r]); 783a91eb199SMark Brown 784a91eb199SMark Brown snd_soc_write(codec, WM8904_DC_SERVO_1, dcs_mask); 785a91eb199SMark Brown 786a91eb199SMark Brown timeout = 20; 787a91eb199SMark Brown } else { 788a91eb199SMark Brown dev_dbg(codec->dev, "Calibrating DC servo\n"); 789a91eb199SMark Brown 790a91eb199SMark Brown snd_soc_write(codec, WM8904_DC_SERVO_1, 791a91eb199SMark Brown dcs_mask << WM8904_DCS_TRIG_STARTUP_0_SHIFT); 792a91eb199SMark Brown 793a91eb199SMark Brown timeout = 500; 794a91eb199SMark Brown } 795a91eb199SMark Brown 796a91eb199SMark Brown /* Wait for DC servo to complete */ 797a91eb199SMark Brown dcs_mask <<= WM8904_DCS_CAL_COMPLETE_SHIFT; 798a91eb199SMark Brown do { 799a91eb199SMark Brown val = snd_soc_read(codec, WM8904_DC_SERVO_READBACK_0); 800a91eb199SMark Brown if ((val & dcs_mask) == dcs_mask) 801a91eb199SMark Brown break; 802a91eb199SMark Brown 803a91eb199SMark Brown msleep(1); 804a91eb199SMark Brown } while (--timeout); 805a91eb199SMark Brown 806a91eb199SMark Brown if ((val & dcs_mask) != dcs_mask) 807a91eb199SMark Brown dev_warn(codec->dev, "DC servo timed out\n"); 808a91eb199SMark Brown else 809a91eb199SMark Brown dev_dbg(codec->dev, "DC servo ready\n"); 810a91eb199SMark Brown 811a91eb199SMark Brown /* Enable the output stage */ 812a91eb199SMark Brown snd_soc_update_bits(codec, reg, 813a91eb199SMark Brown WM8904_HPL_ENA_OUTP | WM8904_HPR_ENA_OUTP, 814a91eb199SMark Brown WM8904_HPL_ENA_OUTP | WM8904_HPR_ENA_OUTP); 815e4bc6696SMark Brown break; 816a91eb199SMark Brown 817e4bc6696SMark Brown case SND_SOC_DAPM_POST_PMU: 818a91eb199SMark Brown /* Unshort the output itself */ 819a91eb199SMark Brown snd_soc_update_bits(codec, reg, 820a91eb199SMark Brown WM8904_HPL_RMV_SHORT | 821a91eb199SMark Brown WM8904_HPR_RMV_SHORT, 822a91eb199SMark Brown WM8904_HPL_RMV_SHORT | 823a91eb199SMark Brown WM8904_HPR_RMV_SHORT); 824a91eb199SMark Brown 825a91eb199SMark Brown break; 826a91eb199SMark Brown 827a91eb199SMark Brown case SND_SOC_DAPM_PRE_PMD: 828a91eb199SMark Brown /* Short the output */ 829a91eb199SMark Brown snd_soc_update_bits(codec, reg, 830a91eb199SMark Brown WM8904_HPL_RMV_SHORT | 831a91eb199SMark Brown WM8904_HPR_RMV_SHORT, 0); 832e4bc6696SMark Brown break; 833a91eb199SMark Brown 834e4bc6696SMark Brown case SND_SOC_DAPM_POST_PMD: 835a91eb199SMark Brown /* Cache the DC servo configuration; this will be 836a91eb199SMark Brown * invalidated if we change the configuration. */ 837a91eb199SMark Brown wm8904->dcs_state[dcs_l] = snd_soc_read(codec, dcs_l_reg); 838a91eb199SMark Brown wm8904->dcs_state[dcs_r] = snd_soc_read(codec, dcs_r_reg); 839a91eb199SMark Brown 840a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DC_SERVO_0, 841a91eb199SMark Brown dcs_mask, 0); 842a91eb199SMark Brown 843a91eb199SMark Brown /* Disable the amplifier input and output stages */ 844a91eb199SMark Brown snd_soc_update_bits(codec, reg, 845a91eb199SMark Brown WM8904_HPL_ENA | WM8904_HPR_ENA | 846a91eb199SMark Brown WM8904_HPL_ENA_DLY | WM8904_HPR_ENA_DLY | 847a91eb199SMark Brown WM8904_HPL_ENA_OUTP | WM8904_HPR_ENA_OUTP, 848a91eb199SMark Brown 0); 849e4bc6696SMark Brown 850e4bc6696SMark Brown /* PGAs too */ 851e4bc6696SMark Brown snd_soc_update_bits(codec, pwr_reg, 852e4bc6696SMark Brown WM8904_HPL_PGA_ENA | WM8904_HPR_PGA_ENA, 853e4bc6696SMark Brown 0); 854a91eb199SMark Brown break; 855a91eb199SMark Brown } 856a91eb199SMark Brown 857a91eb199SMark Brown return 0; 858a91eb199SMark Brown } 859a91eb199SMark Brown 860a91eb199SMark Brown static const char *lin_text[] = { 861a91eb199SMark Brown "IN1L", "IN2L", "IN3L" 862a91eb199SMark Brown }; 863a91eb199SMark Brown 864d12bfd62STakashi Iwai static SOC_ENUM_SINGLE_DECL(lin_enum, WM8904_ANALOGUE_LEFT_INPUT_1, 2, 865d12bfd62STakashi Iwai lin_text); 866a91eb199SMark Brown 867a91eb199SMark Brown static const struct snd_kcontrol_new lin_mux = 868a91eb199SMark Brown SOC_DAPM_ENUM("Left Capture Mux", lin_enum); 869a91eb199SMark Brown 870d12bfd62STakashi Iwai static SOC_ENUM_SINGLE_DECL(lin_inv_enum, WM8904_ANALOGUE_LEFT_INPUT_1, 4, 871d12bfd62STakashi Iwai lin_text); 872a91eb199SMark Brown 873a91eb199SMark Brown static const struct snd_kcontrol_new lin_inv_mux = 874a91eb199SMark Brown SOC_DAPM_ENUM("Left Capture Inveting Mux", lin_inv_enum); 875a91eb199SMark Brown 876a91eb199SMark Brown static const char *rin_text[] = { 877a91eb199SMark Brown "IN1R", "IN2R", "IN3R" 878a91eb199SMark Brown }; 879a91eb199SMark Brown 880d12bfd62STakashi Iwai static SOC_ENUM_SINGLE_DECL(rin_enum, WM8904_ANALOGUE_RIGHT_INPUT_1, 2, 881d12bfd62STakashi Iwai rin_text); 882a91eb199SMark Brown 883a91eb199SMark Brown static const struct snd_kcontrol_new rin_mux = 884a91eb199SMark Brown SOC_DAPM_ENUM("Right Capture Mux", rin_enum); 885a91eb199SMark Brown 886d12bfd62STakashi Iwai static SOC_ENUM_SINGLE_DECL(rin_inv_enum, WM8904_ANALOGUE_RIGHT_INPUT_1, 4, 887d12bfd62STakashi Iwai rin_text); 888a91eb199SMark Brown 889a91eb199SMark Brown static const struct snd_kcontrol_new rin_inv_mux = 890a91eb199SMark Brown SOC_DAPM_ENUM("Right Capture Inveting Mux", rin_inv_enum); 891a91eb199SMark Brown 892a91eb199SMark Brown static const char *aif_text[] = { 893a91eb199SMark Brown "Left", "Right" 894a91eb199SMark Brown }; 895a91eb199SMark Brown 896d12bfd62STakashi Iwai static SOC_ENUM_SINGLE_DECL(aifoutl_enum, WM8904_AUDIO_INTERFACE_0, 7, 897d12bfd62STakashi Iwai aif_text); 898a91eb199SMark Brown 899a91eb199SMark Brown static const struct snd_kcontrol_new aifoutl_mux = 900a91eb199SMark Brown SOC_DAPM_ENUM("AIFOUTL Mux", aifoutl_enum); 901a91eb199SMark Brown 902d12bfd62STakashi Iwai static SOC_ENUM_SINGLE_DECL(aifoutr_enum, WM8904_AUDIO_INTERFACE_0, 6, 903d12bfd62STakashi Iwai aif_text); 904a91eb199SMark Brown 905a91eb199SMark Brown static const struct snd_kcontrol_new aifoutr_mux = 906a91eb199SMark Brown SOC_DAPM_ENUM("AIFOUTR Mux", aifoutr_enum); 907a91eb199SMark Brown 908d12bfd62STakashi Iwai static SOC_ENUM_SINGLE_DECL(aifinl_enum, WM8904_AUDIO_INTERFACE_0, 5, 909d12bfd62STakashi Iwai aif_text); 910a91eb199SMark Brown 911a91eb199SMark Brown static const struct snd_kcontrol_new aifinl_mux = 912a91eb199SMark Brown SOC_DAPM_ENUM("AIFINL Mux", aifinl_enum); 913a91eb199SMark Brown 914d12bfd62STakashi Iwai static SOC_ENUM_SINGLE_DECL(aifinr_enum, WM8904_AUDIO_INTERFACE_0, 4, 915d12bfd62STakashi Iwai aif_text); 916a91eb199SMark Brown 917a91eb199SMark Brown static const struct snd_kcontrol_new aifinr_mux = 918a91eb199SMark Brown SOC_DAPM_ENUM("AIFINR Mux", aifinr_enum); 919a91eb199SMark Brown 920a91eb199SMark Brown static const struct snd_soc_dapm_widget wm8904_core_dapm_widgets[] = { 921a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("SYSCLK", WM8904_CLOCK_RATES_2, 2, 0, sysclk_event, 922a91eb199SMark Brown SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 923a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("CLK_DSP", WM8904_CLOCK_RATES_2, 1, 0, NULL, 0), 924a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("TOCLK", WM8904_CLOCK_RATES_2, 0, 0, NULL, 0), 925a91eb199SMark Brown }; 926a91eb199SMark Brown 927a91eb199SMark Brown static const struct snd_soc_dapm_widget wm8904_adc_dapm_widgets[] = { 928a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN1L"), 929a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN1R"), 930a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN2L"), 931a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN2R"), 932a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN3L"), 933a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN3R"), 934a91eb199SMark Brown 935dcd658c5SMark Brown SND_SOC_DAPM_SUPPLY("MICBIAS", WM8904_MIC_BIAS_CONTROL_0, 0, 0, NULL, 0), 936a91eb199SMark Brown 937a91eb199SMark Brown SND_SOC_DAPM_MUX("Left Capture Mux", SND_SOC_NOPM, 0, 0, &lin_mux), 938a91eb199SMark Brown SND_SOC_DAPM_MUX("Left Capture Inverting Mux", SND_SOC_NOPM, 0, 0, 939a91eb199SMark Brown &lin_inv_mux), 940a91eb199SMark Brown SND_SOC_DAPM_MUX("Right Capture Mux", SND_SOC_NOPM, 0, 0, &rin_mux), 941a91eb199SMark Brown SND_SOC_DAPM_MUX("Right Capture Inverting Mux", SND_SOC_NOPM, 0, 0, 942a91eb199SMark Brown &rin_inv_mux), 943a91eb199SMark Brown 944a91eb199SMark Brown SND_SOC_DAPM_PGA("Left Capture PGA", WM8904_POWER_MANAGEMENT_0, 1, 0, 945a91eb199SMark Brown NULL, 0), 946a91eb199SMark Brown SND_SOC_DAPM_PGA("Right Capture PGA", WM8904_POWER_MANAGEMENT_0, 0, 0, 947a91eb199SMark Brown NULL, 0), 948a91eb199SMark Brown 949a91eb199SMark Brown SND_SOC_DAPM_ADC("ADCL", NULL, WM8904_POWER_MANAGEMENT_6, 1, 0), 950a91eb199SMark Brown SND_SOC_DAPM_ADC("ADCR", NULL, WM8904_POWER_MANAGEMENT_6, 0, 0), 951a91eb199SMark Brown 952a91eb199SMark Brown SND_SOC_DAPM_MUX("AIFOUTL Mux", SND_SOC_NOPM, 0, 0, &aifoutl_mux), 953a91eb199SMark Brown SND_SOC_DAPM_MUX("AIFOUTR Mux", SND_SOC_NOPM, 0, 0, &aifoutr_mux), 954a91eb199SMark Brown 955a91eb199SMark Brown SND_SOC_DAPM_AIF_OUT("AIFOUTL", "Capture", 0, SND_SOC_NOPM, 0, 0), 956a91eb199SMark Brown SND_SOC_DAPM_AIF_OUT("AIFOUTR", "Capture", 1, SND_SOC_NOPM, 0, 0), 957a91eb199SMark Brown }; 958a91eb199SMark Brown 959a91eb199SMark Brown static const struct snd_soc_dapm_widget wm8904_dac_dapm_widgets[] = { 960a91eb199SMark Brown SND_SOC_DAPM_AIF_IN("AIFINL", "Playback", 0, SND_SOC_NOPM, 0, 0), 961a91eb199SMark Brown SND_SOC_DAPM_AIF_IN("AIFINR", "Playback", 1, SND_SOC_NOPM, 0, 0), 962a91eb199SMark Brown 963a91eb199SMark Brown SND_SOC_DAPM_MUX("DACL Mux", SND_SOC_NOPM, 0, 0, &aifinl_mux), 964a91eb199SMark Brown SND_SOC_DAPM_MUX("DACR Mux", SND_SOC_NOPM, 0, 0, &aifinr_mux), 965a91eb199SMark Brown 966a91eb199SMark Brown SND_SOC_DAPM_DAC("DACL", NULL, WM8904_POWER_MANAGEMENT_6, 3, 0), 967a91eb199SMark Brown SND_SOC_DAPM_DAC("DACR", NULL, WM8904_POWER_MANAGEMENT_6, 2, 0), 968a91eb199SMark Brown 969a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("Charge pump", WM8904_CHARGE_PUMP_0, 0, 0, cp_event, 970a91eb199SMark Brown SND_SOC_DAPM_POST_PMU), 971a91eb199SMark Brown 972e4bc6696SMark Brown SND_SOC_DAPM_PGA("HPL PGA", SND_SOC_NOPM, 1, 0, NULL, 0), 973e4bc6696SMark Brown SND_SOC_DAPM_PGA("HPR PGA", SND_SOC_NOPM, 0, 0, NULL, 0), 974a91eb199SMark Brown 975e4bc6696SMark Brown SND_SOC_DAPM_PGA("LINEL PGA", SND_SOC_NOPM, 1, 0, NULL, 0), 976e4bc6696SMark Brown SND_SOC_DAPM_PGA("LINER PGA", SND_SOC_NOPM, 0, 0, NULL, 0), 977a91eb199SMark Brown 978a91eb199SMark Brown SND_SOC_DAPM_PGA_E("Headphone Output", SND_SOC_NOPM, WM8904_ANALOGUE_HP_0, 979a91eb199SMark Brown 0, NULL, 0, out_pga_event, 980e4bc6696SMark Brown SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | 981e4bc6696SMark Brown SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD), 982a91eb199SMark Brown SND_SOC_DAPM_PGA_E("Line Output", SND_SOC_NOPM, WM8904_ANALOGUE_LINEOUT_0, 983a91eb199SMark Brown 0, NULL, 0, out_pga_event, 984e4bc6696SMark Brown SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | 985e4bc6696SMark Brown SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD), 986a91eb199SMark Brown 987a91eb199SMark Brown SND_SOC_DAPM_OUTPUT("HPOUTL"), 988a91eb199SMark Brown SND_SOC_DAPM_OUTPUT("HPOUTR"), 989a91eb199SMark Brown SND_SOC_DAPM_OUTPUT("LINEOUTL"), 990a91eb199SMark Brown SND_SOC_DAPM_OUTPUT("LINEOUTR"), 991a91eb199SMark Brown }; 992a91eb199SMark Brown 993a91eb199SMark Brown static const char *out_mux_text[] = { 994a91eb199SMark Brown "DAC", "Bypass" 995a91eb199SMark Brown }; 996a91eb199SMark Brown 997d12bfd62STakashi Iwai static SOC_ENUM_SINGLE_DECL(hpl_enum, WM8904_ANALOGUE_OUT12_ZC, 3, 998d12bfd62STakashi Iwai out_mux_text); 999a91eb199SMark Brown 1000a91eb199SMark Brown static const struct snd_kcontrol_new hpl_mux = 1001a91eb199SMark Brown SOC_DAPM_ENUM("HPL Mux", hpl_enum); 1002a91eb199SMark Brown 1003d12bfd62STakashi Iwai static SOC_ENUM_SINGLE_DECL(hpr_enum, WM8904_ANALOGUE_OUT12_ZC, 2, 1004d12bfd62STakashi Iwai out_mux_text); 1005a91eb199SMark Brown 1006a91eb199SMark Brown static const struct snd_kcontrol_new hpr_mux = 1007a91eb199SMark Brown SOC_DAPM_ENUM("HPR Mux", hpr_enum); 1008a91eb199SMark Brown 1009d12bfd62STakashi Iwai static SOC_ENUM_SINGLE_DECL(linel_enum, WM8904_ANALOGUE_OUT12_ZC, 1, 1010d12bfd62STakashi Iwai out_mux_text); 1011a91eb199SMark Brown 1012a91eb199SMark Brown static const struct snd_kcontrol_new linel_mux = 1013a91eb199SMark Brown SOC_DAPM_ENUM("LINEL Mux", linel_enum); 1014a91eb199SMark Brown 1015d12bfd62STakashi Iwai static SOC_ENUM_SINGLE_DECL(liner_enum, WM8904_ANALOGUE_OUT12_ZC, 0, 1016d12bfd62STakashi Iwai out_mux_text); 1017a91eb199SMark Brown 1018a91eb199SMark Brown static const struct snd_kcontrol_new liner_mux = 1019e94a093cSBo Shen SOC_DAPM_ENUM("LINER Mux", liner_enum); 1020a91eb199SMark Brown 1021a91eb199SMark Brown static const char *sidetone_text[] = { 1022a91eb199SMark Brown "None", "Left", "Right" 1023a91eb199SMark Brown }; 1024a91eb199SMark Brown 1025d12bfd62STakashi Iwai static SOC_ENUM_SINGLE_DECL(dacl_sidetone_enum, WM8904_DAC_DIGITAL_0, 2, 1026d12bfd62STakashi Iwai sidetone_text); 1027a91eb199SMark Brown 1028a91eb199SMark Brown static const struct snd_kcontrol_new dacl_sidetone_mux = 1029a91eb199SMark Brown SOC_DAPM_ENUM("Left Sidetone Mux", dacl_sidetone_enum); 1030a91eb199SMark Brown 1031d12bfd62STakashi Iwai static SOC_ENUM_SINGLE_DECL(dacr_sidetone_enum, WM8904_DAC_DIGITAL_0, 0, 1032d12bfd62STakashi Iwai sidetone_text); 1033a91eb199SMark Brown 1034a91eb199SMark Brown static const struct snd_kcontrol_new dacr_sidetone_mux = 1035a91eb199SMark Brown SOC_DAPM_ENUM("Right Sidetone Mux", dacr_sidetone_enum); 1036a91eb199SMark Brown 1037a91eb199SMark Brown static const struct snd_soc_dapm_widget wm8904_dapm_widgets[] = { 1038a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("Class G", WM8904_CLASS_W_0, 0, 1, NULL, 0), 1039a91eb199SMark Brown SND_SOC_DAPM_PGA("Left Bypass", SND_SOC_NOPM, 0, 0, NULL, 0), 1040a91eb199SMark Brown SND_SOC_DAPM_PGA("Right Bypass", SND_SOC_NOPM, 0, 0, NULL, 0), 1041a91eb199SMark Brown 1042a91eb199SMark Brown SND_SOC_DAPM_MUX("Left Sidetone", SND_SOC_NOPM, 0, 0, &dacl_sidetone_mux), 1043a91eb199SMark Brown SND_SOC_DAPM_MUX("Right Sidetone", SND_SOC_NOPM, 0, 0, &dacr_sidetone_mux), 1044a91eb199SMark Brown 1045a91eb199SMark Brown SND_SOC_DAPM_MUX("HPL Mux", SND_SOC_NOPM, 0, 0, &hpl_mux), 1046a91eb199SMark Brown SND_SOC_DAPM_MUX("HPR Mux", SND_SOC_NOPM, 0, 0, &hpr_mux), 1047a91eb199SMark Brown SND_SOC_DAPM_MUX("LINEL Mux", SND_SOC_NOPM, 0, 0, &linel_mux), 1048a91eb199SMark Brown SND_SOC_DAPM_MUX("LINER Mux", SND_SOC_NOPM, 0, 0, &liner_mux), 1049a91eb199SMark Brown }; 1050a91eb199SMark Brown 1051a91eb199SMark Brown static const struct snd_soc_dapm_route core_intercon[] = { 1052a91eb199SMark Brown { "CLK_DSP", NULL, "SYSCLK" }, 1053a91eb199SMark Brown { "TOCLK", NULL, "SYSCLK" }, 1054a91eb199SMark Brown }; 1055a91eb199SMark Brown 1056a91eb199SMark Brown static const struct snd_soc_dapm_route adc_intercon[] = { 1057a91eb199SMark Brown { "Left Capture Mux", "IN1L", "IN1L" }, 1058a91eb199SMark Brown { "Left Capture Mux", "IN2L", "IN2L" }, 1059a91eb199SMark Brown { "Left Capture Mux", "IN3L", "IN3L" }, 1060a91eb199SMark Brown 1061a91eb199SMark Brown { "Left Capture Inverting Mux", "IN1L", "IN1L" }, 1062a91eb199SMark Brown { "Left Capture Inverting Mux", "IN2L", "IN2L" }, 1063a91eb199SMark Brown { "Left Capture Inverting Mux", "IN3L", "IN3L" }, 1064a91eb199SMark Brown 1065a91eb199SMark Brown { "Right Capture Mux", "IN1R", "IN1R" }, 1066a91eb199SMark Brown { "Right Capture Mux", "IN2R", "IN2R" }, 1067a91eb199SMark Brown { "Right Capture Mux", "IN3R", "IN3R" }, 1068a91eb199SMark Brown 1069a91eb199SMark Brown { "Right Capture Inverting Mux", "IN1R", "IN1R" }, 1070a91eb199SMark Brown { "Right Capture Inverting Mux", "IN2R", "IN2R" }, 1071a91eb199SMark Brown { "Right Capture Inverting Mux", "IN3R", "IN3R" }, 1072a91eb199SMark Brown 1073a91eb199SMark Brown { "Left Capture PGA", NULL, "Left Capture Mux" }, 1074a91eb199SMark Brown { "Left Capture PGA", NULL, "Left Capture Inverting Mux" }, 1075a91eb199SMark Brown 1076a91eb199SMark Brown { "Right Capture PGA", NULL, "Right Capture Mux" }, 1077a91eb199SMark Brown { "Right Capture PGA", NULL, "Right Capture Inverting Mux" }, 1078a91eb199SMark Brown 1079a30c188bSBo Shen { "AIFOUTL Mux", "Left", "ADCL" }, 1080a30c188bSBo Shen { "AIFOUTL Mux", "Right", "ADCR" }, 1081a30c188bSBo Shen { "AIFOUTR Mux", "Left", "ADCL" }, 1082a30c188bSBo Shen { "AIFOUTR Mux", "Right", "ADCR" }, 1083a30c188bSBo Shen 1084a30c188bSBo Shen { "AIFOUTL", NULL, "AIFOUTL Mux" }, 1085a30c188bSBo Shen { "AIFOUTR", NULL, "AIFOUTR Mux" }, 1086a91eb199SMark Brown 1087a91eb199SMark Brown { "ADCL", NULL, "CLK_DSP" }, 1088a91eb199SMark Brown { "ADCL", NULL, "Left Capture PGA" }, 1089a91eb199SMark Brown 1090a91eb199SMark Brown { "ADCR", NULL, "CLK_DSP" }, 1091a91eb199SMark Brown { "ADCR", NULL, "Right Capture PGA" }, 1092a91eb199SMark Brown }; 1093a91eb199SMark Brown 1094a91eb199SMark Brown static const struct snd_soc_dapm_route dac_intercon[] = { 1095a30c188bSBo Shen { "DACL Mux", "Left", "AIFINL" }, 1096a30c188bSBo Shen { "DACL Mux", "Right", "AIFINR" }, 1097a30c188bSBo Shen 1098a30c188bSBo Shen { "DACR Mux", "Left", "AIFINL" }, 1099a30c188bSBo Shen { "DACR Mux", "Right", "AIFINR" }, 1100a30c188bSBo Shen 1101a30c188bSBo Shen { "DACL", NULL, "DACL Mux" }, 1102a91eb199SMark Brown { "DACL", NULL, "CLK_DSP" }, 1103a91eb199SMark Brown 1104a30c188bSBo Shen { "DACR", NULL, "DACR Mux" }, 1105a91eb199SMark Brown { "DACR", NULL, "CLK_DSP" }, 1106a91eb199SMark Brown 1107a91eb199SMark Brown { "Charge pump", NULL, "SYSCLK" }, 1108a91eb199SMark Brown 1109a91eb199SMark Brown { "Headphone Output", NULL, "HPL PGA" }, 1110a91eb199SMark Brown { "Headphone Output", NULL, "HPR PGA" }, 1111a91eb199SMark Brown { "Headphone Output", NULL, "Charge pump" }, 1112a91eb199SMark Brown { "Headphone Output", NULL, "TOCLK" }, 1113a91eb199SMark Brown 1114a91eb199SMark Brown { "Line Output", NULL, "LINEL PGA" }, 1115a91eb199SMark Brown { "Line Output", NULL, "LINER PGA" }, 1116a91eb199SMark Brown { "Line Output", NULL, "Charge pump" }, 1117a91eb199SMark Brown { "Line Output", NULL, "TOCLK" }, 1118a91eb199SMark Brown 1119a91eb199SMark Brown { "HPOUTL", NULL, "Headphone Output" }, 1120a91eb199SMark Brown { "HPOUTR", NULL, "Headphone Output" }, 1121a91eb199SMark Brown 1122a91eb199SMark Brown { "LINEOUTL", NULL, "Line Output" }, 1123a91eb199SMark Brown { "LINEOUTR", NULL, "Line Output" }, 1124a91eb199SMark Brown }; 1125a91eb199SMark Brown 1126a91eb199SMark Brown static const struct snd_soc_dapm_route wm8904_intercon[] = { 1127a91eb199SMark Brown { "Left Sidetone", "Left", "ADCL" }, 1128a91eb199SMark Brown { "Left Sidetone", "Right", "ADCR" }, 1129a91eb199SMark Brown { "DACL", NULL, "Left Sidetone" }, 1130a91eb199SMark Brown 1131a91eb199SMark Brown { "Right Sidetone", "Left", "ADCL" }, 1132a91eb199SMark Brown { "Right Sidetone", "Right", "ADCR" }, 1133a91eb199SMark Brown { "DACR", NULL, "Right Sidetone" }, 1134a91eb199SMark Brown 1135a91eb199SMark Brown { "Left Bypass", NULL, "Class G" }, 1136a91eb199SMark Brown { "Left Bypass", NULL, "Left Capture PGA" }, 1137a91eb199SMark Brown 1138a91eb199SMark Brown { "Right Bypass", NULL, "Class G" }, 1139a91eb199SMark Brown { "Right Bypass", NULL, "Right Capture PGA" }, 1140a91eb199SMark Brown 1141a91eb199SMark Brown { "HPL Mux", "DAC", "DACL" }, 1142a91eb199SMark Brown { "HPL Mux", "Bypass", "Left Bypass" }, 1143a91eb199SMark Brown 1144a91eb199SMark Brown { "HPR Mux", "DAC", "DACR" }, 1145a91eb199SMark Brown { "HPR Mux", "Bypass", "Right Bypass" }, 1146a91eb199SMark Brown 1147a91eb199SMark Brown { "LINEL Mux", "DAC", "DACL" }, 1148a91eb199SMark Brown { "LINEL Mux", "Bypass", "Left Bypass" }, 1149a91eb199SMark Brown 1150a91eb199SMark Brown { "LINER Mux", "DAC", "DACR" }, 1151a91eb199SMark Brown { "LINER Mux", "Bypass", "Right Bypass" }, 1152a91eb199SMark Brown 1153a91eb199SMark Brown { "HPL PGA", NULL, "HPL Mux" }, 1154a91eb199SMark Brown { "HPR PGA", NULL, "HPR Mux" }, 1155a91eb199SMark Brown 1156a91eb199SMark Brown { "LINEL PGA", NULL, "LINEL Mux" }, 1157a91eb199SMark Brown { "LINER PGA", NULL, "LINER Mux" }, 1158a91eb199SMark Brown }; 1159a91eb199SMark Brown 11608c126474SMark Brown static const struct snd_soc_dapm_route wm8912_intercon[] = { 11618c126474SMark Brown { "HPL PGA", NULL, "DACL" }, 11628c126474SMark Brown { "HPR PGA", NULL, "DACR" }, 11638c126474SMark Brown 11648c126474SMark Brown { "LINEL PGA", NULL, "DACL" }, 11658c126474SMark Brown { "LINER PGA", NULL, "DACR" }, 11668c126474SMark Brown }; 11678c126474SMark Brown 1168a91eb199SMark Brown static int wm8904_add_widgets(struct snd_soc_codec *codec) 1169a91eb199SMark Brown { 1170b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 1171f44a9842SLars-Peter Clausen struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); 11728c126474SMark Brown 1173ce6120ccSLiam Girdwood snd_soc_dapm_new_controls(dapm, wm8904_core_dapm_widgets, 11748c126474SMark Brown ARRAY_SIZE(wm8904_core_dapm_widgets)); 1175ce6120ccSLiam Girdwood snd_soc_dapm_add_routes(dapm, core_intercon, 11768c126474SMark Brown ARRAY_SIZE(core_intercon)); 11778c126474SMark Brown 11788c126474SMark Brown switch (wm8904->devtype) { 11798c126474SMark Brown case WM8904: 1180022658beSLiam Girdwood snd_soc_add_codec_controls(codec, wm8904_adc_snd_controls, 1181a91eb199SMark Brown ARRAY_SIZE(wm8904_adc_snd_controls)); 1182022658beSLiam Girdwood snd_soc_add_codec_controls(codec, wm8904_dac_snd_controls, 1183a91eb199SMark Brown ARRAY_SIZE(wm8904_dac_snd_controls)); 1184022658beSLiam Girdwood snd_soc_add_codec_controls(codec, wm8904_snd_controls, 1185a91eb199SMark Brown ARRAY_SIZE(wm8904_snd_controls)); 1186a91eb199SMark Brown 1187ce6120ccSLiam Girdwood snd_soc_dapm_new_controls(dapm, wm8904_adc_dapm_widgets, 1188a91eb199SMark Brown ARRAY_SIZE(wm8904_adc_dapm_widgets)); 1189ce6120ccSLiam Girdwood snd_soc_dapm_new_controls(dapm, wm8904_dac_dapm_widgets, 1190a91eb199SMark Brown ARRAY_SIZE(wm8904_dac_dapm_widgets)); 1191ce6120ccSLiam Girdwood snd_soc_dapm_new_controls(dapm, wm8904_dapm_widgets, 1192a91eb199SMark Brown ARRAY_SIZE(wm8904_dapm_widgets)); 1193a91eb199SMark Brown 1194ce6120ccSLiam Girdwood snd_soc_dapm_add_routes(dapm, adc_intercon, 11958c126474SMark Brown ARRAY_SIZE(adc_intercon)); 1196ce6120ccSLiam Girdwood snd_soc_dapm_add_routes(dapm, dac_intercon, 11978c126474SMark Brown ARRAY_SIZE(dac_intercon)); 1198ce6120ccSLiam Girdwood snd_soc_dapm_add_routes(dapm, wm8904_intercon, 1199a91eb199SMark Brown ARRAY_SIZE(wm8904_intercon)); 12008c126474SMark Brown break; 12018c126474SMark Brown 12028c126474SMark Brown case WM8912: 1203022658beSLiam Girdwood snd_soc_add_codec_controls(codec, wm8904_dac_snd_controls, 12048c126474SMark Brown ARRAY_SIZE(wm8904_dac_snd_controls)); 12058c126474SMark Brown 1206ce6120ccSLiam Girdwood snd_soc_dapm_new_controls(dapm, wm8904_dac_dapm_widgets, 12078c126474SMark Brown ARRAY_SIZE(wm8904_dac_dapm_widgets)); 12088c126474SMark Brown 1209ce6120ccSLiam Girdwood snd_soc_dapm_add_routes(dapm, dac_intercon, 12108c126474SMark Brown ARRAY_SIZE(dac_intercon)); 1211ce6120ccSLiam Girdwood snd_soc_dapm_add_routes(dapm, wm8912_intercon, 12128c126474SMark Brown ARRAY_SIZE(wm8912_intercon)); 12138c126474SMark Brown break; 12148c126474SMark Brown } 1215a91eb199SMark Brown 1216a91eb199SMark Brown return 0; 1217a91eb199SMark Brown } 1218a91eb199SMark Brown 1219a91eb199SMark Brown static struct { 1220a91eb199SMark Brown int ratio; 1221a91eb199SMark Brown unsigned int clk_sys_rate; 1222a91eb199SMark Brown } clk_sys_rates[] = { 1223a91eb199SMark Brown { 64, 0 }, 1224a91eb199SMark Brown { 128, 1 }, 1225a91eb199SMark Brown { 192, 2 }, 1226a91eb199SMark Brown { 256, 3 }, 1227a91eb199SMark Brown { 384, 4 }, 1228a91eb199SMark Brown { 512, 5 }, 1229a91eb199SMark Brown { 786, 6 }, 1230a91eb199SMark Brown { 1024, 7 }, 1231a91eb199SMark Brown { 1408, 8 }, 1232a91eb199SMark Brown { 1536, 9 }, 1233a91eb199SMark Brown }; 1234a91eb199SMark Brown 1235a91eb199SMark Brown static struct { 1236a91eb199SMark Brown int rate; 1237a91eb199SMark Brown int sample_rate; 1238a91eb199SMark Brown } sample_rates[] = { 1239a91eb199SMark Brown { 8000, 0 }, 1240a91eb199SMark Brown { 11025, 1 }, 1241a91eb199SMark Brown { 12000, 1 }, 1242a91eb199SMark Brown { 16000, 2 }, 1243a91eb199SMark Brown { 22050, 3 }, 1244a91eb199SMark Brown { 24000, 3 }, 1245a91eb199SMark Brown { 32000, 4 }, 1246a91eb199SMark Brown { 44100, 5 }, 1247a91eb199SMark Brown { 48000, 5 }, 1248a91eb199SMark Brown }; 1249a91eb199SMark Brown 1250a91eb199SMark Brown static struct { 1251a91eb199SMark Brown int div; /* *10 due to .5s */ 1252a91eb199SMark Brown int bclk_div; 1253a91eb199SMark Brown } bclk_divs[] = { 1254a91eb199SMark Brown { 10, 0 }, 1255a91eb199SMark Brown { 15, 1 }, 1256a91eb199SMark Brown { 20, 2 }, 1257a91eb199SMark Brown { 30, 3 }, 1258a91eb199SMark Brown { 40, 4 }, 1259a91eb199SMark Brown { 50, 5 }, 1260a91eb199SMark Brown { 55, 6 }, 1261a91eb199SMark Brown { 60, 7 }, 1262a91eb199SMark Brown { 80, 8 }, 1263a91eb199SMark Brown { 100, 9 }, 1264a91eb199SMark Brown { 110, 10 }, 1265a91eb199SMark Brown { 120, 11 }, 1266a91eb199SMark Brown { 160, 12 }, 1267a91eb199SMark Brown { 200, 13 }, 1268a91eb199SMark Brown { 220, 14 }, 1269a91eb199SMark Brown { 240, 16 }, 1270a91eb199SMark Brown { 200, 17 }, 1271a91eb199SMark Brown { 320, 18 }, 1272a91eb199SMark Brown { 440, 19 }, 1273a91eb199SMark Brown { 480, 20 }, 1274a91eb199SMark Brown }; 1275a91eb199SMark Brown 1276a91eb199SMark Brown 1277a91eb199SMark Brown static int wm8904_hw_params(struct snd_pcm_substream *substream, 1278a91eb199SMark Brown struct snd_pcm_hw_params *params, 1279a91eb199SMark Brown struct snd_soc_dai *dai) 1280a91eb199SMark Brown { 1281a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1282b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 1283a91eb199SMark Brown int ret, i, best, best_val, cur_val; 1284a91eb199SMark Brown unsigned int aif1 = 0; 1285a91eb199SMark Brown unsigned int aif2 = 0; 1286a91eb199SMark Brown unsigned int aif3 = 0; 1287a91eb199SMark Brown unsigned int clock1 = 0; 1288a91eb199SMark Brown unsigned int dac_digital1 = 0; 1289a91eb199SMark Brown 1290a91eb199SMark Brown /* What BCLK do we need? */ 1291a91eb199SMark Brown wm8904->fs = params_rate(params); 1292a91eb199SMark Brown if (wm8904->tdm_slots) { 1293a91eb199SMark Brown dev_dbg(codec->dev, "Configuring for %d %d bit TDM slots\n", 1294a91eb199SMark Brown wm8904->tdm_slots, wm8904->tdm_width); 1295a91eb199SMark Brown wm8904->bclk = snd_soc_calc_bclk(wm8904->fs, 1296a91eb199SMark Brown wm8904->tdm_width, 2, 1297a91eb199SMark Brown wm8904->tdm_slots); 1298a91eb199SMark Brown } else { 1299a91eb199SMark Brown wm8904->bclk = snd_soc_params_to_bclk(params); 1300a91eb199SMark Brown } 1301a91eb199SMark Brown 13022f44b043SMark Brown switch (params_width(params)) { 13032f44b043SMark Brown case 16: 130456927eb0SMark Brown break; 13052f44b043SMark Brown case 20: 130656927eb0SMark Brown aif1 |= 0x40; 130756927eb0SMark Brown break; 13082f44b043SMark Brown case 24: 130956927eb0SMark Brown aif1 |= 0x80; 131056927eb0SMark Brown break; 13112f44b043SMark Brown case 32: 131256927eb0SMark Brown aif1 |= 0xc0; 131356927eb0SMark Brown break; 131456927eb0SMark Brown default: 131556927eb0SMark Brown return -EINVAL; 131656927eb0SMark Brown } 131756927eb0SMark Brown 131856927eb0SMark Brown 1319a91eb199SMark Brown dev_dbg(codec->dev, "Target BCLK is %dHz\n", wm8904->bclk); 1320a91eb199SMark Brown 1321a91eb199SMark Brown ret = wm8904_configure_clocking(codec); 1322a91eb199SMark Brown if (ret != 0) 1323a91eb199SMark Brown return ret; 1324a91eb199SMark Brown 1325a91eb199SMark Brown /* Select nearest CLK_SYS_RATE */ 1326a91eb199SMark Brown best = 0; 1327a91eb199SMark Brown best_val = abs((wm8904->sysclk_rate / clk_sys_rates[0].ratio) 1328a91eb199SMark Brown - wm8904->fs); 1329a91eb199SMark Brown for (i = 1; i < ARRAY_SIZE(clk_sys_rates); i++) { 1330a91eb199SMark Brown cur_val = abs((wm8904->sysclk_rate / 1331ef995e3aSJoe Perches clk_sys_rates[i].ratio) - wm8904->fs); 1332a91eb199SMark Brown if (cur_val < best_val) { 1333a91eb199SMark Brown best = i; 1334a91eb199SMark Brown best_val = cur_val; 1335a91eb199SMark Brown } 1336a91eb199SMark Brown } 1337a91eb199SMark Brown dev_dbg(codec->dev, "Selected CLK_SYS_RATIO of %d\n", 1338a91eb199SMark Brown clk_sys_rates[best].ratio); 1339a91eb199SMark Brown clock1 |= (clk_sys_rates[best].clk_sys_rate 1340a91eb199SMark Brown << WM8904_CLK_SYS_RATE_SHIFT); 1341a91eb199SMark Brown 1342a91eb199SMark Brown /* SAMPLE_RATE */ 1343a91eb199SMark Brown best = 0; 1344a91eb199SMark Brown best_val = abs(wm8904->fs - sample_rates[0].rate); 1345a91eb199SMark Brown for (i = 1; i < ARRAY_SIZE(sample_rates); i++) { 1346a91eb199SMark Brown /* Closest match */ 1347a91eb199SMark Brown cur_val = abs(wm8904->fs - sample_rates[i].rate); 1348a91eb199SMark Brown if (cur_val < best_val) { 1349a91eb199SMark Brown best = i; 1350a91eb199SMark Brown best_val = cur_val; 1351a91eb199SMark Brown } 1352a91eb199SMark Brown } 1353a91eb199SMark Brown dev_dbg(codec->dev, "Selected SAMPLE_RATE of %dHz\n", 1354a91eb199SMark Brown sample_rates[best].rate); 1355a91eb199SMark Brown clock1 |= (sample_rates[best].sample_rate 1356a91eb199SMark Brown << WM8904_SAMPLE_RATE_SHIFT); 1357a91eb199SMark Brown 1358a91eb199SMark Brown /* Enable sloping stopband filter for low sample rates */ 1359a91eb199SMark Brown if (wm8904->fs <= 24000) 1360a91eb199SMark Brown dac_digital1 |= WM8904_DAC_SB_FILT; 1361a91eb199SMark Brown 1362a91eb199SMark Brown /* BCLK_DIV */ 1363a91eb199SMark Brown best = 0; 1364a91eb199SMark Brown best_val = INT_MAX; 1365a91eb199SMark Brown for (i = 0; i < ARRAY_SIZE(bclk_divs); i++) { 1366a91eb199SMark Brown cur_val = ((wm8904->sysclk_rate * 10) / bclk_divs[i].div) 1367a91eb199SMark Brown - wm8904->bclk; 1368a91eb199SMark Brown if (cur_val < 0) /* Table is sorted */ 1369a91eb199SMark Brown break; 1370a91eb199SMark Brown if (cur_val < best_val) { 1371a91eb199SMark Brown best = i; 1372a91eb199SMark Brown best_val = cur_val; 1373a91eb199SMark Brown } 1374a91eb199SMark Brown } 1375a91eb199SMark Brown wm8904->bclk = (wm8904->sysclk_rate * 10) / bclk_divs[best].div; 1376a91eb199SMark Brown dev_dbg(codec->dev, "Selected BCLK_DIV of %d for %dHz BCLK\n", 1377a91eb199SMark Brown bclk_divs[best].div, wm8904->bclk); 1378a91eb199SMark Brown aif2 |= bclk_divs[best].bclk_div; 1379a91eb199SMark Brown 1380a91eb199SMark Brown /* LRCLK is a simple fraction of BCLK */ 1381a91eb199SMark Brown dev_dbg(codec->dev, "LRCLK_RATE is %d\n", wm8904->bclk / wm8904->fs); 1382a91eb199SMark Brown aif3 |= wm8904->bclk / wm8904->fs; 1383a91eb199SMark Brown 1384a91eb199SMark Brown /* Apply the settings */ 1385a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DAC_DIGITAL_1, 1386a91eb199SMark Brown WM8904_DAC_SB_FILT, dac_digital1); 1387a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_1, 1388a91eb199SMark Brown WM8904_AIF_WL_MASK, aif1); 1389a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_2, 1390a91eb199SMark Brown WM8904_BCLK_DIV_MASK, aif2); 1391a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_3, 1392a91eb199SMark Brown WM8904_LRCLK_RATE_MASK, aif3); 1393a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_1, 1394a91eb199SMark Brown WM8904_SAMPLE_RATE_MASK | 1395a91eb199SMark Brown WM8904_CLK_SYS_RATE_MASK, clock1); 1396a91eb199SMark Brown 1397a91eb199SMark Brown /* Update filters for the new settings */ 1398a91eb199SMark Brown wm8904_set_retune_mobile(codec); 1399a91eb199SMark Brown wm8904_set_deemph(codec); 1400a91eb199SMark Brown 1401a91eb199SMark Brown return 0; 1402a91eb199SMark Brown } 1403a91eb199SMark Brown 1404a91eb199SMark Brown 1405a91eb199SMark Brown static int wm8904_set_sysclk(struct snd_soc_dai *dai, int clk_id, 1406a91eb199SMark Brown unsigned int freq, int dir) 1407a91eb199SMark Brown { 1408a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1409b2c812e2SMark Brown struct wm8904_priv *priv = snd_soc_codec_get_drvdata(codec); 1410a91eb199SMark Brown 1411a91eb199SMark Brown switch (clk_id) { 1412a91eb199SMark Brown case WM8904_CLK_MCLK: 1413a91eb199SMark Brown priv->sysclk_src = clk_id; 1414a91eb199SMark Brown priv->mclk_rate = freq; 1415a91eb199SMark Brown break; 1416a91eb199SMark Brown 1417a91eb199SMark Brown case WM8904_CLK_FLL: 1418a91eb199SMark Brown priv->sysclk_src = clk_id; 1419a91eb199SMark Brown break; 1420a91eb199SMark Brown 1421a91eb199SMark Brown default: 1422a91eb199SMark Brown return -EINVAL; 1423a91eb199SMark Brown } 1424a91eb199SMark Brown 1425a91eb199SMark Brown dev_dbg(dai->dev, "Clock source is %d at %uHz\n", clk_id, freq); 1426a91eb199SMark Brown 1427a91eb199SMark Brown wm8904_configure_clocking(codec); 1428a91eb199SMark Brown 1429a91eb199SMark Brown return 0; 1430a91eb199SMark Brown } 1431a91eb199SMark Brown 1432a91eb199SMark Brown static int wm8904_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) 1433a91eb199SMark Brown { 1434a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1435a91eb199SMark Brown unsigned int aif1 = 0; 1436a91eb199SMark Brown unsigned int aif3 = 0; 1437a91eb199SMark Brown 1438a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1439a91eb199SMark Brown case SND_SOC_DAIFMT_CBS_CFS: 1440a91eb199SMark Brown break; 1441a91eb199SMark Brown case SND_SOC_DAIFMT_CBS_CFM: 1442a91eb199SMark Brown aif3 |= WM8904_LRCLK_DIR; 1443a91eb199SMark Brown break; 1444a91eb199SMark Brown case SND_SOC_DAIFMT_CBM_CFS: 1445a91eb199SMark Brown aif1 |= WM8904_BCLK_DIR; 1446a91eb199SMark Brown break; 1447a91eb199SMark Brown case SND_SOC_DAIFMT_CBM_CFM: 1448a91eb199SMark Brown aif1 |= WM8904_BCLK_DIR; 1449a91eb199SMark Brown aif3 |= WM8904_LRCLK_DIR; 1450a91eb199SMark Brown break; 1451a91eb199SMark Brown default: 1452a91eb199SMark Brown return -EINVAL; 1453a91eb199SMark Brown } 1454a91eb199SMark Brown 1455a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1456a91eb199SMark Brown case SND_SOC_DAIFMT_DSP_B: 1457f0199bc5SBo Shen aif1 |= 0x3 | WM8904_AIF_LRCLK_INV; 1458a91eb199SMark Brown case SND_SOC_DAIFMT_DSP_A: 1459a91eb199SMark Brown aif1 |= 0x3; 1460a91eb199SMark Brown break; 1461a91eb199SMark Brown case SND_SOC_DAIFMT_I2S: 1462a91eb199SMark Brown aif1 |= 0x2; 1463a91eb199SMark Brown break; 1464a91eb199SMark Brown case SND_SOC_DAIFMT_RIGHT_J: 1465a91eb199SMark Brown break; 1466a91eb199SMark Brown case SND_SOC_DAIFMT_LEFT_J: 1467a91eb199SMark Brown aif1 |= 0x1; 1468a91eb199SMark Brown break; 1469a91eb199SMark Brown default: 1470a91eb199SMark Brown return -EINVAL; 1471a91eb199SMark Brown } 1472a91eb199SMark Brown 1473a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1474a91eb199SMark Brown case SND_SOC_DAIFMT_DSP_A: 1475a91eb199SMark Brown case SND_SOC_DAIFMT_DSP_B: 1476a91eb199SMark Brown /* frame inversion not valid for DSP modes */ 1477a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 1478a91eb199SMark Brown case SND_SOC_DAIFMT_NB_NF: 1479a91eb199SMark Brown break; 1480a91eb199SMark Brown case SND_SOC_DAIFMT_IB_NF: 1481a91eb199SMark Brown aif1 |= WM8904_AIF_BCLK_INV; 1482a91eb199SMark Brown break; 1483a91eb199SMark Brown default: 1484a91eb199SMark Brown return -EINVAL; 1485a91eb199SMark Brown } 1486a91eb199SMark Brown break; 1487a91eb199SMark Brown 1488a91eb199SMark Brown case SND_SOC_DAIFMT_I2S: 1489a91eb199SMark Brown case SND_SOC_DAIFMT_RIGHT_J: 1490a91eb199SMark Brown case SND_SOC_DAIFMT_LEFT_J: 1491a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 1492a91eb199SMark Brown case SND_SOC_DAIFMT_NB_NF: 1493a91eb199SMark Brown break; 1494a91eb199SMark Brown case SND_SOC_DAIFMT_IB_IF: 1495a91eb199SMark Brown aif1 |= WM8904_AIF_BCLK_INV | WM8904_AIF_LRCLK_INV; 1496a91eb199SMark Brown break; 1497a91eb199SMark Brown case SND_SOC_DAIFMT_IB_NF: 1498a91eb199SMark Brown aif1 |= WM8904_AIF_BCLK_INV; 1499a91eb199SMark Brown break; 1500a91eb199SMark Brown case SND_SOC_DAIFMT_NB_IF: 1501a91eb199SMark Brown aif1 |= WM8904_AIF_LRCLK_INV; 1502a91eb199SMark Brown break; 1503a91eb199SMark Brown default: 1504a91eb199SMark Brown return -EINVAL; 1505a91eb199SMark Brown } 1506a91eb199SMark Brown break; 1507a91eb199SMark Brown default: 1508a91eb199SMark Brown return -EINVAL; 1509a91eb199SMark Brown } 1510a91eb199SMark Brown 1511a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_1, 1512a91eb199SMark Brown WM8904_AIF_BCLK_INV | WM8904_AIF_LRCLK_INV | 1513a91eb199SMark Brown WM8904_AIF_FMT_MASK | WM8904_BCLK_DIR, aif1); 1514a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_3, 1515a91eb199SMark Brown WM8904_LRCLK_DIR, aif3); 1516a91eb199SMark Brown 1517a91eb199SMark Brown return 0; 1518a91eb199SMark Brown } 1519a91eb199SMark Brown 1520a91eb199SMark Brown 1521a91eb199SMark Brown static int wm8904_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, 1522a91eb199SMark Brown unsigned int rx_mask, int slots, int slot_width) 1523a91eb199SMark Brown { 1524a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1525b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 1526a91eb199SMark Brown int aif1 = 0; 1527a91eb199SMark Brown 1528a91eb199SMark Brown /* Don't need to validate anything if we're turning off TDM */ 1529a91eb199SMark Brown if (slots == 0) 1530a91eb199SMark Brown goto out; 1531a91eb199SMark Brown 1532a91eb199SMark Brown /* Note that we allow configurations we can't handle ourselves - 1533a91eb199SMark Brown * for example, we can generate clocks for slots 2 and up even if 1534a91eb199SMark Brown * we can't use those slots ourselves. 1535a91eb199SMark Brown */ 1536a91eb199SMark Brown aif1 |= WM8904_AIFADC_TDM | WM8904_AIFDAC_TDM; 1537a91eb199SMark Brown 1538a91eb199SMark Brown switch (rx_mask) { 1539a91eb199SMark Brown case 3: 1540a91eb199SMark Brown break; 1541a91eb199SMark Brown case 0xc: 1542a91eb199SMark Brown aif1 |= WM8904_AIFADC_TDM_CHAN; 1543a91eb199SMark Brown break; 1544a91eb199SMark Brown default: 1545a91eb199SMark Brown return -EINVAL; 1546a91eb199SMark Brown } 1547a91eb199SMark Brown 1548a91eb199SMark Brown 1549a91eb199SMark Brown switch (tx_mask) { 1550a91eb199SMark Brown case 3: 1551a91eb199SMark Brown break; 1552a91eb199SMark Brown case 0xc: 1553a91eb199SMark Brown aif1 |= WM8904_AIFDAC_TDM_CHAN; 1554a91eb199SMark Brown break; 1555a91eb199SMark Brown default: 1556a91eb199SMark Brown return -EINVAL; 1557a91eb199SMark Brown } 1558a91eb199SMark Brown 1559a91eb199SMark Brown out: 1560a91eb199SMark Brown wm8904->tdm_width = slot_width; 1561a91eb199SMark Brown wm8904->tdm_slots = slots / 2; 1562a91eb199SMark Brown 1563a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_1, 1564a91eb199SMark Brown WM8904_AIFADC_TDM | WM8904_AIFADC_TDM_CHAN | 1565a91eb199SMark Brown WM8904_AIFDAC_TDM | WM8904_AIFDAC_TDM_CHAN, aif1); 1566a91eb199SMark Brown 1567a91eb199SMark Brown return 0; 1568a91eb199SMark Brown } 1569a91eb199SMark Brown 1570a91eb199SMark Brown struct _fll_div { 1571a91eb199SMark Brown u16 fll_fratio; 1572a91eb199SMark Brown u16 fll_outdiv; 1573a91eb199SMark Brown u16 fll_clk_ref_div; 1574a91eb199SMark Brown u16 n; 1575a91eb199SMark Brown u16 k; 1576a91eb199SMark Brown }; 1577a91eb199SMark Brown 1578a91eb199SMark Brown /* The size in bits of the FLL divide multiplied by 10 1579a91eb199SMark Brown * to allow rounding later */ 1580a91eb199SMark Brown #define FIXED_FLL_SIZE ((1 << 16) * 10) 1581a91eb199SMark Brown 1582a91eb199SMark Brown static struct { 1583a91eb199SMark Brown unsigned int min; 1584a91eb199SMark Brown unsigned int max; 1585a91eb199SMark Brown u16 fll_fratio; 1586a91eb199SMark Brown int ratio; 1587a91eb199SMark Brown } fll_fratios[] = { 1588a91eb199SMark Brown { 0, 64000, 4, 16 }, 1589a91eb199SMark Brown { 64000, 128000, 3, 8 }, 1590a91eb199SMark Brown { 128000, 256000, 2, 4 }, 1591a91eb199SMark Brown { 256000, 1000000, 1, 2 }, 1592a91eb199SMark Brown { 1000000, 13500000, 0, 1 }, 1593a91eb199SMark Brown }; 1594a91eb199SMark Brown 1595a91eb199SMark Brown static int fll_factors(struct _fll_div *fll_div, unsigned int Fref, 1596a91eb199SMark Brown unsigned int Fout) 1597a91eb199SMark Brown { 1598a91eb199SMark Brown u64 Kpart; 1599a91eb199SMark Brown unsigned int K, Ndiv, Nmod, target; 1600a91eb199SMark Brown unsigned int div; 1601a91eb199SMark Brown int i; 1602a91eb199SMark Brown 1603a91eb199SMark Brown /* Fref must be <=13.5MHz */ 1604a91eb199SMark Brown div = 1; 1605a91eb199SMark Brown fll_div->fll_clk_ref_div = 0; 1606a91eb199SMark Brown while ((Fref / div) > 13500000) { 1607a91eb199SMark Brown div *= 2; 1608a91eb199SMark Brown fll_div->fll_clk_ref_div++; 1609a91eb199SMark Brown 1610a91eb199SMark Brown if (div > 8) { 1611a91eb199SMark Brown pr_err("Can't scale %dMHz input down to <=13.5MHz\n", 1612a91eb199SMark Brown Fref); 1613a91eb199SMark Brown return -EINVAL; 1614a91eb199SMark Brown } 1615a91eb199SMark Brown } 1616a91eb199SMark Brown 1617a91eb199SMark Brown pr_debug("Fref=%u Fout=%u\n", Fref, Fout); 1618a91eb199SMark Brown 1619a91eb199SMark Brown /* Apply the division for our remaining calculations */ 1620a91eb199SMark Brown Fref /= div; 1621a91eb199SMark Brown 1622a91eb199SMark Brown /* Fvco should be 90-100MHz; don't check the upper bound */ 1623a91eb199SMark Brown div = 4; 1624a91eb199SMark Brown while (Fout * div < 90000000) { 1625a91eb199SMark Brown div++; 1626a91eb199SMark Brown if (div > 64) { 1627a91eb199SMark Brown pr_err("Unable to find FLL_OUTDIV for Fout=%uHz\n", 1628a91eb199SMark Brown Fout); 1629a91eb199SMark Brown return -EINVAL; 1630a91eb199SMark Brown } 1631a91eb199SMark Brown } 1632a91eb199SMark Brown target = Fout * div; 1633a91eb199SMark Brown fll_div->fll_outdiv = div - 1; 1634a91eb199SMark Brown 1635a91eb199SMark Brown pr_debug("Fvco=%dHz\n", target); 1636a91eb199SMark Brown 163725985edcSLucas De Marchi /* Find an appropriate FLL_FRATIO and factor it out of the target */ 1638a91eb199SMark Brown for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) { 1639a91eb199SMark Brown if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) { 1640a91eb199SMark Brown fll_div->fll_fratio = fll_fratios[i].fll_fratio; 1641a91eb199SMark Brown target /= fll_fratios[i].ratio; 1642a91eb199SMark Brown break; 1643a91eb199SMark Brown } 1644a91eb199SMark Brown } 1645a91eb199SMark Brown if (i == ARRAY_SIZE(fll_fratios)) { 1646a91eb199SMark Brown pr_err("Unable to find FLL_FRATIO for Fref=%uHz\n", Fref); 1647a91eb199SMark Brown return -EINVAL; 1648a91eb199SMark Brown } 1649a91eb199SMark Brown 1650a91eb199SMark Brown /* Now, calculate N.K */ 1651a91eb199SMark Brown Ndiv = target / Fref; 1652a91eb199SMark Brown 1653a91eb199SMark Brown fll_div->n = Ndiv; 1654a91eb199SMark Brown Nmod = target % Fref; 1655a91eb199SMark Brown pr_debug("Nmod=%d\n", Nmod); 1656a91eb199SMark Brown 1657a91eb199SMark Brown /* Calculate fractional part - scale up so we can round. */ 1658a91eb199SMark Brown Kpart = FIXED_FLL_SIZE * (long long)Nmod; 1659a91eb199SMark Brown 1660a91eb199SMark Brown do_div(Kpart, Fref); 1661a91eb199SMark Brown 1662a91eb199SMark Brown K = Kpart & 0xFFFFFFFF; 1663a91eb199SMark Brown 1664a91eb199SMark Brown if ((K % 10) >= 5) 1665a91eb199SMark Brown K += 5; 1666a91eb199SMark Brown 1667a91eb199SMark Brown /* Move down to proper range now rounding is done */ 1668a91eb199SMark Brown fll_div->k = K / 10; 1669a91eb199SMark Brown 1670a91eb199SMark Brown pr_debug("N=%x K=%x FLL_FRATIO=%x FLL_OUTDIV=%x FLL_CLK_REF_DIV=%x\n", 1671a91eb199SMark Brown fll_div->n, fll_div->k, 1672a91eb199SMark Brown fll_div->fll_fratio, fll_div->fll_outdiv, 1673a91eb199SMark Brown fll_div->fll_clk_ref_div); 1674a91eb199SMark Brown 1675a91eb199SMark Brown return 0; 1676a91eb199SMark Brown } 1677a91eb199SMark Brown 1678a91eb199SMark Brown static int wm8904_set_fll(struct snd_soc_dai *dai, int fll_id, int source, 1679a91eb199SMark Brown unsigned int Fref, unsigned int Fout) 1680a91eb199SMark Brown { 1681a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1682b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 1683a91eb199SMark Brown struct _fll_div fll_div; 1684a91eb199SMark Brown int ret, val; 1685a91eb199SMark Brown int clock2, fll1; 1686a91eb199SMark Brown 1687a91eb199SMark Brown /* Any change? */ 1688a91eb199SMark Brown if (source == wm8904->fll_src && Fref == wm8904->fll_fref && 1689a91eb199SMark Brown Fout == wm8904->fll_fout) 1690a91eb199SMark Brown return 0; 1691a91eb199SMark Brown 169218240b67SMark Brown clock2 = snd_soc_read(codec, WM8904_CLOCK_RATES_2); 169318240b67SMark Brown 1694a91eb199SMark Brown if (Fout == 0) { 1695a91eb199SMark Brown dev_dbg(codec->dev, "FLL disabled\n"); 1696a91eb199SMark Brown 1697a91eb199SMark Brown wm8904->fll_fref = 0; 1698a91eb199SMark Brown wm8904->fll_fout = 0; 1699a91eb199SMark Brown 1700a91eb199SMark Brown /* Gate SYSCLK to avoid glitches */ 1701a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 1702a91eb199SMark Brown WM8904_CLK_SYS_ENA, 0); 1703a91eb199SMark Brown 1704a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 1705a91eb199SMark Brown WM8904_FLL_OSC_ENA | WM8904_FLL_ENA, 0); 1706a91eb199SMark Brown 1707a91eb199SMark Brown goto out; 1708a91eb199SMark Brown } 1709a91eb199SMark Brown 1710a91eb199SMark Brown /* Validate the FLL ID */ 1711a91eb199SMark Brown switch (source) { 1712a91eb199SMark Brown case WM8904_FLL_MCLK: 1713a91eb199SMark Brown case WM8904_FLL_LRCLK: 1714a91eb199SMark Brown case WM8904_FLL_BCLK: 1715a91eb199SMark Brown ret = fll_factors(&fll_div, Fref, Fout); 1716a91eb199SMark Brown if (ret != 0) 1717a91eb199SMark Brown return ret; 1718a91eb199SMark Brown break; 1719a91eb199SMark Brown 1720a91eb199SMark Brown case WM8904_FLL_FREE_RUNNING: 1721a91eb199SMark Brown dev_dbg(codec->dev, "Using free running FLL\n"); 1722a91eb199SMark Brown /* Force 12MHz and output/4 for now */ 1723a91eb199SMark Brown Fout = 12000000; 1724a91eb199SMark Brown Fref = 12000000; 1725a91eb199SMark Brown 1726a91eb199SMark Brown memset(&fll_div, 0, sizeof(fll_div)); 1727a91eb199SMark Brown fll_div.fll_outdiv = 3; 1728a91eb199SMark Brown break; 1729a91eb199SMark Brown 1730a91eb199SMark Brown default: 1731a91eb199SMark Brown dev_err(codec->dev, "Unknown FLL ID %d\n", fll_id); 1732a91eb199SMark Brown return -EINVAL; 1733a91eb199SMark Brown } 1734a91eb199SMark Brown 1735a91eb199SMark Brown /* Save current state then disable the FLL and SYSCLK to avoid 1736a91eb199SMark Brown * misclocking */ 1737a91eb199SMark Brown fll1 = snd_soc_read(codec, WM8904_FLL_CONTROL_1); 1738a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 1739a91eb199SMark Brown WM8904_CLK_SYS_ENA, 0); 1740a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 1741a91eb199SMark Brown WM8904_FLL_OSC_ENA | WM8904_FLL_ENA, 0); 1742a91eb199SMark Brown 1743a91eb199SMark Brown /* Unlock forced oscilator control to switch it on/off */ 1744a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CONTROL_INTERFACE_TEST_1, 1745a91eb199SMark Brown WM8904_USER_KEY, WM8904_USER_KEY); 1746a91eb199SMark Brown 1747a91eb199SMark Brown if (fll_id == WM8904_FLL_FREE_RUNNING) { 1748a91eb199SMark Brown val = WM8904_FLL_FRC_NCO; 1749a91eb199SMark Brown } else { 1750a91eb199SMark Brown val = 0; 1751a91eb199SMark Brown } 1752a91eb199SMark Brown 1753a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_NCO_TEST_1, WM8904_FLL_FRC_NCO, 1754a91eb199SMark Brown val); 1755a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CONTROL_INTERFACE_TEST_1, 1756a91eb199SMark Brown WM8904_USER_KEY, 0); 1757a91eb199SMark Brown 1758a91eb199SMark Brown switch (fll_id) { 1759a91eb199SMark Brown case WM8904_FLL_MCLK: 1760a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_5, 1761a91eb199SMark Brown WM8904_FLL_CLK_REF_SRC_MASK, 0); 1762a91eb199SMark Brown break; 1763a91eb199SMark Brown 1764a91eb199SMark Brown case WM8904_FLL_LRCLK: 1765a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_5, 1766a91eb199SMark Brown WM8904_FLL_CLK_REF_SRC_MASK, 1); 1767a91eb199SMark Brown break; 1768a91eb199SMark Brown 1769a91eb199SMark Brown case WM8904_FLL_BCLK: 1770a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_5, 1771a91eb199SMark Brown WM8904_FLL_CLK_REF_SRC_MASK, 2); 1772a91eb199SMark Brown break; 1773a91eb199SMark Brown } 1774a91eb199SMark Brown 1775a91eb199SMark Brown if (fll_div.k) 1776a91eb199SMark Brown val = WM8904_FLL_FRACN_ENA; 1777a91eb199SMark Brown else 1778a91eb199SMark Brown val = 0; 1779a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 1780a91eb199SMark Brown WM8904_FLL_FRACN_ENA, val); 1781a91eb199SMark Brown 1782a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_2, 1783a91eb199SMark Brown WM8904_FLL_OUTDIV_MASK | WM8904_FLL_FRATIO_MASK, 1784a91eb199SMark Brown (fll_div.fll_outdiv << WM8904_FLL_OUTDIV_SHIFT) | 1785a91eb199SMark Brown (fll_div.fll_fratio << WM8904_FLL_FRATIO_SHIFT)); 1786a91eb199SMark Brown 1787a91eb199SMark Brown snd_soc_write(codec, WM8904_FLL_CONTROL_3, fll_div.k); 1788a91eb199SMark Brown 1789a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_4, WM8904_FLL_N_MASK, 1790a91eb199SMark Brown fll_div.n << WM8904_FLL_N_SHIFT); 1791a91eb199SMark Brown 1792a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_5, 1793a91eb199SMark Brown WM8904_FLL_CLK_REF_DIV_MASK, 1794a91eb199SMark Brown fll_div.fll_clk_ref_div 1795a91eb199SMark Brown << WM8904_FLL_CLK_REF_DIV_SHIFT); 1796a91eb199SMark Brown 1797a91eb199SMark Brown dev_dbg(codec->dev, "FLL configured for %dHz->%dHz\n", Fref, Fout); 1798a91eb199SMark Brown 1799a91eb199SMark Brown wm8904->fll_fref = Fref; 1800a91eb199SMark Brown wm8904->fll_fout = Fout; 1801a91eb199SMark Brown wm8904->fll_src = source; 1802a91eb199SMark Brown 1803a91eb199SMark Brown /* Enable the FLL if it was previously active */ 1804a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 1805a91eb199SMark Brown WM8904_FLL_OSC_ENA, fll1); 1806a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 1807a91eb199SMark Brown WM8904_FLL_ENA, fll1); 1808a91eb199SMark Brown 1809a91eb199SMark Brown out: 1810a91eb199SMark Brown /* Reenable SYSCLK if it was previously active */ 1811a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 1812a91eb199SMark Brown WM8904_CLK_SYS_ENA, clock2); 1813a91eb199SMark Brown 1814a91eb199SMark Brown return 0; 1815a91eb199SMark Brown } 1816a91eb199SMark Brown 1817a91eb199SMark Brown static int wm8904_digital_mute(struct snd_soc_dai *codec_dai, int mute) 1818a91eb199SMark Brown { 1819a91eb199SMark Brown struct snd_soc_codec *codec = codec_dai->codec; 1820a91eb199SMark Brown int val; 1821a91eb199SMark Brown 1822a91eb199SMark Brown if (mute) 1823a91eb199SMark Brown val = WM8904_DAC_MUTE; 1824a91eb199SMark Brown else 1825a91eb199SMark Brown val = 0; 1826a91eb199SMark Brown 1827a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DAC_DIGITAL_1, WM8904_DAC_MUTE, val); 1828a91eb199SMark Brown 1829a91eb199SMark Brown return 0; 1830a91eb199SMark Brown } 1831a91eb199SMark Brown 1832a91eb199SMark Brown static int wm8904_set_bias_level(struct snd_soc_codec *codec, 1833a91eb199SMark Brown enum snd_soc_bias_level level) 1834a91eb199SMark Brown { 1835b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 1836c1334218SMark Brown int ret; 1837a91eb199SMark Brown 1838a91eb199SMark Brown switch (level) { 1839a91eb199SMark Brown case SND_SOC_BIAS_ON: 1840779ea473SFabio Estevam ret = clk_prepare_enable(wm8904->mclk); 1841779ea473SFabio Estevam if (ret) 1842779ea473SFabio Estevam return ret; 1843a91eb199SMark Brown break; 1844a91eb199SMark Brown 1845a91eb199SMark Brown case SND_SOC_BIAS_PREPARE: 1846a91eb199SMark Brown /* VMID resistance 2*50k */ 1847a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_VMID_CONTROL_0, 1848a91eb199SMark Brown WM8904_VMID_RES_MASK, 1849a91eb199SMark Brown 0x1 << WM8904_VMID_RES_SHIFT); 1850a91eb199SMark Brown 1851a91eb199SMark Brown /* Normal bias current */ 1852a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0, 1853a91eb199SMark Brown WM8904_ISEL_MASK, 2 << WM8904_ISEL_SHIFT); 1854a91eb199SMark Brown break; 1855a91eb199SMark Brown 1856a91eb199SMark Brown case SND_SOC_BIAS_STANDBY: 1857f44a9842SLars-Peter Clausen if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) { 1858a91eb199SMark Brown ret = regulator_bulk_enable(ARRAY_SIZE(wm8904->supplies), 1859a91eb199SMark Brown wm8904->supplies); 1860a91eb199SMark Brown if (ret != 0) { 1861a91eb199SMark Brown dev_err(codec->dev, 1862a91eb199SMark Brown "Failed to enable supplies: %d\n", 1863a91eb199SMark Brown ret); 1864a91eb199SMark Brown return ret; 1865a91eb199SMark Brown } 1866a91eb199SMark Brown 1867c1b88ee2SMark Brown regcache_cache_only(wm8904->regmap, false); 186884d0d831SMark Brown regcache_sync(wm8904->regmap); 1869a91eb199SMark Brown 1870a91eb199SMark Brown /* Enable bias */ 1871a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0, 1872a91eb199SMark Brown WM8904_BIAS_ENA, WM8904_BIAS_ENA); 1873a91eb199SMark Brown 1874a91eb199SMark Brown /* Enable VMID, VMID buffering, 2*5k resistance */ 1875a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_VMID_CONTROL_0, 1876a91eb199SMark Brown WM8904_VMID_ENA | 1877a91eb199SMark Brown WM8904_VMID_RES_MASK, 1878a91eb199SMark Brown WM8904_VMID_ENA | 1879a91eb199SMark Brown 0x3 << WM8904_VMID_RES_SHIFT); 1880a91eb199SMark Brown 1881a91eb199SMark Brown /* Let VMID ramp */ 1882a91eb199SMark Brown msleep(1); 1883a91eb199SMark Brown } 1884a91eb199SMark Brown 1885a91eb199SMark Brown /* Maintain VMID with 2*250k */ 1886a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_VMID_CONTROL_0, 1887a91eb199SMark Brown WM8904_VMID_RES_MASK, 1888a91eb199SMark Brown 0x2 << WM8904_VMID_RES_SHIFT); 1889a91eb199SMark Brown 1890a91eb199SMark Brown /* Bias current *0.5 */ 1891a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0, 1892a91eb199SMark Brown WM8904_ISEL_MASK, 0); 1893a91eb199SMark Brown break; 1894a91eb199SMark Brown 1895a91eb199SMark Brown case SND_SOC_BIAS_OFF: 1896a91eb199SMark Brown /* Turn off VMID */ 1897a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_VMID_CONTROL_0, 1898a91eb199SMark Brown WM8904_VMID_RES_MASK | WM8904_VMID_ENA, 0); 1899a91eb199SMark Brown 1900a91eb199SMark Brown /* Stop bias generation */ 1901a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0, 1902a91eb199SMark Brown WM8904_BIAS_ENA, 0); 1903a91eb199SMark Brown 1904c1b88ee2SMark Brown regcache_cache_only(wm8904->regmap, true); 1905c1b88ee2SMark Brown regcache_mark_dirty(wm8904->regmap); 1906c1334218SMark Brown 1907a91eb199SMark Brown regulator_bulk_disable(ARRAY_SIZE(wm8904->supplies), 1908a91eb199SMark Brown wm8904->supplies); 19098b9920e3SBo Shen clk_disable_unprepare(wm8904->mclk); 1910a91eb199SMark Brown break; 1911a91eb199SMark Brown } 1912a91eb199SMark Brown return 0; 1913a91eb199SMark Brown } 1914a91eb199SMark Brown 1915a91eb199SMark Brown #define WM8904_RATES SNDRV_PCM_RATE_8000_96000 1916a91eb199SMark Brown 1917a91eb199SMark Brown #define WM8904_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 1918a91eb199SMark Brown SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) 1919a91eb199SMark Brown 192085e7652dSLars-Peter Clausen static const struct snd_soc_dai_ops wm8904_dai_ops = { 1921a91eb199SMark Brown .set_sysclk = wm8904_set_sysclk, 1922a91eb199SMark Brown .set_fmt = wm8904_set_fmt, 1923a91eb199SMark Brown .set_tdm_slot = wm8904_set_tdm_slot, 1924a91eb199SMark Brown .set_pll = wm8904_set_fll, 1925a91eb199SMark Brown .hw_params = wm8904_hw_params, 1926a91eb199SMark Brown .digital_mute = wm8904_digital_mute, 1927a91eb199SMark Brown }; 1928a91eb199SMark Brown 1929f0fba2adSLiam Girdwood static struct snd_soc_dai_driver wm8904_dai = { 1930f0fba2adSLiam Girdwood .name = "wm8904-hifi", 1931a91eb199SMark Brown .playback = { 1932a91eb199SMark Brown .stream_name = "Playback", 1933a91eb199SMark Brown .channels_min = 2, 1934a91eb199SMark Brown .channels_max = 2, 1935a91eb199SMark Brown .rates = WM8904_RATES, 1936a91eb199SMark Brown .formats = WM8904_FORMATS, 1937a91eb199SMark Brown }, 1938a91eb199SMark Brown .capture = { 1939a91eb199SMark Brown .stream_name = "Capture", 1940a91eb199SMark Brown .channels_min = 2, 1941a91eb199SMark Brown .channels_max = 2, 1942a91eb199SMark Brown .rates = WM8904_RATES, 1943a91eb199SMark Brown .formats = WM8904_FORMATS, 1944a91eb199SMark Brown }, 1945a91eb199SMark Brown .ops = &wm8904_dai_ops, 1946a91eb199SMark Brown .symmetric_rates = 1, 1947a91eb199SMark Brown }; 1948a91eb199SMark Brown 1949f0fba2adSLiam Girdwood static void wm8904_handle_retune_mobile_pdata(struct snd_soc_codec *codec) 1950a91eb199SMark Brown { 1951f0fba2adSLiam Girdwood struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 1952a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 1953a91eb199SMark Brown struct snd_kcontrol_new control = 1954a91eb199SMark Brown SOC_ENUM_EXT("EQ Mode", 1955a91eb199SMark Brown wm8904->retune_mobile_enum, 1956a91eb199SMark Brown wm8904_get_retune_mobile_enum, 1957a91eb199SMark Brown wm8904_put_retune_mobile_enum); 1958a91eb199SMark Brown int ret, i, j; 1959a91eb199SMark Brown const char **t; 1960a91eb199SMark Brown 1961a91eb199SMark Brown /* We need an array of texts for the enum API but the number 1962a91eb199SMark Brown * of texts is likely to be less than the number of 1963a91eb199SMark Brown * configurations due to the sample rate dependency of the 1964a91eb199SMark Brown * configurations. */ 1965a91eb199SMark Brown wm8904->num_retune_mobile_texts = 0; 1966a91eb199SMark Brown wm8904->retune_mobile_texts = NULL; 1967a91eb199SMark Brown for (i = 0; i < pdata->num_retune_mobile_cfgs; i++) { 1968a91eb199SMark Brown for (j = 0; j < wm8904->num_retune_mobile_texts; j++) { 1969a91eb199SMark Brown if (strcmp(pdata->retune_mobile_cfgs[i].name, 1970a91eb199SMark Brown wm8904->retune_mobile_texts[j]) == 0) 1971a91eb199SMark Brown break; 1972a91eb199SMark Brown } 1973a91eb199SMark Brown 1974a91eb199SMark Brown if (j != wm8904->num_retune_mobile_texts) 1975a91eb199SMark Brown continue; 1976a91eb199SMark Brown 1977a91eb199SMark Brown /* Expand the array... */ 1978a91eb199SMark Brown t = krealloc(wm8904->retune_mobile_texts, 1979a91eb199SMark Brown sizeof(char *) * 1980a91eb199SMark Brown (wm8904->num_retune_mobile_texts + 1), 1981a91eb199SMark Brown GFP_KERNEL); 1982a91eb199SMark Brown if (t == NULL) 1983a91eb199SMark Brown continue; 1984a91eb199SMark Brown 1985a91eb199SMark Brown /* ...store the new entry... */ 1986a91eb199SMark Brown t[wm8904->num_retune_mobile_texts] = 1987a91eb199SMark Brown pdata->retune_mobile_cfgs[i].name; 1988a91eb199SMark Brown 1989a91eb199SMark Brown /* ...and remember the new version. */ 1990a91eb199SMark Brown wm8904->num_retune_mobile_texts++; 1991a91eb199SMark Brown wm8904->retune_mobile_texts = t; 1992a91eb199SMark Brown } 1993a91eb199SMark Brown 1994a91eb199SMark Brown dev_dbg(codec->dev, "Allocated %d unique ReTune Mobile names\n", 1995a91eb199SMark Brown wm8904->num_retune_mobile_texts); 1996a91eb199SMark Brown 19979a8d38dbSTakashi Iwai wm8904->retune_mobile_enum.items = wm8904->num_retune_mobile_texts; 1998a91eb199SMark Brown wm8904->retune_mobile_enum.texts = wm8904->retune_mobile_texts; 1999a91eb199SMark Brown 2000022658beSLiam Girdwood ret = snd_soc_add_codec_controls(codec, &control, 1); 2001a91eb199SMark Brown if (ret != 0) 2002f0fba2adSLiam Girdwood dev_err(codec->dev, 2003a91eb199SMark Brown "Failed to add ReTune Mobile control: %d\n", ret); 2004a91eb199SMark Brown } 2005a91eb199SMark Brown 2006f0fba2adSLiam Girdwood static void wm8904_handle_pdata(struct snd_soc_codec *codec) 2007a91eb199SMark Brown { 2008f0fba2adSLiam Girdwood struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 2009a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 2010a91eb199SMark Brown int ret, i; 2011a91eb199SMark Brown 2012a91eb199SMark Brown if (!pdata) { 2013022658beSLiam Girdwood snd_soc_add_codec_controls(codec, wm8904_eq_controls, 2014a91eb199SMark Brown ARRAY_SIZE(wm8904_eq_controls)); 2015a91eb199SMark Brown return; 2016a91eb199SMark Brown } 2017a91eb199SMark Brown 2018a91eb199SMark Brown dev_dbg(codec->dev, "%d DRC configurations\n", pdata->num_drc_cfgs); 2019a91eb199SMark Brown 2020a91eb199SMark Brown if (pdata->num_drc_cfgs) { 2021a91eb199SMark Brown struct snd_kcontrol_new control = 2022a91eb199SMark Brown SOC_ENUM_EXT("DRC Mode", wm8904->drc_enum, 2023a91eb199SMark Brown wm8904_get_drc_enum, wm8904_put_drc_enum); 2024a91eb199SMark Brown 2025a91eb199SMark Brown /* We need an array of texts for the enum API */ 2026a91eb199SMark Brown wm8904->drc_texts = kmalloc(sizeof(char *) 2027a91eb199SMark Brown * pdata->num_drc_cfgs, GFP_KERNEL); 2028d931099bSSachin Kamat if (!wm8904->drc_texts) 2029a91eb199SMark Brown return; 2030a91eb199SMark Brown 2031a91eb199SMark Brown for (i = 0; i < pdata->num_drc_cfgs; i++) 2032a91eb199SMark Brown wm8904->drc_texts[i] = pdata->drc_cfgs[i].name; 2033a91eb199SMark Brown 20349a8d38dbSTakashi Iwai wm8904->drc_enum.items = pdata->num_drc_cfgs; 2035a91eb199SMark Brown wm8904->drc_enum.texts = wm8904->drc_texts; 2036a91eb199SMark Brown 2037022658beSLiam Girdwood ret = snd_soc_add_codec_controls(codec, &control, 1); 2038a91eb199SMark Brown if (ret != 0) 2039f0fba2adSLiam Girdwood dev_err(codec->dev, 2040a91eb199SMark Brown "Failed to add DRC mode control: %d\n", ret); 2041a91eb199SMark Brown 2042a91eb199SMark Brown wm8904_set_drc(codec); 2043a91eb199SMark Brown } 2044a91eb199SMark Brown 2045a91eb199SMark Brown dev_dbg(codec->dev, "%d ReTune Mobile configurations\n", 2046a91eb199SMark Brown pdata->num_retune_mobile_cfgs); 2047a91eb199SMark Brown 2048a91eb199SMark Brown if (pdata->num_retune_mobile_cfgs) 2049f0fba2adSLiam Girdwood wm8904_handle_retune_mobile_pdata(codec); 2050a91eb199SMark Brown else 2051022658beSLiam Girdwood snd_soc_add_codec_controls(codec, wm8904_eq_controls, 2052a91eb199SMark Brown ARRAY_SIZE(wm8904_eq_controls)); 2053a91eb199SMark Brown } 2054a91eb199SMark Brown 2055f0fba2adSLiam Girdwood 2056f0fba2adSLiam Girdwood static int wm8904_probe(struct snd_soc_codec *codec) 2057a91eb199SMark Brown { 2058f0fba2adSLiam Girdwood struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 2059a91eb199SMark Brown 20608c126474SMark Brown switch (wm8904->devtype) { 20618c126474SMark Brown case WM8904: 20628c126474SMark Brown break; 20638c126474SMark Brown case WM8912: 20648c126474SMark Brown memset(&wm8904_dai.capture, 0, sizeof(wm8904_dai.capture)); 20658c126474SMark Brown break; 20668c126474SMark Brown default: 20678c126474SMark Brown dev_err(codec->dev, "Unknown device type %d\n", 20688c126474SMark Brown wm8904->devtype); 2069f0fba2adSLiam Girdwood return -EINVAL; 20708c126474SMark Brown } 20718c126474SMark Brown 2072f0fba2adSLiam Girdwood wm8904_handle_pdata(codec); 2073a91eb199SMark Brown 2074f0fba2adSLiam Girdwood wm8904_add_widgets(codec); 2075a91eb199SMark Brown 2076a91eb199SMark Brown return 0; 2077a91eb199SMark Brown } 2078a91eb199SMark Brown 2079f0fba2adSLiam Girdwood static int wm8904_remove(struct snd_soc_codec *codec) 2080a91eb199SMark Brown { 2081f0fba2adSLiam Girdwood struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 2082f0fba2adSLiam Girdwood 2083cd70978cSAxel Lin kfree(wm8904->retune_mobile_texts); 2084cd70978cSAxel Lin kfree(wm8904->drc_texts); 2085f0fba2adSLiam Girdwood 2086f0fba2adSLiam Girdwood return 0; 2087a91eb199SMark Brown } 2088a91eb199SMark Brown 2089f0fba2adSLiam Girdwood static struct snd_soc_codec_driver soc_codec_dev_wm8904 = { 2090f0fba2adSLiam Girdwood .probe = wm8904_probe, 2091f0fba2adSLiam Girdwood .remove = wm8904_remove, 2092f0fba2adSLiam Girdwood .set_bias_level = wm8904_set_bias_level, 2093eb3032f8SAxel Lin .idle_bias_off = true, 209484d0d831SMark Brown }; 209584d0d831SMark Brown 209684d0d831SMark Brown static const struct regmap_config wm8904_regmap = { 209784d0d831SMark Brown .reg_bits = 8, 209884d0d831SMark Brown .val_bits = 16, 209984d0d831SMark Brown 210084d0d831SMark Brown .max_register = WM8904_MAX_REGISTER, 210184d0d831SMark Brown .volatile_reg = wm8904_volatile_register, 210284d0d831SMark Brown .readable_reg = wm8904_readable_register, 210384d0d831SMark Brown 210484d0d831SMark Brown .cache_type = REGCACHE_RBTREE, 210584d0d831SMark Brown .reg_defaults = wm8904_reg_defaults, 210684d0d831SMark Brown .num_reg_defaults = ARRAY_SIZE(wm8904_reg_defaults), 2107f0fba2adSLiam Girdwood }; 2108f0fba2adSLiam Girdwood 2109b1a5fad5SAlexander Morozov #ifdef CONFIG_OF 2110b1a5fad5SAlexander Morozov static enum wm8904_type wm8904_data = WM8904; 2111b1a5fad5SAlexander Morozov static enum wm8904_type wm8912_data = WM8912; 2112b1a5fad5SAlexander Morozov 2113b1a5fad5SAlexander Morozov static const struct of_device_id wm8904_of_match[] = { 2114b1a5fad5SAlexander Morozov { 2115b1a5fad5SAlexander Morozov .compatible = "wlf,wm8904", 2116b1a5fad5SAlexander Morozov .data = &wm8904_data, 2117b1a5fad5SAlexander Morozov }, { 2118b1a5fad5SAlexander Morozov .compatible = "wlf,wm8912", 2119b1a5fad5SAlexander Morozov .data = &wm8912_data, 2120b1a5fad5SAlexander Morozov }, { 2121b1a5fad5SAlexander Morozov /* sentinel */ 2122b1a5fad5SAlexander Morozov } 2123b1a5fad5SAlexander Morozov }; 2124b1a5fad5SAlexander Morozov MODULE_DEVICE_TABLE(of, wm8904_of_match); 2125b1a5fad5SAlexander Morozov #endif 2126b1a5fad5SAlexander Morozov 21277a79e94eSBill Pemberton static int wm8904_i2c_probe(struct i2c_client *i2c, 2128a91eb199SMark Brown const struct i2c_device_id *id) 2129a91eb199SMark Brown { 2130a91eb199SMark Brown struct wm8904_priv *wm8904; 213103862cf6SMark Brown unsigned int val; 213203862cf6SMark Brown int ret, i; 2133a91eb199SMark Brown 213493e26d4eSMark Brown wm8904 = devm_kzalloc(&i2c->dev, sizeof(struct wm8904_priv), 213593e26d4eSMark Brown GFP_KERNEL); 2136a91eb199SMark Brown if (wm8904 == NULL) 2137a91eb199SMark Brown return -ENOMEM; 2138a91eb199SMark Brown 21398b9920e3SBo Shen wm8904->mclk = devm_clk_get(&i2c->dev, "mclk"); 21408b9920e3SBo Shen if (IS_ERR(wm8904->mclk)) { 21418b9920e3SBo Shen ret = PTR_ERR(wm8904->mclk); 21428b9920e3SBo Shen dev_err(&i2c->dev, "Failed to get MCLK\n"); 21438b9920e3SBo Shen return ret; 21448b9920e3SBo Shen } 21458b9920e3SBo Shen 2146d633edd9SMark Brown wm8904->regmap = devm_regmap_init_i2c(i2c, &wm8904_regmap); 214784d0d831SMark Brown if (IS_ERR(wm8904->regmap)) { 214884d0d831SMark Brown ret = PTR_ERR(wm8904->regmap); 214984d0d831SMark Brown dev_err(&i2c->dev, "Failed to allocate register map: %d\n", 215084d0d831SMark Brown ret); 215184d0d831SMark Brown return ret; 215284d0d831SMark Brown } 215384d0d831SMark Brown 2154b1a5fad5SAlexander Morozov if (i2c->dev.of_node) { 2155b1a5fad5SAlexander Morozov const struct of_device_id *match; 2156b1a5fad5SAlexander Morozov 2157b1a5fad5SAlexander Morozov match = of_match_node(wm8904_of_match, i2c->dev.of_node); 2158b1a5fad5SAlexander Morozov if (match == NULL) 2159b1a5fad5SAlexander Morozov return -EINVAL; 2160b1a5fad5SAlexander Morozov wm8904->devtype = *((enum wm8904_type *)match->data); 2161b1a5fad5SAlexander Morozov } else { 21628c126474SMark Brown wm8904->devtype = id->driver_data; 2163b1a5fad5SAlexander Morozov } 2164b1a5fad5SAlexander Morozov 2165a91eb199SMark Brown i2c_set_clientdata(i2c, wm8904); 2166a91eb199SMark Brown wm8904->pdata = i2c->dev.platform_data; 2167a91eb199SMark Brown 216803862cf6SMark Brown for (i = 0; i < ARRAY_SIZE(wm8904->supplies); i++) 216903862cf6SMark Brown wm8904->supplies[i].supply = wm8904_supply_names[i]; 217003862cf6SMark Brown 217103862cf6SMark Brown ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8904->supplies), 217203862cf6SMark Brown wm8904->supplies); 217303862cf6SMark Brown if (ret != 0) { 217403862cf6SMark Brown dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret); 217503862cf6SMark Brown return ret; 217603862cf6SMark Brown } 217703862cf6SMark Brown 217803862cf6SMark Brown ret = regulator_bulk_enable(ARRAY_SIZE(wm8904->supplies), 217903862cf6SMark Brown wm8904->supplies); 218003862cf6SMark Brown if (ret != 0) { 218103862cf6SMark Brown dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret); 218203862cf6SMark Brown return ret; 218303862cf6SMark Brown } 218403862cf6SMark Brown 218503862cf6SMark Brown ret = regmap_read(wm8904->regmap, WM8904_SW_RESET_AND_ID, &val); 218603862cf6SMark Brown if (ret < 0) { 218703862cf6SMark Brown dev_err(&i2c->dev, "Failed to read ID register: %d\n", ret); 218803862cf6SMark Brown goto err_enable; 218903862cf6SMark Brown } 219003862cf6SMark Brown if (val != 0x8904) { 219103862cf6SMark Brown dev_err(&i2c->dev, "Device is not a WM8904, ID is %x\n", val); 219203862cf6SMark Brown ret = -EINVAL; 219303862cf6SMark Brown goto err_enable; 219403862cf6SMark Brown } 219503862cf6SMark Brown 219603862cf6SMark Brown ret = regmap_read(wm8904->regmap, WM8904_REVISION, &val); 219703862cf6SMark Brown if (ret < 0) { 219803862cf6SMark Brown dev_err(&i2c->dev, "Failed to read device revision: %d\n", 219903862cf6SMark Brown ret); 220003862cf6SMark Brown goto err_enable; 220103862cf6SMark Brown } 220203862cf6SMark Brown dev_info(&i2c->dev, "revision %c\n", val + 'A'); 220303862cf6SMark Brown 220403862cf6SMark Brown ret = regmap_write(wm8904->regmap, WM8904_SW_RESET_AND_ID, 0); 220503862cf6SMark Brown if (ret < 0) { 220603862cf6SMark Brown dev_err(&i2c->dev, "Failed to issue reset: %d\n", ret); 220703862cf6SMark Brown goto err_enable; 220803862cf6SMark Brown } 220903862cf6SMark Brown 2210725e7a7bSMark Brown /* Change some default settings - latch VU and enable ZC */ 2211725e7a7bSMark Brown regmap_update_bits(wm8904->regmap, WM8904_ADC_DIGITAL_VOLUME_LEFT, 2212725e7a7bSMark Brown WM8904_ADC_VU, WM8904_ADC_VU); 2213725e7a7bSMark Brown regmap_update_bits(wm8904->regmap, WM8904_ADC_DIGITAL_VOLUME_RIGHT, 2214725e7a7bSMark Brown WM8904_ADC_VU, WM8904_ADC_VU); 2215725e7a7bSMark Brown regmap_update_bits(wm8904->regmap, WM8904_DAC_DIGITAL_VOLUME_LEFT, 2216725e7a7bSMark Brown WM8904_DAC_VU, WM8904_DAC_VU); 2217725e7a7bSMark Brown regmap_update_bits(wm8904->regmap, WM8904_DAC_DIGITAL_VOLUME_RIGHT, 2218725e7a7bSMark Brown WM8904_DAC_VU, WM8904_DAC_VU); 2219725e7a7bSMark Brown regmap_update_bits(wm8904->regmap, WM8904_ANALOGUE_OUT1_LEFT, 2220725e7a7bSMark Brown WM8904_HPOUT_VU | WM8904_HPOUTLZC, 2221725e7a7bSMark Brown WM8904_HPOUT_VU | WM8904_HPOUTLZC); 2222725e7a7bSMark Brown regmap_update_bits(wm8904->regmap, WM8904_ANALOGUE_OUT1_RIGHT, 2223725e7a7bSMark Brown WM8904_HPOUT_VU | WM8904_HPOUTRZC, 2224725e7a7bSMark Brown WM8904_HPOUT_VU | WM8904_HPOUTRZC); 2225725e7a7bSMark Brown regmap_update_bits(wm8904->regmap, WM8904_ANALOGUE_OUT2_LEFT, 2226725e7a7bSMark Brown WM8904_LINEOUT_VU | WM8904_LINEOUTLZC, 2227725e7a7bSMark Brown WM8904_LINEOUT_VU | WM8904_LINEOUTLZC); 2228725e7a7bSMark Brown regmap_update_bits(wm8904->regmap, WM8904_ANALOGUE_OUT2_RIGHT, 2229725e7a7bSMark Brown WM8904_LINEOUT_VU | WM8904_LINEOUTRZC, 2230725e7a7bSMark Brown WM8904_LINEOUT_VU | WM8904_LINEOUTRZC); 2231725e7a7bSMark Brown regmap_update_bits(wm8904->regmap, WM8904_CLOCK_RATES_0, 2232725e7a7bSMark Brown WM8904_SR_MODE, 0); 2233725e7a7bSMark Brown 2234725e7a7bSMark Brown /* Apply configuration from the platform data. */ 2235725e7a7bSMark Brown if (wm8904->pdata) { 2236725e7a7bSMark Brown for (i = 0; i < WM8904_GPIO_REGS; i++) { 2237725e7a7bSMark Brown if (!wm8904->pdata->gpio_cfg[i]) 2238725e7a7bSMark Brown continue; 2239725e7a7bSMark Brown 2240725e7a7bSMark Brown regmap_update_bits(wm8904->regmap, 2241725e7a7bSMark Brown WM8904_GPIO_CONTROL_1 + i, 2242725e7a7bSMark Brown 0xffff, 2243725e7a7bSMark Brown wm8904->pdata->gpio_cfg[i]); 2244725e7a7bSMark Brown } 2245725e7a7bSMark Brown 2246725e7a7bSMark Brown /* Zero is the default value for these anyway */ 2247725e7a7bSMark Brown for (i = 0; i < WM8904_MIC_REGS; i++) 2248725e7a7bSMark Brown regmap_update_bits(wm8904->regmap, 2249725e7a7bSMark Brown WM8904_MIC_BIAS_CONTROL_0 + i, 2250725e7a7bSMark Brown 0xffff, 2251725e7a7bSMark Brown wm8904->pdata->mic_cfg[i]); 2252725e7a7bSMark Brown } 2253725e7a7bSMark Brown 2254725e7a7bSMark Brown /* Set Class W by default - this will be managed by the Class 2255725e7a7bSMark Brown * G widget at runtime where bypass paths are available. 2256725e7a7bSMark Brown */ 2257725e7a7bSMark Brown regmap_update_bits(wm8904->regmap, WM8904_CLASS_W_0, 2258725e7a7bSMark Brown WM8904_CP_DYN_PWR, WM8904_CP_DYN_PWR); 2259725e7a7bSMark Brown 2260725e7a7bSMark Brown /* Use normal bias source */ 2261725e7a7bSMark Brown regmap_update_bits(wm8904->regmap, WM8904_BIAS_CONTROL_0, 2262725e7a7bSMark Brown WM8904_POBCTRL, 0); 2263725e7a7bSMark Brown 226403862cf6SMark Brown /* Can leave the device powered off until we need it */ 226503862cf6SMark Brown regcache_cache_only(wm8904->regmap, true); 226603862cf6SMark Brown regulator_bulk_disable(ARRAY_SIZE(wm8904->supplies), wm8904->supplies); 226703862cf6SMark Brown 2268f0fba2adSLiam Girdwood ret = snd_soc_register_codec(&i2c->dev, 2269f0fba2adSLiam Girdwood &soc_codec_dev_wm8904, &wm8904_dai, 1); 227084d0d831SMark Brown if (ret != 0) 227103862cf6SMark Brown return ret; 227293e26d4eSMark Brown 227384d0d831SMark Brown return 0; 227484d0d831SMark Brown 227503862cf6SMark Brown err_enable: 227603862cf6SMark Brown regulator_bulk_disable(ARRAY_SIZE(wm8904->supplies), wm8904->supplies); 2277f0fba2adSLiam Girdwood return ret; 2278a91eb199SMark Brown } 2279a91eb199SMark Brown 22807a79e94eSBill Pemberton static int wm8904_i2c_remove(struct i2c_client *client) 2281a91eb199SMark Brown { 2282f0fba2adSLiam Girdwood snd_soc_unregister_codec(&client->dev); 2283a91eb199SMark Brown return 0; 2284a91eb199SMark Brown } 2285a91eb199SMark Brown 2286a91eb199SMark Brown static const struct i2c_device_id wm8904_i2c_id[] = { 22878c126474SMark Brown { "wm8904", WM8904 }, 22888c126474SMark Brown { "wm8912", WM8912 }, 2289df1553c8SMark Brown { "wm8918", WM8904 }, /* Actually a subset, updates to follow */ 2290a91eb199SMark Brown { } 2291a91eb199SMark Brown }; 2292a91eb199SMark Brown MODULE_DEVICE_TABLE(i2c, wm8904_i2c_id); 2293a91eb199SMark Brown 2294a91eb199SMark Brown static struct i2c_driver wm8904_i2c_driver = { 2295a91eb199SMark Brown .driver = { 2296091edccfSMark Brown .name = "wm8904", 2297b1a5fad5SAlexander Morozov .of_match_table = of_match_ptr(wm8904_of_match), 2298a91eb199SMark Brown }, 2299a91eb199SMark Brown .probe = wm8904_i2c_probe, 23007a79e94eSBill Pemberton .remove = wm8904_i2c_remove, 2301a91eb199SMark Brown .id_table = wm8904_i2c_id, 2302a91eb199SMark Brown }; 2303a91eb199SMark Brown 23048cb28fd6SMark Brown module_i2c_driver(wm8904_i2c_driver); 2305a91eb199SMark Brown 2306a91eb199SMark Brown MODULE_DESCRIPTION("ASoC WM8904 driver"); 2307a91eb199SMark Brown MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); 2308a91eb199SMark Brown MODULE_LICENSE("GPL"); 2309