1 /* 2 * wm8753.h -- audio driver for WM8753 3 * 4 * Copyright 2003 Wolfson Microelectronics PLC. 5 * Author: Liam Girdwood <lrg@slimlogic.co.uk> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or (at your 10 * option) any later version. 11 * 12 */ 13 14 #ifndef _WM8753_H 15 #define _WM8753_H 16 17 /* WM8753 register space */ 18 19 #define WM8753_DAC 0x01 20 #define WM8753_ADC 0x02 21 #define WM8753_PCM 0x03 22 #define WM8753_HIFI 0x04 23 #define WM8753_IOCTL 0x05 24 #define WM8753_SRATE1 0x06 25 #define WM8753_SRATE2 0x07 26 #define WM8753_LDAC 0x08 27 #define WM8753_RDAC 0x09 28 #define WM8753_BASS 0x0a 29 #define WM8753_TREBLE 0x0b 30 #define WM8753_ALC1 0x0c 31 #define WM8753_ALC2 0x0d 32 #define WM8753_ALC3 0x0e 33 #define WM8753_NGATE 0x0f 34 #define WM8753_LADC 0x10 35 #define WM8753_RADC 0x11 36 #define WM8753_ADCTL1 0x12 37 #define WM8753_3D 0x13 38 #define WM8753_PWR1 0x14 39 #define WM8753_PWR2 0x15 40 #define WM8753_PWR3 0x16 41 #define WM8753_PWR4 0x17 42 #define WM8753_ID 0x18 43 #define WM8753_INTPOL 0x19 44 #define WM8753_INTEN 0x1a 45 #define WM8753_GPIO1 0x1b 46 #define WM8753_GPIO2 0x1c 47 #define WM8753_RESET 0x1f 48 #define WM8753_RECMIX1 0x20 49 #define WM8753_RECMIX2 0x21 50 #define WM8753_LOUTM1 0x22 51 #define WM8753_LOUTM2 0x23 52 #define WM8753_ROUTM1 0x24 53 #define WM8753_ROUTM2 0x25 54 #define WM8753_MOUTM1 0x26 55 #define WM8753_MOUTM2 0x27 56 #define WM8753_LOUT1V 0x28 57 #define WM8753_ROUT1V 0x29 58 #define WM8753_LOUT2V 0x2a 59 #define WM8753_ROUT2V 0x2b 60 #define WM8753_MOUTV 0x2c 61 #define WM8753_OUTCTL 0x2d 62 #define WM8753_ADCIN 0x2e 63 #define WM8753_INCTL1 0x2f 64 #define WM8753_INCTL2 0x30 65 #define WM8753_LINVOL 0x31 66 #define WM8753_RINVOL 0x32 67 #define WM8753_MICBIAS 0x33 68 #define WM8753_CLOCK 0x34 69 #define WM8753_PLL1CTL1 0x35 70 #define WM8753_PLL1CTL2 0x36 71 #define WM8753_PLL1CTL3 0x37 72 #define WM8753_PLL1CTL4 0x38 73 #define WM8753_PLL2CTL1 0x39 74 #define WM8753_PLL2CTL2 0x3a 75 #define WM8753_PLL2CTL3 0x3b 76 #define WM8753_PLL2CTL4 0x3c 77 #define WM8753_BIASCTL 0x3d 78 #define WM8753_ADCTL2 0x3f 79 80 #define WM8753_PLL1 0 81 #define WM8753_PLL2 1 82 83 /* clock inputs */ 84 #define WM8753_MCLK 0 85 #define WM8753_PCMCLK 1 86 87 /* clock divider id's */ 88 #define WM8753_PCMDIV 0 89 #define WM8753_BCLKDIV 1 90 #define WM8753_VXCLKDIV 2 91 92 /* PCM clock dividers */ 93 #define WM8753_PCM_DIV_1 (0 << 6) 94 #define WM8753_PCM_DIV_3 (2 << 6) 95 #define WM8753_PCM_DIV_5_5 (3 << 6) 96 #define WM8753_PCM_DIV_2 (4 << 6) 97 #define WM8753_PCM_DIV_4 (5 << 6) 98 #define WM8753_PCM_DIV_6 (6 << 6) 99 #define WM8753_PCM_DIV_8 (7 << 6) 100 101 /* BCLK clock dividers */ 102 #define WM8753_BCLK_DIV_1 (0 << 3) 103 #define WM8753_BCLK_DIV_2 (1 << 3) 104 #define WM8753_BCLK_DIV_4 (2 << 3) 105 #define WM8753_BCLK_DIV_8 (3 << 3) 106 #define WM8753_BCLK_DIV_16 (4 << 3) 107 108 /* VXCLK clock dividers */ 109 #define WM8753_VXCLK_DIV_1 (0 << 6) 110 #define WM8753_VXCLK_DIV_2 (1 << 6) 111 #define WM8753_VXCLK_DIV_4 (2 << 6) 112 #define WM8753_VXCLK_DIV_8 (3 << 6) 113 #define WM8753_VXCLK_DIV_16 (4 << 6) 114 115 #define WM8753_DAI_HIFI 0 116 #define WM8753_DAI_VOICE 1 117 118 #endif 119