xref: /linux/sound/soc/codecs/wm8753.c (revision cea0f76a483d1270ac6f6513964e3e75193dda48)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * wm8753.c  --  WM8753 ALSA Soc Audio driver
4  *
5  * Copyright 2003-11 Wolfson Microelectronics PLC.
6  * Author: Liam Girdwood <lrg@slimlogic.co.uk>
7  *
8  * Notes:
9  *  The WM8753 is a low power, high quality stereo codec with integrated PCM
10  *  codec designed for portable digital telephony applications.
11  *
12  * Dual DAI:-
13  *
14  * This driver support 2 DAI PCM's. This makes the default PCM available for
15  * HiFi audio (e.g. MP3, ogg) playback/capture and the other PCM available for
16  * voice.
17  *
18  * Please note that the voice PCM can be connected directly to a Bluetooth
19  * codec or GSM modem and thus cannot be read or written to, although it is
20  * available to be configured with snd_hw_params(), etc and kcontrols in the
21  * normal alsa manner.
22  *
23  * Fast DAI switching:-
24  *
25  * The driver can now fast switch between the DAI configurations via a
26  * an alsa kcontrol. This allows the PCM to remain open.
27  */
28 
29 #include <linux/module.h>
30 #include <linux/kernel.h>
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/pm.h>
34 #include <linux/i2c.h>
35 #include <linux/of_device.h>
36 #include <linux/regmap.h>
37 #include <linux/spi/spi.h>
38 #include <linux/slab.h>
39 #include <sound/core.h>
40 #include <sound/pcm.h>
41 #include <sound/pcm_params.h>
42 #include <sound/soc.h>
43 #include <sound/initval.h>
44 #include <sound/tlv.h>
45 #include <asm/div64.h>
46 
47 #include "wm8753.h"
48 
49 static int caps_charge = 2000;
50 module_param(caps_charge, int, 0);
51 MODULE_PARM_DESC(caps_charge, "WM8753 cap charge time (msecs)");
52 
53 static int wm8753_hifi_write_dai_fmt(struct snd_soc_component *component,
54 		unsigned int fmt);
55 static int wm8753_voice_write_dai_fmt(struct snd_soc_component *component,
56 		unsigned int fmt);
57 
58 /*
59  * wm8753 register cache
60  * We can't read the WM8753 register space when we
61  * are using 2 wire for device control, so we cache them instead.
62  */
63 static const struct reg_default wm8753_reg_defaults[] = {
64 	{ 0x00, 0x0000 },
65 	{ 0x01, 0x0008 },
66 	{ 0x02, 0x0000 },
67 	{ 0x03, 0x000a },
68 	{ 0x04, 0x000a },
69 	{ 0x05, 0x0033 },
70 	{ 0x06, 0x0000 },
71 	{ 0x07, 0x0007 },
72 	{ 0x08, 0x00ff },
73 	{ 0x09, 0x00ff },
74 	{ 0x0a, 0x000f },
75 	{ 0x0b, 0x000f },
76 	{ 0x0c, 0x007b },
77 	{ 0x0d, 0x0000 },
78 	{ 0x0e, 0x0032 },
79 	{ 0x0f, 0x0000 },
80 	{ 0x10, 0x00c3 },
81 	{ 0x11, 0x00c3 },
82 	{ 0x12, 0x00c0 },
83 	{ 0x13, 0x0000 },
84 	{ 0x14, 0x0000 },
85 	{ 0x15, 0x0000 },
86 	{ 0x16, 0x0000 },
87 	{ 0x17, 0x0000 },
88 	{ 0x18, 0x0000 },
89 	{ 0x19, 0x0000 },
90 	{ 0x1a, 0x0000 },
91 	{ 0x1b, 0x0000 },
92 	{ 0x1c, 0x0000 },
93 	{ 0x1d, 0x0000 },
94 	{ 0x1e, 0x0000 },
95 	{ 0x1f, 0x0000 },
96 	{ 0x20, 0x0055 },
97 	{ 0x21, 0x0005 },
98 	{ 0x22, 0x0050 },
99 	{ 0x23, 0x0055 },
100 	{ 0x24, 0x0050 },
101 	{ 0x25, 0x0055 },
102 	{ 0x26, 0x0050 },
103 	{ 0x27, 0x0055 },
104 	{ 0x28, 0x0079 },
105 	{ 0x29, 0x0079 },
106 	{ 0x2a, 0x0079 },
107 	{ 0x2b, 0x0079 },
108 	{ 0x2c, 0x0079 },
109 	{ 0x2d, 0x0000 },
110 	{ 0x2e, 0x0000 },
111 	{ 0x2f, 0x0000 },
112 	{ 0x30, 0x0000 },
113 	{ 0x31, 0x0097 },
114 	{ 0x32, 0x0097 },
115 	{ 0x33, 0x0000 },
116 	{ 0x34, 0x0004 },
117 	{ 0x35, 0x0000 },
118 	{ 0x36, 0x0083 },
119 	{ 0x37, 0x0024 },
120 	{ 0x38, 0x01ba },
121 	{ 0x39, 0x0000 },
122 	{ 0x3a, 0x0083 },
123 	{ 0x3b, 0x0024 },
124 	{ 0x3c, 0x01ba },
125 	{ 0x3d, 0x0000 },
126 	{ 0x3e, 0x0000 },
127 	{ 0x3f, 0x0000 },
128 };
129 
130 static bool wm8753_volatile(struct device *dev, unsigned int reg)
131 {
132 	return reg == WM8753_RESET;
133 }
134 
135 /* codec private data */
136 struct wm8753_priv {
137 	struct regmap *regmap;
138 	unsigned int sysclk;
139 	unsigned int pcmclk;
140 
141 	unsigned int voice_fmt;
142 	unsigned int hifi_fmt;
143 
144 	int dai_func;
145 	struct delayed_work charge_work;
146 };
147 
148 #define wm8753_reset(c) snd_soc_component_write(c, WM8753_RESET, 0)
149 
150 /*
151  * WM8753 Controls
152  */
153 static const char *wm8753_base[] = {"Linear Control", "Adaptive Boost"};
154 static const char *wm8753_base_filter[] =
155 	{"130Hz @ 48kHz", "200Hz @ 48kHz", "100Hz @ 16kHz", "400Hz @ 48kHz",
156 	"100Hz @ 8kHz", "200Hz @ 8kHz"};
157 static const char *wm8753_treble[] = {"8kHz", "4kHz"};
158 static const char *wm8753_alc_func[] = {"Off", "Right", "Left", "Stereo"};
159 static const char *wm8753_ng_type[] = {"Constant PGA Gain", "Mute ADC Output"};
160 static const char *wm8753_3d_func[] = {"Capture", "Playback"};
161 static const char *wm8753_3d_uc[] = {"2.2kHz", "1.5kHz"};
162 static const char *wm8753_3d_lc[] = {"200Hz", "500Hz"};
163 static const char *wm8753_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz"};
164 static const char *wm8753_mono_mix[] = {"Stereo", "Left", "Right", "Mono"};
165 static const char *wm8753_dac_phase[] = {"Non Inverted", "Inverted"};
166 static const char *wm8753_line_mix[] = {"Line 1 + 2", "Line 1 - 2",
167 	"Line 1", "Line 2"};
168 static const char *wm8753_mono_mux[] = {"Line Mix", "Rx Mix"};
169 static const char *wm8753_right_mux[] = {"Line 2", "Rx Mix"};
170 static const char *wm8753_left_mux[] = {"Line 1", "Rx Mix"};
171 static const char *wm8753_rxmsel[] = {"RXP - RXN", "RXP + RXN", "RXP", "RXN"};
172 static const char *wm8753_sidetone_mux[] = {"Left PGA", "Mic 1", "Mic 2",
173 	"Right PGA"};
174 static const char *wm8753_mono2_src[] = {"Inverted Mono 1", "Left", "Right",
175 	"Left + Right"};
176 static const char *wm8753_out3[] = {"VREF", "ROUT2", "Left + Right"};
177 static const char *wm8753_out4[] = {"VREF", "Capture ST", "LOUT2"};
178 static const char *wm8753_radcsel[] = {"PGA", "Line or RXP-RXN", "Sidetone"};
179 static const char *wm8753_ladcsel[] = {"PGA", "Line or RXP-RXN", "Line"};
180 static const char *wm8753_mono_adc[] = {"Stereo", "Analogue Mix Left",
181 	"Analogue Mix Right", "Digital Mono Mix"};
182 static const char *wm8753_adc_hp[] = {"3.4Hz @ 48kHz", "82Hz @ 16k",
183 	"82Hz @ 8kHz", "170Hz @ 8kHz"};
184 static const char *wm8753_adc_filter[] = {"HiFi", "Voice"};
185 static const char *wm8753_mic_sel[] = {"Mic 1", "Mic 2", "Mic 3"};
186 static const char *wm8753_dai_mode[] = {"DAI 0", "DAI 1", "DAI 2", "DAI 3"};
187 static const char *wm8753_dat_sel[] = {"Stereo", "Left ADC", "Right ADC",
188 	"Channel Swap"};
189 static const char *wm8753_rout2_phase[] = {"Non Inverted", "Inverted"};
190 
191 static const struct soc_enum wm8753_enum[] = {
192 SOC_ENUM_SINGLE(WM8753_BASS, 7, 2, wm8753_base),
193 SOC_ENUM_SINGLE(WM8753_BASS, 4, 6, wm8753_base_filter),
194 SOC_ENUM_SINGLE(WM8753_TREBLE, 6, 2, wm8753_treble),
195 SOC_ENUM_SINGLE(WM8753_ALC1, 7, 4, wm8753_alc_func),
196 SOC_ENUM_SINGLE(WM8753_NGATE, 1, 2, wm8753_ng_type),
197 SOC_ENUM_SINGLE(WM8753_3D, 7, 2, wm8753_3d_func),
198 SOC_ENUM_SINGLE(WM8753_3D, 6, 2, wm8753_3d_uc),
199 SOC_ENUM_SINGLE(WM8753_3D, 5, 2, wm8753_3d_lc),
200 SOC_ENUM_SINGLE(WM8753_DAC, 1, 4, wm8753_deemp),
201 SOC_ENUM_SINGLE(WM8753_DAC, 4, 4, wm8753_mono_mix),
202 SOC_ENUM_SINGLE(WM8753_DAC, 6, 2, wm8753_dac_phase),
203 SOC_ENUM_SINGLE(WM8753_INCTL1, 3, 4, wm8753_line_mix),
204 SOC_ENUM_SINGLE(WM8753_INCTL1, 2, 2, wm8753_mono_mux),
205 SOC_ENUM_SINGLE(WM8753_INCTL1, 1, 2, wm8753_right_mux),
206 SOC_ENUM_SINGLE(WM8753_INCTL1, 0, 2, wm8753_left_mux),
207 SOC_ENUM_SINGLE(WM8753_INCTL2, 6, 4, wm8753_rxmsel),
208 SOC_ENUM_SINGLE(WM8753_INCTL2, 4, 4, wm8753_sidetone_mux),
209 SOC_ENUM_SINGLE(WM8753_OUTCTL, 7, 4, wm8753_mono2_src),
210 SOC_ENUM_SINGLE(WM8753_OUTCTL, 0, 3, wm8753_out3),
211 SOC_ENUM_SINGLE(WM8753_ADCTL2, 7, 3, wm8753_out4),
212 SOC_ENUM_SINGLE(WM8753_ADCIN, 2, 3, wm8753_radcsel),
213 SOC_ENUM_SINGLE(WM8753_ADCIN, 0, 3, wm8753_ladcsel),
214 SOC_ENUM_SINGLE(WM8753_ADCIN, 4, 4, wm8753_mono_adc),
215 SOC_ENUM_SINGLE(WM8753_ADC, 2, 4, wm8753_adc_hp),
216 SOC_ENUM_SINGLE(WM8753_ADC, 4, 2, wm8753_adc_filter),
217 SOC_ENUM_SINGLE(WM8753_MICBIAS, 6, 3, wm8753_mic_sel),
218 SOC_ENUM_SINGLE(WM8753_IOCTL, 2, 4, wm8753_dai_mode),
219 SOC_ENUM_SINGLE(WM8753_ADC, 7, 4, wm8753_dat_sel),
220 SOC_ENUM_SINGLE(WM8753_OUTCTL, 2, 2, wm8753_rout2_phase),
221 };
222 
223 
224 static int wm8753_get_dai(struct snd_kcontrol *kcontrol,
225 	struct snd_ctl_elem_value *ucontrol)
226 {
227 	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
228 	struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
229 
230 	ucontrol->value.enumerated.item[0] = wm8753->dai_func;
231 	return 0;
232 }
233 
234 static int wm8753_set_dai(struct snd_kcontrol *kcontrol,
235 	struct snd_ctl_elem_value *ucontrol)
236 {
237 	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
238 	struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
239 	u16 ioctl;
240 
241 	if (wm8753->dai_func == ucontrol->value.enumerated.item[0])
242 		return 0;
243 
244 	if (snd_soc_component_active(component))
245 		return -EBUSY;
246 
247 	ioctl = snd_soc_component_read32(component, WM8753_IOCTL);
248 
249 	wm8753->dai_func = ucontrol->value.enumerated.item[0];
250 
251 	if (((ioctl >> 2) & 0x3) == wm8753->dai_func)
252 		return 1;
253 
254 	ioctl = (ioctl & 0x1f3) | (wm8753->dai_func << 2);
255 	snd_soc_component_write(component, WM8753_IOCTL, ioctl);
256 
257 
258 	wm8753_hifi_write_dai_fmt(component, wm8753->hifi_fmt);
259 	wm8753_voice_write_dai_fmt(component, wm8753->voice_fmt);
260 
261 	return 1;
262 }
263 
264 static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 300, 0);
265 static const DECLARE_TLV_DB_SCALE(mic_preamp_tlv, 1200, 600, 0);
266 static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
267 static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
268 static const DECLARE_TLV_DB_RANGE(out_tlv,
269 	/* 0000000 - 0101111 = "Analogue mute" */
270 	0, 48, TLV_DB_SCALE_ITEM(-25500, 0, 0),
271 	48, 127, TLV_DB_SCALE_ITEM(-7300, 100, 0)
272 );
273 static const DECLARE_TLV_DB_SCALE(mix_tlv, -1500, 300, 0);
274 static const DECLARE_TLV_DB_SCALE(voice_mix_tlv, -1200, 300, 0);
275 static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0);
276 
277 static const struct snd_kcontrol_new wm8753_snd_controls[] = {
278 SOC_SINGLE("Hi-Fi DAC Left/Right channel Swap", WM8753_HIFI, 5, 1, 0),
279 SOC_DOUBLE_R_TLV("PCM Volume", WM8753_LDAC, WM8753_RDAC, 0, 255, 0, dac_tlv),
280 
281 SOC_DOUBLE_R_TLV("ADC Capture Volume", WM8753_LADC, WM8753_RADC, 0, 255, 0,
282 		 adc_tlv),
283 
284 SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8753_LOUT1V, WM8753_ROUT1V,
285 		 0, 127, 0, out_tlv),
286 SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8753_LOUT2V, WM8753_ROUT2V, 0,
287 		 127, 0, out_tlv),
288 
289 SOC_SINGLE_TLV("Mono Playback Volume", WM8753_MOUTV, 0, 127, 0, out_tlv),
290 
291 SOC_DOUBLE_R_TLV("Bypass Playback Volume", WM8753_LOUTM1, WM8753_ROUTM1, 4, 7,
292 		 1, mix_tlv),
293 SOC_DOUBLE_R_TLV("Sidetone Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 4,
294 		 7, 1, mix_tlv),
295 SOC_DOUBLE_R_TLV("Voice Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 0, 7,
296 		 1, voice_mix_tlv),
297 
298 SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8753_LOUT1V, WM8753_ROUT1V, 7,
299 	     1, 0),
300 SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8753_LOUT2V, WM8753_ROUT2V, 7,
301 	     1, 0),
302 
303 SOC_SINGLE_TLV("Mono Bypass Playback Volume", WM8753_MOUTM1, 4, 7, 1, mix_tlv),
304 SOC_SINGLE_TLV("Mono Sidetone Playback Volume", WM8753_MOUTM2, 4, 7, 1,
305 	       mix_tlv),
306 SOC_SINGLE_TLV("Mono Voice Playback Volume", WM8753_MOUTM2, 0, 7, 1,
307 	       voice_mix_tlv),
308 SOC_SINGLE("Mono Playback ZC Switch", WM8753_MOUTV, 7, 1, 0),
309 
310 SOC_ENUM("Bass Boost", wm8753_enum[0]),
311 SOC_ENUM("Bass Filter", wm8753_enum[1]),
312 SOC_SINGLE("Bass Volume", WM8753_BASS, 0, 15, 1),
313 
314 SOC_SINGLE("Treble Volume", WM8753_TREBLE, 0, 15, 1),
315 SOC_ENUM("Treble Cut-off", wm8753_enum[2]),
316 
317 SOC_DOUBLE_TLV("Sidetone Capture Volume", WM8753_RECMIX1, 0, 4, 7, 1,
318 	       rec_mix_tlv),
319 SOC_SINGLE_TLV("Voice Sidetone Capture Volume", WM8753_RECMIX2, 0, 7, 1,
320 	       rec_mix_tlv),
321 
322 SOC_DOUBLE_R_TLV("Capture Volume", WM8753_LINVOL, WM8753_RINVOL, 0, 63, 0,
323 		 pga_tlv),
324 SOC_DOUBLE_R("Capture ZC Switch", WM8753_LINVOL, WM8753_RINVOL, 6, 1, 0),
325 SOC_DOUBLE_R("Capture Switch", WM8753_LINVOL, WM8753_RINVOL, 7, 1, 1),
326 
327 SOC_ENUM("Capture Filter Select", wm8753_enum[23]),
328 SOC_ENUM("Capture Filter Cut-off", wm8753_enum[24]),
329 SOC_SINGLE("Capture Filter Switch", WM8753_ADC, 0, 1, 1),
330 
331 SOC_SINGLE("ALC Capture Target Volume", WM8753_ALC1, 0, 7, 0),
332 SOC_SINGLE("ALC Capture Max Volume", WM8753_ALC1, 4, 7, 0),
333 SOC_ENUM("ALC Capture Function", wm8753_enum[3]),
334 SOC_SINGLE("ALC Capture ZC Switch", WM8753_ALC2, 8, 1, 0),
335 SOC_SINGLE("ALC Capture Hold Time", WM8753_ALC2, 0, 15, 1),
336 SOC_SINGLE("ALC Capture Decay Time", WM8753_ALC3, 4, 15, 1),
337 SOC_SINGLE("ALC Capture Attack Time", WM8753_ALC3, 0, 15, 0),
338 SOC_SINGLE("ALC Capture NG Threshold", WM8753_NGATE, 3, 31, 0),
339 SOC_ENUM("ALC Capture NG Type", wm8753_enum[4]),
340 SOC_SINGLE("ALC Capture NG Switch", WM8753_NGATE, 0, 1, 0),
341 
342 SOC_ENUM("3D Function", wm8753_enum[5]),
343 SOC_ENUM("3D Upper Cut-off", wm8753_enum[6]),
344 SOC_ENUM("3D Lower Cut-off", wm8753_enum[7]),
345 SOC_SINGLE("3D Volume", WM8753_3D, 1, 15, 0),
346 SOC_SINGLE("3D Switch", WM8753_3D, 0, 1, 0),
347 
348 SOC_SINGLE("Capture 6dB Attenuate", WM8753_ADCTL1, 2, 1, 0),
349 SOC_SINGLE("Playback 6dB Attenuate", WM8753_ADCTL1, 1, 1, 0),
350 
351 SOC_ENUM("De-emphasis", wm8753_enum[8]),
352 SOC_ENUM("Playback Mono Mix", wm8753_enum[9]),
353 SOC_ENUM("Playback Phase", wm8753_enum[10]),
354 
355 SOC_SINGLE_TLV("Mic2 Capture Volume", WM8753_INCTL1, 7, 3, 0, mic_preamp_tlv),
356 SOC_SINGLE_TLV("Mic1 Capture Volume", WM8753_INCTL1, 5, 3, 0, mic_preamp_tlv),
357 
358 SOC_ENUM_EXT("DAI Mode", wm8753_enum[26], wm8753_get_dai, wm8753_set_dai),
359 
360 SOC_ENUM("ADC Data Select", wm8753_enum[27]),
361 SOC_ENUM("ROUT2 Phase", wm8753_enum[28]),
362 };
363 
364 /*
365  * _DAPM_ Controls
366  */
367 
368 /* Left Mixer */
369 static const struct snd_kcontrol_new wm8753_left_mixer_controls[] = {
370 SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_LOUTM2, 8, 1, 0),
371 SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_LOUTM2, 7, 1, 0),
372 SOC_DAPM_SINGLE("Left Playback Switch", WM8753_LOUTM1, 8, 1, 0),
373 SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_LOUTM1, 7, 1, 0),
374 };
375 
376 /* Right mixer */
377 static const struct snd_kcontrol_new wm8753_right_mixer_controls[] = {
378 SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_ROUTM2, 8, 1, 0),
379 SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_ROUTM2, 7, 1, 0),
380 SOC_DAPM_SINGLE("Right Playback Switch", WM8753_ROUTM1, 8, 1, 0),
381 SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_ROUTM1, 7, 1, 0),
382 };
383 
384 /* Mono mixer */
385 static const struct snd_kcontrol_new wm8753_mono_mixer_controls[] = {
386 SOC_DAPM_SINGLE("Left Playback Switch", WM8753_MOUTM1, 8, 1, 0),
387 SOC_DAPM_SINGLE("Right Playback Switch", WM8753_MOUTM2, 8, 1, 0),
388 SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_MOUTM2, 3, 1, 0),
389 SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_MOUTM2, 7, 1, 0),
390 SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_MOUTM1, 7, 1, 0),
391 };
392 
393 /* Mono 2 Mux */
394 static const struct snd_kcontrol_new wm8753_mono2_controls =
395 SOC_DAPM_ENUM("Route", wm8753_enum[17]);
396 
397 /* Out 3 Mux */
398 static const struct snd_kcontrol_new wm8753_out3_controls =
399 SOC_DAPM_ENUM("Route", wm8753_enum[18]);
400 
401 /* Out 4 Mux */
402 static const struct snd_kcontrol_new wm8753_out4_controls =
403 SOC_DAPM_ENUM("Route", wm8753_enum[19]);
404 
405 /* ADC Mono Mix */
406 static const struct snd_kcontrol_new wm8753_adc_mono_controls =
407 SOC_DAPM_ENUM("Route", wm8753_enum[22]);
408 
409 /* Record mixer */
410 static const struct snd_kcontrol_new wm8753_record_mixer_controls[] = {
411 SOC_DAPM_SINGLE("Voice Capture Switch", WM8753_RECMIX2, 3, 1, 0),
412 SOC_DAPM_SINGLE("Left Capture Switch", WM8753_RECMIX1, 3, 1, 0),
413 SOC_DAPM_SINGLE("Right Capture Switch", WM8753_RECMIX1, 7, 1, 0),
414 };
415 
416 /* Left ADC mux */
417 static const struct snd_kcontrol_new wm8753_adc_left_controls =
418 SOC_DAPM_ENUM("Route", wm8753_enum[21]);
419 
420 /* Right ADC mux */
421 static const struct snd_kcontrol_new wm8753_adc_right_controls =
422 SOC_DAPM_ENUM("Route", wm8753_enum[20]);
423 
424 /* MIC mux */
425 static const struct snd_kcontrol_new wm8753_mic_mux_controls =
426 SOC_DAPM_ENUM("Route", wm8753_enum[16]);
427 
428 /* ALC mixer */
429 static const struct snd_kcontrol_new wm8753_alc_mixer_controls[] = {
430 SOC_DAPM_SINGLE("Line Capture Switch", WM8753_INCTL2, 3, 1, 0),
431 SOC_DAPM_SINGLE("Mic2 Capture Switch", WM8753_INCTL2, 2, 1, 0),
432 SOC_DAPM_SINGLE("Mic1 Capture Switch", WM8753_INCTL2, 1, 1, 0),
433 SOC_DAPM_SINGLE("Rx Capture Switch", WM8753_INCTL2, 0, 1, 0),
434 };
435 
436 /* Left Line mux */
437 static const struct snd_kcontrol_new wm8753_line_left_controls =
438 SOC_DAPM_ENUM("Route", wm8753_enum[14]);
439 
440 /* Right Line mux */
441 static const struct snd_kcontrol_new wm8753_line_right_controls =
442 SOC_DAPM_ENUM("Route", wm8753_enum[13]);
443 
444 /* Mono Line mux */
445 static const struct snd_kcontrol_new wm8753_line_mono_controls =
446 SOC_DAPM_ENUM("Route", wm8753_enum[12]);
447 
448 /* Line mux and mixer */
449 static const struct snd_kcontrol_new wm8753_line_mux_mix_controls =
450 SOC_DAPM_ENUM("Route", wm8753_enum[11]);
451 
452 /* Rx mux and mixer */
453 static const struct snd_kcontrol_new wm8753_rx_mux_mix_controls =
454 SOC_DAPM_ENUM("Route", wm8753_enum[15]);
455 
456 /* Mic Selector Mux */
457 static const struct snd_kcontrol_new wm8753_mic_sel_mux_controls =
458 SOC_DAPM_ENUM("Route", wm8753_enum[25]);
459 
460 static const struct snd_soc_dapm_widget wm8753_dapm_widgets[] = {
461 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8753_PWR1, 5, 0),
462 SND_SOC_DAPM_MIXER("Left Mixer", WM8753_PWR4, 0, 0,
463 	&wm8753_left_mixer_controls[0], ARRAY_SIZE(wm8753_left_mixer_controls)),
464 SND_SOC_DAPM_PGA("Left Out 1", WM8753_PWR3, 8, 0, NULL, 0),
465 SND_SOC_DAPM_PGA("Left Out 2", WM8753_PWR3, 6, 0, NULL, 0),
466 SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", WM8753_PWR1, 3, 0),
467 SND_SOC_DAPM_OUTPUT("LOUT1"),
468 SND_SOC_DAPM_OUTPUT("LOUT2"),
469 SND_SOC_DAPM_MIXER("Right Mixer", WM8753_PWR4, 1, 0,
470 	&wm8753_right_mixer_controls[0], ARRAY_SIZE(wm8753_right_mixer_controls)),
471 SND_SOC_DAPM_PGA("Right Out 1", WM8753_PWR3, 7, 0, NULL, 0),
472 SND_SOC_DAPM_PGA("Right Out 2", WM8753_PWR3, 5, 0, NULL, 0),
473 SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", WM8753_PWR1, 2, 0),
474 SND_SOC_DAPM_OUTPUT("ROUT1"),
475 SND_SOC_DAPM_OUTPUT("ROUT2"),
476 SND_SOC_DAPM_MIXER("Mono Mixer", WM8753_PWR4, 2, 0,
477 	&wm8753_mono_mixer_controls[0], ARRAY_SIZE(wm8753_mono_mixer_controls)),
478 SND_SOC_DAPM_PGA("Mono Out 1", WM8753_PWR3, 2, 0, NULL, 0),
479 SND_SOC_DAPM_PGA("Mono Out 2", WM8753_PWR3, 1, 0, NULL, 0),
480 SND_SOC_DAPM_DAC("Voice DAC", "Voice Playback", WM8753_PWR1, 4, 0),
481 SND_SOC_DAPM_OUTPUT("MONO1"),
482 SND_SOC_DAPM_MUX("Mono 2 Mux", SND_SOC_NOPM, 0, 0, &wm8753_mono2_controls),
483 SND_SOC_DAPM_OUTPUT("MONO2"),
484 SND_SOC_DAPM_MIXER("Out3 Left + Right", SND_SOC_NOPM, 0, 0, NULL, 0),
485 SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out3_controls),
486 SND_SOC_DAPM_PGA("Out 3", WM8753_PWR3, 4, 0, NULL, 0),
487 SND_SOC_DAPM_OUTPUT("OUT3"),
488 SND_SOC_DAPM_MUX("Out4 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out4_controls),
489 SND_SOC_DAPM_PGA("Out 4", WM8753_PWR3, 3, 0, NULL, 0),
490 SND_SOC_DAPM_OUTPUT("OUT4"),
491 SND_SOC_DAPM_MIXER("Playback Mixer", WM8753_PWR4, 3, 0,
492 	&wm8753_record_mixer_controls[0],
493 	ARRAY_SIZE(wm8753_record_mixer_controls)),
494 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8753_PWR2, 3, 0),
495 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8753_PWR2, 2, 0),
496 SND_SOC_DAPM_MUX("Capture Left Mixer", SND_SOC_NOPM, 0, 0,
497 	&wm8753_adc_mono_controls),
498 SND_SOC_DAPM_MUX("Capture Right Mixer", SND_SOC_NOPM, 0, 0,
499 	&wm8753_adc_mono_controls),
500 SND_SOC_DAPM_MUX("Capture Left Mux", SND_SOC_NOPM, 0, 0,
501 	&wm8753_adc_left_controls),
502 SND_SOC_DAPM_MUX("Capture Right Mux", SND_SOC_NOPM, 0, 0,
503 	&wm8753_adc_right_controls),
504 SND_SOC_DAPM_MUX("Mic Sidetone Mux", SND_SOC_NOPM, 0, 0,
505 	&wm8753_mic_mux_controls),
506 SND_SOC_DAPM_PGA("Left Capture Volume", WM8753_PWR2, 5, 0, NULL, 0),
507 SND_SOC_DAPM_PGA("Right Capture Volume", WM8753_PWR2, 4, 0, NULL, 0),
508 SND_SOC_DAPM_MIXER("ALC Mixer", WM8753_PWR2, 6, 0,
509 	&wm8753_alc_mixer_controls[0], ARRAY_SIZE(wm8753_alc_mixer_controls)),
510 SND_SOC_DAPM_MUX("Line Left Mux", SND_SOC_NOPM, 0, 0,
511 	&wm8753_line_left_controls),
512 SND_SOC_DAPM_MUX("Line Right Mux", SND_SOC_NOPM, 0, 0,
513 	&wm8753_line_right_controls),
514 SND_SOC_DAPM_MUX("Line Mono Mux", SND_SOC_NOPM, 0, 0,
515 	&wm8753_line_mono_controls),
516 SND_SOC_DAPM_MUX("Line Mixer", WM8753_PWR2, 0, 0,
517 	&wm8753_line_mux_mix_controls),
518 SND_SOC_DAPM_MUX("Rx Mixer", WM8753_PWR2, 1, 0,
519 	&wm8753_rx_mux_mix_controls),
520 SND_SOC_DAPM_PGA("Mic 1 Volume", WM8753_PWR2, 8, 0, NULL, 0),
521 SND_SOC_DAPM_PGA("Mic 2 Volume", WM8753_PWR2, 7, 0, NULL, 0),
522 SND_SOC_DAPM_MUX("Mic Selection Mux", SND_SOC_NOPM, 0, 0,
523 	&wm8753_mic_sel_mux_controls),
524 SND_SOC_DAPM_INPUT("LINE1"),
525 SND_SOC_DAPM_INPUT("LINE2"),
526 SND_SOC_DAPM_INPUT("RXP"),
527 SND_SOC_DAPM_INPUT("RXN"),
528 SND_SOC_DAPM_INPUT("ACIN"),
529 SND_SOC_DAPM_OUTPUT("ACOP"),
530 SND_SOC_DAPM_INPUT("MIC1N"),
531 SND_SOC_DAPM_INPUT("MIC1"),
532 SND_SOC_DAPM_INPUT("MIC2N"),
533 SND_SOC_DAPM_INPUT("MIC2"),
534 SND_SOC_DAPM_VMID("VREF"),
535 };
536 
537 static const struct snd_soc_dapm_route wm8753_dapm_routes[] = {
538 	/* left mixer */
539 	{"Left Mixer", "Left Playback Switch", "Left DAC"},
540 	{"Left Mixer", "Voice Playback Switch", "Voice DAC"},
541 	{"Left Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
542 	{"Left Mixer", "Bypass Playback Switch", "Line Left Mux"},
543 
544 	/* right mixer */
545 	{"Right Mixer", "Right Playback Switch", "Right DAC"},
546 	{"Right Mixer", "Voice Playback Switch", "Voice DAC"},
547 	{"Right Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
548 	{"Right Mixer", "Bypass Playback Switch", "Line Right Mux"},
549 
550 	/* mono mixer */
551 	{"Mono Mixer", "Voice Playback Switch", "Voice DAC"},
552 	{"Mono Mixer", "Left Playback Switch", "Left DAC"},
553 	{"Mono Mixer", "Right Playback Switch", "Right DAC"},
554 	{"Mono Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
555 	{"Mono Mixer", "Bypass Playback Switch", "Line Mono Mux"},
556 
557 	/* left out */
558 	{"Left Out 1", NULL, "Left Mixer"},
559 	{"Left Out 2", NULL, "Left Mixer"},
560 	{"LOUT1", NULL, "Left Out 1"},
561 	{"LOUT2", NULL, "Left Out 2"},
562 
563 	/* right out */
564 	{"Right Out 1", NULL, "Right Mixer"},
565 	{"Right Out 2", NULL, "Right Mixer"},
566 	{"ROUT1", NULL, "Right Out 1"},
567 	{"ROUT2", NULL, "Right Out 2"},
568 
569 	/* mono 1 out */
570 	{"Mono Out 1", NULL, "Mono Mixer"},
571 	{"MONO1", NULL, "Mono Out 1"},
572 
573 	/* mono 2 out */
574 	{"Mono 2 Mux", "Left + Right", "Out3 Left + Right"},
575 	{"Mono 2 Mux", "Inverted Mono 1", "MONO1"},
576 	{"Mono 2 Mux", "Left", "Left Mixer"},
577 	{"Mono 2 Mux", "Right", "Right Mixer"},
578 	{"Mono Out 2", NULL, "Mono 2 Mux"},
579 	{"MONO2", NULL, "Mono Out 2"},
580 
581 	/* out 3 */
582 	{"Out3 Left + Right", NULL, "Left Mixer"},
583 	{"Out3 Left + Right", NULL, "Right Mixer"},
584 	{"Out3 Mux", "VREF", "VREF"},
585 	{"Out3 Mux", "Left + Right", "Out3 Left + Right"},
586 	{"Out3 Mux", "ROUT2", "ROUT2"},
587 	{"Out 3", NULL, "Out3 Mux"},
588 	{"OUT3", NULL, "Out 3"},
589 
590 	/* out 4 */
591 	{"Out4 Mux", "VREF", "VREF"},
592 	{"Out4 Mux", "Capture ST", "Playback Mixer"},
593 	{"Out4 Mux", "LOUT2", "LOUT2"},
594 	{"Out 4", NULL, "Out4 Mux"},
595 	{"OUT4", NULL, "Out 4"},
596 
597 	/* record mixer  */
598 	{"Playback Mixer", "Left Capture Switch", "Left Mixer"},
599 	{"Playback Mixer", "Voice Capture Switch", "Mono Mixer"},
600 	{"Playback Mixer", "Right Capture Switch", "Right Mixer"},
601 
602 	/* Mic/SideTone Mux */
603 	{"Mic Sidetone Mux", "Left PGA", "Left Capture Volume"},
604 	{"Mic Sidetone Mux", "Right PGA", "Right Capture Volume"},
605 	{"Mic Sidetone Mux", "Mic 1", "Mic 1 Volume"},
606 	{"Mic Sidetone Mux", "Mic 2", "Mic 2 Volume"},
607 
608 	/* Capture Left Mux */
609 	{"Capture Left Mux", "PGA", "Left Capture Volume"},
610 	{"Capture Left Mux", "Line or RXP-RXN", "Line Left Mux"},
611 	{"Capture Left Mux", "Line", "LINE1"},
612 
613 	/* Capture Right Mux */
614 	{"Capture Right Mux", "PGA", "Right Capture Volume"},
615 	{"Capture Right Mux", "Line or RXP-RXN", "Line Right Mux"},
616 	{"Capture Right Mux", "Sidetone", "Playback Mixer"},
617 
618 	/* Mono Capture mixer-mux */
619 	{"Capture Right Mixer", "Stereo", "Capture Right Mux"},
620 	{"Capture Left Mixer", "Stereo", "Capture Left Mux"},
621 	{"Capture Left Mixer", "Analogue Mix Left", "Capture Left Mux"},
622 	{"Capture Left Mixer", "Analogue Mix Left", "Capture Right Mux"},
623 	{"Capture Right Mixer", "Analogue Mix Right", "Capture Left Mux"},
624 	{"Capture Right Mixer", "Analogue Mix Right", "Capture Right Mux"},
625 	{"Capture Left Mixer", "Digital Mono Mix", "Capture Left Mux"},
626 	{"Capture Left Mixer", "Digital Mono Mix", "Capture Right Mux"},
627 	{"Capture Right Mixer", "Digital Mono Mix", "Capture Left Mux"},
628 	{"Capture Right Mixer", "Digital Mono Mix", "Capture Right Mux"},
629 
630 	/* ADC */
631 	{"Left ADC", NULL, "Capture Left Mixer"},
632 	{"Right ADC", NULL, "Capture Right Mixer"},
633 
634 	/* Left Capture Volume */
635 	{"Left Capture Volume", NULL, "ACIN"},
636 
637 	/* Right Capture Volume */
638 	{"Right Capture Volume", NULL, "Mic 2 Volume"},
639 
640 	/* ALC Mixer */
641 	{"ALC Mixer", "Line Capture Switch", "Line Mixer"},
642 	{"ALC Mixer", "Mic2 Capture Switch", "Mic 2 Volume"},
643 	{"ALC Mixer", "Mic1 Capture Switch", "Mic 1 Volume"},
644 	{"ALC Mixer", "Rx Capture Switch", "Rx Mixer"},
645 
646 	/* Line Left Mux */
647 	{"Line Left Mux", "Line 1", "LINE1"},
648 	{"Line Left Mux", "Rx Mix", "Rx Mixer"},
649 
650 	/* Line Right Mux */
651 	{"Line Right Mux", "Line 2", "LINE2"},
652 	{"Line Right Mux", "Rx Mix", "Rx Mixer"},
653 
654 	/* Line Mono Mux */
655 	{"Line Mono Mux", "Line Mix", "Line Mixer"},
656 	{"Line Mono Mux", "Rx Mix", "Rx Mixer"},
657 
658 	/* Line Mixer/Mux */
659 	{"Line Mixer", "Line 1 + 2", "LINE1"},
660 	{"Line Mixer", "Line 1 - 2", "LINE1"},
661 	{"Line Mixer", "Line 1 + 2", "LINE2"},
662 	{"Line Mixer", "Line 1 - 2", "LINE2"},
663 	{"Line Mixer", "Line 1", "LINE1"},
664 	{"Line Mixer", "Line 2", "LINE2"},
665 
666 	/* Rx Mixer/Mux */
667 	{"Rx Mixer", "RXP - RXN", "RXP"},
668 	{"Rx Mixer", "RXP + RXN", "RXP"},
669 	{"Rx Mixer", "RXP - RXN", "RXN"},
670 	{"Rx Mixer", "RXP + RXN", "RXN"},
671 	{"Rx Mixer", "RXP", "RXP"},
672 	{"Rx Mixer", "RXN", "RXN"},
673 
674 	/* Mic 1 Volume */
675 	{"Mic 1 Volume", NULL, "MIC1N"},
676 	{"Mic 1 Volume", NULL, "Mic Selection Mux"},
677 
678 	/* Mic 2 Volume */
679 	{"Mic 2 Volume", NULL, "MIC2N"},
680 	{"Mic 2 Volume", NULL, "MIC2"},
681 
682 	/* Mic Selector Mux */
683 	{"Mic Selection Mux", "Mic 1", "MIC1"},
684 	{"Mic Selection Mux", "Mic 2", "MIC2N"},
685 	{"Mic Selection Mux", "Mic 3", "MIC2"},
686 
687 	/* ACOP */
688 	{"ACOP", NULL, "ALC Mixer"},
689 };
690 
691 /* PLL divisors */
692 struct _pll_div {
693 	u32 div2:1;
694 	u32 n:4;
695 	u32 k:24;
696 };
697 
698 /* The size in bits of the pll divide multiplied by 10
699  * to allow rounding later */
700 #define FIXED_PLL_SIZE ((1 << 22) * 10)
701 
702 static void pll_factors(struct _pll_div *pll_div, unsigned int target,
703 	unsigned int source)
704 {
705 	u64 Kpart;
706 	unsigned int K, Ndiv, Nmod;
707 
708 	Ndiv = target / source;
709 	if (Ndiv < 6) {
710 		source >>= 1;
711 		pll_div->div2 = 1;
712 		Ndiv = target / source;
713 	} else
714 		pll_div->div2 = 0;
715 
716 	if ((Ndiv < 6) || (Ndiv > 12))
717 		printk(KERN_WARNING
718 			"wm8753: unsupported N = %u\n", Ndiv);
719 
720 	pll_div->n = Ndiv;
721 	Nmod = target % source;
722 	Kpart = FIXED_PLL_SIZE * (long long)Nmod;
723 
724 	do_div(Kpart, source);
725 
726 	K = Kpart & 0xFFFFFFFF;
727 
728 	/* Check if we need to round */
729 	if ((K % 10) >= 5)
730 		K += 5;
731 
732 	/* Move down to proper range now rounding is done */
733 	K /= 10;
734 
735 	pll_div->k = K;
736 }
737 
738 static int wm8753_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
739 		int source, unsigned int freq_in, unsigned int freq_out)
740 {
741 	u16 reg, enable;
742 	int offset;
743 	struct snd_soc_component *component = codec_dai->component;
744 
745 	if (pll_id < WM8753_PLL1 || pll_id > WM8753_PLL2)
746 		return -ENODEV;
747 
748 	if (pll_id == WM8753_PLL1) {
749 		offset = 0;
750 		enable = 0x10;
751 		reg = snd_soc_component_read32(component, WM8753_CLOCK) & 0xffef;
752 	} else {
753 		offset = 4;
754 		enable = 0x8;
755 		reg = snd_soc_component_read32(component, WM8753_CLOCK) & 0xfff7;
756 	}
757 
758 	if (!freq_in || !freq_out) {
759 		/* disable PLL  */
760 		snd_soc_component_write(component, WM8753_PLL1CTL1 + offset, 0x0026);
761 		snd_soc_component_write(component, WM8753_CLOCK, reg);
762 		return 0;
763 	} else {
764 		u16 value = 0;
765 		struct _pll_div pll_div;
766 
767 		pll_factors(&pll_div, freq_out * 8, freq_in);
768 
769 		/* set up N and K PLL divisor ratios */
770 		/* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */
771 		value = (pll_div.n << 5) + ((pll_div.k & 0x3c0000) >> 18);
772 		snd_soc_component_write(component, WM8753_PLL1CTL2 + offset, value);
773 
774 		/* bits 8:0 = PLL_K[17:9] */
775 		value = (pll_div.k & 0x03fe00) >> 9;
776 		snd_soc_component_write(component, WM8753_PLL1CTL3 + offset, value);
777 
778 		/* bits 8:0 = PLL_K[8:0] */
779 		value = pll_div.k & 0x0001ff;
780 		snd_soc_component_write(component, WM8753_PLL1CTL4 + offset, value);
781 
782 		/* set PLL as input and enable */
783 		snd_soc_component_write(component, WM8753_PLL1CTL1 + offset, 0x0027 |
784 			(pll_div.div2 << 3));
785 		snd_soc_component_write(component, WM8753_CLOCK, reg | enable);
786 	}
787 	return 0;
788 }
789 
790 struct _coeff_div {
791 	u32 mclk;
792 	u32 rate;
793 	u8 sr:5;
794 	u8 usb:1;
795 };
796 
797 /* codec hifi mclk (after PLL) clock divider coefficients */
798 static const struct _coeff_div coeff_div[] = {
799 	/* 8k */
800 	{12288000, 8000, 0x6, 0x0},
801 	{11289600, 8000, 0x16, 0x0},
802 	{18432000, 8000, 0x7, 0x0},
803 	{16934400, 8000, 0x17, 0x0},
804 	{12000000, 8000, 0x6, 0x1},
805 
806 	/* 11.025k */
807 	{11289600, 11025, 0x18, 0x0},
808 	{16934400, 11025, 0x19, 0x0},
809 	{12000000, 11025, 0x19, 0x1},
810 
811 	/* 16k */
812 	{12288000, 16000, 0xa, 0x0},
813 	{18432000, 16000, 0xb, 0x0},
814 	{12000000, 16000, 0xa, 0x1},
815 
816 	/* 22.05k */
817 	{11289600, 22050, 0x1a, 0x0},
818 	{16934400, 22050, 0x1b, 0x0},
819 	{12000000, 22050, 0x1b, 0x1},
820 
821 	/* 32k */
822 	{12288000, 32000, 0xc, 0x0},
823 	{18432000, 32000, 0xd, 0x0},
824 	{12000000, 32000, 0xa, 0x1},
825 
826 	/* 44.1k */
827 	{11289600, 44100, 0x10, 0x0},
828 	{16934400, 44100, 0x11, 0x0},
829 	{12000000, 44100, 0x11, 0x1},
830 
831 	/* 48k */
832 	{12288000, 48000, 0x0, 0x0},
833 	{18432000, 48000, 0x1, 0x0},
834 	{12000000, 48000, 0x0, 0x1},
835 
836 	/* 88.2k */
837 	{11289600, 88200, 0x1e, 0x0},
838 	{16934400, 88200, 0x1f, 0x0},
839 	{12000000, 88200, 0x1f, 0x1},
840 
841 	/* 96k */
842 	{12288000, 96000, 0xe, 0x0},
843 	{18432000, 96000, 0xf, 0x0},
844 	{12000000, 96000, 0xe, 0x1},
845 };
846 
847 static int get_coeff(int mclk, int rate)
848 {
849 	int i;
850 
851 	for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
852 		if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
853 			return i;
854 	}
855 	return -EINVAL;
856 }
857 
858 /*
859  * Clock after PLL and dividers
860  */
861 static int wm8753_set_dai_sysclk(struct snd_soc_dai *codec_dai,
862 		int clk_id, unsigned int freq, int dir)
863 {
864 	struct snd_soc_component *component = codec_dai->component;
865 	struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
866 
867 	switch (freq) {
868 	case 11289600:
869 	case 12000000:
870 	case 12288000:
871 	case 16934400:
872 	case 18432000:
873 		if (clk_id == WM8753_MCLK) {
874 			wm8753->sysclk = freq;
875 			return 0;
876 		} else if (clk_id == WM8753_PCMCLK) {
877 			wm8753->pcmclk = freq;
878 			return 0;
879 		}
880 		break;
881 	}
882 	return -EINVAL;
883 }
884 
885 /*
886  * Set's ADC and Voice DAC format.
887  */
888 static int wm8753_vdac_adc_set_dai_fmt(struct snd_soc_component *component,
889 		unsigned int fmt)
890 {
891 	u16 voice = snd_soc_component_read32(component, WM8753_PCM) & 0x01ec;
892 
893 	/* interface format */
894 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
895 	case SND_SOC_DAIFMT_I2S:
896 		voice |= 0x0002;
897 		break;
898 	case SND_SOC_DAIFMT_RIGHT_J:
899 		break;
900 	case SND_SOC_DAIFMT_LEFT_J:
901 		voice |= 0x0001;
902 		break;
903 	case SND_SOC_DAIFMT_DSP_A:
904 		voice |= 0x0003;
905 		break;
906 	case SND_SOC_DAIFMT_DSP_B:
907 		voice |= 0x0013;
908 		break;
909 	default:
910 		return -EINVAL;
911 	}
912 
913 	snd_soc_component_write(component, WM8753_PCM, voice);
914 	return 0;
915 }
916 
917 /*
918  * Set PCM DAI bit size and sample rate.
919  */
920 static int wm8753_pcm_hw_params(struct snd_pcm_substream *substream,
921 				struct snd_pcm_hw_params *params,
922 				struct snd_soc_dai *dai)
923 {
924 	struct snd_soc_component *component = dai->component;
925 	struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
926 	u16 voice = snd_soc_component_read32(component, WM8753_PCM) & 0x01f3;
927 	u16 srate = snd_soc_component_read32(component, WM8753_SRATE1) & 0x017f;
928 
929 	/* bit size */
930 	switch (params_width(params)) {
931 	case 16:
932 		break;
933 	case 20:
934 		voice |= 0x0004;
935 		break;
936 	case 24:
937 		voice |= 0x0008;
938 		break;
939 	case 32:
940 		voice |= 0x000c;
941 		break;
942 	}
943 
944 	/* sample rate */
945 	if (params_rate(params) * 384 == wm8753->pcmclk)
946 		srate |= 0x80;
947 	snd_soc_component_write(component, WM8753_SRATE1, srate);
948 
949 	snd_soc_component_write(component, WM8753_PCM, voice);
950 	return 0;
951 }
952 
953 /*
954  * Set's PCM dai fmt and BCLK.
955  */
956 static int wm8753_pcm_set_dai_fmt(struct snd_soc_component *component,
957 		unsigned int fmt)
958 {
959 	u16 voice, ioctl;
960 
961 	voice = snd_soc_component_read32(component, WM8753_PCM) & 0x011f;
962 	ioctl = snd_soc_component_read32(component, WM8753_IOCTL) & 0x015d;
963 
964 	/* set master/slave audio interface */
965 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
966 	case SND_SOC_DAIFMT_CBS_CFS:
967 		break;
968 	case SND_SOC_DAIFMT_CBM_CFM:
969 		ioctl |= 0x2; /* fall through */
970 	case SND_SOC_DAIFMT_CBM_CFS:
971 		voice |= 0x0040;
972 		break;
973 	default:
974 		return -EINVAL;
975 	}
976 
977 	/* clock inversion */
978 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
979 	case SND_SOC_DAIFMT_DSP_A:
980 	case SND_SOC_DAIFMT_DSP_B:
981 		/* frame inversion not valid for DSP modes */
982 		switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
983 		case SND_SOC_DAIFMT_NB_NF:
984 			break;
985 		case SND_SOC_DAIFMT_IB_NF:
986 			voice |= 0x0080;
987 			break;
988 		default:
989 			return -EINVAL;
990 		}
991 		break;
992 	case SND_SOC_DAIFMT_I2S:
993 	case SND_SOC_DAIFMT_RIGHT_J:
994 	case SND_SOC_DAIFMT_LEFT_J:
995 		voice &= ~0x0010;
996 		switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
997 		case SND_SOC_DAIFMT_NB_NF:
998 			break;
999 		case SND_SOC_DAIFMT_IB_IF:
1000 			voice |= 0x0090;
1001 			break;
1002 		case SND_SOC_DAIFMT_IB_NF:
1003 			voice |= 0x0080;
1004 			break;
1005 		case SND_SOC_DAIFMT_NB_IF:
1006 			voice |= 0x0010;
1007 			break;
1008 		default:
1009 			return -EINVAL;
1010 		}
1011 		break;
1012 	default:
1013 		return -EINVAL;
1014 	}
1015 
1016 	snd_soc_component_write(component, WM8753_PCM, voice);
1017 	snd_soc_component_write(component, WM8753_IOCTL, ioctl);
1018 	return 0;
1019 }
1020 
1021 static int wm8753_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1022 		int div_id, int div)
1023 {
1024 	struct snd_soc_component *component = codec_dai->component;
1025 	u16 reg;
1026 
1027 	switch (div_id) {
1028 	case WM8753_PCMDIV:
1029 		reg = snd_soc_component_read32(component, WM8753_CLOCK) & 0x003f;
1030 		snd_soc_component_write(component, WM8753_CLOCK, reg | div);
1031 		break;
1032 	case WM8753_BCLKDIV:
1033 		reg = snd_soc_component_read32(component, WM8753_SRATE2) & 0x01c7;
1034 		snd_soc_component_write(component, WM8753_SRATE2, reg | div);
1035 		break;
1036 	case WM8753_VXCLKDIV:
1037 		reg = snd_soc_component_read32(component, WM8753_SRATE2) & 0x003f;
1038 		snd_soc_component_write(component, WM8753_SRATE2, reg | div);
1039 		break;
1040 	default:
1041 		return -EINVAL;
1042 	}
1043 	return 0;
1044 }
1045 
1046 /*
1047  * Set's HiFi DAC format.
1048  */
1049 static int wm8753_hdac_set_dai_fmt(struct snd_soc_component *component,
1050 		unsigned int fmt)
1051 {
1052 	u16 hifi = snd_soc_component_read32(component, WM8753_HIFI) & 0x01e0;
1053 
1054 	/* interface format */
1055 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1056 	case SND_SOC_DAIFMT_I2S:
1057 		hifi |= 0x0002;
1058 		break;
1059 	case SND_SOC_DAIFMT_RIGHT_J:
1060 		break;
1061 	case SND_SOC_DAIFMT_LEFT_J:
1062 		hifi |= 0x0001;
1063 		break;
1064 	case SND_SOC_DAIFMT_DSP_A:
1065 		hifi |= 0x0003;
1066 		break;
1067 	case SND_SOC_DAIFMT_DSP_B:
1068 		hifi |= 0x0013;
1069 		break;
1070 	default:
1071 		return -EINVAL;
1072 	}
1073 
1074 	snd_soc_component_write(component, WM8753_HIFI, hifi);
1075 	return 0;
1076 }
1077 
1078 /*
1079  * Set's I2S DAI format.
1080  */
1081 static int wm8753_i2s_set_dai_fmt(struct snd_soc_component *component,
1082 		unsigned int fmt)
1083 {
1084 	u16 ioctl, hifi;
1085 
1086 	hifi = snd_soc_component_read32(component, WM8753_HIFI) & 0x013f;
1087 	ioctl = snd_soc_component_read32(component, WM8753_IOCTL) & 0x00ae;
1088 
1089 	/* set master/slave audio interface */
1090 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1091 	case SND_SOC_DAIFMT_CBS_CFS:
1092 		break;
1093 	case SND_SOC_DAIFMT_CBM_CFM:
1094 		ioctl |= 0x1; /* fall through */
1095 	case SND_SOC_DAIFMT_CBM_CFS:
1096 		hifi |= 0x0040;
1097 		break;
1098 	default:
1099 		return -EINVAL;
1100 	}
1101 
1102 	/* clock inversion */
1103 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1104 	case SND_SOC_DAIFMT_DSP_A:
1105 	case SND_SOC_DAIFMT_DSP_B:
1106 		/* frame inversion not valid for DSP modes */
1107 		switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1108 		case SND_SOC_DAIFMT_NB_NF:
1109 			break;
1110 		case SND_SOC_DAIFMT_IB_NF:
1111 			hifi |= 0x0080;
1112 			break;
1113 		default:
1114 			return -EINVAL;
1115 		}
1116 		break;
1117 	case SND_SOC_DAIFMT_I2S:
1118 	case SND_SOC_DAIFMT_RIGHT_J:
1119 	case SND_SOC_DAIFMT_LEFT_J:
1120 		hifi &= ~0x0010;
1121 		switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1122 		case SND_SOC_DAIFMT_NB_NF:
1123 			break;
1124 		case SND_SOC_DAIFMT_IB_IF:
1125 			hifi |= 0x0090;
1126 			break;
1127 		case SND_SOC_DAIFMT_IB_NF:
1128 			hifi |= 0x0080;
1129 			break;
1130 		case SND_SOC_DAIFMT_NB_IF:
1131 			hifi |= 0x0010;
1132 			break;
1133 		default:
1134 			return -EINVAL;
1135 		}
1136 		break;
1137 	default:
1138 		return -EINVAL;
1139 	}
1140 
1141 	snd_soc_component_write(component, WM8753_HIFI, hifi);
1142 	snd_soc_component_write(component, WM8753_IOCTL, ioctl);
1143 	return 0;
1144 }
1145 
1146 /*
1147  * Set PCM DAI bit size and sample rate.
1148  */
1149 static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream,
1150 				struct snd_pcm_hw_params *params,
1151 				struct snd_soc_dai *dai)
1152 {
1153 	struct snd_soc_component *component = dai->component;
1154 	struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
1155 	u16 srate = snd_soc_component_read32(component, WM8753_SRATE1) & 0x01c0;
1156 	u16 hifi = snd_soc_component_read32(component, WM8753_HIFI) & 0x01f3;
1157 	int coeff;
1158 
1159 	/* is digital filter coefficient valid ? */
1160 	coeff = get_coeff(wm8753->sysclk, params_rate(params));
1161 	if (coeff < 0) {
1162 		printk(KERN_ERR "wm8753 invalid MCLK or rate\n");
1163 		return coeff;
1164 	}
1165 	snd_soc_component_write(component, WM8753_SRATE1, srate | (coeff_div[coeff].sr << 1) |
1166 		coeff_div[coeff].usb);
1167 
1168 	/* bit size */
1169 	switch (params_width(params)) {
1170 	case 16:
1171 		break;
1172 	case 20:
1173 		hifi |= 0x0004;
1174 		break;
1175 	case 24:
1176 		hifi |= 0x0008;
1177 		break;
1178 	case 32:
1179 		hifi |= 0x000c;
1180 		break;
1181 	}
1182 
1183 	snd_soc_component_write(component, WM8753_HIFI, hifi);
1184 	return 0;
1185 }
1186 
1187 static int wm8753_mode1v_set_dai_fmt(struct snd_soc_component *component,
1188 		unsigned int fmt)
1189 {
1190 	u16 clock;
1191 
1192 	/* set clk source as pcmclk */
1193 	clock = snd_soc_component_read32(component, WM8753_CLOCK) & 0xfffb;
1194 	snd_soc_component_write(component, WM8753_CLOCK, clock);
1195 
1196 	return wm8753_vdac_adc_set_dai_fmt(component, fmt);
1197 }
1198 
1199 static int wm8753_mode1h_set_dai_fmt(struct snd_soc_component *component,
1200 		unsigned int fmt)
1201 {
1202 	return wm8753_hdac_set_dai_fmt(component, fmt);
1203 }
1204 
1205 static int wm8753_mode2_set_dai_fmt(struct snd_soc_component *component,
1206 		unsigned int fmt)
1207 {
1208 	u16 clock;
1209 
1210 	/* set clk source as pcmclk */
1211 	clock = snd_soc_component_read32(component, WM8753_CLOCK) & 0xfffb;
1212 	snd_soc_component_write(component, WM8753_CLOCK, clock);
1213 
1214 	return wm8753_vdac_adc_set_dai_fmt(component, fmt);
1215 }
1216 
1217 static int wm8753_mode3_4_set_dai_fmt(struct snd_soc_component *component,
1218 		unsigned int fmt)
1219 {
1220 	u16 clock;
1221 
1222 	/* set clk source as mclk */
1223 	clock = snd_soc_component_read32(component, WM8753_CLOCK) & 0xfffb;
1224 	snd_soc_component_write(component, WM8753_CLOCK, clock | 0x4);
1225 
1226 	if (wm8753_hdac_set_dai_fmt(component, fmt) < 0)
1227 		return -EINVAL;
1228 	return wm8753_vdac_adc_set_dai_fmt(component, fmt);
1229 }
1230 
1231 static int wm8753_hifi_write_dai_fmt(struct snd_soc_component *component,
1232 		unsigned int fmt)
1233 {
1234 	struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
1235 	int ret = 0;
1236 
1237 	switch (wm8753->dai_func) {
1238 	case 0:
1239 		ret = wm8753_mode1h_set_dai_fmt(component, fmt);
1240 		break;
1241 	case 1:
1242 		ret = wm8753_mode2_set_dai_fmt(component, fmt);
1243 		break;
1244 	case 2:
1245 	case 3:
1246 		ret = wm8753_mode3_4_set_dai_fmt(component, fmt);
1247 		break;
1248 	default:
1249 		 break;
1250 	}
1251 	if (ret)
1252 		return ret;
1253 
1254 	return wm8753_i2s_set_dai_fmt(component, fmt);
1255 }
1256 
1257 static int wm8753_hifi_set_dai_fmt(struct snd_soc_dai *codec_dai,
1258 		unsigned int fmt)
1259 {
1260 	struct snd_soc_component *component = codec_dai->component;
1261 	struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
1262 
1263 	wm8753->hifi_fmt = fmt;
1264 
1265 	return wm8753_hifi_write_dai_fmt(component, fmt);
1266 };
1267 
1268 static int wm8753_voice_write_dai_fmt(struct snd_soc_component *component,
1269 		unsigned int fmt)
1270 {
1271 	struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
1272 	int ret = 0;
1273 
1274 	if (wm8753->dai_func != 0)
1275 		return 0;
1276 
1277 	ret = wm8753_mode1v_set_dai_fmt(component, fmt);
1278 	if (ret)
1279 		return ret;
1280 	ret = wm8753_pcm_set_dai_fmt(component, fmt);
1281 	if (ret)
1282 		return ret;
1283 
1284 	return 0;
1285 };
1286 
1287 static int wm8753_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
1288 		unsigned int fmt)
1289 {
1290 	struct snd_soc_component *component = codec_dai->component;
1291 	struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
1292 
1293 	wm8753->voice_fmt = fmt;
1294 
1295 	return wm8753_voice_write_dai_fmt(component, fmt);
1296 };
1297 
1298 static int wm8753_mute(struct snd_soc_dai *dai, int mute)
1299 {
1300 	struct snd_soc_component *component = dai->component;
1301 	u16 mute_reg = snd_soc_component_read32(component, WM8753_DAC) & 0xfff7;
1302 	struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
1303 
1304 	/* the digital mute covers the HiFi and Voice DAC's on the WM8753.
1305 	 * make sure we check if they are not both active when we mute */
1306 	if (mute && wm8753->dai_func == 1) {
1307 		if (!snd_soc_component_active(component))
1308 			snd_soc_component_write(component, WM8753_DAC, mute_reg | 0x8);
1309 	} else {
1310 		if (mute)
1311 			snd_soc_component_write(component, WM8753_DAC, mute_reg | 0x8);
1312 		else
1313 			snd_soc_component_write(component, WM8753_DAC, mute_reg);
1314 	}
1315 
1316 	return 0;
1317 }
1318 
1319 static void wm8753_charge_work(struct work_struct *work)
1320 {
1321 	struct wm8753_priv *wm8753 =
1322 		container_of(work, struct wm8753_priv, charge_work.work);
1323 
1324 	/* Set to 500k */
1325 	regmap_update_bits(wm8753->regmap, WM8753_PWR1, 0x0180, 0x0100);
1326 }
1327 
1328 static int wm8753_set_bias_level(struct snd_soc_component *component,
1329 				 enum snd_soc_bias_level level)
1330 {
1331 	struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
1332 	u16 pwr_reg = snd_soc_component_read32(component, WM8753_PWR1) & 0xfe3e;
1333 
1334 	switch (level) {
1335 	case SND_SOC_BIAS_ON:
1336 		/* set vmid to 50k and unmute dac */
1337 		snd_soc_component_write(component, WM8753_PWR1, pwr_reg | 0x00c0);
1338 		break;
1339 	case SND_SOC_BIAS_PREPARE:
1340 		/* Wait until fully charged */
1341 		flush_delayed_work(&wm8753->charge_work);
1342 		break;
1343 	case SND_SOC_BIAS_STANDBY:
1344 		if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
1345 			/* set vmid to 5k for quick power up */
1346 			snd_soc_component_write(component, WM8753_PWR1, pwr_reg | 0x01c1);
1347 			schedule_delayed_work(&wm8753->charge_work,
1348 				msecs_to_jiffies(caps_charge));
1349 		} else {
1350 			/* mute dac and set vmid to 500k, enable VREF */
1351 			snd_soc_component_write(component, WM8753_PWR1, pwr_reg | 0x0141);
1352 		}
1353 		break;
1354 	case SND_SOC_BIAS_OFF:
1355 		cancel_delayed_work_sync(&wm8753->charge_work);
1356 		snd_soc_component_write(component, WM8753_PWR1, 0x0001);
1357 		break;
1358 	}
1359 	return 0;
1360 }
1361 
1362 #define WM8753_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
1363 		SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
1364 		SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1365 		SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
1366 
1367 #define WM8753_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1368 	SNDRV_PCM_FMTBIT_S24_LE)
1369 
1370 /*
1371  * The WM8753 supports up to 4 different and mutually exclusive DAI
1372  * configurations. This gives 2 PCM's available for use, hifi and voice.
1373  * NOTE: The Voice PCM cannot play or capture audio to the CPU as it's DAI
1374  * is connected between the wm8753 and a BT codec or GSM modem.
1375  *
1376  * 1. Voice over PCM DAI - HIFI DAC over HIFI DAI
1377  * 2. Voice over HIFI DAI - HIFI disabled
1378  * 3. Voice disabled - HIFI over HIFI
1379  * 4. Voice disabled - HIFI over HIFI, uses voice DAI LRC for capture
1380  */
1381 static const struct snd_soc_dai_ops wm8753_dai_ops_hifi_mode = {
1382 	.hw_params	= wm8753_i2s_hw_params,
1383 	.digital_mute	= wm8753_mute,
1384 	.set_fmt	= wm8753_hifi_set_dai_fmt,
1385 	.set_clkdiv	= wm8753_set_dai_clkdiv,
1386 	.set_pll	= wm8753_set_dai_pll,
1387 	.set_sysclk	= wm8753_set_dai_sysclk,
1388 };
1389 
1390 static const struct snd_soc_dai_ops wm8753_dai_ops_voice_mode = {
1391 	.hw_params	= wm8753_pcm_hw_params,
1392 	.digital_mute	= wm8753_mute,
1393 	.set_fmt	= wm8753_voice_set_dai_fmt,
1394 	.set_clkdiv	= wm8753_set_dai_clkdiv,
1395 	.set_pll	= wm8753_set_dai_pll,
1396 	.set_sysclk	= wm8753_set_dai_sysclk,
1397 };
1398 
1399 static struct snd_soc_dai_driver wm8753_dai[] = {
1400 /* DAI HiFi mode 1 */
1401 {	.name = "wm8753-hifi",
1402 	.playback = {
1403 		.stream_name = "HiFi Playback",
1404 		.channels_min = 1,
1405 		.channels_max = 2,
1406 		.rates = WM8753_RATES,
1407 		.formats = WM8753_FORMATS
1408 	},
1409 	.capture = { /* dummy for fast DAI switching */
1410 		.stream_name = "Capture",
1411 		.channels_min = 1,
1412 		.channels_max = 2,
1413 		.rates = WM8753_RATES,
1414 		.formats = WM8753_FORMATS
1415 	},
1416 	.ops = &wm8753_dai_ops_hifi_mode,
1417 },
1418 /* DAI Voice mode 1 */
1419 {	.name = "wm8753-voice",
1420 	.playback = {
1421 		.stream_name = "Voice Playback",
1422 		.channels_min = 1,
1423 		.channels_max = 1,
1424 		.rates = WM8753_RATES,
1425 		.formats = WM8753_FORMATS,
1426 	},
1427 	.capture = {
1428 		.stream_name = "Capture",
1429 		.channels_min = 1,
1430 		.channels_max = 2,
1431 		.rates = WM8753_RATES,
1432 		.formats = WM8753_FORMATS,
1433 	},
1434 	.ops = &wm8753_dai_ops_voice_mode,
1435 },
1436 };
1437 
1438 static int wm8753_resume(struct snd_soc_component *component)
1439 {
1440 	struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
1441 
1442 	regcache_sync(wm8753->regmap);
1443 
1444 	return 0;
1445 }
1446 
1447 static int wm8753_probe(struct snd_soc_component *component)
1448 {
1449 	struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
1450 	int ret;
1451 
1452 	INIT_DELAYED_WORK(&wm8753->charge_work, wm8753_charge_work);
1453 
1454 	ret = wm8753_reset(component);
1455 	if (ret < 0) {
1456 		dev_err(component->dev, "Failed to issue reset: %d\n", ret);
1457 		return ret;
1458 	}
1459 
1460 	wm8753->dai_func = 0;
1461 
1462 	/* set the update bits */
1463 	snd_soc_component_update_bits(component, WM8753_LDAC, 0x0100, 0x0100);
1464 	snd_soc_component_update_bits(component, WM8753_RDAC, 0x0100, 0x0100);
1465 	snd_soc_component_update_bits(component, WM8753_LADC, 0x0100, 0x0100);
1466 	snd_soc_component_update_bits(component, WM8753_RADC, 0x0100, 0x0100);
1467 	snd_soc_component_update_bits(component, WM8753_LOUT1V, 0x0100, 0x0100);
1468 	snd_soc_component_update_bits(component, WM8753_ROUT1V, 0x0100, 0x0100);
1469 	snd_soc_component_update_bits(component, WM8753_LOUT2V, 0x0100, 0x0100);
1470 	snd_soc_component_update_bits(component, WM8753_ROUT2V, 0x0100, 0x0100);
1471 	snd_soc_component_update_bits(component, WM8753_LINVOL, 0x0100, 0x0100);
1472 	snd_soc_component_update_bits(component, WM8753_RINVOL, 0x0100, 0x0100);
1473 
1474 	return 0;
1475 }
1476 
1477 static const struct snd_soc_component_driver soc_component_dev_wm8753 = {
1478 	.probe			= wm8753_probe,
1479 	.resume			= wm8753_resume,
1480 	.set_bias_level		= wm8753_set_bias_level,
1481 	.controls		= wm8753_snd_controls,
1482 	.num_controls		= ARRAY_SIZE(wm8753_snd_controls),
1483 	.dapm_widgets		= wm8753_dapm_widgets,
1484 	.num_dapm_widgets	= ARRAY_SIZE(wm8753_dapm_widgets),
1485 	.dapm_routes		= wm8753_dapm_routes,
1486 	.num_dapm_routes	= ARRAY_SIZE(wm8753_dapm_routes),
1487 	.suspend_bias_off	= 1,
1488 	.idle_bias_on		= 1,
1489 	.use_pmdown_time	= 1,
1490 	.endianness		= 1,
1491 	.non_legacy_dai_naming	= 1,
1492 };
1493 
1494 static const struct of_device_id wm8753_of_match[] = {
1495 	{ .compatible = "wlf,wm8753", },
1496 	{ }
1497 };
1498 MODULE_DEVICE_TABLE(of, wm8753_of_match);
1499 
1500 static const struct regmap_config wm8753_regmap = {
1501 	.reg_bits = 7,
1502 	.val_bits = 9,
1503 
1504 	.max_register = WM8753_ADCTL2,
1505 	.volatile_reg = wm8753_volatile,
1506 
1507 	.cache_type = REGCACHE_RBTREE,
1508 	.reg_defaults = wm8753_reg_defaults,
1509 	.num_reg_defaults = ARRAY_SIZE(wm8753_reg_defaults),
1510 };
1511 
1512 #if defined(CONFIG_SPI_MASTER)
1513 static int wm8753_spi_probe(struct spi_device *spi)
1514 {
1515 	struct wm8753_priv *wm8753;
1516 	int ret;
1517 
1518 	wm8753 = devm_kzalloc(&spi->dev, sizeof(struct wm8753_priv),
1519 			      GFP_KERNEL);
1520 	if (wm8753 == NULL)
1521 		return -ENOMEM;
1522 
1523 	spi_set_drvdata(spi, wm8753);
1524 
1525 	wm8753->regmap = devm_regmap_init_spi(spi, &wm8753_regmap);
1526 	if (IS_ERR(wm8753->regmap)) {
1527 		ret = PTR_ERR(wm8753->regmap);
1528 		dev_err(&spi->dev, "Failed to allocate register map: %d\n",
1529 			ret);
1530 		return ret;
1531 	}
1532 
1533 	ret = devm_snd_soc_register_component(&spi->dev, &soc_component_dev_wm8753,
1534 				     wm8753_dai, ARRAY_SIZE(wm8753_dai));
1535 	if (ret != 0)
1536 		dev_err(&spi->dev, "Failed to register CODEC: %d\n", ret);
1537 
1538 	return ret;
1539 }
1540 
1541 static struct spi_driver wm8753_spi_driver = {
1542 	.driver = {
1543 		.name	= "wm8753",
1544 		.of_match_table = wm8753_of_match,
1545 	},
1546 	.probe		= wm8753_spi_probe,
1547 };
1548 #endif /* CONFIG_SPI_MASTER */
1549 
1550 #if IS_ENABLED(CONFIG_I2C)
1551 static int wm8753_i2c_probe(struct i2c_client *i2c,
1552 			    const struct i2c_device_id *id)
1553 {
1554 	struct wm8753_priv *wm8753;
1555 	int ret;
1556 
1557 	wm8753 = devm_kzalloc(&i2c->dev, sizeof(struct wm8753_priv),
1558 			      GFP_KERNEL);
1559 	if (wm8753 == NULL)
1560 		return -ENOMEM;
1561 
1562 	i2c_set_clientdata(i2c, wm8753);
1563 
1564 	wm8753->regmap = devm_regmap_init_i2c(i2c, &wm8753_regmap);
1565 	if (IS_ERR(wm8753->regmap)) {
1566 		ret = PTR_ERR(wm8753->regmap);
1567 		dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1568 			ret);
1569 		return ret;
1570 	}
1571 
1572 	ret = devm_snd_soc_register_component(&i2c->dev, &soc_component_dev_wm8753,
1573 				     wm8753_dai, ARRAY_SIZE(wm8753_dai));
1574 	if (ret != 0)
1575 		dev_err(&i2c->dev, "Failed to register CODEC: %d\n", ret);
1576 
1577 	return ret;
1578 }
1579 
1580 static const struct i2c_device_id wm8753_i2c_id[] = {
1581 	{ "wm8753", 0 },
1582 	{ }
1583 };
1584 MODULE_DEVICE_TABLE(i2c, wm8753_i2c_id);
1585 
1586 static struct i2c_driver wm8753_i2c_driver = {
1587 	.driver = {
1588 		.name = "wm8753",
1589 		.of_match_table = wm8753_of_match,
1590 	},
1591 	.probe =    wm8753_i2c_probe,
1592 	.id_table = wm8753_i2c_id,
1593 };
1594 #endif
1595 
1596 static int __init wm8753_modinit(void)
1597 {
1598 	int ret = 0;
1599 #if IS_ENABLED(CONFIG_I2C)
1600 	ret = i2c_add_driver(&wm8753_i2c_driver);
1601 	if (ret != 0) {
1602 		printk(KERN_ERR "Failed to register wm8753 I2C driver: %d\n",
1603 		       ret);
1604 	}
1605 #endif
1606 #if defined(CONFIG_SPI_MASTER)
1607 	ret = spi_register_driver(&wm8753_spi_driver);
1608 	if (ret != 0) {
1609 		printk(KERN_ERR "Failed to register wm8753 SPI driver: %d\n",
1610 		       ret);
1611 	}
1612 #endif
1613 	return ret;
1614 }
1615 module_init(wm8753_modinit);
1616 
1617 static void __exit wm8753_exit(void)
1618 {
1619 #if IS_ENABLED(CONFIG_I2C)
1620 	i2c_del_driver(&wm8753_i2c_driver);
1621 #endif
1622 #if defined(CONFIG_SPI_MASTER)
1623 	spi_unregister_driver(&wm8753_spi_driver);
1624 #endif
1625 }
1626 module_exit(wm8753_exit);
1627 
1628 MODULE_DESCRIPTION("ASoC WM8753 driver");
1629 MODULE_AUTHOR("Liam Girdwood");
1630 MODULE_LICENSE("GPL");
1631