xref: /linux/sound/soc/codecs/wm8750.c (revision b8bb76713ec50df2f11efee386e16f93d51e1076)
1 /*
2  * wm8750.c -- WM8750 ALSA SoC audio driver
3  *
4  * Copyright 2005 Openedhand Ltd.
5  *
6  * Author: Richard Purdie <richard@openedhand.com>
7  *
8  * Based on WM8753.c
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software Foundation.
13  */
14 
15 #include <linux/module.h>
16 #include <linux/moduleparam.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/pm.h>
20 #include <linux/i2c.h>
21 #include <linux/platform_device.h>
22 #include <linux/spi/spi.h>
23 #include <sound/core.h>
24 #include <sound/pcm.h>
25 #include <sound/pcm_params.h>
26 #include <sound/soc.h>
27 #include <sound/soc-dapm.h>
28 #include <sound/initval.h>
29 
30 #include "wm8750.h"
31 
32 #define WM8750_VERSION "0.12"
33 
34 /* codec private data */
35 struct wm8750_priv {
36 	unsigned int sysclk;
37 };
38 
39 /*
40  * wm8750 register cache
41  * We can't read the WM8750 register space when we
42  * are using 2 wire for device control, so we cache them instead.
43  */
44 static const u16 wm8750_reg[] = {
45 	0x0097, 0x0097, 0x0079, 0x0079,  /*  0 */
46 	0x0000, 0x0008, 0x0000, 0x000a,  /*  4 */
47 	0x0000, 0x0000, 0x00ff, 0x00ff,  /*  8 */
48 	0x000f, 0x000f, 0x0000, 0x0000,  /* 12 */
49 	0x0000, 0x007b, 0x0000, 0x0032,  /* 16 */
50 	0x0000, 0x00c3, 0x00c3, 0x00c0,  /* 20 */
51 	0x0000, 0x0000, 0x0000, 0x0000,  /* 24 */
52 	0x0000, 0x0000, 0x0000, 0x0000,  /* 28 */
53 	0x0000, 0x0000, 0x0050, 0x0050,  /* 32 */
54 	0x0050, 0x0050, 0x0050, 0x0050,  /* 36 */
55 	0x0079, 0x0079, 0x0079,          /* 40 */
56 };
57 
58 /*
59  * read wm8750 register cache
60  */
61 static inline unsigned int wm8750_read_reg_cache(struct snd_soc_codec *codec,
62 	unsigned int reg)
63 {
64 	u16 *cache = codec->reg_cache;
65 	if (reg > WM8750_CACHE_REGNUM)
66 		return -1;
67 	return cache[reg];
68 }
69 
70 /*
71  * write wm8750 register cache
72  */
73 static inline void wm8750_write_reg_cache(struct snd_soc_codec *codec,
74 	unsigned int reg, unsigned int value)
75 {
76 	u16 *cache = codec->reg_cache;
77 	if (reg > WM8750_CACHE_REGNUM)
78 		return;
79 	cache[reg] = value;
80 }
81 
82 static int wm8750_write(struct snd_soc_codec *codec, unsigned int reg,
83 	unsigned int value)
84 {
85 	u8 data[2];
86 
87 	/* data is
88 	 *   D15..D9 WM8753 register offset
89 	 *   D8...D0 register data
90 	 */
91 	data[0] = (reg << 1) | ((value >> 8) & 0x0001);
92 	data[1] = value & 0x00ff;
93 
94 	wm8750_write_reg_cache(codec, reg, value);
95 	if (codec->hw_write(codec->control_data, data, 2) == 2)
96 		return 0;
97 	else
98 		return -EIO;
99 }
100 
101 #define wm8750_reset(c)	wm8750_write(c, WM8750_RESET, 0)
102 
103 /*
104  * WM8750 Controls
105  */
106 static const char *wm8750_bass[] = {"Linear Control", "Adaptive Boost"};
107 static const char *wm8750_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
108 static const char *wm8750_treble[] = {"8kHz", "4kHz"};
109 static const char *wm8750_3d_lc[] = {"200Hz", "500Hz"};
110 static const char *wm8750_3d_uc[] = {"2.2kHz", "1.5kHz"};
111 static const char *wm8750_3d_func[] = {"Capture", "Playback"};
112 static const char *wm8750_alc_func[] = {"Off", "Right", "Left", "Stereo"};
113 static const char *wm8750_ng_type[] = {"Constant PGA Gain",
114 	"Mute ADC Output"};
115 static const char *wm8750_line_mux[] = {"Line 1", "Line 2", "Line 3", "PGA",
116 	"Differential"};
117 static const char *wm8750_pga_sel[] = {"Line 1", "Line 2", "Line 3",
118 	"Differential"};
119 static const char *wm8750_out3[] = {"VREF", "ROUT1 + Vol", "MonoOut",
120 	"ROUT1"};
121 static const char *wm8750_diff_sel[] = {"Line 1", "Line 2"};
122 static const char *wm8750_adcpol[] = {"Normal", "L Invert", "R Invert",
123 	"L + R Invert"};
124 static const char *wm8750_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
125 static const char *wm8750_mono_mux[] = {"Stereo", "Mono (Left)",
126 	"Mono (Right)", "Digital Mono"};
127 
128 static const struct soc_enum wm8750_enum[] = {
129 SOC_ENUM_SINGLE(WM8750_BASS, 7, 2, wm8750_bass),
130 SOC_ENUM_SINGLE(WM8750_BASS, 6, 2, wm8750_bass_filter),
131 SOC_ENUM_SINGLE(WM8750_TREBLE, 6, 2, wm8750_treble),
132 SOC_ENUM_SINGLE(WM8750_3D, 5, 2, wm8750_3d_lc),
133 SOC_ENUM_SINGLE(WM8750_3D, 6, 2, wm8750_3d_uc),
134 SOC_ENUM_SINGLE(WM8750_3D, 7, 2, wm8750_3d_func),
135 SOC_ENUM_SINGLE(WM8750_ALC1, 7, 4, wm8750_alc_func),
136 SOC_ENUM_SINGLE(WM8750_NGATE, 1, 2, wm8750_ng_type),
137 SOC_ENUM_SINGLE(WM8750_LOUTM1, 0, 5, wm8750_line_mux),
138 SOC_ENUM_SINGLE(WM8750_ROUTM1, 0, 5, wm8750_line_mux),
139 SOC_ENUM_SINGLE(WM8750_LADCIN, 6, 4, wm8750_pga_sel), /* 10 */
140 SOC_ENUM_SINGLE(WM8750_RADCIN, 6, 4, wm8750_pga_sel),
141 SOC_ENUM_SINGLE(WM8750_ADCTL2, 7, 4, wm8750_out3),
142 SOC_ENUM_SINGLE(WM8750_ADCIN, 8, 2, wm8750_diff_sel),
143 SOC_ENUM_SINGLE(WM8750_ADCDAC, 5, 4, wm8750_adcpol),
144 SOC_ENUM_SINGLE(WM8750_ADCDAC, 1, 4, wm8750_deemph),
145 SOC_ENUM_SINGLE(WM8750_ADCIN, 6, 4, wm8750_mono_mux), /* 16 */
146 
147 };
148 
149 static const struct snd_kcontrol_new wm8750_snd_controls[] = {
150 
151 SOC_DOUBLE_R("Capture Volume", WM8750_LINVOL, WM8750_RINVOL, 0, 63, 0),
152 SOC_DOUBLE_R("Capture ZC Switch", WM8750_LINVOL, WM8750_RINVOL, 6, 1, 0),
153 SOC_DOUBLE_R("Capture Switch", WM8750_LINVOL, WM8750_RINVOL, 7, 1, 1),
154 
155 SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8750_LOUT1V,
156 	WM8750_ROUT1V, 7, 1, 0),
157 SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8750_LOUT2V,
158 	WM8750_ROUT2V, 7, 1, 0),
159 
160 SOC_ENUM("Playback De-emphasis", wm8750_enum[15]),
161 
162 SOC_ENUM("Capture Polarity", wm8750_enum[14]),
163 SOC_SINGLE("Playback 6dB Attenuate", WM8750_ADCDAC, 7, 1, 0),
164 SOC_SINGLE("Capture 6dB Attenuate", WM8750_ADCDAC, 8, 1, 0),
165 
166 SOC_DOUBLE_R("PCM Volume", WM8750_LDAC, WM8750_RDAC, 0, 255, 0),
167 
168 SOC_ENUM("Bass Boost", wm8750_enum[0]),
169 SOC_ENUM("Bass Filter", wm8750_enum[1]),
170 SOC_SINGLE("Bass Volume", WM8750_BASS, 0, 15, 1),
171 
172 SOC_SINGLE("Treble Volume", WM8750_TREBLE, 0, 15, 1),
173 SOC_ENUM("Treble Cut-off", wm8750_enum[2]),
174 
175 SOC_SINGLE("3D Switch", WM8750_3D, 0, 1, 0),
176 SOC_SINGLE("3D Volume", WM8750_3D, 1, 15, 0),
177 SOC_ENUM("3D Lower Cut-off", wm8750_enum[3]),
178 SOC_ENUM("3D Upper Cut-off", wm8750_enum[4]),
179 SOC_ENUM("3D Mode", wm8750_enum[5]),
180 
181 SOC_SINGLE("ALC Capture Target Volume", WM8750_ALC1, 0, 7, 0),
182 SOC_SINGLE("ALC Capture Max Volume", WM8750_ALC1, 4, 7, 0),
183 SOC_ENUM("ALC Capture Function", wm8750_enum[6]),
184 SOC_SINGLE("ALC Capture ZC Switch", WM8750_ALC2, 7, 1, 0),
185 SOC_SINGLE("ALC Capture Hold Time", WM8750_ALC2, 0, 15, 0),
186 SOC_SINGLE("ALC Capture Decay Time", WM8750_ALC3, 4, 15, 0),
187 SOC_SINGLE("ALC Capture Attack Time", WM8750_ALC3, 0, 15, 0),
188 SOC_SINGLE("ALC Capture NG Threshold", WM8750_NGATE, 3, 31, 0),
189 SOC_ENUM("ALC Capture NG Type", wm8750_enum[4]),
190 SOC_SINGLE("ALC Capture NG Switch", WM8750_NGATE, 0, 1, 0),
191 
192 SOC_SINGLE("Left ADC Capture Volume", WM8750_LADC, 0, 255, 0),
193 SOC_SINGLE("Right ADC Capture Volume", WM8750_RADC, 0, 255, 0),
194 
195 SOC_SINGLE("ZC Timeout Switch", WM8750_ADCTL1, 0, 1, 0),
196 SOC_SINGLE("Playback Invert Switch", WM8750_ADCTL1, 1, 1, 0),
197 
198 SOC_SINGLE("Right Speaker Playback Invert Switch", WM8750_ADCTL2, 4, 1, 0),
199 
200 /* Unimplemented */
201 /* ADCDAC Bit 0 - ADCHPD */
202 /* ADCDAC Bit 4 - HPOR */
203 /* ADCTL1 Bit 2,3 - DATSEL */
204 /* ADCTL1 Bit 4,5 - DMONOMIX */
205 /* ADCTL1 Bit 6,7 - VSEL */
206 /* ADCTL2 Bit 2 - LRCM */
207 /* ADCTL2 Bit 3 - TRI */
208 /* ADCTL3 Bit 5 - HPFLREN */
209 /* ADCTL3 Bit 6 - VROI */
210 /* ADCTL3 Bit 7,8 - ADCLRM */
211 /* ADCIN Bit 4 - LDCM */
212 /* ADCIN Bit 5 - RDCM */
213 
214 SOC_DOUBLE_R("Mic Boost", WM8750_LADCIN, WM8750_RADCIN, 4, 3, 0),
215 
216 SOC_DOUBLE_R("Bypass Left Playback Volume", WM8750_LOUTM1,
217 	WM8750_LOUTM2, 4, 7, 1),
218 SOC_DOUBLE_R("Bypass Right Playback Volume", WM8750_ROUTM1,
219 	WM8750_ROUTM2, 4, 7, 1),
220 SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8750_MOUTM1,
221 	WM8750_MOUTM2, 4, 7, 1),
222 
223 SOC_SINGLE("Mono Playback ZC Switch", WM8750_MOUTV, 7, 1, 0),
224 
225 SOC_DOUBLE_R("Headphone Playback Volume", WM8750_LOUT1V, WM8750_ROUT1V,
226 	0, 127, 0),
227 SOC_DOUBLE_R("Speaker Playback Volume", WM8750_LOUT2V, WM8750_ROUT2V,
228 	0, 127, 0),
229 
230 SOC_SINGLE("Mono Playback Volume", WM8750_MOUTV, 0, 127, 0),
231 
232 };
233 
234 /*
235  * DAPM Controls
236  */
237 
238 /* Left Mixer */
239 static const struct snd_kcontrol_new wm8750_left_mixer_controls[] = {
240 SOC_DAPM_SINGLE("Playback Switch", WM8750_LOUTM1, 8, 1, 0),
241 SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_LOUTM1, 7, 1, 0),
242 SOC_DAPM_SINGLE("Right Playback Switch", WM8750_LOUTM2, 8, 1, 0),
243 SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_LOUTM2, 7, 1, 0),
244 };
245 
246 /* Right Mixer */
247 static const struct snd_kcontrol_new wm8750_right_mixer_controls[] = {
248 SOC_DAPM_SINGLE("Left Playback Switch", WM8750_ROUTM1, 8, 1, 0),
249 SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_ROUTM1, 7, 1, 0),
250 SOC_DAPM_SINGLE("Playback Switch", WM8750_ROUTM2, 8, 1, 0),
251 SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_ROUTM2, 7, 1, 0),
252 };
253 
254 /* Mono Mixer */
255 static const struct snd_kcontrol_new wm8750_mono_mixer_controls[] = {
256 SOC_DAPM_SINGLE("Left Playback Switch", WM8750_MOUTM1, 8, 1, 0),
257 SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_MOUTM1, 7, 1, 0),
258 SOC_DAPM_SINGLE("Right Playback Switch", WM8750_MOUTM2, 8, 1, 0),
259 SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_MOUTM2, 7, 1, 0),
260 };
261 
262 /* Left Line Mux */
263 static const struct snd_kcontrol_new wm8750_left_line_controls =
264 SOC_DAPM_ENUM("Route", wm8750_enum[8]);
265 
266 /* Right Line Mux */
267 static const struct snd_kcontrol_new wm8750_right_line_controls =
268 SOC_DAPM_ENUM("Route", wm8750_enum[9]);
269 
270 /* Left PGA Mux */
271 static const struct snd_kcontrol_new wm8750_left_pga_controls =
272 SOC_DAPM_ENUM("Route", wm8750_enum[10]);
273 
274 /* Right PGA Mux */
275 static const struct snd_kcontrol_new wm8750_right_pga_controls =
276 SOC_DAPM_ENUM("Route", wm8750_enum[11]);
277 
278 /* Out 3 Mux */
279 static const struct snd_kcontrol_new wm8750_out3_controls =
280 SOC_DAPM_ENUM("Route", wm8750_enum[12]);
281 
282 /* Differential Mux */
283 static const struct snd_kcontrol_new wm8750_diffmux_controls =
284 SOC_DAPM_ENUM("Route", wm8750_enum[13]);
285 
286 /* Mono ADC Mux */
287 static const struct snd_kcontrol_new wm8750_monomux_controls =
288 SOC_DAPM_ENUM("Route", wm8750_enum[16]);
289 
290 static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = {
291 	SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
292 		&wm8750_left_mixer_controls[0],
293 		ARRAY_SIZE(wm8750_left_mixer_controls)),
294 	SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
295 		&wm8750_right_mixer_controls[0],
296 		ARRAY_SIZE(wm8750_right_mixer_controls)),
297 	SND_SOC_DAPM_MIXER("Mono Mixer", WM8750_PWR2, 2, 0,
298 		&wm8750_mono_mixer_controls[0],
299 		ARRAY_SIZE(wm8750_mono_mixer_controls)),
300 
301 	SND_SOC_DAPM_PGA("Right Out 2", WM8750_PWR2, 3, 0, NULL, 0),
302 	SND_SOC_DAPM_PGA("Left Out 2", WM8750_PWR2, 4, 0, NULL, 0),
303 	SND_SOC_DAPM_PGA("Right Out 1", WM8750_PWR2, 5, 0, NULL, 0),
304 	SND_SOC_DAPM_PGA("Left Out 1", WM8750_PWR2, 6, 0, NULL, 0),
305 	SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8750_PWR2, 7, 0),
306 	SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8750_PWR2, 8, 0),
307 
308 	SND_SOC_DAPM_MICBIAS("Mic Bias", WM8750_PWR1, 1, 0),
309 	SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8750_PWR1, 2, 0),
310 	SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8750_PWR1, 3, 0),
311 
312 	SND_SOC_DAPM_MUX("Left PGA Mux", WM8750_PWR1, 5, 0,
313 		&wm8750_left_pga_controls),
314 	SND_SOC_DAPM_MUX("Right PGA Mux", WM8750_PWR1, 4, 0,
315 		&wm8750_right_pga_controls),
316 	SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
317 		&wm8750_left_line_controls),
318 	SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
319 		&wm8750_right_line_controls),
320 
321 	SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8750_out3_controls),
322 	SND_SOC_DAPM_PGA("Out 3", WM8750_PWR2, 1, 0, NULL, 0),
323 	SND_SOC_DAPM_PGA("Mono Out 1", WM8750_PWR2, 2, 0, NULL, 0),
324 
325 	SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
326 		&wm8750_diffmux_controls),
327 	SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
328 		&wm8750_monomux_controls),
329 	SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
330 		&wm8750_monomux_controls),
331 
332 	SND_SOC_DAPM_OUTPUT("LOUT1"),
333 	SND_SOC_DAPM_OUTPUT("ROUT1"),
334 	SND_SOC_DAPM_OUTPUT("LOUT2"),
335 	SND_SOC_DAPM_OUTPUT("ROUT2"),
336 	SND_SOC_DAPM_OUTPUT("MONO1"),
337 	SND_SOC_DAPM_OUTPUT("OUT3"),
338 	SND_SOC_DAPM_OUTPUT("VREF"),
339 
340 	SND_SOC_DAPM_INPUT("LINPUT1"),
341 	SND_SOC_DAPM_INPUT("LINPUT2"),
342 	SND_SOC_DAPM_INPUT("LINPUT3"),
343 	SND_SOC_DAPM_INPUT("RINPUT1"),
344 	SND_SOC_DAPM_INPUT("RINPUT2"),
345 	SND_SOC_DAPM_INPUT("RINPUT3"),
346 };
347 
348 static const struct snd_soc_dapm_route audio_map[] = {
349 	/* left mixer */
350 	{"Left Mixer", "Playback Switch", "Left DAC"},
351 	{"Left Mixer", "Left Bypass Switch", "Left Line Mux"},
352 	{"Left Mixer", "Right Playback Switch", "Right DAC"},
353 	{"Left Mixer", "Right Bypass Switch", "Right Line Mux"},
354 
355 	/* right mixer */
356 	{"Right Mixer", "Left Playback Switch", "Left DAC"},
357 	{"Right Mixer", "Left Bypass Switch", "Left Line Mux"},
358 	{"Right Mixer", "Playback Switch", "Right DAC"},
359 	{"Right Mixer", "Right Bypass Switch", "Right Line Mux"},
360 
361 	/* left out 1 */
362 	{"Left Out 1", NULL, "Left Mixer"},
363 	{"LOUT1", NULL, "Left Out 1"},
364 
365 	/* left out 2 */
366 	{"Left Out 2", NULL, "Left Mixer"},
367 	{"LOUT2", NULL, "Left Out 2"},
368 
369 	/* right out 1 */
370 	{"Right Out 1", NULL, "Right Mixer"},
371 	{"ROUT1", NULL, "Right Out 1"},
372 
373 	/* right out 2 */
374 	{"Right Out 2", NULL, "Right Mixer"},
375 	{"ROUT2", NULL, "Right Out 2"},
376 
377 	/* mono mixer */
378 	{"Mono Mixer", "Left Playback Switch", "Left DAC"},
379 	{"Mono Mixer", "Left Bypass Switch", "Left Line Mux"},
380 	{"Mono Mixer", "Right Playback Switch", "Right DAC"},
381 	{"Mono Mixer", "Right Bypass Switch", "Right Line Mux"},
382 
383 	/* mono out */
384 	{"Mono Out 1", NULL, "Mono Mixer"},
385 	{"MONO1", NULL, "Mono Out 1"},
386 
387 	/* out 3 */
388 	{"Out3 Mux", "VREF", "VREF"},
389 	{"Out3 Mux", "ROUT1 + Vol", "ROUT1"},
390 	{"Out3 Mux", "ROUT1", "Right Mixer"},
391 	{"Out3 Mux", "MonoOut", "MONO1"},
392 	{"Out 3", NULL, "Out3 Mux"},
393 	{"OUT3", NULL, "Out 3"},
394 
395 	/* Left Line Mux */
396 	{"Left Line Mux", "Line 1", "LINPUT1"},
397 	{"Left Line Mux", "Line 2", "LINPUT2"},
398 	{"Left Line Mux", "Line 3", "LINPUT3"},
399 	{"Left Line Mux", "PGA", "Left PGA Mux"},
400 	{"Left Line Mux", "Differential", "Differential Mux"},
401 
402 	/* Right Line Mux */
403 	{"Right Line Mux", "Line 1", "RINPUT1"},
404 	{"Right Line Mux", "Line 2", "RINPUT2"},
405 	{"Right Line Mux", "Line 3", "RINPUT3"},
406 	{"Right Line Mux", "PGA", "Right PGA Mux"},
407 	{"Right Line Mux", "Differential", "Differential Mux"},
408 
409 	/* Left PGA Mux */
410 	{"Left PGA Mux", "Line 1", "LINPUT1"},
411 	{"Left PGA Mux", "Line 2", "LINPUT2"},
412 	{"Left PGA Mux", "Line 3", "LINPUT3"},
413 	{"Left PGA Mux", "Differential", "Differential Mux"},
414 
415 	/* Right PGA Mux */
416 	{"Right PGA Mux", "Line 1", "RINPUT1"},
417 	{"Right PGA Mux", "Line 2", "RINPUT2"},
418 	{"Right PGA Mux", "Line 3", "RINPUT3"},
419 	{"Right PGA Mux", "Differential", "Differential Mux"},
420 
421 	/* Differential Mux */
422 	{"Differential Mux", "Line 1", "LINPUT1"},
423 	{"Differential Mux", "Line 1", "RINPUT1"},
424 	{"Differential Mux", "Line 2", "LINPUT2"},
425 	{"Differential Mux", "Line 2", "RINPUT2"},
426 
427 	/* Left ADC Mux */
428 	{"Left ADC Mux", "Stereo", "Left PGA Mux"},
429 	{"Left ADC Mux", "Mono (Left)", "Left PGA Mux"},
430 	{"Left ADC Mux", "Digital Mono", "Left PGA Mux"},
431 
432 	/* Right ADC Mux */
433 	{"Right ADC Mux", "Stereo", "Right PGA Mux"},
434 	{"Right ADC Mux", "Mono (Right)", "Right PGA Mux"},
435 	{"Right ADC Mux", "Digital Mono", "Right PGA Mux"},
436 
437 	/* ADC */
438 	{"Left ADC", NULL, "Left ADC Mux"},
439 	{"Right ADC", NULL, "Right ADC Mux"},
440 };
441 
442 static int wm8750_add_widgets(struct snd_soc_codec *codec)
443 {
444 	snd_soc_dapm_new_controls(codec, wm8750_dapm_widgets,
445 				  ARRAY_SIZE(wm8750_dapm_widgets));
446 
447 	snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
448 
449 	snd_soc_dapm_new_widgets(codec);
450 	return 0;
451 }
452 
453 struct _coeff_div {
454 	u32 mclk;
455 	u32 rate;
456 	u16 fs;
457 	u8 sr:5;
458 	u8 usb:1;
459 };
460 
461 /* codec hifi mclk clock divider coefficients */
462 static const struct _coeff_div coeff_div[] = {
463 	/* 8k */
464 	{12288000, 8000, 1536, 0x6, 0x0},
465 	{11289600, 8000, 1408, 0x16, 0x0},
466 	{18432000, 8000, 2304, 0x7, 0x0},
467 	{16934400, 8000, 2112, 0x17, 0x0},
468 	{12000000, 8000, 1500, 0x6, 0x1},
469 
470 	/* 11.025k */
471 	{11289600, 11025, 1024, 0x18, 0x0},
472 	{16934400, 11025, 1536, 0x19, 0x0},
473 	{12000000, 11025, 1088, 0x19, 0x1},
474 
475 	/* 16k */
476 	{12288000, 16000, 768, 0xa, 0x0},
477 	{18432000, 16000, 1152, 0xb, 0x0},
478 	{12000000, 16000, 750, 0xa, 0x1},
479 
480 	/* 22.05k */
481 	{11289600, 22050, 512, 0x1a, 0x0},
482 	{16934400, 22050, 768, 0x1b, 0x0},
483 	{12000000, 22050, 544, 0x1b, 0x1},
484 
485 	/* 32k */
486 	{12288000, 32000, 384, 0xc, 0x0},
487 	{18432000, 32000, 576, 0xd, 0x0},
488 	{12000000, 32000, 375, 0xa, 0x1},
489 
490 	/* 44.1k */
491 	{11289600, 44100, 256, 0x10, 0x0},
492 	{16934400, 44100, 384, 0x11, 0x0},
493 	{12000000, 44100, 272, 0x11, 0x1},
494 
495 	/* 48k */
496 	{12288000, 48000, 256, 0x0, 0x0},
497 	{18432000, 48000, 384, 0x1, 0x0},
498 	{12000000, 48000, 250, 0x0, 0x1},
499 
500 	/* 88.2k */
501 	{11289600, 88200, 128, 0x1e, 0x0},
502 	{16934400, 88200, 192, 0x1f, 0x0},
503 	{12000000, 88200, 136, 0x1f, 0x1},
504 
505 	/* 96k */
506 	{12288000, 96000, 128, 0xe, 0x0},
507 	{18432000, 96000, 192, 0xf, 0x0},
508 	{12000000, 96000, 125, 0xe, 0x1},
509 };
510 
511 static inline int get_coeff(int mclk, int rate)
512 {
513 	int i;
514 
515 	for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
516 		if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
517 			return i;
518 	}
519 
520 	printk(KERN_ERR "wm8750: could not get coeff for mclk %d @ rate %d\n",
521 		mclk, rate);
522 	return -EINVAL;
523 }
524 
525 static int wm8750_set_dai_sysclk(struct snd_soc_dai *codec_dai,
526 		int clk_id, unsigned int freq, int dir)
527 {
528 	struct snd_soc_codec *codec = codec_dai->codec;
529 	struct wm8750_priv *wm8750 = codec->private_data;
530 
531 	switch (freq) {
532 	case 11289600:
533 	case 12000000:
534 	case 12288000:
535 	case 16934400:
536 	case 18432000:
537 		wm8750->sysclk = freq;
538 		return 0;
539 	}
540 	return -EINVAL;
541 }
542 
543 static int wm8750_set_dai_fmt(struct snd_soc_dai *codec_dai,
544 		unsigned int fmt)
545 {
546 	struct snd_soc_codec *codec = codec_dai->codec;
547 	u16 iface = 0;
548 
549 	/* set master/slave audio interface */
550 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
551 	case SND_SOC_DAIFMT_CBM_CFM:
552 		iface = 0x0040;
553 		break;
554 	case SND_SOC_DAIFMT_CBS_CFS:
555 		break;
556 	default:
557 		return -EINVAL;
558 	}
559 
560 	/* interface format */
561 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
562 	case SND_SOC_DAIFMT_I2S:
563 		iface |= 0x0002;
564 		break;
565 	case SND_SOC_DAIFMT_RIGHT_J:
566 		break;
567 	case SND_SOC_DAIFMT_LEFT_J:
568 		iface |= 0x0001;
569 		break;
570 	case SND_SOC_DAIFMT_DSP_A:
571 		iface |= 0x0003;
572 		break;
573 	case SND_SOC_DAIFMT_DSP_B:
574 		iface |= 0x0013;
575 		break;
576 	default:
577 		return -EINVAL;
578 	}
579 
580 	/* clock inversion */
581 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
582 	case SND_SOC_DAIFMT_NB_NF:
583 		break;
584 	case SND_SOC_DAIFMT_IB_IF:
585 		iface |= 0x0090;
586 		break;
587 	case SND_SOC_DAIFMT_IB_NF:
588 		iface |= 0x0080;
589 		break;
590 	case SND_SOC_DAIFMT_NB_IF:
591 		iface |= 0x0010;
592 		break;
593 	default:
594 		return -EINVAL;
595 	}
596 
597 	wm8750_write(codec, WM8750_IFACE, iface);
598 	return 0;
599 }
600 
601 static int wm8750_pcm_hw_params(struct snd_pcm_substream *substream,
602 				struct snd_pcm_hw_params *params,
603 				struct snd_soc_dai *dai)
604 {
605 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
606 	struct snd_soc_device *socdev = rtd->socdev;
607 	struct snd_soc_codec *codec = socdev->card->codec;
608 	struct wm8750_priv *wm8750 = codec->private_data;
609 	u16 iface = wm8750_read_reg_cache(codec, WM8750_IFACE) & 0x1f3;
610 	u16 srate = wm8750_read_reg_cache(codec, WM8750_SRATE) & 0x1c0;
611 	int coeff = get_coeff(wm8750->sysclk, params_rate(params));
612 
613 	/* bit size */
614 	switch (params_format(params)) {
615 	case SNDRV_PCM_FORMAT_S16_LE:
616 		break;
617 	case SNDRV_PCM_FORMAT_S20_3LE:
618 		iface |= 0x0004;
619 		break;
620 	case SNDRV_PCM_FORMAT_S24_LE:
621 		iface |= 0x0008;
622 		break;
623 	case SNDRV_PCM_FORMAT_S32_LE:
624 		iface |= 0x000c;
625 		break;
626 	}
627 
628 	/* set iface & srate */
629 	wm8750_write(codec, WM8750_IFACE, iface);
630 	if (coeff >= 0)
631 		wm8750_write(codec, WM8750_SRATE, srate |
632 			(coeff_div[coeff].sr << 1) | coeff_div[coeff].usb);
633 
634 	return 0;
635 }
636 
637 static int wm8750_mute(struct snd_soc_dai *dai, int mute)
638 {
639 	struct snd_soc_codec *codec = dai->codec;
640 	u16 mute_reg = wm8750_read_reg_cache(codec, WM8750_ADCDAC) & 0xfff7;
641 
642 	if (mute)
643 		wm8750_write(codec, WM8750_ADCDAC, mute_reg | 0x8);
644 	else
645 		wm8750_write(codec, WM8750_ADCDAC, mute_reg);
646 	return 0;
647 }
648 
649 static int wm8750_set_bias_level(struct snd_soc_codec *codec,
650 				 enum snd_soc_bias_level level)
651 {
652 	u16 pwr_reg = wm8750_read_reg_cache(codec, WM8750_PWR1) & 0xfe3e;
653 
654 	switch (level) {
655 	case SND_SOC_BIAS_ON:
656 		/* set vmid to 50k and unmute dac */
657 		wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x00c0);
658 		break;
659 	case SND_SOC_BIAS_PREPARE:
660 		/* set vmid to 5k for quick power up */
661 		wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x01c1);
662 		break;
663 	case SND_SOC_BIAS_STANDBY:
664 		/* mute dac and set vmid to 500k, enable VREF */
665 		wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x0141);
666 		break;
667 	case SND_SOC_BIAS_OFF:
668 		wm8750_write(codec, WM8750_PWR1, 0x0001);
669 		break;
670 	}
671 	codec->bias_level = level;
672 	return 0;
673 }
674 
675 #define WM8750_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
676 	SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
677 	SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
678 
679 #define WM8750_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
680 	SNDRV_PCM_FMTBIT_S24_LE)
681 
682 static struct snd_soc_dai_ops wm8750_dai_ops = {
683 	.hw_params	= wm8750_pcm_hw_params,
684 	.digital_mute	= wm8750_mute,
685 	.set_fmt	= wm8750_set_dai_fmt,
686 	.set_sysclk	= wm8750_set_dai_sysclk,
687 };
688 
689 struct snd_soc_dai wm8750_dai = {
690 	.name = "WM8750",
691 	.playback = {
692 		.stream_name = "Playback",
693 		.channels_min = 1,
694 		.channels_max = 2,
695 		.rates = WM8750_RATES,
696 		.formats = WM8750_FORMATS,},
697 	.capture = {
698 		.stream_name = "Capture",
699 		.channels_min = 1,
700 		.channels_max = 2,
701 		.rates = WM8750_RATES,
702 		.formats = WM8750_FORMATS,},
703 	.ops = &wm8750_dai_ops,
704 };
705 EXPORT_SYMBOL_GPL(wm8750_dai);
706 
707 static void wm8750_work(struct work_struct *work)
708 {
709 	struct snd_soc_codec *codec =
710 		container_of(work, struct snd_soc_codec, delayed_work.work);
711 	wm8750_set_bias_level(codec, codec->bias_level);
712 }
713 
714 static int wm8750_suspend(struct platform_device *pdev, pm_message_t state)
715 {
716 	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
717 	struct snd_soc_codec *codec = socdev->card->codec;
718 
719 	wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF);
720 	return 0;
721 }
722 
723 static int wm8750_resume(struct platform_device *pdev)
724 {
725 	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
726 	struct snd_soc_codec *codec = socdev->card->codec;
727 	int i;
728 	u8 data[2];
729 	u16 *cache = codec->reg_cache;
730 
731 	/* Sync reg_cache with the hardware */
732 	for (i = 0; i < ARRAY_SIZE(wm8750_reg); i++) {
733 		if (i == WM8750_RESET)
734 			continue;
735 		data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
736 		data[1] = cache[i] & 0x00ff;
737 		codec->hw_write(codec->control_data, data, 2);
738 	}
739 
740 	wm8750_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
741 
742 	/* charge wm8750 caps */
743 	if (codec->suspend_bias_level == SND_SOC_BIAS_ON) {
744 		wm8750_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
745 		codec->bias_level = SND_SOC_BIAS_ON;
746 		schedule_delayed_work(&codec->delayed_work,
747 					msecs_to_jiffies(1000));
748 	}
749 
750 	return 0;
751 }
752 
753 /*
754  * initialise the WM8750 driver
755  * register the mixer and dsp interfaces with the kernel
756  */
757 static int wm8750_init(struct snd_soc_device *socdev)
758 {
759 	struct snd_soc_codec *codec = socdev->card->codec;
760 	int reg, ret = 0;
761 
762 	codec->name = "WM8750";
763 	codec->owner = THIS_MODULE;
764 	codec->read = wm8750_read_reg_cache;
765 	codec->write = wm8750_write;
766 	codec->set_bias_level = wm8750_set_bias_level;
767 	codec->dai = &wm8750_dai;
768 	codec->num_dai = 1;
769 	codec->reg_cache_size = ARRAY_SIZE(wm8750_reg);
770 	codec->reg_cache = kmemdup(wm8750_reg, sizeof(wm8750_reg), GFP_KERNEL);
771 	if (codec->reg_cache == NULL)
772 		return -ENOMEM;
773 
774 	wm8750_reset(codec);
775 
776 	/* register pcms */
777 	ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
778 	if (ret < 0) {
779 		printk(KERN_ERR "wm8750: failed to create pcms\n");
780 		goto pcm_err;
781 	}
782 
783 	/* charge output caps */
784 	wm8750_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
785 	codec->bias_level = SND_SOC_BIAS_STANDBY;
786 	schedule_delayed_work(&codec->delayed_work, msecs_to_jiffies(1000));
787 
788 	/* set the update bits */
789 	reg = wm8750_read_reg_cache(codec, WM8750_LDAC);
790 	wm8750_write(codec, WM8750_LDAC, reg | 0x0100);
791 	reg = wm8750_read_reg_cache(codec, WM8750_RDAC);
792 	wm8750_write(codec, WM8750_RDAC, reg | 0x0100);
793 	reg = wm8750_read_reg_cache(codec, WM8750_LOUT1V);
794 	wm8750_write(codec, WM8750_LOUT1V, reg | 0x0100);
795 	reg = wm8750_read_reg_cache(codec, WM8750_ROUT1V);
796 	wm8750_write(codec, WM8750_ROUT1V, reg | 0x0100);
797 	reg = wm8750_read_reg_cache(codec, WM8750_LOUT2V);
798 	wm8750_write(codec, WM8750_LOUT2V, reg | 0x0100);
799 	reg = wm8750_read_reg_cache(codec, WM8750_ROUT2V);
800 	wm8750_write(codec, WM8750_ROUT2V, reg | 0x0100);
801 	reg = wm8750_read_reg_cache(codec, WM8750_LINVOL);
802 	wm8750_write(codec, WM8750_LINVOL, reg | 0x0100);
803 	reg = wm8750_read_reg_cache(codec, WM8750_RINVOL);
804 	wm8750_write(codec, WM8750_RINVOL, reg | 0x0100);
805 
806 	snd_soc_add_controls(codec, wm8750_snd_controls,
807 				ARRAY_SIZE(wm8750_snd_controls));
808 	wm8750_add_widgets(codec);
809 	ret = snd_soc_init_card(socdev);
810 	if (ret < 0) {
811 		printk(KERN_ERR "wm8750: failed to register card\n");
812 		goto card_err;
813 	}
814 	return ret;
815 
816 card_err:
817 	snd_soc_free_pcms(socdev);
818 	snd_soc_dapm_free(socdev);
819 pcm_err:
820 	kfree(codec->reg_cache);
821 	return ret;
822 }
823 
824 /* If the i2c layer weren't so broken, we could pass this kind of data
825    around */
826 static struct snd_soc_device *wm8750_socdev;
827 
828 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
829 
830 /*
831  * WM8750 2 wire address is determined by GPIO5
832  * state during powerup.
833  *    low  = 0x1a
834  *    high = 0x1b
835  */
836 
837 static int wm8750_i2c_probe(struct i2c_client *i2c,
838 			    const struct i2c_device_id *id)
839 {
840 	struct snd_soc_device *socdev = wm8750_socdev;
841 	struct snd_soc_codec *codec = socdev->card->codec;
842 	int ret;
843 
844 	i2c_set_clientdata(i2c, codec);
845 	codec->control_data = i2c;
846 
847 	ret = wm8750_init(socdev);
848 	if (ret < 0)
849 		pr_err("failed to initialise WM8750\n");
850 
851 	return ret;
852 }
853 
854 static int wm8750_i2c_remove(struct i2c_client *client)
855 {
856 	struct snd_soc_codec *codec = i2c_get_clientdata(client);
857 	kfree(codec->reg_cache);
858 	return 0;
859 }
860 
861 static const struct i2c_device_id wm8750_i2c_id[] = {
862 	{ "wm8750", 0 },
863 	{ }
864 };
865 MODULE_DEVICE_TABLE(i2c, wm8750_i2c_id);
866 
867 static struct i2c_driver wm8750_i2c_driver = {
868 	.driver = {
869 		.name = "WM8750 I2C Codec",
870 		.owner = THIS_MODULE,
871 	},
872 	.probe =    wm8750_i2c_probe,
873 	.remove =   wm8750_i2c_remove,
874 	.id_table = wm8750_i2c_id,
875 };
876 
877 static int wm8750_add_i2c_device(struct platform_device *pdev,
878 				 const struct wm8750_setup_data *setup)
879 {
880 	struct i2c_board_info info;
881 	struct i2c_adapter *adapter;
882 	struct i2c_client *client;
883 	int ret;
884 
885 	ret = i2c_add_driver(&wm8750_i2c_driver);
886 	if (ret != 0) {
887 		dev_err(&pdev->dev, "can't add i2c driver\n");
888 		return ret;
889 	}
890 
891 	memset(&info, 0, sizeof(struct i2c_board_info));
892 	info.addr = setup->i2c_address;
893 	strlcpy(info.type, "wm8750", I2C_NAME_SIZE);
894 
895 	adapter = i2c_get_adapter(setup->i2c_bus);
896 	if (!adapter) {
897 		dev_err(&pdev->dev, "can't get i2c adapter %d\n",
898 			setup->i2c_bus);
899 		goto err_driver;
900 	}
901 
902 	client = i2c_new_device(adapter, &info);
903 	i2c_put_adapter(adapter);
904 	if (!client) {
905 		dev_err(&pdev->dev, "can't add i2c device at 0x%x\n",
906 			(unsigned int)info.addr);
907 		goto err_driver;
908 	}
909 
910 	return 0;
911 
912 err_driver:
913 	i2c_del_driver(&wm8750_i2c_driver);
914 	return -ENODEV;
915 }
916 #endif
917 
918 #if defined(CONFIG_SPI_MASTER)
919 static int __devinit wm8750_spi_probe(struct spi_device *spi)
920 {
921 	struct snd_soc_device *socdev = wm8750_socdev;
922 	struct snd_soc_codec *codec = socdev->card->codec;
923 	int ret;
924 
925 	codec->control_data = spi;
926 
927 	ret = wm8750_init(socdev);
928 	if (ret < 0)
929 		dev_err(&spi->dev, "failed to initialise WM8750\n");
930 
931 	return ret;
932 }
933 
934 static int __devexit wm8750_spi_remove(struct spi_device *spi)
935 {
936 	return 0;
937 }
938 
939 static struct spi_driver wm8750_spi_driver = {
940 	.driver = {
941 		.name	= "wm8750",
942 		.bus	= &spi_bus_type,
943 		.owner	= THIS_MODULE,
944 	},
945 	.probe		= wm8750_spi_probe,
946 	.remove		= __devexit_p(wm8750_spi_remove),
947 };
948 
949 static int wm8750_spi_write(struct spi_device *spi, const char *data, int len)
950 {
951 	struct spi_transfer t;
952 	struct spi_message m;
953 	u8 msg[2];
954 
955 	if (len <= 0)
956 		return 0;
957 
958 	msg[0] = data[0];
959 	msg[1] = data[1];
960 
961 	spi_message_init(&m);
962 	memset(&t, 0, (sizeof t));
963 
964 	t.tx_buf = &msg[0];
965 	t.len = len;
966 
967 	spi_message_add_tail(&t, &m);
968 	spi_sync(spi, &m);
969 
970 	return len;
971 }
972 #endif
973 
974 static int wm8750_probe(struct platform_device *pdev)
975 {
976 	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
977 	struct wm8750_setup_data *setup = socdev->codec_data;
978 	struct snd_soc_codec *codec;
979 	struct wm8750_priv *wm8750;
980 	int ret;
981 
982 	pr_info("WM8750 Audio Codec %s", WM8750_VERSION);
983 	codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
984 	if (codec == NULL)
985 		return -ENOMEM;
986 
987 	wm8750 = kzalloc(sizeof(struct wm8750_priv), GFP_KERNEL);
988 	if (wm8750 == NULL) {
989 		kfree(codec);
990 		return -ENOMEM;
991 	}
992 
993 	codec->private_data = wm8750;
994 	socdev->card->codec = codec;
995 	mutex_init(&codec->mutex);
996 	INIT_LIST_HEAD(&codec->dapm_widgets);
997 	INIT_LIST_HEAD(&codec->dapm_paths);
998 	wm8750_socdev = socdev;
999 	INIT_DELAYED_WORK(&codec->delayed_work, wm8750_work);
1000 
1001 	ret = -ENODEV;
1002 
1003 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1004 	if (setup->i2c_address) {
1005 		codec->hw_write = (hw_write_t)i2c_master_send;
1006 		ret = wm8750_add_i2c_device(pdev, setup);
1007 	}
1008 #endif
1009 #if defined(CONFIG_SPI_MASTER)
1010 	if (setup->spi) {
1011 		codec->hw_write = (hw_write_t)wm8750_spi_write;
1012 		ret = spi_register_driver(&wm8750_spi_driver);
1013 		if (ret != 0)
1014 			printk(KERN_ERR "can't add spi driver");
1015 	}
1016 #endif
1017 
1018 	if (ret != 0) {
1019 		kfree(codec->private_data);
1020 		kfree(codec);
1021 	}
1022 	return ret;
1023 }
1024 
1025 /*
1026  * This function forces any delayed work to be queued and run.
1027  */
1028 static int run_delayed_work(struct delayed_work *dwork)
1029 {
1030 	int ret;
1031 
1032 	/* cancel any work waiting to be queued. */
1033 	ret = cancel_delayed_work(dwork);
1034 
1035 	/* if there was any work waiting then we run it now and
1036 	 * wait for it's completion */
1037 	if (ret) {
1038 		schedule_delayed_work(dwork, 0);
1039 		flush_scheduled_work();
1040 	}
1041 	return ret;
1042 }
1043 
1044 /* power down chip */
1045 static int wm8750_remove(struct platform_device *pdev)
1046 {
1047 	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1048 	struct snd_soc_codec *codec = socdev->card->codec;
1049 
1050 	if (codec->control_data)
1051 		wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF);
1052 	run_delayed_work(&codec->delayed_work);
1053 	snd_soc_free_pcms(socdev);
1054 	snd_soc_dapm_free(socdev);
1055 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1056 	i2c_unregister_device(codec->control_data);
1057 	i2c_del_driver(&wm8750_i2c_driver);
1058 #endif
1059 #if defined(CONFIG_SPI_MASTER)
1060 	spi_unregister_driver(&wm8750_spi_driver);
1061 #endif
1062 	kfree(codec->private_data);
1063 	kfree(codec);
1064 
1065 	return 0;
1066 }
1067 
1068 struct snd_soc_codec_device soc_codec_dev_wm8750 = {
1069 	.probe = 	wm8750_probe,
1070 	.remove = 	wm8750_remove,
1071 	.suspend = 	wm8750_suspend,
1072 	.resume =	wm8750_resume,
1073 };
1074 EXPORT_SYMBOL_GPL(soc_codec_dev_wm8750);
1075 
1076 static int __init wm8750_modinit(void)
1077 {
1078 	return snd_soc_register_dai(&wm8750_dai);
1079 }
1080 module_init(wm8750_modinit);
1081 
1082 static void __exit wm8750_exit(void)
1083 {
1084 	snd_soc_unregister_dai(&wm8750_dai);
1085 }
1086 module_exit(wm8750_exit);
1087 
1088 MODULE_DESCRIPTION("ASoC WM8750 driver");
1089 MODULE_AUTHOR("Liam Girdwood");
1090 MODULE_LICENSE("GPL");
1091