1 /* 2 * wm8737.c -- WM8737 ALSA SoC Audio driver 3 * 4 * Copyright 2010 Wolfson Microelectronics plc 5 * 6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/module.h> 14 #include <linux/moduleparam.h> 15 #include <linux/init.h> 16 #include <linux/delay.h> 17 #include <linux/pm.h> 18 #include <linux/i2c.h> 19 #include <linux/regulator/consumer.h> 20 #include <linux/spi/spi.h> 21 #include <linux/slab.h> 22 #include <linux/of_device.h> 23 #include <sound/core.h> 24 #include <sound/pcm.h> 25 #include <sound/pcm_params.h> 26 #include <sound/soc.h> 27 #include <sound/soc-dapm.h> 28 #include <sound/initval.h> 29 #include <sound/tlv.h> 30 31 #include "wm8737.h" 32 33 #define WM8737_NUM_SUPPLIES 4 34 static const char *wm8737_supply_names[WM8737_NUM_SUPPLIES] = { 35 "DCVDD", 36 "DBVDD", 37 "AVDD", 38 "MVDD", 39 }; 40 41 /* codec private data */ 42 struct wm8737_priv { 43 enum snd_soc_control_type control_type; 44 struct regulator_bulk_data supplies[WM8737_NUM_SUPPLIES]; 45 unsigned int mclk; 46 }; 47 48 static const u16 wm8737_reg[WM8737_REGISTER_COUNT] = { 49 0x00C3, /* R0 - Left PGA volume */ 50 0x00C3, /* R1 - Right PGA volume */ 51 0x0007, /* R2 - AUDIO path L */ 52 0x0007, /* R3 - AUDIO path R */ 53 0x0000, /* R4 - 3D Enhance */ 54 0x0000, /* R5 - ADC Control */ 55 0x0000, /* R6 - Power Management */ 56 0x000A, /* R7 - Audio Format */ 57 0x0000, /* R8 - Clocking */ 58 0x000F, /* R9 - MIC Preamp Control */ 59 0x0003, /* R10 - Misc Bias Control */ 60 0x0000, /* R11 - Noise Gate */ 61 0x007C, /* R12 - ALC1 */ 62 0x0000, /* R13 - ALC2 */ 63 0x0032, /* R14 - ALC3 */ 64 }; 65 66 static int wm8737_reset(struct snd_soc_codec *codec) 67 { 68 return snd_soc_write(codec, WM8737_RESET, 0); 69 } 70 71 static const unsigned int micboost_tlv[] = { 72 TLV_DB_RANGE_HEAD(4), 73 0, 0, TLV_DB_SCALE_ITEM(1300, 0, 0), 74 1, 1, TLV_DB_SCALE_ITEM(1800, 0, 0), 75 2, 2, TLV_DB_SCALE_ITEM(2800, 0, 0), 76 3, 3, TLV_DB_SCALE_ITEM(3300, 0, 0), 77 }; 78 static const DECLARE_TLV_DB_SCALE(pga_tlv, -9750, 50, 1); 79 static const DECLARE_TLV_DB_SCALE(adc_tlv, -600, 600, 0); 80 static const DECLARE_TLV_DB_SCALE(ng_tlv, -7800, 600, 0); 81 static const DECLARE_TLV_DB_SCALE(alc_max_tlv, -1200, 600, 0); 82 static const DECLARE_TLV_DB_SCALE(alc_target_tlv, -1800, 100, 0); 83 84 static const char *micbias_enum_text[] = { 85 "25%", 86 "50%", 87 "75%", 88 "100%", 89 }; 90 91 static const struct soc_enum micbias_enum = 92 SOC_ENUM_SINGLE(WM8737_MIC_PREAMP_CONTROL, 0, 4, micbias_enum_text); 93 94 static const char *low_cutoff_text[] = { 95 "Low", "High" 96 }; 97 98 static const struct soc_enum low_3d = 99 SOC_ENUM_SINGLE(WM8737_3D_ENHANCE, 6, 2, low_cutoff_text); 100 101 static const char *high_cutoff_text[] = { 102 "High", "Low" 103 }; 104 105 static const struct soc_enum high_3d = 106 SOC_ENUM_SINGLE(WM8737_3D_ENHANCE, 5, 2, high_cutoff_text); 107 108 static const char *alc_fn_text[] = { 109 "Disabled", "Right", "Left", "Stereo" 110 }; 111 112 static const struct soc_enum alc_fn = 113 SOC_ENUM_SINGLE(WM8737_ALC1, 7, 4, alc_fn_text); 114 115 static const char *alc_hold_text[] = { 116 "0", "2.67ms", "5.33ms", "10.66ms", "21.32ms", "42.64ms", "85.28ms", 117 "170.56ms", "341.12ms", "682.24ms", "1.364s", "2.728s", "5.458s", 118 "10.916s", "21.832s", "43.691s" 119 }; 120 121 static const struct soc_enum alc_hold = 122 SOC_ENUM_SINGLE(WM8737_ALC2, 0, 16, alc_hold_text); 123 124 static const char *alc_atk_text[] = { 125 "8.4ms", "16.8ms", "33.6ms", "67.2ms", "134.4ms", "268.8ms", "537.6ms", 126 "1.075s", "2.15s", "4.3s", "8.6s" 127 }; 128 129 static const struct soc_enum alc_atk = 130 SOC_ENUM_SINGLE(WM8737_ALC3, 0, 11, alc_atk_text); 131 132 static const char *alc_dcy_text[] = { 133 "33.6ms", "67.2ms", "134.4ms", "268.8ms", "537.6ms", "1.075s", "2.15s", 134 "4.3s", "8.6s", "17.2s", "34.41s" 135 }; 136 137 static const struct soc_enum alc_dcy = 138 SOC_ENUM_SINGLE(WM8737_ALC3, 4, 11, alc_dcy_text); 139 140 static const struct snd_kcontrol_new wm8737_snd_controls[] = { 141 SOC_DOUBLE_R_TLV("Mic Boost Volume", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R, 142 6, 3, 0, micboost_tlv), 143 SOC_DOUBLE_R("Mic Boost Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R, 144 4, 1, 0), 145 SOC_DOUBLE("Mic ZC Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R, 146 3, 1, 0), 147 148 SOC_DOUBLE_R_TLV("Capture Volume", WM8737_LEFT_PGA_VOLUME, 149 WM8737_RIGHT_PGA_VOLUME, 0, 255, 0, pga_tlv), 150 SOC_DOUBLE("Capture ZC Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R, 151 2, 1, 0), 152 153 SOC_DOUBLE("INPUT1 DC Bias Switch", WM8737_MISC_BIAS_CONTROL, 0, 1, 1, 0), 154 155 SOC_ENUM("Mic PGA Bias", micbias_enum), 156 SOC_SINGLE("ADC Low Power Switch", WM8737_ADC_CONTROL, 2, 1, 0), 157 SOC_SINGLE("High Pass Filter Switch", WM8737_ADC_CONTROL, 0, 1, 1), 158 SOC_DOUBLE("Polarity Invert Switch", WM8737_ADC_CONTROL, 5, 6, 1, 0), 159 160 SOC_SINGLE("3D Switch", WM8737_3D_ENHANCE, 0, 1, 0), 161 SOC_SINGLE("3D Depth", WM8737_3D_ENHANCE, 1, 15, 0), 162 SOC_ENUM("3D Low Cut-off", low_3d), 163 SOC_ENUM("3D High Cut-off", low_3d), 164 SOC_SINGLE_TLV("3D ADC Volume", WM8737_3D_ENHANCE, 7, 1, 1, adc_tlv), 165 166 SOC_SINGLE("Noise Gate Switch", WM8737_NOISE_GATE, 0, 1, 0), 167 SOC_SINGLE_TLV("Noise Gate Threshold Volume", WM8737_NOISE_GATE, 2, 7, 0, 168 ng_tlv), 169 170 SOC_ENUM("ALC", alc_fn), 171 SOC_SINGLE_TLV("ALC Max Gain Volume", WM8737_ALC1, 4, 7, 0, alc_max_tlv), 172 SOC_SINGLE_TLV("ALC Target Volume", WM8737_ALC1, 0, 15, 0, alc_target_tlv), 173 SOC_ENUM("ALC Hold Time", alc_hold), 174 SOC_SINGLE("ALC ZC Switch", WM8737_ALC2, 4, 1, 0), 175 SOC_ENUM("ALC Attack Time", alc_atk), 176 SOC_ENUM("ALC Decay Time", alc_dcy), 177 }; 178 179 static const char *linsel_text[] = { 180 "LINPUT1", "LINPUT2", "LINPUT3", "LINPUT1 DC", 181 }; 182 183 static const struct soc_enum linsel_enum = 184 SOC_ENUM_SINGLE(WM8737_AUDIO_PATH_L, 7, 4, linsel_text); 185 186 static const struct snd_kcontrol_new linsel_mux = 187 SOC_DAPM_ENUM("LINSEL", linsel_enum); 188 189 190 static const char *rinsel_text[] = { 191 "RINPUT1", "RINPUT2", "RINPUT3", "RINPUT1 DC", 192 }; 193 194 static const struct soc_enum rinsel_enum = 195 SOC_ENUM_SINGLE(WM8737_AUDIO_PATH_R, 7, 4, rinsel_text); 196 197 static const struct snd_kcontrol_new rinsel_mux = 198 SOC_DAPM_ENUM("RINSEL", rinsel_enum); 199 200 static const char *bypass_text[] = { 201 "Direct", "Preamp" 202 }; 203 204 static const struct soc_enum lbypass_enum = 205 SOC_ENUM_SINGLE(WM8737_MIC_PREAMP_CONTROL, 2, 2, bypass_text); 206 207 static const struct snd_kcontrol_new lbypass_mux = 208 SOC_DAPM_ENUM("Left Bypass", lbypass_enum); 209 210 211 static const struct soc_enum rbypass_enum = 212 SOC_ENUM_SINGLE(WM8737_MIC_PREAMP_CONTROL, 3, 2, bypass_text); 213 214 static const struct snd_kcontrol_new rbypass_mux = 215 SOC_DAPM_ENUM("Left Bypass", rbypass_enum); 216 217 static const struct snd_soc_dapm_widget wm8737_dapm_widgets[] = { 218 SND_SOC_DAPM_INPUT("LINPUT1"), 219 SND_SOC_DAPM_INPUT("LINPUT2"), 220 SND_SOC_DAPM_INPUT("LINPUT3"), 221 SND_SOC_DAPM_INPUT("RINPUT1"), 222 SND_SOC_DAPM_INPUT("RINPUT2"), 223 SND_SOC_DAPM_INPUT("RINPUT3"), 224 SND_SOC_DAPM_INPUT("LACIN"), 225 SND_SOC_DAPM_INPUT("RACIN"), 226 227 SND_SOC_DAPM_MUX("LINSEL", SND_SOC_NOPM, 0, 0, &linsel_mux), 228 SND_SOC_DAPM_MUX("RINSEL", SND_SOC_NOPM, 0, 0, &rinsel_mux), 229 230 SND_SOC_DAPM_MUX("Left Preamp Mux", SND_SOC_NOPM, 0, 0, &lbypass_mux), 231 SND_SOC_DAPM_MUX("Right Preamp Mux", SND_SOC_NOPM, 0, 0, &rbypass_mux), 232 233 SND_SOC_DAPM_PGA("PGAL", WM8737_POWER_MANAGEMENT, 5, 0, NULL, 0), 234 SND_SOC_DAPM_PGA("PGAR", WM8737_POWER_MANAGEMENT, 4, 0, NULL, 0), 235 236 SND_SOC_DAPM_DAC("ADCL", NULL, WM8737_POWER_MANAGEMENT, 3, 0), 237 SND_SOC_DAPM_DAC("ADCR", NULL, WM8737_POWER_MANAGEMENT, 2, 0), 238 239 SND_SOC_DAPM_AIF_OUT("AIF", "Capture", 0, WM8737_POWER_MANAGEMENT, 6, 0), 240 }; 241 242 static const struct snd_soc_dapm_route intercon[] = { 243 { "LINSEL", "LINPUT1", "LINPUT1" }, 244 { "LINSEL", "LINPUT2", "LINPUT2" }, 245 { "LINSEL", "LINPUT3", "LINPUT3" }, 246 { "LINSEL", "LINPUT1 DC", "LINPUT1" }, 247 248 { "RINSEL", "RINPUT1", "RINPUT1" }, 249 { "RINSEL", "RINPUT2", "RINPUT2" }, 250 { "RINSEL", "RINPUT3", "RINPUT3" }, 251 { "RINSEL", "RINPUT1 DC", "RINPUT1" }, 252 253 { "Left Preamp Mux", "Preamp", "LINSEL" }, 254 { "Left Preamp Mux", "Direct", "LACIN" }, 255 256 { "Right Preamp Mux", "Preamp", "RINSEL" }, 257 { "Right Preamp Mux", "Direct", "RACIN" }, 258 259 { "PGAL", NULL, "Left Preamp Mux" }, 260 { "PGAR", NULL, "Right Preamp Mux" }, 261 262 { "ADCL", NULL, "PGAL" }, 263 { "ADCR", NULL, "PGAR" }, 264 265 { "AIF", NULL, "ADCL" }, 266 { "AIF", NULL, "ADCR" }, 267 }; 268 269 static int wm8737_add_widgets(struct snd_soc_codec *codec) 270 { 271 struct snd_soc_dapm_context *dapm = &codec->dapm; 272 273 snd_soc_dapm_new_controls(dapm, wm8737_dapm_widgets, 274 ARRAY_SIZE(wm8737_dapm_widgets)); 275 snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon)); 276 277 return 0; 278 } 279 280 /* codec mclk clock divider coefficients */ 281 static const struct { 282 u32 mclk; 283 u32 rate; 284 u8 usb; 285 u8 sr; 286 } coeff_div[] = { 287 { 12288000, 8000, 0, 0x4 }, 288 { 12288000, 12000, 0, 0x8 }, 289 { 12288000, 16000, 0, 0xa }, 290 { 12288000, 24000, 0, 0x1c }, 291 { 12288000, 32000, 0, 0xc }, 292 { 12288000, 48000, 0, 0 }, 293 { 12288000, 96000, 0, 0xe }, 294 295 { 11289600, 8000, 0, 0x14 }, 296 { 11289600, 11025, 0, 0x18 }, 297 { 11289600, 22050, 0, 0x1a }, 298 { 11289600, 44100, 0, 0x10 }, 299 { 11289600, 88200, 0, 0x1e }, 300 301 { 18432000, 8000, 0, 0x5 }, 302 { 18432000, 12000, 0, 0x9 }, 303 { 18432000, 16000, 0, 0xb }, 304 { 18432000, 24000, 0, 0x1b }, 305 { 18432000, 32000, 0, 0xd }, 306 { 18432000, 48000, 0, 0x1 }, 307 { 18432000, 96000, 0, 0x1f }, 308 309 { 16934400, 8000, 0, 0x15 }, 310 { 16934400, 11025, 0, 0x19 }, 311 { 16934400, 22050, 0, 0x1b }, 312 { 16934400, 44100, 0, 0x11 }, 313 { 16934400, 88200, 0, 0x1f }, 314 315 { 12000000, 8000, 1, 0x4 }, 316 { 12000000, 11025, 1, 0x19 }, 317 { 12000000, 12000, 1, 0x8 }, 318 { 12000000, 16000, 1, 0xa }, 319 { 12000000, 22050, 1, 0x1b }, 320 { 12000000, 24000, 1, 0x1c }, 321 { 12000000, 32000, 1, 0xc }, 322 { 12000000, 44100, 1, 0x11 }, 323 { 12000000, 48000, 1, 0x0 }, 324 { 12000000, 88200, 1, 0x1f }, 325 { 12000000, 96000, 1, 0xe }, 326 }; 327 328 static int wm8737_hw_params(struct snd_pcm_substream *substream, 329 struct snd_pcm_hw_params *params, 330 struct snd_soc_dai *dai) 331 { 332 struct snd_soc_codec *codec = dai->codec; 333 struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec); 334 int i; 335 u16 clocking = 0; 336 u16 af = 0; 337 338 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { 339 if (coeff_div[i].rate != params_rate(params)) 340 continue; 341 342 if (coeff_div[i].mclk == wm8737->mclk) 343 break; 344 345 if (coeff_div[i].mclk == wm8737->mclk * 2) { 346 clocking |= WM8737_CLKDIV2; 347 break; 348 } 349 } 350 351 if (i == ARRAY_SIZE(coeff_div)) { 352 dev_err(codec->dev, "%dHz MCLK can't support %dHz\n", 353 wm8737->mclk, params_rate(params)); 354 return -EINVAL; 355 } 356 357 clocking |= coeff_div[i].usb | (coeff_div[i].sr << WM8737_SR_SHIFT); 358 359 switch (params_format(params)) { 360 case SNDRV_PCM_FORMAT_S16_LE: 361 break; 362 case SNDRV_PCM_FORMAT_S20_3LE: 363 af |= 0x8; 364 break; 365 case SNDRV_PCM_FORMAT_S24_LE: 366 af |= 0x10; 367 break; 368 case SNDRV_PCM_FORMAT_S32_LE: 369 af |= 0x18; 370 break; 371 default: 372 return -EINVAL; 373 } 374 375 snd_soc_update_bits(codec, WM8737_AUDIO_FORMAT, WM8737_WL_MASK, af); 376 snd_soc_update_bits(codec, WM8737_CLOCKING, 377 WM8737_USB_MODE | WM8737_CLKDIV2 | WM8737_SR_MASK, 378 clocking); 379 380 return 0; 381 } 382 383 static int wm8737_set_dai_sysclk(struct snd_soc_dai *codec_dai, 384 int clk_id, unsigned int freq, int dir) 385 { 386 struct snd_soc_codec *codec = codec_dai->codec; 387 struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec); 388 int i; 389 390 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { 391 if (freq == coeff_div[i].mclk || 392 freq == coeff_div[i].mclk * 2) { 393 wm8737->mclk = freq; 394 return 0; 395 } 396 } 397 398 dev_err(codec->dev, "MCLK rate %dHz not supported\n", freq); 399 400 return -EINVAL; 401 } 402 403 404 static int wm8737_set_dai_fmt(struct snd_soc_dai *codec_dai, 405 unsigned int fmt) 406 { 407 struct snd_soc_codec *codec = codec_dai->codec; 408 u16 af = 0; 409 410 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 411 case SND_SOC_DAIFMT_CBM_CFM: 412 af |= WM8737_MS; 413 break; 414 case SND_SOC_DAIFMT_CBS_CFS: 415 break; 416 default: 417 return -EINVAL; 418 } 419 420 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 421 case SND_SOC_DAIFMT_I2S: 422 af |= 0x2; 423 break; 424 case SND_SOC_DAIFMT_RIGHT_J: 425 break; 426 case SND_SOC_DAIFMT_LEFT_J: 427 af |= 0x1; 428 break; 429 case SND_SOC_DAIFMT_DSP_A: 430 af |= 0x3; 431 break; 432 case SND_SOC_DAIFMT_DSP_B: 433 af |= 0x13; 434 break; 435 default: 436 return -EINVAL; 437 } 438 439 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 440 case SND_SOC_DAIFMT_NB_NF: 441 break; 442 case SND_SOC_DAIFMT_NB_IF: 443 af |= WM8737_LRP; 444 break; 445 default: 446 return -EINVAL; 447 } 448 449 snd_soc_update_bits(codec, WM8737_AUDIO_FORMAT, 450 WM8737_FORMAT_MASK | WM8737_LRP | WM8737_MS, af); 451 452 return 0; 453 } 454 455 static int wm8737_set_bias_level(struct snd_soc_codec *codec, 456 enum snd_soc_bias_level level) 457 { 458 struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec); 459 int ret; 460 461 switch (level) { 462 case SND_SOC_BIAS_ON: 463 break; 464 465 case SND_SOC_BIAS_PREPARE: 466 /* VMID at 2*75k */ 467 snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL, 468 WM8737_VMIDSEL_MASK, 0); 469 break; 470 471 case SND_SOC_BIAS_STANDBY: 472 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { 473 ret = regulator_bulk_enable(ARRAY_SIZE(wm8737->supplies), 474 wm8737->supplies); 475 if (ret != 0) { 476 dev_err(codec->dev, 477 "Failed to enable supplies: %d\n", 478 ret); 479 return ret; 480 } 481 482 snd_soc_cache_sync(codec); 483 484 /* Fast VMID ramp at 2*2.5k */ 485 snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL, 486 WM8737_VMIDSEL_MASK, 0x4); 487 488 /* Bring VMID up */ 489 snd_soc_update_bits(codec, WM8737_POWER_MANAGEMENT, 490 WM8737_VMID_MASK | 491 WM8737_VREF_MASK, 492 WM8737_VMID_MASK | 493 WM8737_VREF_MASK); 494 495 msleep(500); 496 } 497 498 /* VMID at 2*300k */ 499 snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL, 500 WM8737_VMIDSEL_MASK, 2); 501 502 break; 503 504 case SND_SOC_BIAS_OFF: 505 snd_soc_update_bits(codec, WM8737_POWER_MANAGEMENT, 506 WM8737_VMID_MASK | WM8737_VREF_MASK, 0); 507 508 regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies), 509 wm8737->supplies); 510 break; 511 } 512 513 codec->dapm.bias_level = level; 514 return 0; 515 } 516 517 #define WM8737_RATES SNDRV_PCM_RATE_8000_96000 518 519 #define WM8737_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 520 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) 521 522 static const struct snd_soc_dai_ops wm8737_dai_ops = { 523 .hw_params = wm8737_hw_params, 524 .set_sysclk = wm8737_set_dai_sysclk, 525 .set_fmt = wm8737_set_dai_fmt, 526 }; 527 528 static struct snd_soc_dai_driver wm8737_dai = { 529 .name = "wm8737", 530 .capture = { 531 .stream_name = "Capture", 532 .channels_min = 2, /* Mono modes not yet supported */ 533 .channels_max = 2, 534 .rates = WM8737_RATES, 535 .formats = WM8737_FORMATS, 536 }, 537 .ops = &wm8737_dai_ops, 538 }; 539 540 #ifdef CONFIG_PM 541 static int wm8737_suspend(struct snd_soc_codec *codec) 542 { 543 wm8737_set_bias_level(codec, SND_SOC_BIAS_OFF); 544 return 0; 545 } 546 547 static int wm8737_resume(struct snd_soc_codec *codec) 548 { 549 wm8737_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 550 return 0; 551 } 552 #else 553 #define wm8737_suspend NULL 554 #define wm8737_resume NULL 555 #endif 556 557 static int wm8737_probe(struct snd_soc_codec *codec) 558 { 559 struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec); 560 int ret, i; 561 562 ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8737->control_type); 563 if (ret != 0) { 564 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); 565 return ret; 566 } 567 568 for (i = 0; i < ARRAY_SIZE(wm8737->supplies); i++) 569 wm8737->supplies[i].supply = wm8737_supply_names[i]; 570 571 ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8737->supplies), 572 wm8737->supplies); 573 if (ret != 0) { 574 dev_err(codec->dev, "Failed to request supplies: %d\n", ret); 575 return ret; 576 } 577 578 ret = regulator_bulk_enable(ARRAY_SIZE(wm8737->supplies), 579 wm8737->supplies); 580 if (ret != 0) { 581 dev_err(codec->dev, "Failed to enable supplies: %d\n", ret); 582 goto err_get; 583 } 584 585 ret = wm8737_reset(codec); 586 if (ret < 0) { 587 dev_err(codec->dev, "Failed to issue reset\n"); 588 goto err_enable; 589 } 590 591 snd_soc_update_bits(codec, WM8737_LEFT_PGA_VOLUME, WM8737_LVU, 592 WM8737_LVU); 593 snd_soc_update_bits(codec, WM8737_RIGHT_PGA_VOLUME, WM8737_RVU, 594 WM8737_RVU); 595 596 wm8737_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 597 598 /* Bias level configuration will have done an extra enable */ 599 regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies), wm8737->supplies); 600 601 snd_soc_add_codec_controls(codec, wm8737_snd_controls, 602 ARRAY_SIZE(wm8737_snd_controls)); 603 wm8737_add_widgets(codec); 604 605 return 0; 606 607 err_enable: 608 regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies), wm8737->supplies); 609 err_get: 610 regulator_bulk_free(ARRAY_SIZE(wm8737->supplies), wm8737->supplies); 611 612 return ret; 613 } 614 615 static int wm8737_remove(struct snd_soc_codec *codec) 616 { 617 struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec); 618 619 wm8737_set_bias_level(codec, SND_SOC_BIAS_OFF); 620 regulator_bulk_free(ARRAY_SIZE(wm8737->supplies), wm8737->supplies); 621 return 0; 622 } 623 624 static struct snd_soc_codec_driver soc_codec_dev_wm8737 = { 625 .probe = wm8737_probe, 626 .remove = wm8737_remove, 627 .suspend = wm8737_suspend, 628 .resume = wm8737_resume, 629 .set_bias_level = wm8737_set_bias_level, 630 631 .reg_cache_size = WM8737_REGISTER_COUNT - 1, /* Skip reset */ 632 .reg_word_size = sizeof(u16), 633 .reg_cache_default = wm8737_reg, 634 }; 635 636 static const struct of_device_id wm8737_of_match[] = { 637 { .compatible = "wlf,wm8737", }, 638 { } 639 }; 640 641 MODULE_DEVICE_TABLE(of, wm8737_of_match); 642 643 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 644 static __devinit int wm8737_i2c_probe(struct i2c_client *i2c, 645 const struct i2c_device_id *id) 646 { 647 struct wm8737_priv *wm8737; 648 int ret; 649 650 wm8737 = kzalloc(sizeof(struct wm8737_priv), GFP_KERNEL); 651 if (wm8737 == NULL) 652 return -ENOMEM; 653 654 i2c_set_clientdata(i2c, wm8737); 655 wm8737->control_type = SND_SOC_I2C; 656 657 ret = snd_soc_register_codec(&i2c->dev, 658 &soc_codec_dev_wm8737, &wm8737_dai, 1); 659 if (ret < 0) 660 kfree(wm8737); 661 return ret; 662 663 } 664 665 static __devexit int wm8737_i2c_remove(struct i2c_client *client) 666 { 667 snd_soc_unregister_codec(&client->dev); 668 kfree(i2c_get_clientdata(client)); 669 return 0; 670 } 671 672 static const struct i2c_device_id wm8737_i2c_id[] = { 673 { "wm8737", 0 }, 674 { } 675 }; 676 MODULE_DEVICE_TABLE(i2c, wm8737_i2c_id); 677 678 static struct i2c_driver wm8737_i2c_driver = { 679 .driver = { 680 .name = "wm8737", 681 .owner = THIS_MODULE, 682 .of_match_table = wm8737_of_match, 683 }, 684 .probe = wm8737_i2c_probe, 685 .remove = __devexit_p(wm8737_i2c_remove), 686 .id_table = wm8737_i2c_id, 687 }; 688 #endif 689 690 #if defined(CONFIG_SPI_MASTER) 691 static int __devinit wm8737_spi_probe(struct spi_device *spi) 692 { 693 struct wm8737_priv *wm8737; 694 int ret; 695 696 wm8737 = kzalloc(sizeof(struct wm8737_priv), GFP_KERNEL); 697 if (wm8737 == NULL) 698 return -ENOMEM; 699 700 wm8737->control_type = SND_SOC_SPI; 701 spi_set_drvdata(spi, wm8737); 702 703 ret = snd_soc_register_codec(&spi->dev, 704 &soc_codec_dev_wm8737, &wm8737_dai, 1); 705 if (ret < 0) 706 kfree(wm8737); 707 return ret; 708 } 709 710 static int __devexit wm8737_spi_remove(struct spi_device *spi) 711 { 712 snd_soc_unregister_codec(&spi->dev); 713 kfree(spi_get_drvdata(spi)); 714 return 0; 715 } 716 717 static struct spi_driver wm8737_spi_driver = { 718 .driver = { 719 .name = "wm8737", 720 .owner = THIS_MODULE, 721 .of_match_table = wm8737_of_match, 722 }, 723 .probe = wm8737_spi_probe, 724 .remove = __devexit_p(wm8737_spi_remove), 725 }; 726 #endif /* CONFIG_SPI_MASTER */ 727 728 static int __init wm8737_modinit(void) 729 { 730 int ret; 731 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 732 ret = i2c_add_driver(&wm8737_i2c_driver); 733 if (ret != 0) { 734 printk(KERN_ERR "Failed to register WM8737 I2C driver: %d\n", 735 ret); 736 } 737 #endif 738 #if defined(CONFIG_SPI_MASTER) 739 ret = spi_register_driver(&wm8737_spi_driver); 740 if (ret != 0) { 741 printk(KERN_ERR "Failed to register WM8737 SPI driver: %d\n", 742 ret); 743 } 744 #endif 745 return 0; 746 } 747 module_init(wm8737_modinit); 748 749 static void __exit wm8737_exit(void) 750 { 751 #if defined(CONFIG_SPI_MASTER) 752 spi_unregister_driver(&wm8737_spi_driver); 753 #endif 754 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 755 i2c_del_driver(&wm8737_i2c_driver); 756 #endif 757 } 758 module_exit(wm8737_exit); 759 760 MODULE_DESCRIPTION("ASoC WM8737 driver"); 761 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); 762 MODULE_LICENSE("GPL"); 763