1*1dcf98ffSMark Brown /* 2*1dcf98ffSMark Brown * wm8523.h -- WM8423 ASoC driver 3*1dcf98ffSMark Brown * 4*1dcf98ffSMark Brown * Copyright 2009 Wolfson Microelectronics, plc 5*1dcf98ffSMark Brown * 6*1dcf98ffSMark Brown * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 7*1dcf98ffSMark Brown * 8*1dcf98ffSMark Brown * Based on wm8753.h 9*1dcf98ffSMark Brown * 10*1dcf98ffSMark Brown * This program is free software; you can redistribute it and/or modify 11*1dcf98ffSMark Brown * it under the terms of the GNU General Public License version 2 as 12*1dcf98ffSMark Brown * published by the Free Software Foundation. 13*1dcf98ffSMark Brown */ 14*1dcf98ffSMark Brown 15*1dcf98ffSMark Brown #ifndef _WM8523_H 16*1dcf98ffSMark Brown #define _WM8523_H 17*1dcf98ffSMark Brown 18*1dcf98ffSMark Brown /* 19*1dcf98ffSMark Brown * Register values. 20*1dcf98ffSMark Brown */ 21*1dcf98ffSMark Brown #define WM8523_DEVICE_ID 0x00 22*1dcf98ffSMark Brown #define WM8523_REVISION 0x01 23*1dcf98ffSMark Brown #define WM8523_PSCTRL1 0x02 24*1dcf98ffSMark Brown #define WM8523_AIF_CTRL1 0x03 25*1dcf98ffSMark Brown #define WM8523_AIF_CTRL2 0x04 26*1dcf98ffSMark Brown #define WM8523_DAC_CTRL3 0x05 27*1dcf98ffSMark Brown #define WM8523_DAC_GAINL 0x06 28*1dcf98ffSMark Brown #define WM8523_DAC_GAINR 0x07 29*1dcf98ffSMark Brown #define WM8523_ZERO_DETECT 0x08 30*1dcf98ffSMark Brown 31*1dcf98ffSMark Brown #define WM8523_REGISTER_COUNT 9 32*1dcf98ffSMark Brown #define WM8523_MAX_REGISTER 0x08 33*1dcf98ffSMark Brown 34*1dcf98ffSMark Brown /* 35*1dcf98ffSMark Brown * Field Definitions. 36*1dcf98ffSMark Brown */ 37*1dcf98ffSMark Brown 38*1dcf98ffSMark Brown /* 39*1dcf98ffSMark Brown * R0 (0x00) - DEVICE_ID 40*1dcf98ffSMark Brown */ 41*1dcf98ffSMark Brown #define WM8523_CHIP_ID_MASK 0xFFFF /* CHIP_ID - [15:0] */ 42*1dcf98ffSMark Brown #define WM8523_CHIP_ID_SHIFT 0 /* CHIP_ID - [15:0] */ 43*1dcf98ffSMark Brown #define WM8523_CHIP_ID_WIDTH 16 /* CHIP_ID - [15:0] */ 44*1dcf98ffSMark Brown 45*1dcf98ffSMark Brown /* 46*1dcf98ffSMark Brown * R1 (0x01) - REVISION 47*1dcf98ffSMark Brown */ 48*1dcf98ffSMark Brown #define WM8523_CHIP_REV_MASK 0x0007 /* CHIP_REV - [2:0] */ 49*1dcf98ffSMark Brown #define WM8523_CHIP_REV_SHIFT 0 /* CHIP_REV - [2:0] */ 50*1dcf98ffSMark Brown #define WM8523_CHIP_REV_WIDTH 3 /* CHIP_REV - [2:0] */ 51*1dcf98ffSMark Brown 52*1dcf98ffSMark Brown /* 53*1dcf98ffSMark Brown * R2 (0x02) - PSCTRL1 54*1dcf98ffSMark Brown */ 55*1dcf98ffSMark Brown #define WM8523_SYS_ENA_MASK 0x0003 /* SYS_ENA - [1:0] */ 56*1dcf98ffSMark Brown #define WM8523_SYS_ENA_SHIFT 0 /* SYS_ENA - [1:0] */ 57*1dcf98ffSMark Brown #define WM8523_SYS_ENA_WIDTH 2 /* SYS_ENA - [1:0] */ 58*1dcf98ffSMark Brown 59*1dcf98ffSMark Brown /* 60*1dcf98ffSMark Brown * R3 (0x03) - AIF_CTRL1 61*1dcf98ffSMark Brown */ 62*1dcf98ffSMark Brown #define WM8523_TDM_MODE_MASK 0x1800 /* TDM_MODE - [12:11] */ 63*1dcf98ffSMark Brown #define WM8523_TDM_MODE_SHIFT 11 /* TDM_MODE - [12:11] */ 64*1dcf98ffSMark Brown #define WM8523_TDM_MODE_WIDTH 2 /* TDM_MODE - [12:11] */ 65*1dcf98ffSMark Brown #define WM8523_TDM_SLOT_MASK 0x0600 /* TDM_SLOT - [10:9] */ 66*1dcf98ffSMark Brown #define WM8523_TDM_SLOT_SHIFT 9 /* TDM_SLOT - [10:9] */ 67*1dcf98ffSMark Brown #define WM8523_TDM_SLOT_WIDTH 2 /* TDM_SLOT - [10:9] */ 68*1dcf98ffSMark Brown #define WM8523_DEEMPH 0x0100 /* DEEMPH */ 69*1dcf98ffSMark Brown #define WM8523_DEEMPH_MASK 0x0100 /* DEEMPH */ 70*1dcf98ffSMark Brown #define WM8523_DEEMPH_SHIFT 8 /* DEEMPH */ 71*1dcf98ffSMark Brown #define WM8523_DEEMPH_WIDTH 1 /* DEEMPH */ 72*1dcf98ffSMark Brown #define WM8523_AIF_MSTR 0x0080 /* AIF_MSTR */ 73*1dcf98ffSMark Brown #define WM8523_AIF_MSTR_MASK 0x0080 /* AIF_MSTR */ 74*1dcf98ffSMark Brown #define WM8523_AIF_MSTR_SHIFT 7 /* AIF_MSTR */ 75*1dcf98ffSMark Brown #define WM8523_AIF_MSTR_WIDTH 1 /* AIF_MSTR */ 76*1dcf98ffSMark Brown #define WM8523_LRCLK_INV 0x0040 /* LRCLK_INV */ 77*1dcf98ffSMark Brown #define WM8523_LRCLK_INV_MASK 0x0040 /* LRCLK_INV */ 78*1dcf98ffSMark Brown #define WM8523_LRCLK_INV_SHIFT 6 /* LRCLK_INV */ 79*1dcf98ffSMark Brown #define WM8523_LRCLK_INV_WIDTH 1 /* LRCLK_INV */ 80*1dcf98ffSMark Brown #define WM8523_BCLK_INV 0x0020 /* BCLK_INV */ 81*1dcf98ffSMark Brown #define WM8523_BCLK_INV_MASK 0x0020 /* BCLK_INV */ 82*1dcf98ffSMark Brown #define WM8523_BCLK_INV_SHIFT 5 /* BCLK_INV */ 83*1dcf98ffSMark Brown #define WM8523_BCLK_INV_WIDTH 1 /* BCLK_INV */ 84*1dcf98ffSMark Brown #define WM8523_WL_MASK 0x0018 /* WL - [4:3] */ 85*1dcf98ffSMark Brown #define WM8523_WL_SHIFT 3 /* WL - [4:3] */ 86*1dcf98ffSMark Brown #define WM8523_WL_WIDTH 2 /* WL - [4:3] */ 87*1dcf98ffSMark Brown #define WM8523_FMT_MASK 0x0007 /* FMT - [2:0] */ 88*1dcf98ffSMark Brown #define WM8523_FMT_SHIFT 0 /* FMT - [2:0] */ 89*1dcf98ffSMark Brown #define WM8523_FMT_WIDTH 3 /* FMT - [2:0] */ 90*1dcf98ffSMark Brown 91*1dcf98ffSMark Brown /* 92*1dcf98ffSMark Brown * R4 (0x04) - AIF_CTRL2 93*1dcf98ffSMark Brown */ 94*1dcf98ffSMark Brown #define WM8523_DAC_OP_MUX_MASK 0x00C0 /* DAC_OP_MUX - [7:6] */ 95*1dcf98ffSMark Brown #define WM8523_DAC_OP_MUX_SHIFT 6 /* DAC_OP_MUX - [7:6] */ 96*1dcf98ffSMark Brown #define WM8523_DAC_OP_MUX_WIDTH 2 /* DAC_OP_MUX - [7:6] */ 97*1dcf98ffSMark Brown #define WM8523_BCLKDIV_MASK 0x0038 /* BCLKDIV - [5:3] */ 98*1dcf98ffSMark Brown #define WM8523_BCLKDIV_SHIFT 3 /* BCLKDIV - [5:3] */ 99*1dcf98ffSMark Brown #define WM8523_BCLKDIV_WIDTH 3 /* BCLKDIV - [5:3] */ 100*1dcf98ffSMark Brown #define WM8523_SR_MASK 0x0007 /* SR - [2:0] */ 101*1dcf98ffSMark Brown #define WM8523_SR_SHIFT 0 /* SR - [2:0] */ 102*1dcf98ffSMark Brown #define WM8523_SR_WIDTH 3 /* SR - [2:0] */ 103*1dcf98ffSMark Brown 104*1dcf98ffSMark Brown /* 105*1dcf98ffSMark Brown * R5 (0x05) - DAC_CTRL3 106*1dcf98ffSMark Brown */ 107*1dcf98ffSMark Brown #define WM8523_ZC 0x0010 /* ZC */ 108*1dcf98ffSMark Brown #define WM8523_ZC_MASK 0x0010 /* ZC */ 109*1dcf98ffSMark Brown #define WM8523_ZC_SHIFT 4 /* ZC */ 110*1dcf98ffSMark Brown #define WM8523_ZC_WIDTH 1 /* ZC */ 111*1dcf98ffSMark Brown #define WM8523_DACR 0x0008 /* DACR */ 112*1dcf98ffSMark Brown #define WM8523_DACR_MASK 0x0008 /* DACR */ 113*1dcf98ffSMark Brown #define WM8523_DACR_SHIFT 3 /* DACR */ 114*1dcf98ffSMark Brown #define WM8523_DACR_WIDTH 1 /* DACR */ 115*1dcf98ffSMark Brown #define WM8523_DACL 0x0004 /* DACL */ 116*1dcf98ffSMark Brown #define WM8523_DACL_MASK 0x0004 /* DACL */ 117*1dcf98ffSMark Brown #define WM8523_DACL_SHIFT 2 /* DACL */ 118*1dcf98ffSMark Brown #define WM8523_DACL_WIDTH 1 /* DACL */ 119*1dcf98ffSMark Brown #define WM8523_VOL_UP_RAMP 0x0002 /* VOL_UP_RAMP */ 120*1dcf98ffSMark Brown #define WM8523_VOL_UP_RAMP_MASK 0x0002 /* VOL_UP_RAMP */ 121*1dcf98ffSMark Brown #define WM8523_VOL_UP_RAMP_SHIFT 1 /* VOL_UP_RAMP */ 122*1dcf98ffSMark Brown #define WM8523_VOL_UP_RAMP_WIDTH 1 /* VOL_UP_RAMP */ 123*1dcf98ffSMark Brown #define WM8523_VOL_DOWN_RAMP 0x0001 /* VOL_DOWN_RAMP */ 124*1dcf98ffSMark Brown #define WM8523_VOL_DOWN_RAMP_MASK 0x0001 /* VOL_DOWN_RAMP */ 125*1dcf98ffSMark Brown #define WM8523_VOL_DOWN_RAMP_SHIFT 0 /* VOL_DOWN_RAMP */ 126*1dcf98ffSMark Brown #define WM8523_VOL_DOWN_RAMP_WIDTH 1 /* VOL_DOWN_RAMP */ 127*1dcf98ffSMark Brown 128*1dcf98ffSMark Brown /* 129*1dcf98ffSMark Brown * R6 (0x06) - DAC_GAINL 130*1dcf98ffSMark Brown */ 131*1dcf98ffSMark Brown #define WM8523_DACL_VU 0x0200 /* DACL_VU */ 132*1dcf98ffSMark Brown #define WM8523_DACL_VU_MASK 0x0200 /* DACL_VU */ 133*1dcf98ffSMark Brown #define WM8523_DACL_VU_SHIFT 9 /* DACL_VU */ 134*1dcf98ffSMark Brown #define WM8523_DACL_VU_WIDTH 1 /* DACL_VU */ 135*1dcf98ffSMark Brown #define WM8523_DACL_VOL_MASK 0x01FF /* DACL_VOL - [8:0] */ 136*1dcf98ffSMark Brown #define WM8523_DACL_VOL_SHIFT 0 /* DACL_VOL - [8:0] */ 137*1dcf98ffSMark Brown #define WM8523_DACL_VOL_WIDTH 9 /* DACL_VOL - [8:0] */ 138*1dcf98ffSMark Brown 139*1dcf98ffSMark Brown /* 140*1dcf98ffSMark Brown * R7 (0x07) - DAC_GAINR 141*1dcf98ffSMark Brown */ 142*1dcf98ffSMark Brown #define WM8523_DACR_VU 0x0200 /* DACR_VU */ 143*1dcf98ffSMark Brown #define WM8523_DACR_VU_MASK 0x0200 /* DACR_VU */ 144*1dcf98ffSMark Brown #define WM8523_DACR_VU_SHIFT 9 /* DACR_VU */ 145*1dcf98ffSMark Brown #define WM8523_DACR_VU_WIDTH 1 /* DACR_VU */ 146*1dcf98ffSMark Brown #define WM8523_DACR_VOL_MASK 0x01FF /* DACR_VOL - [8:0] */ 147*1dcf98ffSMark Brown #define WM8523_DACR_VOL_SHIFT 0 /* DACR_VOL - [8:0] */ 148*1dcf98ffSMark Brown #define WM8523_DACR_VOL_WIDTH 9 /* DACR_VOL - [8:0] */ 149*1dcf98ffSMark Brown 150*1dcf98ffSMark Brown /* 151*1dcf98ffSMark Brown * R8 (0x08) - ZERO_DETECT 152*1dcf98ffSMark Brown */ 153*1dcf98ffSMark Brown #define WM8523_ZD_COUNT_MASK 0x0003 /* ZD_COUNT - [1:0] */ 154*1dcf98ffSMark Brown #define WM8523_ZD_COUNT_SHIFT 0 /* ZD_COUNT - [1:0] */ 155*1dcf98ffSMark Brown #define WM8523_ZD_COUNT_WIDTH 2 /* ZD_COUNT - [1:0] */ 156*1dcf98ffSMark Brown 157*1dcf98ffSMark Brown extern struct snd_soc_dai wm8523_dai; 158*1dcf98ffSMark Brown extern struct snd_soc_codec_device soc_codec_dev_wm8523; 159*1dcf98ffSMark Brown 160*1dcf98ffSMark Brown #endif 161