xref: /linux/sound/soc/codecs/wm8510.h (revision 5d421516670e8009436e299bd25cff1a6d3a4707)
1*5d421516SMark Brown /*
2*5d421516SMark Brown  * wm8510.h  --  WM8510 Soc Audio driver
3*5d421516SMark Brown  *
4*5d421516SMark Brown  * This program is free software; you can redistribute it and/or modify
5*5d421516SMark Brown  * it under the terms of the GNU General Public License version 2 as
6*5d421516SMark Brown  * published by the Free Software Foundation.
7*5d421516SMark Brown  */
8*5d421516SMark Brown 
9*5d421516SMark Brown #ifndef _WM8510_H
10*5d421516SMark Brown #define _WM8510_H
11*5d421516SMark Brown 
12*5d421516SMark Brown /* WM8510 register space */
13*5d421516SMark Brown 
14*5d421516SMark Brown #define WM8510_RESET		0x0
15*5d421516SMark Brown #define WM8510_POWER1		0x1
16*5d421516SMark Brown #define WM8510_POWER2		0x2
17*5d421516SMark Brown #define WM8510_POWER3		0x3
18*5d421516SMark Brown #define WM8510_IFACE		0x4
19*5d421516SMark Brown #define WM8510_COMP			0x5
20*5d421516SMark Brown #define WM8510_CLOCK		0x6
21*5d421516SMark Brown #define WM8510_ADD			0x7
22*5d421516SMark Brown #define WM8510_GPIO			0x8
23*5d421516SMark Brown #define WM8510_DAC			0xa
24*5d421516SMark Brown #define WM8510_DACVOL		0xb
25*5d421516SMark Brown #define WM8510_ADC			0xe
26*5d421516SMark Brown #define WM8510_ADCVOL		0xf
27*5d421516SMark Brown #define WM8510_EQ1			0x12
28*5d421516SMark Brown #define WM8510_EQ2			0x13
29*5d421516SMark Brown #define WM8510_EQ3			0x14
30*5d421516SMark Brown #define WM8510_EQ4			0x15
31*5d421516SMark Brown #define WM8510_EQ5			0x16
32*5d421516SMark Brown #define WM8510_DACLIM1		0x18
33*5d421516SMark Brown #define WM8510_DACLIM2		0x19
34*5d421516SMark Brown #define WM8510_NOTCH1		0x1b
35*5d421516SMark Brown #define WM8510_NOTCH2		0x1c
36*5d421516SMark Brown #define WM8510_NOTCH3		0x1d
37*5d421516SMark Brown #define WM8510_NOTCH4		0x1e
38*5d421516SMark Brown #define WM8510_ALC1			0x20
39*5d421516SMark Brown #define WM8510_ALC2			0x21
40*5d421516SMark Brown #define WM8510_ALC3			0x22
41*5d421516SMark Brown #define WM8510_NGATE		0x23
42*5d421516SMark Brown #define WM8510_PLLN			0x24
43*5d421516SMark Brown #define WM8510_PLLK1		0x25
44*5d421516SMark Brown #define WM8510_PLLK2		0x26
45*5d421516SMark Brown #define WM8510_PLLK3		0x27
46*5d421516SMark Brown #define WM8510_ATTEN		0x28
47*5d421516SMark Brown #define WM8510_INPUT		0x2c
48*5d421516SMark Brown #define WM8510_INPPGA		0x2d
49*5d421516SMark Brown #define WM8510_ADCBOOST		0x2f
50*5d421516SMark Brown #define WM8510_OUTPUT		0x31
51*5d421516SMark Brown #define WM8510_SPKMIX		0x32
52*5d421516SMark Brown #define WM8510_SPKVOL		0x36
53*5d421516SMark Brown #define WM8510_MONOMIX		0x38
54*5d421516SMark Brown 
55*5d421516SMark Brown #define WM8510_CACHEREGNUM 	57
56*5d421516SMark Brown 
57*5d421516SMark Brown /* Clock divider Id's */
58*5d421516SMark Brown #define WM8510_OPCLKDIV		0
59*5d421516SMark Brown #define WM8510_MCLKDIV		1
60*5d421516SMark Brown #define WM8510_ADCCLK		2
61*5d421516SMark Brown #define WM8510_DACCLK		3
62*5d421516SMark Brown #define WM8510_BCLKDIV		4
63*5d421516SMark Brown 
64*5d421516SMark Brown /* DAC clock dividers */
65*5d421516SMark Brown #define WM8510_DACCLK_F2	(1 << 3)
66*5d421516SMark Brown #define WM8510_DACCLK_F4	(0 << 3)
67*5d421516SMark Brown 
68*5d421516SMark Brown /* ADC clock dividers */
69*5d421516SMark Brown #define WM8510_ADCCLK_F2	(1 << 3)
70*5d421516SMark Brown #define WM8510_ADCCLK_F4	(0 << 3)
71*5d421516SMark Brown 
72*5d421516SMark Brown /* PLL Out dividers */
73*5d421516SMark Brown #define WM8510_OPCLKDIV_1	(0 << 4)
74*5d421516SMark Brown #define WM8510_OPCLKDIV_2	(1 << 4)
75*5d421516SMark Brown #define WM8510_OPCLKDIV_3	(2 << 4)
76*5d421516SMark Brown #define WM8510_OPCLKDIV_4	(3 << 4)
77*5d421516SMark Brown 
78*5d421516SMark Brown /* BCLK clock dividers */
79*5d421516SMark Brown #define WM8510_BCLKDIV_1	(0 << 2)
80*5d421516SMark Brown #define WM8510_BCLKDIV_2	(1 << 2)
81*5d421516SMark Brown #define WM8510_BCLKDIV_4	(2 << 2)
82*5d421516SMark Brown #define WM8510_BCLKDIV_8	(3 << 2)
83*5d421516SMark Brown #define WM8510_BCLKDIV_16	(4 << 2)
84*5d421516SMark Brown #define WM8510_BCLKDIV_32	(5 << 2)
85*5d421516SMark Brown 
86*5d421516SMark Brown /* MCLK clock dividers */
87*5d421516SMark Brown #define WM8510_MCLKDIV_1	(0 << 5)
88*5d421516SMark Brown #define WM8510_MCLKDIV_1_5	(1 << 5)
89*5d421516SMark Brown #define WM8510_MCLKDIV_2	(2 << 5)
90*5d421516SMark Brown #define WM8510_MCLKDIV_3	(3 << 5)
91*5d421516SMark Brown #define WM8510_MCLKDIV_4	(4 << 5)
92*5d421516SMark Brown #define WM8510_MCLKDIV_6	(5 << 5)
93*5d421516SMark Brown #define WM8510_MCLKDIV_8	(6 << 5)
94*5d421516SMark Brown #define WM8510_MCLKDIV_12	(7 << 5)
95*5d421516SMark Brown 
96*5d421516SMark Brown struct wm8510_setup_data {
97*5d421516SMark Brown 	unsigned short i2c_address;
98*5d421516SMark Brown };
99*5d421516SMark Brown 
100*5d421516SMark Brown extern struct snd_soc_codec_dai wm8510_dai;
101*5d421516SMark Brown extern struct snd_soc_codec_device soc_codec_dev_wm8510;
102*5d421516SMark Brown 
103*5d421516SMark Brown #endif
104