1 /* 2 * uda1380.c - Philips UDA1380 ALSA SoC audio driver 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 * 8 * Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com> 9 * Improved support for DAPM and audio routing/mixing capabilities, 10 * added TLV support. 11 * 12 * Modified by Richard Purdie <richard@openedhand.com> to fit into SoC 13 * codec model. 14 * 15 * Copyright (c) 2005 Giorgio Padrin <giorgio@mandarinlogiq.org> 16 * Copyright 2005 Openedhand Ltd. 17 */ 18 19 #include <linux/module.h> 20 #include <linux/init.h> 21 #include <linux/types.h> 22 #include <linux/string.h> 23 #include <linux/slab.h> 24 #include <linux/errno.h> 25 #include <linux/ioctl.h> 26 #include <linux/delay.h> 27 #include <linux/i2c.h> 28 #include <sound/core.h> 29 #include <sound/control.h> 30 #include <sound/initval.h> 31 #include <sound/info.h> 32 #include <sound/soc.h> 33 #include <sound/soc-dapm.h> 34 #include <sound/tlv.h> 35 36 #include "uda1380.h" 37 38 #define UDA1380_VERSION "0.6" 39 40 /* 41 * uda1380 register cache 42 */ 43 static const u16 uda1380_reg[UDA1380_CACHEREGNUM] = { 44 0x0502, 0x0000, 0x0000, 0x3f3f, 45 0x0202, 0x0000, 0x0000, 0x0000, 46 0x0000, 0x0000, 0x0000, 0x0000, 47 0x0000, 0x0000, 0x0000, 0x0000, 48 0x0000, 0xff00, 0x0000, 0x4800, 49 0x0000, 0x0000, 0x0000, 0x0000, 50 0x0000, 0x0000, 0x0000, 0x0000, 51 0x0000, 0x0000, 0x0000, 0x0000, 52 0x0000, 0x8000, 0x0002, 0x0000, 53 }; 54 55 /* 56 * read uda1380 register cache 57 */ 58 static inline unsigned int uda1380_read_reg_cache(struct snd_soc_codec *codec, 59 unsigned int reg) 60 { 61 u16 *cache = codec->reg_cache; 62 if (reg == UDA1380_RESET) 63 return 0; 64 if (reg >= UDA1380_CACHEREGNUM) 65 return -1; 66 return cache[reg]; 67 } 68 69 /* 70 * write uda1380 register cache 71 */ 72 static inline void uda1380_write_reg_cache(struct snd_soc_codec *codec, 73 u16 reg, unsigned int value) 74 { 75 u16 *cache = codec->reg_cache; 76 if (reg >= UDA1380_CACHEREGNUM) 77 return; 78 cache[reg] = value; 79 } 80 81 /* 82 * write to the UDA1380 register space 83 */ 84 static int uda1380_write(struct snd_soc_codec *codec, unsigned int reg, 85 unsigned int value) 86 { 87 u8 data[3]; 88 89 /* data is 90 * data[0] is register offset 91 * data[1] is MS byte 92 * data[2] is LS byte 93 */ 94 data[0] = reg; 95 data[1] = (value & 0xff00) >> 8; 96 data[2] = value & 0x00ff; 97 98 uda1380_write_reg_cache(codec, reg, value); 99 100 /* the interpolator & decimator regs must only be written when the 101 * codec DAI is active. 102 */ 103 if (!codec->active && (reg >= UDA1380_MVOL)) 104 return 0; 105 pr_debug("uda1380: hw write %x val %x\n", reg, value); 106 if (codec->hw_write(codec->control_data, data, 3) == 3) { 107 unsigned int val; 108 i2c_master_send(codec->control_data, data, 1); 109 i2c_master_recv(codec->control_data, data, 2); 110 val = (data[0]<<8) | data[1]; 111 if (val != value) { 112 pr_debug("uda1380: READ BACK VAL %x\n", 113 (data[0]<<8) | data[1]); 114 return -EIO; 115 } 116 return 0; 117 } else 118 return -EIO; 119 } 120 121 #define uda1380_reset(c) uda1380_write(c, UDA1380_RESET, 0) 122 123 /* declarations of ALSA reg_elem_REAL controls */ 124 static const char *uda1380_deemp[] = { 125 "None", 126 "32kHz", 127 "44.1kHz", 128 "48kHz", 129 "96kHz", 130 }; 131 static const char *uda1380_input_sel[] = { 132 "Line", 133 "Mic + Line R", 134 "Line L", 135 "Mic", 136 }; 137 static const char *uda1380_output_sel[] = { 138 "DAC", 139 "Analog Mixer", 140 }; 141 static const char *uda1380_spf_mode[] = { 142 "Flat", 143 "Minimum1", 144 "Minimum2", 145 "Maximum" 146 }; 147 static const char *uda1380_capture_sel[] = { 148 "ADC", 149 "Digital Mixer" 150 }; 151 static const char *uda1380_sel_ns[] = { 152 "3rd-order", 153 "5th-order" 154 }; 155 static const char *uda1380_mix_control[] = { 156 "off", 157 "PCM only", 158 "before sound processing", 159 "after sound processing" 160 }; 161 static const char *uda1380_sdet_setting[] = { 162 "3200", 163 "4800", 164 "9600", 165 "19200" 166 }; 167 static const char *uda1380_os_setting[] = { 168 "single-speed", 169 "double-speed (no mixing)", 170 "quad-speed (no mixing)" 171 }; 172 173 static const struct soc_enum uda1380_deemp_enum[] = { 174 SOC_ENUM_SINGLE(UDA1380_DEEMP, 8, 5, uda1380_deemp), 175 SOC_ENUM_SINGLE(UDA1380_DEEMP, 0, 5, uda1380_deemp), 176 }; 177 static const struct soc_enum uda1380_input_sel_enum = 178 SOC_ENUM_SINGLE(UDA1380_ADC, 2, 4, uda1380_input_sel); /* SEL_MIC, SEL_LNA */ 179 static const struct soc_enum uda1380_output_sel_enum = 180 SOC_ENUM_SINGLE(UDA1380_PM, 7, 2, uda1380_output_sel); /* R02_EN_AVC */ 181 static const struct soc_enum uda1380_spf_enum = 182 SOC_ENUM_SINGLE(UDA1380_MODE, 14, 4, uda1380_spf_mode); /* M */ 183 static const struct soc_enum uda1380_capture_sel_enum = 184 SOC_ENUM_SINGLE(UDA1380_IFACE, 6, 2, uda1380_capture_sel); /* SEL_SOURCE */ 185 static const struct soc_enum uda1380_sel_ns_enum = 186 SOC_ENUM_SINGLE(UDA1380_MIXER, 14, 2, uda1380_sel_ns); /* SEL_NS */ 187 static const struct soc_enum uda1380_mix_enum = 188 SOC_ENUM_SINGLE(UDA1380_MIXER, 12, 4, uda1380_mix_control); /* MIX, MIX_POS */ 189 static const struct soc_enum uda1380_sdet_enum = 190 SOC_ENUM_SINGLE(UDA1380_MIXER, 4, 4, uda1380_sdet_setting); /* SD_VALUE */ 191 static const struct soc_enum uda1380_os_enum = 192 SOC_ENUM_SINGLE(UDA1380_MIXER, 0, 3, uda1380_os_setting); /* OS */ 193 194 /* 195 * from -48 dB in 1.5 dB steps (mute instead of -49.5 dB) 196 */ 197 static DECLARE_TLV_DB_SCALE(amix_tlv, -4950, 150, 1); 198 199 /* 200 * from -78 dB in 1 dB steps (3 dB steps, really. LSB are ignored), 201 * from -66 dB in 0.5 dB steps (2 dB steps, really) and 202 * from -52 dB in 0.25 dB steps 203 */ 204 static const unsigned int mvol_tlv[] = { 205 TLV_DB_RANGE_HEAD(3), 206 0, 15, TLV_DB_SCALE_ITEM(-8200, 100, 1), 207 16, 43, TLV_DB_SCALE_ITEM(-6600, 50, 0), 208 44, 252, TLV_DB_SCALE_ITEM(-5200, 25, 0), 209 }; 210 211 /* 212 * from -72 dB in 1.5 dB steps (6 dB steps really), 213 * from -66 dB in 0.75 dB steps (3 dB steps really), 214 * from -60 dB in 0.5 dB steps (2 dB steps really) and 215 * from -46 dB in 0.25 dB steps 216 */ 217 static const unsigned int vc_tlv[] = { 218 TLV_DB_RANGE_HEAD(4), 219 0, 7, TLV_DB_SCALE_ITEM(-7800, 150, 1), 220 8, 15, TLV_DB_SCALE_ITEM(-6600, 75, 0), 221 16, 43, TLV_DB_SCALE_ITEM(-6000, 50, 0), 222 44, 228, TLV_DB_SCALE_ITEM(-4600, 25, 0), 223 }; 224 225 /* from 0 to 6 dB in 2 dB steps if SPF mode != flat */ 226 static DECLARE_TLV_DB_SCALE(tr_tlv, 0, 200, 0); 227 228 /* from 0 to 24 dB in 2 dB steps, if SPF mode == maximum, otherwise cuts 229 * off at 18 dB max) */ 230 static DECLARE_TLV_DB_SCALE(bb_tlv, 0, 200, 0); 231 232 /* from -63 to 24 dB in 0.5 dB steps (-128...48) */ 233 static DECLARE_TLV_DB_SCALE(dec_tlv, -6400, 50, 1); 234 235 /* from 0 to 24 dB in 3 dB steps */ 236 static DECLARE_TLV_DB_SCALE(pga_tlv, 0, 300, 0); 237 238 /* from 0 to 30 dB in 2 dB steps */ 239 static DECLARE_TLV_DB_SCALE(vga_tlv, 0, 200, 0); 240 241 static const struct snd_kcontrol_new uda1380_snd_controls[] = { 242 SOC_DOUBLE_TLV("Analog Mixer Volume", UDA1380_AMIX, 0, 8, 44, 1, amix_tlv), /* AVCR, AVCL */ 243 SOC_DOUBLE_TLV("Master Playback Volume", UDA1380_MVOL, 0, 8, 252, 1, mvol_tlv), /* MVCL, MVCR */ 244 SOC_SINGLE_TLV("ADC Playback Volume", UDA1380_MIXVOL, 8, 228, 1, vc_tlv), /* VC2 */ 245 SOC_SINGLE_TLV("PCM Playback Volume", UDA1380_MIXVOL, 0, 228, 1, vc_tlv), /* VC1 */ 246 SOC_ENUM("Sound Processing Filter", uda1380_spf_enum), /* M */ 247 SOC_DOUBLE_TLV("Tone Control - Treble", UDA1380_MODE, 4, 12, 3, 0, tr_tlv), /* TRL, TRR */ 248 SOC_DOUBLE_TLV("Tone Control - Bass", UDA1380_MODE, 0, 8, 15, 0, bb_tlv), /* BBL, BBR */ 249 /**/ SOC_SINGLE("Master Playback Switch", UDA1380_DEEMP, 14, 1, 1), /* MTM */ 250 SOC_SINGLE("ADC Playback Switch", UDA1380_DEEMP, 11, 1, 1), /* MT2 from decimation filter */ 251 SOC_ENUM("ADC Playback De-emphasis", uda1380_deemp_enum[0]), /* DE2 */ 252 SOC_SINGLE("PCM Playback Switch", UDA1380_DEEMP, 3, 1, 1), /* MT1, from digital data input */ 253 SOC_ENUM("PCM Playback De-emphasis", uda1380_deemp_enum[1]), /* DE1 */ 254 SOC_SINGLE("DAC Polarity inverting Switch", UDA1380_MIXER, 15, 1, 0), /* DA_POL_INV */ 255 SOC_ENUM("Noise Shaper", uda1380_sel_ns_enum), /* SEL_NS */ 256 SOC_ENUM("Digital Mixer Signal Control", uda1380_mix_enum), /* MIX_POS, MIX */ 257 SOC_SINGLE("Silence Switch", UDA1380_MIXER, 7, 1, 0), /* SILENCE, force DAC output to silence */ 258 SOC_SINGLE("Silence Detector Switch", UDA1380_MIXER, 6, 1, 0), /* SDET_ON */ 259 SOC_ENUM("Silence Detector Setting", uda1380_sdet_enum), /* SD_VALUE */ 260 SOC_ENUM("Oversampling Input", uda1380_os_enum), /* OS */ 261 SOC_DOUBLE_S8_TLV("ADC Capture Volume", UDA1380_DEC, -128, 48, dec_tlv), /* ML_DEC, MR_DEC */ 262 /**/ SOC_SINGLE("ADC Capture Switch", UDA1380_PGA, 15, 1, 1), /* MT_ADC */ 263 SOC_DOUBLE_TLV("Line Capture Volume", UDA1380_PGA, 0, 8, 8, 0, pga_tlv), /* PGA_GAINCTRLL, PGA_GAINCTRLR */ 264 SOC_SINGLE("ADC Polarity inverting Switch", UDA1380_ADC, 12, 1, 0), /* ADCPOL_INV */ 265 SOC_SINGLE_TLV("Mic Capture Volume", UDA1380_ADC, 8, 15, 0, vga_tlv), /* VGA_CTRL */ 266 SOC_SINGLE("DC Filter Bypass Switch", UDA1380_ADC, 1, 1, 0), /* SKIP_DCFIL (before decimator) */ 267 SOC_SINGLE("DC Filter Enable Switch", UDA1380_ADC, 0, 1, 0), /* EN_DCFIL (at output of decimator) */ 268 SOC_SINGLE("AGC Timing", UDA1380_AGC, 8, 7, 0), /* TODO: enum, see table 62 */ 269 SOC_SINGLE("AGC Target level", UDA1380_AGC, 2, 3, 1), /* AGC_LEVEL */ 270 /* -5.5, -8, -11.5, -14 dBFS */ 271 SOC_SINGLE("AGC Switch", UDA1380_AGC, 0, 1, 0), 272 }; 273 274 /* add non dapm controls */ 275 static int uda1380_add_controls(struct snd_soc_codec *codec) 276 { 277 int err, i; 278 279 for (i = 0; i < ARRAY_SIZE(uda1380_snd_controls); i++) { 280 err = snd_ctl_add(codec->card, 281 snd_soc_cnew(&uda1380_snd_controls[i], codec, NULL)); 282 if (err < 0) 283 return err; 284 } 285 286 return 0; 287 } 288 289 /* Input mux */ 290 static const struct snd_kcontrol_new uda1380_input_mux_control = 291 SOC_DAPM_ENUM("Route", uda1380_input_sel_enum); 292 293 /* Output mux */ 294 static const struct snd_kcontrol_new uda1380_output_mux_control = 295 SOC_DAPM_ENUM("Route", uda1380_output_sel_enum); 296 297 /* Capture mux */ 298 static const struct snd_kcontrol_new uda1380_capture_mux_control = 299 SOC_DAPM_ENUM("Route", uda1380_capture_sel_enum); 300 301 302 static const struct snd_soc_dapm_widget uda1380_dapm_widgets[] = { 303 SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0, 304 &uda1380_input_mux_control), 305 SND_SOC_DAPM_MUX("Output Mux", SND_SOC_NOPM, 0, 0, 306 &uda1380_output_mux_control), 307 SND_SOC_DAPM_MUX("Capture Mux", SND_SOC_NOPM, 0, 0, 308 &uda1380_capture_mux_control), 309 SND_SOC_DAPM_PGA("Left PGA", UDA1380_PM, 3, 0, NULL, 0), 310 SND_SOC_DAPM_PGA("Right PGA", UDA1380_PM, 1, 0, NULL, 0), 311 SND_SOC_DAPM_PGA("Mic LNA", UDA1380_PM, 4, 0, NULL, 0), 312 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", UDA1380_PM, 2, 0), 313 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", UDA1380_PM, 0, 0), 314 SND_SOC_DAPM_INPUT("VINM"), 315 SND_SOC_DAPM_INPUT("VINL"), 316 SND_SOC_DAPM_INPUT("VINR"), 317 SND_SOC_DAPM_MIXER("Analog Mixer", UDA1380_PM, 6, 0, NULL, 0), 318 SND_SOC_DAPM_OUTPUT("VOUTLHP"), 319 SND_SOC_DAPM_OUTPUT("VOUTRHP"), 320 SND_SOC_DAPM_OUTPUT("VOUTL"), 321 SND_SOC_DAPM_OUTPUT("VOUTR"), 322 SND_SOC_DAPM_DAC("DAC", "Playback", UDA1380_PM, 10, 0), 323 SND_SOC_DAPM_PGA("HeadPhone Driver", UDA1380_PM, 13, 0, NULL, 0), 324 }; 325 326 static const struct snd_soc_dapm_route audio_map[] = { 327 328 /* output mux */ 329 {"HeadPhone Driver", NULL, "Output Mux"}, 330 {"VOUTR", NULL, "Output Mux"}, 331 {"VOUTL", NULL, "Output Mux"}, 332 333 {"Analog Mixer", NULL, "VINR"}, 334 {"Analog Mixer", NULL, "VINL"}, 335 {"Analog Mixer", NULL, "DAC"}, 336 337 {"Output Mux", "DAC", "DAC"}, 338 {"Output Mux", "Analog Mixer", "Analog Mixer"}, 339 340 /* {"DAC", "Digital Mixer", "I2S" } */ 341 342 /* headphone driver */ 343 {"VOUTLHP", NULL, "HeadPhone Driver"}, 344 {"VOUTRHP", NULL, "HeadPhone Driver"}, 345 346 /* input mux */ 347 {"Left ADC", NULL, "Input Mux"}, 348 {"Input Mux", "Mic", "Mic LNA"}, 349 {"Input Mux", "Mic + Line R", "Mic LNA"}, 350 {"Input Mux", "Line L", "Left PGA"}, 351 {"Input Mux", "Line", "Left PGA"}, 352 353 /* right input */ 354 {"Right ADC", "Mic + Line R", "Right PGA"}, 355 {"Right ADC", "Line", "Right PGA"}, 356 357 /* inputs */ 358 {"Mic LNA", NULL, "VINM"}, 359 {"Left PGA", NULL, "VINL"}, 360 {"Right PGA", NULL, "VINR"}, 361 }; 362 363 static int uda1380_add_widgets(struct snd_soc_codec *codec) 364 { 365 snd_soc_dapm_new_controls(codec, uda1380_dapm_widgets, 366 ARRAY_SIZE(uda1380_dapm_widgets)); 367 368 snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map)); 369 370 snd_soc_dapm_new_widgets(codec); 371 return 0; 372 } 373 374 static int uda1380_set_dai_fmt(struct snd_soc_dai *codec_dai, 375 unsigned int fmt) 376 { 377 struct snd_soc_codec *codec = codec_dai->codec; 378 int iface; 379 380 /* set up DAI based upon fmt */ 381 iface = uda1380_read_reg_cache(codec, UDA1380_IFACE); 382 iface &= ~(R01_SFORI_MASK | R01_SIM | R01_SFORO_MASK); 383 384 /* FIXME: how to select I2S for DATAO and MSB for DATAI correctly? */ 385 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 386 case SND_SOC_DAIFMT_I2S: 387 iface |= R01_SFORI_I2S | R01_SFORO_I2S; 388 break; 389 case SND_SOC_DAIFMT_LSB: 390 iface |= R01_SFORI_LSB16 | R01_SFORO_I2S; 391 break; 392 case SND_SOC_DAIFMT_MSB: 393 iface |= R01_SFORI_MSB | R01_SFORO_I2S; 394 } 395 396 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBM_CFM) 397 iface |= R01_SIM; 398 399 uda1380_write(codec, UDA1380_IFACE, iface); 400 401 return 0; 402 } 403 404 /* 405 * Flush reg cache 406 * We can only write the interpolator and decimator registers 407 * when the DAI is being clocked by the CPU DAI. It's up to the 408 * machine and cpu DAI driver to do this before we are called. 409 */ 410 static int uda1380_pcm_prepare(struct snd_pcm_substream *substream, 411 struct snd_soc_dai *dai) 412 { 413 struct snd_soc_pcm_runtime *rtd = substream->private_data; 414 struct snd_soc_device *socdev = rtd->socdev; 415 struct snd_soc_codec *codec = socdev->codec; 416 int reg, reg_start, reg_end, clk; 417 418 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 419 reg_start = UDA1380_MVOL; 420 reg_end = UDA1380_MIXER; 421 } else { 422 reg_start = UDA1380_DEC; 423 reg_end = UDA1380_AGC; 424 } 425 426 /* FIXME disable DAC_CLK */ 427 clk = uda1380_read_reg_cache(codec, UDA1380_CLK); 428 uda1380_write(codec, UDA1380_CLK, clk & ~R00_DAC_CLK); 429 430 for (reg = reg_start; reg <= reg_end; reg++) { 431 pr_debug("uda1380: flush reg %x val %x:", reg, 432 uda1380_read_reg_cache(codec, reg)); 433 uda1380_write(codec, reg, uda1380_read_reg_cache(codec, reg)); 434 } 435 436 /* FIXME enable DAC_CLK */ 437 uda1380_write(codec, UDA1380_CLK, clk | R00_DAC_CLK); 438 439 return 0; 440 } 441 442 static int uda1380_pcm_hw_params(struct snd_pcm_substream *substream, 443 struct snd_pcm_hw_params *params, 444 struct snd_soc_dai *dai) 445 { 446 struct snd_soc_pcm_runtime *rtd = substream->private_data; 447 struct snd_soc_device *socdev = rtd->socdev; 448 struct snd_soc_codec *codec = socdev->codec; 449 u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK); 450 451 /* set WSPLL power and divider if running from this clock */ 452 if (clk & R00_DAC_CLK) { 453 int rate = params_rate(params); 454 u16 pm = uda1380_read_reg_cache(codec, UDA1380_PM); 455 clk &= ~0x3; /* clear SEL_LOOP_DIV */ 456 switch (rate) { 457 case 6250 ... 12500: 458 clk |= 0x0; 459 break; 460 case 12501 ... 25000: 461 clk |= 0x1; 462 break; 463 case 25001 ... 50000: 464 clk |= 0x2; 465 break; 466 case 50001 ... 100000: 467 clk |= 0x3; 468 break; 469 } 470 uda1380_write(codec, UDA1380_PM, R02_PON_PLL | pm); 471 } 472 473 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 474 clk |= R00_EN_DAC | R00_EN_INT; 475 else 476 clk |= R00_EN_ADC | R00_EN_DEC; 477 478 uda1380_write(codec, UDA1380_CLK, clk); 479 return 0; 480 } 481 482 static void uda1380_pcm_shutdown(struct snd_pcm_substream *substream, 483 struct snd_soc_dai *dai) 484 { 485 struct snd_soc_pcm_runtime *rtd = substream->private_data; 486 struct snd_soc_device *socdev = rtd->socdev; 487 struct snd_soc_codec *codec = socdev->codec; 488 u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK); 489 490 /* shut down WSPLL power if running from this clock */ 491 if (clk & R00_DAC_CLK) { 492 u16 pm = uda1380_read_reg_cache(codec, UDA1380_PM); 493 uda1380_write(codec, UDA1380_PM, ~R02_PON_PLL & pm); 494 } 495 496 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 497 clk &= ~(R00_EN_DAC | R00_EN_INT); 498 else 499 clk &= ~(R00_EN_ADC | R00_EN_DEC); 500 501 uda1380_write(codec, UDA1380_CLK, clk); 502 } 503 504 static int uda1380_mute(struct snd_soc_dai *codec_dai, int mute) 505 { 506 struct snd_soc_codec *codec = codec_dai->codec; 507 u16 mute_reg = uda1380_read_reg_cache(codec, UDA1380_DEEMP) & ~R13_MTM; 508 509 /* FIXME: mute(codec,0) is called when the magician clock is already 510 * set to WSPLL, but for some unknown reason writing to interpolator 511 * registers works only when clocked by SYSCLK */ 512 u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK); 513 uda1380_write(codec, UDA1380_CLK, ~R00_DAC_CLK & clk); 514 if (mute) 515 uda1380_write(codec, UDA1380_DEEMP, mute_reg | R13_MTM); 516 else 517 uda1380_write(codec, UDA1380_DEEMP, mute_reg); 518 uda1380_write(codec, UDA1380_CLK, clk); 519 return 0; 520 } 521 522 static int uda1380_set_bias_level(struct snd_soc_codec *codec, 523 enum snd_soc_bias_level level) 524 { 525 int pm = uda1380_read_reg_cache(codec, UDA1380_PM); 526 527 switch (level) { 528 case SND_SOC_BIAS_ON: 529 case SND_SOC_BIAS_PREPARE: 530 uda1380_write(codec, UDA1380_PM, R02_PON_BIAS | pm); 531 break; 532 case SND_SOC_BIAS_STANDBY: 533 uda1380_write(codec, UDA1380_PM, R02_PON_BIAS); 534 break; 535 case SND_SOC_BIAS_OFF: 536 uda1380_write(codec, UDA1380_PM, 0x0); 537 break; 538 } 539 codec->bias_level = level; 540 return 0; 541 } 542 543 #define UDA1380_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ 544 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\ 545 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000) 546 547 struct snd_soc_dai uda1380_dai[] = { 548 { 549 .name = "UDA1380", 550 .playback = { 551 .stream_name = "Playback", 552 .channels_min = 1, 553 .channels_max = 2, 554 .rates = UDA1380_RATES, 555 .formats = SNDRV_PCM_FMTBIT_S16_LE,}, 556 .capture = { 557 .stream_name = "Capture", 558 .channels_min = 1, 559 .channels_max = 2, 560 .rates = UDA1380_RATES, 561 .formats = SNDRV_PCM_FMTBIT_S16_LE,}, 562 .ops = { 563 .hw_params = uda1380_pcm_hw_params, 564 .shutdown = uda1380_pcm_shutdown, 565 .prepare = uda1380_pcm_prepare, 566 .digital_mute = uda1380_mute, 567 .set_fmt = uda1380_set_dai_fmt, 568 }, 569 }, 570 { /* playback only - dual interface */ 571 .name = "UDA1380", 572 .playback = { 573 .stream_name = "Playback", 574 .channels_min = 1, 575 .channels_max = 2, 576 .rates = UDA1380_RATES, 577 .formats = SNDRV_PCM_FMTBIT_S16_LE, 578 }, 579 .ops = { 580 .hw_params = uda1380_pcm_hw_params, 581 .shutdown = uda1380_pcm_shutdown, 582 .prepare = uda1380_pcm_prepare, 583 .digital_mute = uda1380_mute, 584 .set_fmt = uda1380_set_dai_fmt, 585 }, 586 }, 587 { /* capture only - dual interface*/ 588 .name = "UDA1380", 589 .capture = { 590 .stream_name = "Capture", 591 .channels_min = 1, 592 .channels_max = 2, 593 .rates = UDA1380_RATES, 594 .formats = SNDRV_PCM_FMTBIT_S16_LE, 595 }, 596 .ops = { 597 .hw_params = uda1380_pcm_hw_params, 598 .shutdown = uda1380_pcm_shutdown, 599 .prepare = uda1380_pcm_prepare, 600 .set_fmt = uda1380_set_dai_fmt, 601 }, 602 }, 603 }; 604 EXPORT_SYMBOL_GPL(uda1380_dai); 605 606 static int uda1380_suspend(struct platform_device *pdev, pm_message_t state) 607 { 608 struct snd_soc_device *socdev = platform_get_drvdata(pdev); 609 struct snd_soc_codec *codec = socdev->codec; 610 611 uda1380_set_bias_level(codec, SND_SOC_BIAS_OFF); 612 return 0; 613 } 614 615 static int uda1380_resume(struct platform_device *pdev) 616 { 617 struct snd_soc_device *socdev = platform_get_drvdata(pdev); 618 struct snd_soc_codec *codec = socdev->codec; 619 int i; 620 u8 data[2]; 621 u16 *cache = codec->reg_cache; 622 623 /* Sync reg_cache with the hardware */ 624 for (i = 0; i < ARRAY_SIZE(uda1380_reg); i++) { 625 data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001); 626 data[1] = cache[i] & 0x00ff; 627 codec->hw_write(codec->control_data, data, 2); 628 } 629 uda1380_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 630 uda1380_set_bias_level(codec, codec->suspend_bias_level); 631 return 0; 632 } 633 634 /* 635 * initialise the UDA1380 driver 636 * register mixer and dsp interfaces with the kernel 637 */ 638 static int uda1380_init(struct snd_soc_device *socdev, int dac_clk) 639 { 640 struct snd_soc_codec *codec = socdev->codec; 641 int ret = 0; 642 643 codec->name = "UDA1380"; 644 codec->owner = THIS_MODULE; 645 codec->read = uda1380_read_reg_cache; 646 codec->write = uda1380_write; 647 codec->set_bias_level = uda1380_set_bias_level; 648 codec->dai = uda1380_dai; 649 codec->num_dai = ARRAY_SIZE(uda1380_dai); 650 codec->reg_cache = kmemdup(uda1380_reg, sizeof(uda1380_reg), 651 GFP_KERNEL); 652 if (codec->reg_cache == NULL) 653 return -ENOMEM; 654 codec->reg_cache_size = ARRAY_SIZE(uda1380_reg); 655 codec->reg_cache_step = 1; 656 uda1380_reset(codec); 657 658 /* register pcms */ 659 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); 660 if (ret < 0) { 661 pr_err("uda1380: failed to create pcms\n"); 662 goto pcm_err; 663 } 664 665 /* power on device */ 666 uda1380_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 667 /* set clock input */ 668 switch (dac_clk) { 669 case UDA1380_DAC_CLK_SYSCLK: 670 uda1380_write(codec, UDA1380_CLK, 0); 671 break; 672 case UDA1380_DAC_CLK_WSPLL: 673 uda1380_write(codec, UDA1380_CLK, R00_DAC_CLK); 674 break; 675 } 676 677 /* uda1380 init */ 678 uda1380_add_controls(codec); 679 uda1380_add_widgets(codec); 680 ret = snd_soc_init_card(socdev); 681 if (ret < 0) { 682 pr_err("uda1380: failed to register card\n"); 683 goto card_err; 684 } 685 686 return ret; 687 688 card_err: 689 snd_soc_free_pcms(socdev); 690 snd_soc_dapm_free(socdev); 691 pcm_err: 692 kfree(codec->reg_cache); 693 return ret; 694 } 695 696 static struct snd_soc_device *uda1380_socdev; 697 698 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 699 700 static int uda1380_i2c_probe(struct i2c_client *i2c, 701 const struct i2c_device_id *id) 702 { 703 struct snd_soc_device *socdev = uda1380_socdev; 704 struct uda1380_setup_data *setup = socdev->codec_data; 705 struct snd_soc_codec *codec = socdev->codec; 706 int ret; 707 708 i2c_set_clientdata(i2c, codec); 709 codec->control_data = i2c; 710 711 ret = uda1380_init(socdev, setup->dac_clk); 712 if (ret < 0) 713 pr_err("uda1380: failed to initialise UDA1380\n"); 714 715 return ret; 716 } 717 718 static int uda1380_i2c_remove(struct i2c_client *client) 719 { 720 struct snd_soc_codec *codec = i2c_get_clientdata(client); 721 kfree(codec->reg_cache); 722 return 0; 723 } 724 725 static const struct i2c_device_id uda1380_i2c_id[] = { 726 { "uda1380", 0 }, 727 { } 728 }; 729 MODULE_DEVICE_TABLE(i2c, uda1380_i2c_id); 730 731 static struct i2c_driver uda1380_i2c_driver = { 732 .driver = { 733 .name = "UDA1380 I2C Codec", 734 .owner = THIS_MODULE, 735 }, 736 .probe = uda1380_i2c_probe, 737 .remove = uda1380_i2c_remove, 738 .id_table = uda1380_i2c_id, 739 }; 740 741 static int uda1380_add_i2c_device(struct platform_device *pdev, 742 const struct uda1380_setup_data *setup) 743 { 744 struct i2c_board_info info; 745 struct i2c_adapter *adapter; 746 struct i2c_client *client; 747 int ret; 748 749 ret = i2c_add_driver(&uda1380_i2c_driver); 750 if (ret != 0) { 751 dev_err(&pdev->dev, "can't add i2c driver\n"); 752 return ret; 753 } 754 755 memset(&info, 0, sizeof(struct i2c_board_info)); 756 info.addr = setup->i2c_address; 757 strlcpy(info.type, "uda1380", I2C_NAME_SIZE); 758 759 adapter = i2c_get_adapter(setup->i2c_bus); 760 if (!adapter) { 761 dev_err(&pdev->dev, "can't get i2c adapter %d\n", 762 setup->i2c_bus); 763 goto err_driver; 764 } 765 766 client = i2c_new_device(adapter, &info); 767 i2c_put_adapter(adapter); 768 if (!client) { 769 dev_err(&pdev->dev, "can't add i2c device at 0x%x\n", 770 (unsigned int)info.addr); 771 goto err_driver; 772 } 773 774 return 0; 775 776 err_driver: 777 i2c_del_driver(&uda1380_i2c_driver); 778 return -ENODEV; 779 } 780 #endif 781 782 static int uda1380_probe(struct platform_device *pdev) 783 { 784 struct snd_soc_device *socdev = platform_get_drvdata(pdev); 785 struct uda1380_setup_data *setup; 786 struct snd_soc_codec *codec; 787 int ret; 788 789 pr_info("UDA1380 Audio Codec %s", UDA1380_VERSION); 790 791 setup = socdev->codec_data; 792 codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL); 793 if (codec == NULL) 794 return -ENOMEM; 795 796 socdev->codec = codec; 797 mutex_init(&codec->mutex); 798 INIT_LIST_HEAD(&codec->dapm_widgets); 799 INIT_LIST_HEAD(&codec->dapm_paths); 800 801 uda1380_socdev = socdev; 802 ret = -ENODEV; 803 804 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 805 if (setup->i2c_address) { 806 codec->hw_write = (hw_write_t)i2c_master_send; 807 ret = uda1380_add_i2c_device(pdev, setup); 808 } 809 #endif 810 811 if (ret != 0) 812 kfree(codec); 813 return ret; 814 } 815 816 /* power down chip */ 817 static int uda1380_remove(struct platform_device *pdev) 818 { 819 struct snd_soc_device *socdev = platform_get_drvdata(pdev); 820 struct snd_soc_codec *codec = socdev->codec; 821 822 if (codec->control_data) 823 uda1380_set_bias_level(codec, SND_SOC_BIAS_OFF); 824 825 snd_soc_free_pcms(socdev); 826 snd_soc_dapm_free(socdev); 827 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 828 i2c_unregister_device(codec->control_data); 829 i2c_del_driver(&uda1380_i2c_driver); 830 #endif 831 kfree(codec); 832 833 return 0; 834 } 835 836 struct snd_soc_codec_device soc_codec_dev_uda1380 = { 837 .probe = uda1380_probe, 838 .remove = uda1380_remove, 839 .suspend = uda1380_suspend, 840 .resume = uda1380_resume, 841 }; 842 EXPORT_SYMBOL_GPL(soc_codec_dev_uda1380); 843 844 static int __init uda1380_modinit(void) 845 { 846 return snd_soc_register_dais(uda1380_dai, ARRAY_SIZE(uda1380_dai)); 847 } 848 module_init(uda1380_modinit); 849 850 static void __exit uda1380_exit(void) 851 { 852 snd_soc_unregister_dais(uda1380_dai, ARRAY_SIZE(uda1380_dai)); 853 } 854 module_exit(uda1380_exit); 855 856 MODULE_AUTHOR("Giorgio Padrin"); 857 MODULE_DESCRIPTION("Audio support for codec Philips UDA1380"); 858 MODULE_LICENSE("GPL"); 859