xref: /linux/sound/soc/codecs/tas5720.h (revision d5eb436acc8104b5c789359aa8c923ff5fafcd62)
1bd023adaSAndreas Dannenberg /*
2bd023adaSAndreas Dannenberg  * tas5720.h - ALSA SoC Texas Instruments TAS5720 Mono Audio Amplifier
3bd023adaSAndreas Dannenberg  *
4bd023adaSAndreas Dannenberg  * Copyright (C)2015-2016 Texas Instruments Incorporated -  http://www.ti.com
5bd023adaSAndreas Dannenberg  *
6bd023adaSAndreas Dannenberg  * Author: Andreas Dannenberg <dannenberg@ti.com>
7bd023adaSAndreas Dannenberg  *
8bd023adaSAndreas Dannenberg  * This program is free software; you can redistribute it and/or
9bd023adaSAndreas Dannenberg  * modify it under the terms of the GNU General Public License
10bd023adaSAndreas Dannenberg  * version 2 as published by the Free Software Foundation.
11bd023adaSAndreas Dannenberg  *
12bd023adaSAndreas Dannenberg  * This program is distributed in the hope that it will be useful, but
13bd023adaSAndreas Dannenberg  * WITHOUT ANY WARRANTY; without even the implied warranty of
14bd023adaSAndreas Dannenberg  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15bd023adaSAndreas Dannenberg  * General Public License for more details.
16bd023adaSAndreas Dannenberg  */
17bd023adaSAndreas Dannenberg 
18bd023adaSAndreas Dannenberg #ifndef __TAS5720_H__
19bd023adaSAndreas Dannenberg #define __TAS5720_H__
20bd023adaSAndreas Dannenberg 
21bd023adaSAndreas Dannenberg /* Register Address Map */
22bd023adaSAndreas Dannenberg #define TAS5720_DEVICE_ID_REG		0x00
23bd023adaSAndreas Dannenberg #define TAS5720_POWER_CTRL_REG		0x01
24bd023adaSAndreas Dannenberg #define TAS5720_DIGITAL_CTRL1_REG	0x02
25bd023adaSAndreas Dannenberg #define TAS5720_DIGITAL_CTRL2_REG	0x03
26bd023adaSAndreas Dannenberg #define TAS5720_VOLUME_CTRL_REG		0x04
27bd023adaSAndreas Dannenberg #define TAS5720_ANALOG_CTRL_REG		0x06
28bd023adaSAndreas Dannenberg #define TAS5720_FAULT_REG		0x08
29bd023adaSAndreas Dannenberg #define TAS5720_DIGITAL_CLIP2_REG	0x10
30bd023adaSAndreas Dannenberg #define TAS5720_DIGITAL_CLIP1_REG	0x11
31bd023adaSAndreas Dannenberg #define TAS5720_MAX_REG			TAS5720_DIGITAL_CLIP1_REG
32bd023adaSAndreas Dannenberg 
33*d5eb436aSAndreas Dannenberg /* Additional TAS5722-specific Registers */
34*d5eb436aSAndreas Dannenberg #define TAS5722_DIGITAL_CTRL2_REG	0x13
35*d5eb436aSAndreas Dannenberg #define TAS5722_ANALOG_CTRL2_REG	0x14
36*d5eb436aSAndreas Dannenberg #define TAS5722_MAX_REG			TAS5722_ANALOG_CTRL2_REG
37*d5eb436aSAndreas Dannenberg 
38bd023adaSAndreas Dannenberg /* TAS5720_DEVICE_ID_REG */
39bd023adaSAndreas Dannenberg #define TAS5720_DEVICE_ID		0x01
40872bcad2SAndreas Dannenberg #define TAS5722_DEVICE_ID		0x12
41bd023adaSAndreas Dannenberg 
42bd023adaSAndreas Dannenberg /* TAS5720_POWER_CTRL_REG */
43bd023adaSAndreas Dannenberg #define TAS5720_DIG_CLIP_MASK		GENMASK(7, 2)
44bd023adaSAndreas Dannenberg #define TAS5720_SLEEP			BIT(1)
45bd023adaSAndreas Dannenberg #define TAS5720_SDZ			BIT(0)
46bd023adaSAndreas Dannenberg 
47bd023adaSAndreas Dannenberg /* TAS5720_DIGITAL_CTRL1_REG */
48bd023adaSAndreas Dannenberg #define TAS5720_HPF_BYPASS		BIT(7)
49bd023adaSAndreas Dannenberg #define TAS5720_TDM_CFG_SRC		BIT(6)
50bd023adaSAndreas Dannenberg #define TAS5720_SSZ_DS			BIT(3)
51bd023adaSAndreas Dannenberg #define TAS5720_SAIF_RIGHTJ_24BIT	(0x0)
52bd023adaSAndreas Dannenberg #define TAS5720_SAIF_RIGHTJ_20BIT	(0x1)
53bd023adaSAndreas Dannenberg #define TAS5720_SAIF_RIGHTJ_18BIT	(0x2)
54bd023adaSAndreas Dannenberg #define TAS5720_SAIF_RIGHTJ_16BIT	(0x3)
55bd023adaSAndreas Dannenberg #define TAS5720_SAIF_I2S		(0x4)
56bd023adaSAndreas Dannenberg #define TAS5720_SAIF_LEFTJ		(0x5)
57bd023adaSAndreas Dannenberg #define TAS5720_SAIF_FORMAT_MASK	GENMASK(2, 0)
58bd023adaSAndreas Dannenberg 
59bd023adaSAndreas Dannenberg /* TAS5720_DIGITAL_CTRL2_REG */
60*d5eb436aSAndreas Dannenberg #define TAS5722_VOL_RAMP_RATE		BIT(6)
61bd023adaSAndreas Dannenberg #define TAS5720_MUTE			BIT(4)
62bd023adaSAndreas Dannenberg #define TAS5720_TDM_SLOT_SEL_MASK	GENMASK(2, 0)
63bd023adaSAndreas Dannenberg 
64bd023adaSAndreas Dannenberg /* TAS5720_ANALOG_CTRL_REG */
65bd023adaSAndreas Dannenberg #define TAS5720_PWM_RATE_6_3_FSYNC	(0x0 << 4)
66bd023adaSAndreas Dannenberg #define TAS5720_PWM_RATE_8_4_FSYNC	(0x1 << 4)
67bd023adaSAndreas Dannenberg #define TAS5720_PWM_RATE_10_5_FSYNC	(0x2 << 4)
68bd023adaSAndreas Dannenberg #define TAS5720_PWM_RATE_12_6_FSYNC	(0x3 << 4)
69bd023adaSAndreas Dannenberg #define TAS5720_PWM_RATE_14_7_FSYNC	(0x4 << 4)
70bd023adaSAndreas Dannenberg #define TAS5720_PWM_RATE_16_8_FSYNC	(0x5 << 4)
71bd023adaSAndreas Dannenberg #define TAS5720_PWM_RATE_20_10_FSYNC	(0x6 << 4)
72bd023adaSAndreas Dannenberg #define TAS5720_PWM_RATE_24_12_FSYNC	(0x7 << 4)
73bd023adaSAndreas Dannenberg #define TAS5720_PWM_RATE_MASK		GENMASK(6, 4)
74bd023adaSAndreas Dannenberg #define TAS5720_ANALOG_GAIN_19_2DBV	(0x0 << 2)
75bd023adaSAndreas Dannenberg #define TAS5720_ANALOG_GAIN_20_7DBV	(0x1 << 2)
76bd023adaSAndreas Dannenberg #define TAS5720_ANALOG_GAIN_23_5DBV	(0x2 << 2)
77bd023adaSAndreas Dannenberg #define TAS5720_ANALOG_GAIN_26_3DBV	(0x3 << 2)
78bd023adaSAndreas Dannenberg #define TAS5720_ANALOG_GAIN_MASK	GENMASK(3, 2)
79bd023adaSAndreas Dannenberg #define TAS5720_ANALOG_GAIN_SHIFT	(0x2)
80bd023adaSAndreas Dannenberg 
81bd023adaSAndreas Dannenberg /* TAS5720_FAULT_REG */
82bd023adaSAndreas Dannenberg #define TAS5720_OC_THRESH_100PCT	(0x0 << 4)
83bd023adaSAndreas Dannenberg #define TAS5720_OC_THRESH_75PCT		(0x1 << 4)
84bd023adaSAndreas Dannenberg #define TAS5720_OC_THRESH_50PCT		(0x2 << 4)
85bd023adaSAndreas Dannenberg #define TAS5720_OC_THRESH_25PCT		(0x3 << 4)
86bd023adaSAndreas Dannenberg #define TAS5720_OC_THRESH_MASK		GENMASK(5, 4)
87bd023adaSAndreas Dannenberg #define TAS5720_CLKE			BIT(3)
88bd023adaSAndreas Dannenberg #define TAS5720_OCE			BIT(2)
89bd023adaSAndreas Dannenberg #define TAS5720_DCE			BIT(1)
90bd023adaSAndreas Dannenberg #define TAS5720_OTE			BIT(0)
91bd023adaSAndreas Dannenberg #define TAS5720_FAULT_MASK		GENMASK(3, 0)
92bd023adaSAndreas Dannenberg 
93bd023adaSAndreas Dannenberg /* TAS5720_DIGITAL_CLIP1_REG */
94bd023adaSAndreas Dannenberg #define TAS5720_CLIP1_MASK		GENMASK(7, 2)
95bd023adaSAndreas Dannenberg #define TAS5720_CLIP1_SHIFT		(0x2)
96bd023adaSAndreas Dannenberg 
97*d5eb436aSAndreas Dannenberg /* TAS5722_DIGITAL_CTRL2_REG */
98*d5eb436aSAndreas Dannenberg #define TAS5722_HPF_3_7HZ		(0x0 << 5)
99*d5eb436aSAndreas Dannenberg #define TAS5722_HPF_7_4HZ		(0x1 << 5)
100*d5eb436aSAndreas Dannenberg #define TAS5722_HPF_14_9HZ		(0x2 << 5)
101*d5eb436aSAndreas Dannenberg #define TAS5722_HPF_29_7HZ		(0x3 << 5)
102*d5eb436aSAndreas Dannenberg #define TAS5722_HPF_59_4HZ		(0x4 << 5)
103*d5eb436aSAndreas Dannenberg #define TAS5722_HPF_118_4HZ		(0x5 << 5)
104*d5eb436aSAndreas Dannenberg #define TAS5722_HPF_235_0HZ		(0x6 << 5)
105*d5eb436aSAndreas Dannenberg #define TAS5722_HPF_463_2HZ		(0x7 << 5)
106*d5eb436aSAndreas Dannenberg #define TAS5722_HPF_MASK		GENMASK(7, 5)
107*d5eb436aSAndreas Dannenberg #define TAS5722_AUTO_SLEEP_OFF		(0x0 << 3)
108*d5eb436aSAndreas Dannenberg #define TAS5722_AUTO_SLEEP_1024LR	(0x1 << 3)
109*d5eb436aSAndreas Dannenberg #define TAS5722_AUTO_SLEEP_65536LR	(0x2 << 3)
110*d5eb436aSAndreas Dannenberg #define TAS5722_AUTO_SLEEP_262144LR	(0x3 << 3)
111*d5eb436aSAndreas Dannenberg #define TAS5722_AUTO_SLEEP_MASK		GENMASK(4, 3)
112*d5eb436aSAndreas Dannenberg #define TAS5722_TDM_SLOT_16B		BIT(2)
113*d5eb436aSAndreas Dannenberg #define TAS5722_MCLK_PIN_CFG		BIT(1)
114*d5eb436aSAndreas Dannenberg #define TAS5722_VOL_CONTROL_LSB		BIT(0)
115*d5eb436aSAndreas Dannenberg 
116*d5eb436aSAndreas Dannenberg /* TAS5722_ANALOG_CTRL2_REG */
117*d5eb436aSAndreas Dannenberg #define TAS5722_FAULTZ_PU		BIT(3)
118*d5eb436aSAndreas Dannenberg #define TAS5722_VREG_LVL		BIT(2)
119*d5eb436aSAndreas Dannenberg #define TAS5722_PWR_TUNE		BIT(0)
120*d5eb436aSAndreas Dannenberg 
121bd023adaSAndreas Dannenberg #endif /* __TAS5720_H__ */
122