1*bd023adaSAndreas Dannenberg /* 2*bd023adaSAndreas Dannenberg * tas5720.h - ALSA SoC Texas Instruments TAS5720 Mono Audio Amplifier 3*bd023adaSAndreas Dannenberg * 4*bd023adaSAndreas Dannenberg * Copyright (C)2015-2016 Texas Instruments Incorporated - http://www.ti.com 5*bd023adaSAndreas Dannenberg * 6*bd023adaSAndreas Dannenberg * Author: Andreas Dannenberg <dannenberg@ti.com> 7*bd023adaSAndreas Dannenberg * 8*bd023adaSAndreas Dannenberg * This program is free software; you can redistribute it and/or 9*bd023adaSAndreas Dannenberg * modify it under the terms of the GNU General Public License 10*bd023adaSAndreas Dannenberg * version 2 as published by the Free Software Foundation. 11*bd023adaSAndreas Dannenberg * 12*bd023adaSAndreas Dannenberg * This program is distributed in the hope that it will be useful, but 13*bd023adaSAndreas Dannenberg * WITHOUT ANY WARRANTY; without even the implied warranty of 14*bd023adaSAndreas Dannenberg * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15*bd023adaSAndreas Dannenberg * General Public License for more details. 16*bd023adaSAndreas Dannenberg */ 17*bd023adaSAndreas Dannenberg 18*bd023adaSAndreas Dannenberg #ifndef __TAS5720_H__ 19*bd023adaSAndreas Dannenberg #define __TAS5720_H__ 20*bd023adaSAndreas Dannenberg 21*bd023adaSAndreas Dannenberg /* Register Address Map */ 22*bd023adaSAndreas Dannenberg #define TAS5720_DEVICE_ID_REG 0x00 23*bd023adaSAndreas Dannenberg #define TAS5720_POWER_CTRL_REG 0x01 24*bd023adaSAndreas Dannenberg #define TAS5720_DIGITAL_CTRL1_REG 0x02 25*bd023adaSAndreas Dannenberg #define TAS5720_DIGITAL_CTRL2_REG 0x03 26*bd023adaSAndreas Dannenberg #define TAS5720_VOLUME_CTRL_REG 0x04 27*bd023adaSAndreas Dannenberg #define TAS5720_ANALOG_CTRL_REG 0x06 28*bd023adaSAndreas Dannenberg #define TAS5720_FAULT_REG 0x08 29*bd023adaSAndreas Dannenberg #define TAS5720_DIGITAL_CLIP2_REG 0x10 30*bd023adaSAndreas Dannenberg #define TAS5720_DIGITAL_CLIP1_REG 0x11 31*bd023adaSAndreas Dannenberg #define TAS5720_MAX_REG TAS5720_DIGITAL_CLIP1_REG 32*bd023adaSAndreas Dannenberg 33*bd023adaSAndreas Dannenberg /* TAS5720_DEVICE_ID_REG */ 34*bd023adaSAndreas Dannenberg #define TAS5720_DEVICE_ID 0x01 35*bd023adaSAndreas Dannenberg 36*bd023adaSAndreas Dannenberg /* TAS5720_POWER_CTRL_REG */ 37*bd023adaSAndreas Dannenberg #define TAS5720_DIG_CLIP_MASK GENMASK(7, 2) 38*bd023adaSAndreas Dannenberg #define TAS5720_SLEEP BIT(1) 39*bd023adaSAndreas Dannenberg #define TAS5720_SDZ BIT(0) 40*bd023adaSAndreas Dannenberg 41*bd023adaSAndreas Dannenberg /* TAS5720_DIGITAL_CTRL1_REG */ 42*bd023adaSAndreas Dannenberg #define TAS5720_HPF_BYPASS BIT(7) 43*bd023adaSAndreas Dannenberg #define TAS5720_TDM_CFG_SRC BIT(6) 44*bd023adaSAndreas Dannenberg #define TAS5720_SSZ_DS BIT(3) 45*bd023adaSAndreas Dannenberg #define TAS5720_SAIF_RIGHTJ_24BIT (0x0) 46*bd023adaSAndreas Dannenberg #define TAS5720_SAIF_RIGHTJ_20BIT (0x1) 47*bd023adaSAndreas Dannenberg #define TAS5720_SAIF_RIGHTJ_18BIT (0x2) 48*bd023adaSAndreas Dannenberg #define TAS5720_SAIF_RIGHTJ_16BIT (0x3) 49*bd023adaSAndreas Dannenberg #define TAS5720_SAIF_I2S (0x4) 50*bd023adaSAndreas Dannenberg #define TAS5720_SAIF_LEFTJ (0x5) 51*bd023adaSAndreas Dannenberg #define TAS5720_SAIF_FORMAT_MASK GENMASK(2, 0) 52*bd023adaSAndreas Dannenberg 53*bd023adaSAndreas Dannenberg /* TAS5720_DIGITAL_CTRL2_REG */ 54*bd023adaSAndreas Dannenberg #define TAS5720_MUTE BIT(4) 55*bd023adaSAndreas Dannenberg #define TAS5720_TDM_SLOT_SEL_MASK GENMASK(2, 0) 56*bd023adaSAndreas Dannenberg 57*bd023adaSAndreas Dannenberg /* TAS5720_ANALOG_CTRL_REG */ 58*bd023adaSAndreas Dannenberg #define TAS5720_PWM_RATE_6_3_FSYNC (0x0 << 4) 59*bd023adaSAndreas Dannenberg #define TAS5720_PWM_RATE_8_4_FSYNC (0x1 << 4) 60*bd023adaSAndreas Dannenberg #define TAS5720_PWM_RATE_10_5_FSYNC (0x2 << 4) 61*bd023adaSAndreas Dannenberg #define TAS5720_PWM_RATE_12_6_FSYNC (0x3 << 4) 62*bd023adaSAndreas Dannenberg #define TAS5720_PWM_RATE_14_7_FSYNC (0x4 << 4) 63*bd023adaSAndreas Dannenberg #define TAS5720_PWM_RATE_16_8_FSYNC (0x5 << 4) 64*bd023adaSAndreas Dannenberg #define TAS5720_PWM_RATE_20_10_FSYNC (0x6 << 4) 65*bd023adaSAndreas Dannenberg #define TAS5720_PWM_RATE_24_12_FSYNC (0x7 << 4) 66*bd023adaSAndreas Dannenberg #define TAS5720_PWM_RATE_MASK GENMASK(6, 4) 67*bd023adaSAndreas Dannenberg #define TAS5720_ANALOG_GAIN_19_2DBV (0x0 << 2) 68*bd023adaSAndreas Dannenberg #define TAS5720_ANALOG_GAIN_20_7DBV (0x1 << 2) 69*bd023adaSAndreas Dannenberg #define TAS5720_ANALOG_GAIN_23_5DBV (0x2 << 2) 70*bd023adaSAndreas Dannenberg #define TAS5720_ANALOG_GAIN_26_3DBV (0x3 << 2) 71*bd023adaSAndreas Dannenberg #define TAS5720_ANALOG_GAIN_MASK GENMASK(3, 2) 72*bd023adaSAndreas Dannenberg #define TAS5720_ANALOG_GAIN_SHIFT (0x2) 73*bd023adaSAndreas Dannenberg 74*bd023adaSAndreas Dannenberg /* TAS5720_FAULT_REG */ 75*bd023adaSAndreas Dannenberg #define TAS5720_OC_THRESH_100PCT (0x0 << 4) 76*bd023adaSAndreas Dannenberg #define TAS5720_OC_THRESH_75PCT (0x1 << 4) 77*bd023adaSAndreas Dannenberg #define TAS5720_OC_THRESH_50PCT (0x2 << 4) 78*bd023adaSAndreas Dannenberg #define TAS5720_OC_THRESH_25PCT (0x3 << 4) 79*bd023adaSAndreas Dannenberg #define TAS5720_OC_THRESH_MASK GENMASK(5, 4) 80*bd023adaSAndreas Dannenberg #define TAS5720_CLKE BIT(3) 81*bd023adaSAndreas Dannenberg #define TAS5720_OCE BIT(2) 82*bd023adaSAndreas Dannenberg #define TAS5720_DCE BIT(1) 83*bd023adaSAndreas Dannenberg #define TAS5720_OTE BIT(0) 84*bd023adaSAndreas Dannenberg #define TAS5720_FAULT_MASK GENMASK(3, 0) 85*bd023adaSAndreas Dannenberg 86*bd023adaSAndreas Dannenberg /* TAS5720_DIGITAL_CLIP1_REG */ 87*bd023adaSAndreas Dannenberg #define TAS5720_CLIP1_MASK GENMASK(7, 2) 88*bd023adaSAndreas Dannenberg #define TAS5720_CLIP1_SHIFT (0x2) 89*bd023adaSAndreas Dannenberg 90*bd023adaSAndreas Dannenberg #endif /* __TAS5720_H__ */ 91