1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // ALSA SoC Texas Instruments TAS2783 Audio Smart Amplifier 4 // 5 // Copyright (C) 2025 Texas Instruments Incorporated 6 // https://www.ti.com 7 // 8 // The TAS2783 driver implements a flexible and configurable 9 // algo coefficient setting for single TAS2783 chips. 10 // 11 // Author: Niranjan H Y <niranjanhy@ti.com> 12 // Author: Baojun Xu <baojun.xu@ti.com> 13 // Author: Kevin Lu <kevin-lu@ti.com> 14 15 #include <linux/cleanup.h> 16 #include <linux/unaligned.h> 17 #include <linux/crc32.h> 18 #include <linux/efi.h> 19 #include <linux/err.h> 20 #include <linux/firmware.h> 21 #include <linux/init.h> 22 #include <linux/module.h> 23 #include <sound/pcm_params.h> 24 #include <linux/pm.h> 25 #include <linux/pm_runtime.h> 26 #include <linux/regmap.h> 27 #include <linux/wait.h> 28 #include <linux/soundwire/sdw.h> 29 #include <linux/soundwire/sdw_registers.h> 30 #include <linux/soundwire/sdw_type.h> 31 #if IS_ENABLED(CONFIG_PCI) 32 #include <linux/pci.h> 33 #endif 34 #include <sound/sdw.h> 35 #include <sound/soc.h> 36 #include <sound/tlv.h> 37 #include <sound/tas2781-tlv.h> 38 #include <sound/sdca_function.h> 39 #include <sound/sdca_regmap.h> 40 41 #include "tas2783.h" 42 43 #define TIMEOUT_FW_DL_MS (3000) 44 #define FW_DL_OFFSET 84 /* binary file information */ 45 #define FW_FL_HDR 20 /* minimum number of bytes in one chunk */ 46 #define TAS2783_PROBE_TIMEOUT 5000 47 #define TAS2783_CALI_GUID EFI_GUID(0x1f52d2a1, 0xbb3a, 0x457d, 0xbc, \ 48 0x09, 0x43, 0xa3, 0xf4, 0x31, 0x0a, 0x92) 49 50 static const u32 tas2783_cali_reg[] = { 51 TAS2783_CAL_R0, 52 TAS2783_CAL_INVR0, 53 TAS2783_CAL_R0LOW, 54 TAS2783_CAL_POWER, 55 TAS2783_CAL_TLIM, 56 }; 57 58 struct tas_fw_hdr { 59 u32 size; 60 u32 version_offset; 61 u32 plt_id; 62 u32 ppc3_ver; 63 u32 timestamp; 64 u8 ddc_name[64]; 65 }; 66 67 struct tas_fw_file { 68 u32 vendor_id; 69 u32 file_id; 70 u32 version; 71 u32 length; 72 u32 dest_addr; 73 u8 *fw_data; 74 }; 75 76 struct calibration_data { 77 u32 is_valid; 78 unsigned long read_sz; 79 u8 data[TAS2783_CALIB_DATA_SZ]; 80 }; 81 82 struct tas2783_prv { 83 struct snd_soc_component *component; 84 struct calibration_data cali_data; 85 struct sdw_slave *sdw_peripheral; 86 struct sdca_function_data *sa_func_data; 87 enum sdw_slave_status status; 88 /* calibration */ 89 struct mutex calib_lock; 90 /* pde and firmware download */ 91 struct mutex pde_lock; 92 struct regmap *regmap; 93 struct device *dev; 94 struct class *class; 95 struct attribute_group *cal_attr_groups; 96 struct tm tm; 97 u8 rca_binaryname[64]; 98 u8 dev_name[32]; 99 bool hw_init; 100 /* wq for firmware download */ 101 wait_queue_head_t fw_wait; 102 bool fw_dl_task_done; 103 bool fw_dl_success; 104 /* use fallback fw name */ 105 bool fw_use_fallback; 106 }; 107 108 static const struct reg_default tas2783_reg_default[] = { 109 {TAS2783_AMP_LEVEL, 0x28}, 110 {TASDEV_REG_SDW(0, 0, 0x03), 0x28}, 111 {TASDEV_REG_SDW(0, 0, 0x04), 0x21}, 112 {TASDEV_REG_SDW(0, 0, 0x05), 0x41}, 113 {TASDEV_REG_SDW(0, 0, 0x06), 0x00}, 114 {TASDEV_REG_SDW(0, 0, 0x07), 0x20}, 115 {TASDEV_REG_SDW(0, 0, 0x08), 0x09}, 116 {TASDEV_REG_SDW(0, 0, 0x09), 0x02}, 117 {TASDEV_REG_SDW(0, 0, 0x0a), 0x0a}, 118 {TASDEV_REG_SDW(0, 0, 0x0c), 0x10}, 119 {TASDEV_REG_SDW(0, 0, 0x0d), 0x13}, 120 {TASDEV_REG_SDW(0, 0, 0x0e), 0xc2}, 121 {TASDEV_REG_SDW(0, 0, 0x0f), 0x40}, 122 {TASDEV_REG_SDW(0, 0, 0x10), 0x04}, 123 {TASDEV_REG_SDW(0, 0, 0x13), 0x13}, 124 {TASDEV_REG_SDW(0, 0, 0x14), 0x12}, 125 {TASDEV_REG_SDW(0, 0, 0x15), 0x00}, 126 {TASDEV_REG_SDW(0, 0, 0x16), 0x12}, 127 {TASDEV_REG_SDW(0, 0, 0x17), 0x80}, 128 {TAS2783_DVC_LVL, 0x00}, 129 {TASDEV_REG_SDW(0, 0, 0x1b), 0x61}, 130 {TASDEV_REG_SDW(0, 0, 0x1c), 0x36}, 131 {TASDEV_REG_SDW(0, 0, 0x1d), 0x00}, 132 {TASDEV_REG_SDW(0, 0, 0x1f), 0x01}, 133 {TASDEV_REG_SDW(0, 0, 0x20), 0x2e}, 134 {TASDEV_REG_SDW(0, 0, 0x21), 0x00}, 135 {TASDEV_REG_SDW(0, 0, 0x34), 0x06}, 136 {TASDEV_REG_SDW(0, 0, 0x35), 0xbd}, 137 {TASDEV_REG_SDW(0, 0, 0x36), 0xad}, 138 {TASDEV_REG_SDW(0, 0, 0x37), 0xa8}, 139 {TASDEV_REG_SDW(0, 0, 0x38), 0x00}, 140 {TASDEV_REG_SDW(0, 0, 0x3b), 0xfc}, 141 {TASDEV_REG_SDW(0, 0, 0x3d), 0xdd}, 142 {TASDEV_REG_SDW(0, 0, 0x40), 0xf6}, 143 {TASDEV_REG_SDW(0, 0, 0x41), 0x14}, 144 {TASDEV_REG_SDW(0, 0, 0x5c), 0x19}, 145 {TASDEV_REG_SDW(0, 0, 0x5d), 0x80}, 146 {TASDEV_REG_SDW(0, 0, 0x63), 0x48}, 147 {TASDEV_REG_SDW(0, 0, 0x65), 0x08}, 148 {TASDEV_REG_SDW(0, 0, 0x66), 0xb2}, 149 {TASDEV_REG_SDW(0, 0, 0x67), 0x00}, 150 {TASDEV_REG_SDW(0, 0, 0x6a), 0x12}, 151 {TASDEV_REG_SDW(0, 0, 0x6b), 0xfb}, 152 {TASDEV_REG_SDW(0, 0, 0x6c), 0x00}, 153 {TASDEV_REG_SDW(0, 0, 0x6d), 0x00}, 154 {TASDEV_REG_SDW(0, 0, 0x6e), 0x1a}, 155 {TASDEV_REG_SDW(0, 0, 0x6f), 0x00}, 156 {TASDEV_REG_SDW(0, 0, 0x70), 0x96}, 157 {TASDEV_REG_SDW(0, 0, 0x71), 0x02}, 158 {TASDEV_REG_SDW(0, 0, 0x73), 0x08}, 159 {TASDEV_REG_SDW(0, 0, 0x75), 0xe0}, 160 {TASDEV_REG_SDW(0, 0, 0x7a), 0x60}, 161 {TASDEV_REG_SDW(0, 0, 0x60), 0x21}, 162 {TASDEV_REG_SDW(0, 1, 0x02), 0x00}, 163 {TASDEV_REG_SDW(0, 1, 0x17), 0xc0}, 164 {TASDEV_REG_SDW(0, 1, 0x19), 0x60}, 165 {TASDEV_REG_SDW(0, 1, 0x35), 0x75}, 166 {TASDEV_REG_SDW(0, 1, 0x3d), 0x00}, 167 {TASDEV_REG_SDW(0, 1, 0x3e), 0x00}, 168 {TASDEV_REG_SDW(0, 1, 0x3f), 0x00}, 169 {TASDEV_REG_SDW(0, 1, 0x40), 0x00}, 170 {TASDEV_REG_SDW(0, 1, 0x41), 0x00}, 171 {TASDEV_REG_SDW(0, 1, 0x42), 0x00}, 172 {TASDEV_REG_SDW(0, 1, 0x43), 0x00}, 173 {TASDEV_REG_SDW(0, 1, 0x44), 0x00}, 174 {TASDEV_REG_SDW(0, 1, 0x45), 0x00}, 175 {TASDEV_REG_SDW(0, 1, 0x47), 0xab}, 176 {TASDEV_REG_SDW(0, 0xfd, 0x0d), 0x0d}, 177 {TASDEV_REG_SDW(0, 0xfd, 0x39), 0x00}, 178 {TASDEV_REG_SDW(0, 0xfd, 0x3e), 0x00}, 179 {TASDEV_REG_SDW(0, 0xfd, 0x45), 0x00}, 180 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS21, 0x02, 0), 0x0}, 181 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS21, 0x10, 0), 0x0}, 182 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS24, 0x02, 0), 0x0}, 183 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS24, 0x10, 0), 0x0}, 184 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS26, 0x02, 0), 0x0}, 185 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS26, 0x10, 0), 0x0}, 186 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS28, 0x02, 0), 0x0}, 187 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS28, 0x10, 0), 0x0}, 188 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS127, 0x02, 0), 0x0}, 189 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS127, 0x10, 0), 0x0}, 190 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU21, 0x01, 1), 0x1}, 191 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU21, 0x02, 1), 0x9c00}, 192 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x01, 0), 0x1}, 193 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x01, 1), 0x1}, 194 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x0b, 1), 0x0}, 195 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x10, 0), 0x0}, 196 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x01, 1), 0x1}, 197 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x01, 0), 0x1}, 198 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x0b, 1), 0x0}, 199 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x10, 0), 0x0}, 200 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x01, 0), 0x1}, 201 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x01, 1), 0x1}, 202 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x01, 2), 0x1}, 203 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x0b, 0), 0x0}, 204 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x0b, 1), 0x0}, 205 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x0b, 2), 0x0}, 206 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x10, 0), 0x0}, 207 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x04, 0), 0x0}, 208 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x08, 0), 0x0}, 209 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x10, 0), 0x0}, 210 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x11, 0), 0x0}, 211 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x04, 0), 0x0}, 212 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x08, 0), 0x0}, 213 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x10, 0), 0x0}, 214 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x11, 0), 0x0}, 215 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x04, 0), 0x0}, 216 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x08, 0), 0x0}, 217 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x10, 0), 0x0}, 218 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x11, 0), 0x0}, 219 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x04, 0), 0x0}, 220 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x08, 0), 0x0}, 221 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x10, 0), 0x0}, 222 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x11, 0), 0x0}, 223 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x01, 0), 0x0}, 224 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x04, 0), 0x0}, 225 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x05, 0), 0x1}, 226 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x08, 0), 0x0}, 227 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x10, 0), 0x0}, 228 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x11, 0), 0x0}, 229 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x12, 0), 0x0}, 230 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x01, 0), 0x0}, 231 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x04, 0), 0x0}, 232 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x05, 0), 0x1}, 233 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x08, 0), 0x0}, 234 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x10, 0), 0x0}, 235 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x11, 0), 0x0}, 236 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x12, 0), 0x0}, 237 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 0), 0x0}, 238 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 1), 0x0}, 239 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 2), 0x0}, 240 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 3), 0x0}, 241 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 4), 0x0}, 242 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 5), 0x0}, 243 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 6), 0x0}, 244 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 7), 0x0}, 245 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x06, 0), 0x0}, 246 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT23, 0x04, 0), 0x0}, 247 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT23, 0x08, 0), 0x0}, 248 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT24, 0x04, 0), 0x0}, 249 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT24, 0x08, 0), 0x0}, 250 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT24, 0x11, 0), 0x0}, 251 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT25, 0x04, 0), 0x0}, 252 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT25, 0x08, 0), 0x0}, 253 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT25, 0x11, 0), 0x0}, 254 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT28, 0x04, 0), 0x0}, 255 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT28, 0x08, 0), 0x0}, 256 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT28, 0x11, 0), 0x0}, 257 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x04, 0), 0x0}, 258 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x08, 0), 0x0}, 259 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x11, 0), 0x0}, 260 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0), 0x0}, 261 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 1), 0x0}, 262 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 2), 0x0}, 263 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 3), 0x0}, 264 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 4), 0x0}, 265 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 5), 0x0}, 266 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 6), 0x0}, 267 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 7), 0x0}, 268 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 8), 0x0}, 269 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 9), 0x0}, 270 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xa), 0x0}, 271 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xb), 0x0}, 272 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xc), 0x0}, 273 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xd), 0x0}, 274 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xe), 0x0}, 275 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xf), 0x0}, 276 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23, 0x1, 0), 0x3}, 277 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23, 0x10, 0), 0x3}, 278 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x06, 0), 0x0}, 279 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x10, 0), 0x0}, 280 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x11, 0), 0x0}, 281 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x12, 0), 0x0}, 282 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x13, 0), 0x0}, 283 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x06, 0), 0x0}, 284 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x10, 0), 0x0}, 285 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x11, 0), 0x0}, 286 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x12, 0), 0x0}, 287 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x13, 0), 0x0}, 288 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x05, 0), 0x0}, 289 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x10, 0), 0x1}, 290 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x11, 0), 0x0}, 291 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x12, 0), 0x0}, 292 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_TG23, 0x10, 0), 0x0}, 293 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x01, 0), 0x1}, 294 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x06, 0), 0x0}, 295 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x07, 0), 0x0}, 296 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x08, 0), 0x0}, 297 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x09, 0), 0x0}, 298 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x0a, 0), 0x0}, 299 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x10, 0), 0x1}, 300 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x12, 0), 0x0}, 301 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x13, 0), 0x0}, 302 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x14, 0), 0x0}, 303 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x15, 0), 0x0}, 304 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x16, 0), 0x0}, 305 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_UDMPU23, 0x10, 0), 0x0}, 306 }; 307 308 static const struct reg_sequence tas2783_init_seq[] = { 309 REG_SEQ0(SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x10, 0x00), 0x01), 310 REG_SEQ0(0x00800418, 0x00), 311 REG_SEQ0(0x00800419, 0x00), 312 REG_SEQ0(0x0080041a, 0x00), 313 REG_SEQ0(0x0080041b, 0x00), 314 REG_SEQ0(0x00800428, 0x40), 315 REG_SEQ0(0x00800429, 0x00), 316 REG_SEQ0(0x0080042a, 0x00), 317 REG_SEQ0(0x0080042b, 0x00), 318 REG_SEQ0(SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x1, 0x00), 0x00), 319 REG_SEQ0(0x00800004, 0x21), 320 REG_SEQ0(0x00800005, 0x41), 321 REG_SEQ0(0x00800006, 0x00), 322 REG_SEQ0(0x00800007, 0x20), 323 REG_SEQ0(0x00800015, 0x00), 324 REG_SEQ0(0x00800036, 0xad), 325 REG_SEQ0(0x00800037, 0xa8), 326 REG_SEQ0(0x0080006b, 0x7b), 327 REG_SEQ0(0x0080006c, 0x00), 328 REG_SEQ0(0x0080006d, 0x00), 329 REG_SEQ0(0x0080006e, 0x1a), 330 REG_SEQ0(0x0080006f, 0x00), 331 REG_SEQ0(0x00800071, 0x02), 332 REG_SEQ0(0x008000be, 0x00), 333 REG_SEQ0(0x008000bf, 0x00), 334 REG_SEQ0(0x008000c0, 0x00), 335 REG_SEQ0(0x008000c1, 0x00), 336 REG_SEQ0(0x008000c2, 0x00), 337 REG_SEQ0(0x008000c3, 0x00), 338 REG_SEQ0(0x008000c4, 0x00), 339 }; 340 341 static int tas2783_sdca_mbq_size(struct device *dev, u32 reg) 342 { 343 switch (reg) { 344 case 0x000 ... 0x080: /* Data port 0. */ 345 case 0x100 ... 0x140: /* Data port 1. */ 346 case 0x200 ... 0x240: /* Data port 2. */ 347 case 0x300 ... 0x340: /* Data port 3. */ 348 case 0x400 ... 0x440: /* Data port 4. */ 349 case 0x500 ... 0x540: /* Data port 5. */ 350 case 0x800000 ... 0x803fff: /* Page 0 ~ 127. */ 351 case 0x807e80 ... 0x807eff: /* Page 253. */ 352 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_UDMPU23, 353 TAS2783_SDCA_CTL_UDMPU_CLUSTER, 0): 354 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU21, TAS2783_SDCA_CTL_FU_MUTE, 355 TAS2783_DEVICE_CHANNEL_LEFT): 356 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23, 0x1, 0): 357 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23, 0x10, 0): 358 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x04, 0): 359 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x10, 0): 360 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x11, 0): 361 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x12, 0): 362 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x10, 0): 363 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x11, 0): 364 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x10, 0): 365 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x11, 0): 366 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_TG23, 0x10, 0): 367 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x01, 0): 368 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x08, 0): 369 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x0a, 0): 370 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x10, 0): 371 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x14, 0): 372 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x15, 0): 373 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x16, 0): 374 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x04, 0): 375 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x04, 0): 376 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x04, 0): 377 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT23, 0x04, 0): 378 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT24, 0x04, 0): 379 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT28, 0x04, 0): 380 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x04, 0): 381 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0): 382 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 1): 383 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 2): 384 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 3): 385 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 4): 386 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 5): 387 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 6): 388 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 7): 389 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 8): 390 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 9): 391 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xa): 392 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xb): 393 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xc): 394 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xd): 395 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xe): 396 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xf): 397 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS21, 0x02, 0): 398 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS21, 0x10, 0): 399 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS24, 0x02, 0): 400 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS24, 0x10, 0): 401 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS25, 0x02, 0): 402 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS25, 0x10, 0): 403 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS127, 0x02, 0): 404 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS127, 0x10, 0): 405 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS26, 0x02, 0): 406 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS26, 0x10, 0): 407 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS28, 0x02, 0): 408 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS28, 0x10, 0): 409 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x01, 0): 410 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x04, 0): 411 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x05, 0): 412 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x10, 0): 413 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x11, 0): 414 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x01, 1): 415 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x01, 2): 416 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x01, 0): 417 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x01, 1): 418 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x01, 0): 419 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x01, 0): 420 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x04, 0): 421 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x05, 0): 422 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x10, 0): 423 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x11, 0): 424 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x01, 0): 425 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x01, 1): 426 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT25, 0x04, 0): 427 return 1; 428 429 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x10, 0): 430 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x11, 0): 431 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x10, 0): 432 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x11, 0): 433 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x10, 0): 434 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x11, 0): 435 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT24, 0x11, 0): 436 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT25, 0x11, 0): 437 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT28, 0x11, 0): 438 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x11, 0): 439 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 0): 440 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 1): 441 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 2): 442 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 3): 443 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 4): 444 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 5): 445 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 6): 446 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 7): 447 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU21, 0x02, 1): 448 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x0b, 1): 449 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x0b, 1): 450 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x0b, 2): 451 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x0b, 0): 452 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x0b, 0): 453 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x0b, 1): 454 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x07, 0): 455 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x09, 0): 456 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x12, 0): 457 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x12, 0): 458 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x12, 0): 459 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x13, 0): 460 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x12, 0): 461 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x13, 0): 462 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x10, 0): 463 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x11, 0): 464 return 2; 465 466 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x10, 0): 467 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x08, 0): 468 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x08, 0): 469 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x08, 0): 470 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x08, 0): 471 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT23, 0x08, 0): 472 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT24, 0x08, 0): 473 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT25, 0x08, 0): 474 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT28, 0x08, 0): 475 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x08, 0): 476 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x06, 0): 477 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x10, 0): 478 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x10, 0): 479 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x06, 0): 480 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x12, 0): 481 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x13, 0): 482 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x08, 0): 483 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x08, 0): 484 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x05, 0): 485 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x06, 0): 486 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x06, 0): 487 return 4; 488 489 default: 490 return 0; 491 } 492 } 493 494 static bool tas2783_readable_register(struct device *dev, unsigned int reg) 495 { 496 return tas2783_sdca_mbq_size(dev, reg) > 0; 497 } 498 499 static bool tas2783_volatile_register(struct device *dev, u32 reg) 500 { 501 switch (reg) { 502 case 0x000 ... 0x080: /* Data port 0. */ 503 case 0x100 ... 0x140: /* Data port 1. */ 504 case 0x200 ... 0x240: /* Data port 2. */ 505 case 0x300 ... 0x340: /* Data port 3. */ 506 case 0x400 ... 0x440: /* Data port 4. */ 507 case 0x500 ... 0x540: /* Data port 5. */ 508 case 0x800001: 509 return true; 510 511 default: 512 return false; 513 } 514 } 515 516 static const struct regmap_config tas_regmap = { 517 .reg_bits = 32, 518 .val_bits = 8, 519 .readable_reg = tas2783_readable_register, 520 .volatile_reg = tas2783_volatile_register, 521 .reg_defaults = tas2783_reg_default, 522 .num_reg_defaults = ARRAY_SIZE(tas2783_reg_default), 523 .max_register = 0x41008000 + TASDEV_REG_SDW(0xa1, 0x60, 0x7f), 524 .cache_type = REGCACHE_MAPLE, 525 .use_single_read = true, 526 .use_single_write = true, 527 }; 528 529 static const struct regmap_sdw_mbq_cfg tas2783_mbq_cfg = { 530 .mbq_size = tas2783_sdca_mbq_size, 531 }; 532 533 static s32 tas2783_digital_getvol(struct snd_kcontrol *kcontrol, 534 struct snd_ctl_elem_value *ucontrol) 535 { 536 return snd_soc_get_volsw(kcontrol, ucontrol); 537 } 538 539 static s32 tas2783_digital_putvol(struct snd_kcontrol *kcontrol, 540 struct snd_ctl_elem_value *ucontrol) 541 { 542 return snd_soc_put_volsw(kcontrol, ucontrol); 543 } 544 545 static s32 tas2783_amp_getvol(struct snd_kcontrol *kcontrol, 546 struct snd_ctl_elem_value *ucontrol) 547 { 548 return snd_soc_get_volsw(kcontrol, ucontrol); 549 } 550 551 static s32 tas2783_amp_putvol(struct snd_kcontrol *kcontrol, 552 struct snd_ctl_elem_value *ucontrol) 553 { 554 return snd_soc_put_volsw(kcontrol, ucontrol); 555 } 556 557 static const struct snd_kcontrol_new tas2783_snd_controls[] = { 558 SOC_SINGLE_RANGE_EXT_TLV("Amp Volume", TAS2783_AMP_LEVEL, 559 1, 0, 20, 0, tas2783_amp_getvol, 560 tas2783_amp_putvol, tas2781_amp_tlv), 561 SOC_SINGLE_RANGE_EXT_TLV("Speaker Volume", TAS2783_DVC_LVL, 562 0, 0, 200, 1, tas2783_digital_getvol, 563 tas2783_digital_putvol, tas2781_dvc_tlv), 564 }; 565 566 static s32 tas2783_validate_calibdata(struct tas2783_prv *tas_dev, 567 u8 *data, u32 size) 568 { 569 u32 ts, spk_count, size_calculated; 570 u32 crc_calculated, crc_read, i; 571 u32 *tmp_val; 572 struct tm tm; 573 574 i = 0; 575 tmp_val = (u32 *)data; 576 if (tmp_val[i++] != 2783) { 577 dev_err(tas_dev->dev, "cal data magic number mismatch"); 578 return -EINVAL; 579 } 580 581 spk_count = tmp_val[i++]; 582 if (spk_count > TAS2783_CALIB_MAX_SPK_COUNT) { 583 dev_err(tas_dev->dev, "cal data spk_count too large"); 584 return -EINVAL; 585 } 586 587 ts = tmp_val[i++]; 588 time64_to_tm(ts, 0, &tm); 589 dev_dbg(tas_dev->dev, "cal data timestamp: %ld-%d-%d %d:%d:%d", 590 tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday, 591 tm.tm_hour, tm.tm_min, tm.tm_sec); 592 593 size_calculated = 594 (spk_count * TAS2783_CALIB_PARAMS * sizeof(u32)) + 595 TAS2783_CALIB_HDR_SZ + TAS2783_CALIB_CRC_SZ; 596 if (size_calculated > TAS2783_CALIB_DATA_SZ) { 597 dev_err(tas_dev->dev, "cali data sz too large"); 598 return -EINVAL; 599 } else if (size < size_calculated) { 600 dev_err(tas_dev->dev, "cali data size mismatch calc=%u vs %d\n", 601 size, size_calculated); 602 return -EINVAL; 603 } 604 605 crc_calculated = crc32(~0, data, 606 size_calculated - TAS2783_CALIB_CRC_SZ) ^ ~0; 607 crc_read = tmp_val[(size_calculated - TAS2783_CALIB_CRC_SZ) / sizeof(u32)]; 608 if (crc_calculated != crc_read) { 609 dev_err(tas_dev->dev, 610 "calib data integrity check fail, 0x%08x vs 0x%08x\n", 611 crc_calculated, crc_read); 612 return -EINVAL; 613 } 614 615 return 0; 616 } 617 618 static void tas2783_set_calib_params_to_device(struct tas2783_prv *tas_dev, u32 *cali_data) 619 { 620 u32 dev_count, offset, i, device_num; 621 u32 reg_value; 622 u8 buf[4]; 623 624 dev_count = cali_data[1]; 625 offset = 3; 626 627 for (device_num = 0; device_num < dev_count; device_num++) { 628 if (cali_data[offset] != tas_dev->sdw_peripheral->id.unique_id) { 629 offset += TAS2783_CALIB_PARAMS; 630 continue; 631 } 632 offset++; 633 634 for (i = 0; i < ARRAY_SIZE(tas2783_cali_reg); i++) { 635 reg_value = cali_data[offset + i]; 636 buf[0] = reg_value >> 24; 637 buf[1] = reg_value >> 16; 638 buf[2] = reg_value >> 8; 639 buf[3] = reg_value & 0xff; 640 regmap_bulk_write(tas_dev->regmap, tas2783_cali_reg[i], 641 buf, sizeof(u32)); 642 } 643 break; 644 } 645 646 if (device_num == dev_count) 647 dev_err(tas_dev->dev, 648 "unique id not found in the calib data\n"); 649 else 650 dev_dbg(tas_dev->dev, "calib data update done\n"); 651 } 652 653 static s32 tas2783_update_calibdata(struct tas2783_prv *tas_dev) 654 { 655 efi_guid_t efi_guid = TAS2783_CALI_GUID; 656 u32 attr, i, *tmp_val; 657 unsigned long size; 658 s32 ret; 659 efi_status_t status; 660 static efi_char16_t efi_names[][32] = { 661 L"SmartAmpCalibrationData", L"CALI_DATA"}; 662 663 tmp_val = (u32 *)tas_dev->cali_data.data; 664 attr = 0; 665 666 /* 667 * In some cases, the calibration is performed in Windows, 668 * and data was saved in UEFI. Linux can access it. 669 */ 670 for (i = 0; i < ARRAY_SIZE(efi_names); i++) { 671 size = 0; 672 status = efi.get_variable(efi_names[i], &efi_guid, &attr, 673 &size, NULL); 674 if (size > TAS2783_CALIB_DATA_SZ) { 675 dev_err(tas_dev->dev, "cali data too large\n"); 676 break; 677 } 678 679 tas_dev->cali_data.read_sz = size; 680 if (status == EFI_BUFFER_TOO_SMALL) { 681 status = efi.get_variable(efi_names[i], &efi_guid, &attr, 682 &tas_dev->cali_data.read_sz, 683 tas_dev->cali_data.data); 684 dev_dbg(tas_dev->dev, "cali get %lu bytes result:%ld\n", 685 tas_dev->cali_data.read_sz, status); 686 } 687 if (status == EFI_SUCCESS) 688 break; 689 } 690 691 if (status != EFI_SUCCESS) { 692 /* Failed got calibration data from EFI. */ 693 dev_dbg(tas_dev->dev, "No calibration data in UEFI."); 694 return 0; 695 } 696 697 scoped_guard(mutex, &tas_dev->calib_lock) { 698 ret = tas2783_validate_calibdata(tas_dev, tas_dev->cali_data.data, 699 tas_dev->cali_data.read_sz); 700 if (!ret) 701 tas2783_set_calib_params_to_device(tas_dev, tmp_val); 702 } 703 704 return ret; 705 } 706 707 static s32 tas_fw_read_hdr(const u8 *data, struct tas_fw_hdr *hdr) 708 { 709 hdr->size = get_unaligned_le32(data); 710 hdr->version_offset = get_unaligned_le32(&data[4]); 711 hdr->plt_id = get_unaligned_le32(&data[8]); 712 hdr->ppc3_ver = get_unaligned_le32(&data[12]); 713 memcpy(hdr->ddc_name, &data[16], 64); 714 hdr->timestamp = get_unaligned_le32(&data[80]); 715 716 return 84; 717 } 718 719 static s32 tas_fw_get_next_file(const u8 *data, struct tas_fw_file *file) 720 { 721 file->vendor_id = get_unaligned_le32(&data[0]); 722 file->file_id = get_unaligned_le32(&data[4]); 723 file->version = get_unaligned_le32(&data[8]); 724 file->length = get_unaligned_le32(&data[12]); 725 file->dest_addr = get_unaligned_le32(&data[16]); 726 file->fw_data = (u8 *)&data[20]; 727 728 return file->length + sizeof(u32) * 5; 729 } 730 731 static void tas2783_fw_ready(const struct firmware *fmw, void *context) 732 { 733 struct tas2783_prv *tas_dev = 734 (struct tas2783_prv *)context; 735 const u8 *buf = NULL; 736 s32 img_sz, ret = 0, cur_file = 0; 737 s32 offset = 0; 738 739 struct tas_fw_hdr *hdr __free(kfree) = kzalloc_obj(*hdr); 740 struct tas_fw_file *file __free(kfree) = kzalloc_obj(*file); 741 if (!file || !hdr) { 742 ret = -ENOMEM; 743 goto out; 744 } 745 746 /* firmware binary not found*/ 747 if (!fmw || !fmw->data) { 748 if (!tas_dev->fw_use_fallback) { 749 tas_dev->fw_use_fallback = true; 750 dev_info(tas_dev->dev, 751 "Failed to read preferred fw binary: %s, attempting fallback binary load\n", 752 tas_dev->rca_binaryname); 753 } else { 754 dev_err(tas_dev->dev, 755 "Failed to read fallback fw binary %s\n", 756 tas_dev->rca_binaryname); 757 } 758 759 ret = -EINVAL; 760 goto out; 761 } 762 763 img_sz = fmw->size; 764 buf = fmw->data; 765 offset += tas_fw_read_hdr(buf, hdr); 766 if (hdr->size != img_sz) { 767 ret = -EINVAL; 768 dev_err(tas_dev->dev, "firmware size mismatch with header"); 769 goto out; 770 } 771 772 if (img_sz < FW_DL_OFFSET) { 773 ret = -EINVAL; 774 dev_err(tas_dev->dev, "unexpected size, size is too small"); 775 goto out; 776 } 777 778 mutex_lock(&tas_dev->pde_lock); 779 while (offset < (img_sz - FW_FL_HDR)) { 780 offset += tas_fw_get_next_file(&buf[offset], file); 781 dev_dbg(tas_dev->dev, 782 "v=%d, fid=%d, ver=%d, len=%d, daddr=0x%x, fw=%p", 783 file->vendor_id, file->file_id, 784 file->version, file->length, 785 file->dest_addr, file->fw_data); 786 787 ret = sdw_nwrite_no_pm(tas_dev->sdw_peripheral, 788 file->dest_addr, 789 file->length, 790 file->fw_data); 791 if (ret < 0) { 792 dev_err(tas_dev->dev, 793 "FW download failed: %d", ret); 794 break; 795 } 796 cur_file++; 797 } 798 mutex_unlock(&tas_dev->pde_lock); 799 800 if (cur_file == 0) { 801 dev_err(tas_dev->dev, "fw with no files"); 802 ret = -EINVAL; 803 } else { 804 tas2783_update_calibdata(tas_dev); 805 } 806 807 out: 808 if (!ret) 809 tas_dev->fw_dl_success = true; 810 tas_dev->fw_dl_task_done = true; 811 wake_up(&tas_dev->fw_wait); 812 if (fmw) 813 release_firmware(fmw); 814 } 815 816 static inline s32 tas_clear_latch(struct tas2783_prv *priv) 817 { 818 return regmap_update_bits(priv->regmap, 819 TASDEV_REG_SDW(0, 0, 0x5c), 820 0x04, 0x04); 821 } 822 823 static s32 tas_fu21_event(struct snd_soc_dapm_widget *w, 824 struct snd_kcontrol *k, s32 event) 825 { 826 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 827 struct tas2783_prv *tas_dev = snd_soc_component_get_drvdata(component); 828 s32 mute; 829 830 switch (event) { 831 case SND_SOC_DAPM_POST_PMU: 832 mute = 0; 833 break; 834 835 case SND_SOC_DAPM_PRE_PMD: 836 mute = 1; 837 break; 838 } 839 840 return sdw_write_no_pm(tas_dev->sdw_peripheral, 841 SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU21, 842 TAS2783_SDCA_CTL_FU_MUTE, 1), mute); 843 } 844 845 static s32 tas_fu23_event(struct snd_soc_dapm_widget *w, 846 struct snd_kcontrol *k, s32 event) 847 { 848 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 849 struct tas2783_prv *tas_dev = snd_soc_component_get_drvdata(component); 850 s32 mute; 851 852 switch (event) { 853 case SND_SOC_DAPM_POST_PMU: 854 mute = 0; 855 break; 856 857 case SND_SOC_DAPM_PRE_PMD: 858 mute = 1; 859 break; 860 } 861 862 return sdw_write_no_pm(tas_dev->sdw_peripheral, 863 SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 864 TAS2783_SDCA_CTL_FU_MUTE, 1), mute); 865 } 866 867 static const struct snd_soc_dapm_widget tas_dapm_widgets[] = { 868 SND_SOC_DAPM_AIF_IN("ASI", "ASI Playback", 0, SND_SOC_NOPM, 0, 0), 869 SND_SOC_DAPM_AIF_OUT("ASI OUT", "ASI Capture", 0, SND_SOC_NOPM, 870 0, 0), 871 SND_SOC_DAPM_DAC_E("FU21", NULL, SND_SOC_NOPM, 0, 0, tas_fu21_event, 872 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 873 SND_SOC_DAPM_DAC_E("FU23", NULL, SND_SOC_NOPM, 0, 0, tas_fu23_event, 874 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 875 SND_SOC_DAPM_OUTPUT("SPK"), 876 SND_SOC_DAPM_INPUT("DMIC"), 877 }; 878 879 static const struct snd_soc_dapm_route tas_audio_map[] = { 880 {"FU21", NULL, "ASI"}, 881 {"SPK", NULL, "FU21"}, 882 {"FU23", NULL, "ASI"}, 883 {"SPK", NULL, "FU23"}, 884 {"ASI OUT", NULL, "DMIC"}, 885 }; 886 887 static s32 tas_set_sdw_stream(struct snd_soc_dai *dai, 888 void *sdw_stream, s32 direction) 889 { 890 if (!sdw_stream) 891 return 0; 892 893 snd_soc_dai_dma_data_set(dai, direction, sdw_stream); 894 895 return 0; 896 } 897 898 static void tas_sdw_shutdown(struct snd_pcm_substream *substream, 899 struct snd_soc_dai *dai) 900 { 901 snd_soc_dai_set_dma_data(dai, substream, NULL); 902 } 903 904 static s32 tas_sdw_hw_params(struct snd_pcm_substream *substream, 905 struct snd_pcm_hw_params *params, 906 struct snd_soc_dai *dai) 907 { 908 struct snd_soc_component *component = dai->component; 909 struct tas2783_prv *tas_dev = 910 snd_soc_component_get_drvdata(component); 911 struct sdw_stream_config stream_config = {0}; 912 struct sdw_port_config port_config = {0}; 913 struct sdw_stream_runtime *sdw_stream; 914 struct sdw_slave *sdw_peripheral = tas_dev->sdw_peripheral; 915 s32 ret, retry = 3; 916 917 if (!tas_dev->fw_dl_success) { 918 dev_err(tas_dev->dev, "error playback without fw download"); 919 return -EINVAL; 920 } 921 922 sdw_stream = snd_soc_dai_get_dma_data(dai, substream); 923 if (!sdw_stream) 924 return -EINVAL; 925 926 ret = tas_clear_latch(tas_dev); 927 if (ret) 928 dev_err(tas_dev->dev, 929 "clear latch failed, err=%d", ret); 930 931 scoped_guard(mutex, &tas_dev->pde_lock) { 932 /* 933 * Sometimes, there is error returned during power on. 934 * So added retry logic to ensure power on so that 935 * port prepare succeeds 936 */ 937 do { 938 ret = regmap_write(tas_dev->regmap, 939 SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23, 940 TAS2783_SDCA_CTL_REQ_POW_STATE, 0), 941 TAS2783_SDCA_POW_STATE_ON); 942 if (!ret) 943 break; 944 usleep_range(2000, 2200); 945 } while (retry--); 946 } 947 948 if (ret) 949 return ret; 950 951 /* SoundWire specific configuration */ 952 snd_sdw_params_to_config(substream, params, 953 &stream_config, &port_config); 954 /* port 1 for playback */ 955 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 956 port_config.num = 1; 957 else 958 port_config.num = 2; 959 960 ret = sdw_stream_add_slave(sdw_peripheral, 961 &stream_config, &port_config, 1, sdw_stream); 962 if (ret) 963 dev_err(dai->dev, "Unable to configure port\n"); 964 965 return ret; 966 } 967 968 static s32 tas_sdw_pcm_hw_free(struct snd_pcm_substream *substream, 969 struct snd_soc_dai *dai) 970 { 971 struct snd_soc_component *component = dai->component; 972 struct tas2783_prv *tas_dev = 973 snd_soc_component_get_drvdata(component); 974 struct sdw_stream_runtime *sdw_stream = 975 snd_soc_dai_get_dma_data(dai, substream); 976 977 sdw_stream_remove_slave(tas_dev->sdw_peripheral, sdw_stream); 978 979 guard(mutex)(&tas_dev->pde_lock); 980 return regmap_write(tas_dev->regmap, 981 SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23, 982 TAS2783_SDCA_CTL_REQ_POW_STATE, 0), 983 TAS2783_SDCA_POW_STATE_OFF); 984 } 985 986 static const struct snd_soc_dai_ops tas_dai_ops = { 987 .hw_params = tas_sdw_hw_params, 988 .hw_free = tas_sdw_pcm_hw_free, 989 .set_stream = tas_set_sdw_stream, 990 .shutdown = tas_sdw_shutdown, 991 }; 992 993 static struct snd_soc_dai_driver tas_dai_driver[] = { 994 { 995 .name = "tas2783-codec", 996 .id = 0, 997 .playback = { 998 .stream_name = "Playback", 999 .channels_min = 1, 1000 .channels_max = 4, 1001 .rates = TAS2783_DEVICE_RATES, 1002 .formats = TAS2783_DEVICE_FORMATS, 1003 }, 1004 .capture = { 1005 .stream_name = "Capture", 1006 .channels_min = 1, 1007 .channels_max = 4, 1008 .rates = TAS2783_DEVICE_RATES, 1009 .formats = TAS2783_DEVICE_FORMATS, 1010 }, 1011 .ops = &tas_dai_ops, 1012 .symmetric_rate = 1, 1013 }, 1014 }; 1015 1016 static s32 tas_component_probe(struct snd_soc_component *component) 1017 { 1018 struct tas2783_prv *tas_dev = 1019 snd_soc_component_get_drvdata(component); 1020 1021 tas_dev->component = component; 1022 1023 return 0; 1024 } 1025 1026 static void tas_component_remove(struct snd_soc_component *codec) 1027 { 1028 struct tas2783_prv *tas_dev = 1029 snd_soc_component_get_drvdata(codec); 1030 tas_dev->component = NULL; 1031 } 1032 1033 static const struct snd_soc_component_driver soc_codec_driver_tasdevice = { 1034 .probe = tas_component_probe, 1035 .remove = tas_component_remove, 1036 .controls = tas2783_snd_controls, 1037 .num_controls = ARRAY_SIZE(tas2783_snd_controls), 1038 .dapm_widgets = tas_dapm_widgets, 1039 .num_dapm_widgets = ARRAY_SIZE(tas_dapm_widgets), 1040 .dapm_routes = tas_audio_map, 1041 .num_dapm_routes = ARRAY_SIZE(tas_audio_map), 1042 .idle_bias_on = 1, 1043 .endianness = 1, 1044 }; 1045 1046 static s32 tas_init(struct tas2783_prv *tas_dev) 1047 { 1048 s32 ret; 1049 1050 dev_set_drvdata(tas_dev->dev, tas_dev); 1051 ret = devm_snd_soc_register_component(tas_dev->dev, 1052 &soc_codec_driver_tasdevice, 1053 tas_dai_driver, 1054 ARRAY_SIZE(tas_dai_driver)); 1055 if (ret) { 1056 dev_err(tas_dev->dev, "%s: codec register error:%d.\n", 1057 __func__, ret); 1058 return ret; 1059 } 1060 1061 /* set autosuspend parameters */ 1062 pm_runtime_set_autosuspend_delay(tas_dev->dev, 3000); 1063 pm_runtime_use_autosuspend(tas_dev->dev); 1064 /* make sure the device does not suspend immediately */ 1065 pm_runtime_mark_last_busy(tas_dev->dev); 1066 pm_runtime_enable(tas_dev->dev); 1067 1068 return ret; 1069 } 1070 1071 static s32 tas2783_sdca_dev_suspend(struct device *dev) 1072 { 1073 struct tas2783_prv *tas_dev = dev_get_drvdata(dev); 1074 1075 if (!tas_dev->hw_init) 1076 return 0; 1077 1078 regcache_cache_only(tas_dev->regmap, true); 1079 return 0; 1080 } 1081 1082 static s32 tas2783_sdca_dev_system_suspend(struct device *dev) 1083 { 1084 return tas2783_sdca_dev_suspend(dev); 1085 } 1086 1087 static s32 tas2783_sdca_dev_resume(struct device *dev) 1088 { 1089 struct sdw_slave *slave = dev_to_sdw_dev(dev); 1090 struct tas2783_prv *tas_dev = dev_get_drvdata(dev); 1091 int ret; 1092 1093 ret = sdw_slave_wait_for_init(slave, TAS2783_PROBE_TIMEOUT); 1094 if (ret) { 1095 sdw_show_ping_status(slave->bus, true); 1096 return ret; 1097 } 1098 1099 regcache_cache_only(tas_dev->regmap, false); 1100 ret = regcache_sync(tas_dev->regmap); 1101 if (ret) { 1102 regcache_cache_only(tas_dev->regmap, true); 1103 regcache_mark_dirty(tas_dev->regmap); 1104 return ret; 1105 } 1106 1107 return 0; 1108 } 1109 1110 static const struct dev_pm_ops tas2783_sdca_pm = { 1111 SYSTEM_SLEEP_PM_OPS(tas2783_sdca_dev_system_suspend, tas2783_sdca_dev_resume) 1112 RUNTIME_PM_OPS(tas2783_sdca_dev_suspend, tas2783_sdca_dev_resume, NULL) 1113 }; 1114 1115 static void tas_generate_fw_name(struct sdw_slave *slave, char *name, size_t size) 1116 { 1117 struct sdw_bus *bus = slave->bus; 1118 u8 unique_id = slave->id.unique_id; 1119 bool pci_found = false; 1120 #if IS_ENABLED(CONFIG_PCI) 1121 struct device *dev = &slave->dev; 1122 struct tas2783_prv *tas_dev = dev_get_drvdata(&slave->dev); 1123 struct pci_dev *pci = NULL; 1124 const char *fw_uid_prefix = tas_dev->fw_use_fallback ? "" : "0x"; 1125 1126 for (; dev; dev = dev->parent) { 1127 if (dev->bus == &pci_bus_type) { 1128 pci = to_pci_dev(dev); 1129 scnprintf(name, size, "%04X-%1X-%s%1X.bin", 1130 pci->subsystem_device, bus->link_id, 1131 fw_uid_prefix, unique_id); 1132 pci_found = true; 1133 break; 1134 } 1135 } 1136 #endif 1137 1138 if (!pci_found) 1139 scnprintf(name, size, "tas2783-%1X-%1X.bin", 1140 bus->link_id, unique_id); 1141 } 1142 1143 static s32 tas_fw_load(struct tas2783_prv *tas_dev, struct sdw_slave *slave) 1144 { 1145 s32 ret; 1146 u8 unique_id = tas_dev->sdw_peripheral->id.unique_id; 1147 1148 tas_generate_fw_name(slave, tas_dev->rca_binaryname, 1149 sizeof(tas_dev->rca_binaryname)); 1150 1151 tas_dev->fw_dl_task_done = false; 1152 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_UEVENT, 1153 tas_dev->rca_binaryname, tas_dev->dev, 1154 GFP_KERNEL, tas_dev, tas2783_fw_ready); 1155 if (ret) { 1156 dev_err(tas_dev->dev, 1157 "firmware request failed for uid=%d, ret=%d\n", 1158 unique_id, ret); 1159 return ret; 1160 } 1161 1162 ret = wait_event_timeout(tas_dev->fw_wait, tas_dev->fw_dl_task_done, 1163 msecs_to_jiffies(TIMEOUT_FW_DL_MS)); 1164 if (!ret) { 1165 dev_err(tas_dev->dev, "fw request, wait_event timeout\n"); 1166 return -EAGAIN; 1167 } 1168 1169 return 0; 1170 } 1171 1172 static s32 tas_io_init(struct device *dev, struct sdw_slave *slave) 1173 { 1174 struct tas2783_prv *tas_dev = dev_get_drvdata(dev); 1175 s32 ret; 1176 1177 if (tas_dev->hw_init) 1178 return 0; 1179 1180 tas_dev->fw_dl_success = false; 1181 1182 ret = regmap_write(tas_dev->regmap, TAS2783_SW_RESET, 0x1); 1183 if (ret) { 1184 dev_err(dev, "sw reset failed, err=%d", ret); 1185 return ret; 1186 } 1187 usleep_range(2000, 2200); 1188 1189 tas_dev->fw_use_fallback = false; 1190 ret = tas_fw_load(tas_dev, slave); 1191 if (!ret && tas_dev->fw_use_fallback) 1192 ret = tas_fw_load(tas_dev, slave); 1193 1194 if (!ret) { 1195 if (tas_dev->sa_func_data) 1196 ret = sdca_regmap_write_init(dev, tas_dev->regmap, 1197 tas_dev->sa_func_data); 1198 else 1199 ret = regmap_multi_reg_write(tas_dev->regmap, tas2783_init_seq, 1200 ARRAY_SIZE(tas2783_init_seq)); 1201 1202 if (ret) 1203 dev_err(tas_dev->dev, 1204 "init writes failed, err=%d", ret); 1205 else 1206 tas_dev->hw_init = true; 1207 } 1208 1209 return ret; 1210 } 1211 1212 static s32 tas_update_status(struct sdw_slave *slave, 1213 enum sdw_slave_status status) 1214 { 1215 struct tas2783_prv *tas_dev = dev_get_drvdata(&slave->dev); 1216 struct device *dev = &slave->dev; 1217 1218 dev_dbg(dev, "Peripheral status = %s", 1219 status == SDW_SLAVE_UNATTACHED ? "unattached" : 1220 status == SDW_SLAVE_ATTACHED ? "attached" : "alert"); 1221 1222 tas_dev->status = status; 1223 if (status == SDW_SLAVE_UNATTACHED) 1224 tas_dev->hw_init = false; 1225 1226 /* Perform initialization only if slave status 1227 * is present and hw_init flag is false 1228 */ 1229 if (tas_dev->hw_init || tas_dev->status != SDW_SLAVE_ATTACHED) 1230 return 0; 1231 1232 regcache_cache_only(tas_dev->regmap, false); 1233 1234 /* 1235 * The device is attaching uninitialized: either this is the first 1236 * attach, or it lost power (and with it all register and DSP state) 1237 * while the controller was power-gated during system suspend. The 1238 * cache still holds the pre-suspend values, and tas_io_init() below 1239 * resets the device via TAS2783_SW_RESET anyway, so syncing it back 1240 * is both useless and harmful: later read-modify-write updates would 1241 * compare against stale data and skip the hardware write. 1242 * 1243 * Drop the cache instead, so that subsequent accesses see the real 1244 * hardware state. Syncing after the reset is not an option either: 1245 * the cache accepts registers for which tas2783_sdca_mbq_size() 1246 * returns 0, and writing those back fails with -EINVAL. 1247 */ 1248 regcache_drop_region(tas_dev->regmap, 0, UINT_MAX); 1249 1250 /* perform I/O transfers required for Slave initialization */ 1251 return tas_io_init(&slave->dev, slave); 1252 } 1253 1254 /* 1255 * TAS2783 requires explicit port prepare during playback stream 1256 * setup even when simple_ch_prep_sm is enabled. Without this, 1257 * the port fails to enter the prepared state resulting in no audio output. 1258 */ 1259 static int tas_port_prep(struct sdw_slave *slave, struct sdw_prepare_ch *prep_ch, 1260 enum sdw_port_prep_ops pre_ops) 1261 { 1262 struct device *dev = &slave->dev; 1263 struct sdw_dpn_prop *dpn_prop; 1264 u32 addr; 1265 int ret; 1266 1267 dpn_prop = slave->prop.sink_dpn_prop; 1268 if (!dpn_prop || !dpn_prop->simple_ch_prep_sm) 1269 return 0; 1270 1271 addr = SDW_DPN_PREPARECTRL(prep_ch->num); 1272 switch (pre_ops) { 1273 case SDW_OPS_PORT_PRE_PREP: 1274 ret = sdw_write_no_pm(slave, addr, prep_ch->ch_mask); 1275 if (ret) 1276 dev_err(dev, "prep failed for port %d, err=%d\n", 1277 prep_ch->num, ret); 1278 return ret; 1279 1280 case SDW_OPS_PORT_PRE_DEPREP: 1281 ret = sdw_write_no_pm(slave, addr, 0x00); 1282 if (ret) 1283 dev_err(dev, "de-prep failed for port %d, err=%d\n", 1284 prep_ch->num, ret); 1285 return ret; 1286 1287 case SDW_OPS_PORT_POST_PREP: 1288 case SDW_OPS_PORT_POST_DEPREP: 1289 /* No POST handling required for TAS2783 */ 1290 return 0; 1291 } 1292 1293 return 0; 1294 } 1295 1296 static const struct sdw_slave_ops tas_sdw_ops = { 1297 .update_status = tas_update_status, 1298 .port_prep = tas_port_prep, 1299 }; 1300 1301 static void tas_remove(struct tas2783_prv *tas_dev) 1302 { 1303 snd_soc_unregister_component(tas_dev->dev); 1304 } 1305 1306 static s32 tas_sdw_probe(struct sdw_slave *peripheral, 1307 const struct sdw_device_id *id) 1308 { 1309 struct regmap *regmap; 1310 struct device *dev = &peripheral->dev; 1311 struct tas2783_prv *tas_dev; 1312 struct sdca_function_data *function_data = NULL; 1313 int ret, i; 1314 1315 ret = sdw_slave_read_prop(peripheral); 1316 if (ret) 1317 return dev_err_probe(dev, ret, 1318 "slave property read failed"); 1319 1320 tas_dev = devm_kzalloc(dev, sizeof(*tas_dev), GFP_KERNEL); 1321 if (!tas_dev) 1322 return dev_err_probe(dev, -ENOMEM, 1323 "Failed devm_kzalloc"); 1324 1325 i = -1; 1326 /* check if we have any SDCA function data available */ 1327 if (peripheral->sdca_data.num_functions > 0) { 1328 dev_dbg(dev, "SDCA functions found: %d", peripheral->sdca_data.num_functions); 1329 1330 /* Look for Smart Amp function type */ 1331 for (i = 0; i < peripheral->sdca_data.num_functions; i++) { 1332 if (peripheral->sdca_data.function[i].type == 1333 SDCA_FUNCTION_TYPE_SMART_AMP) { 1334 dev_info(dev, "Found Smart Amp function at index %d", i); 1335 break; 1336 } 1337 } 1338 } 1339 1340 if (i >= 0 && i < peripheral->sdca_data.num_functions) { 1341 /* Allocate memory for function data */ 1342 function_data = devm_kzalloc(dev, sizeof(*function_data), 1343 GFP_KERNEL); 1344 if (!function_data) 1345 return dev_err_probe(dev, -ENOMEM, 1346 "failed to parse sdca functions"); 1347 1348 function_data->desc = &peripheral->sdca_data.function[i]; 1349 1350 /* Parse the function */ 1351 ret = sdca_parse_function(dev, peripheral, function_data); 1352 if (!ret) 1353 tas_dev->sa_func_data = function_data; 1354 else 1355 dev_warn(dev, "smartamp function parse failed:err%d, using defaults", ret); 1356 } 1357 1358 tas_dev->dev = dev; 1359 tas_dev->sdw_peripheral = peripheral; 1360 tas_dev->hw_init = false; 1361 mutex_init(&tas_dev->calib_lock); 1362 mutex_init(&tas_dev->pde_lock); 1363 1364 init_waitqueue_head(&tas_dev->fw_wait); 1365 dev_set_drvdata(dev, tas_dev); 1366 regmap = devm_regmap_init_sdw_mbq_cfg(&peripheral->dev, 1367 peripheral, 1368 &tas_regmap, 1369 &tas2783_mbq_cfg); 1370 if (IS_ERR(regmap)) 1371 return dev_err_probe(dev, PTR_ERR(regmap), 1372 "Failed devm_regmap_init_sdw."); 1373 1374 /* keep in cache until the device is fully initialized */ 1375 regcache_cache_only(regmap, true); 1376 tas_dev->regmap = regmap; 1377 return tas_init(tas_dev); 1378 } 1379 1380 static void tas_sdw_remove(struct sdw_slave *peripheral) 1381 { 1382 struct tas2783_prv *tas_dev = dev_get_drvdata(&peripheral->dev); 1383 1384 pm_runtime_disable(tas_dev->dev); 1385 tas_remove(tas_dev); 1386 mutex_destroy(&tas_dev->calib_lock); 1387 mutex_destroy(&tas_dev->pde_lock); 1388 dev_set_drvdata(&peripheral->dev, NULL); 1389 } 1390 1391 static const struct sdw_device_id tas_sdw_id[] = { 1392 /* chipid for the TAS2783 is 0x0000 */ 1393 SDW_SLAVE_ENTRY(0x0102, 0x0000, 0), 1394 {}, 1395 }; 1396 MODULE_DEVICE_TABLE(sdw, tas_sdw_id); 1397 1398 static struct sdw_driver tas_sdw_driver = { 1399 .driver = { 1400 .name = "slave-tas2783", 1401 .pm = pm_ptr(&tas2783_sdca_pm), 1402 }, 1403 .probe = tas_sdw_probe, 1404 .remove = tas_sdw_remove, 1405 .ops = &tas_sdw_ops, 1406 .id_table = tas_sdw_id, 1407 }; 1408 module_sdw_driver(tas_sdw_driver); 1409 1410 MODULE_IMPORT_NS("SND_SOC_SDCA"); 1411 MODULE_AUTHOR("Texas Instruments Inc."); 1412 MODULE_DESCRIPTION("ASoC TAS2783 SoundWire Driver"); 1413 MODULE_LICENSE("GPL"); 1414