1*5df7f71dSDan Murphy /* 2*5df7f71dSDan Murphy * tas2552.h - ALSA SoC Texas Instruments TAS2552 Mono Audio Amplifier 3*5df7f71dSDan Murphy * 4*5df7f71dSDan Murphy * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com 5*5df7f71dSDan Murphy * 6*5df7f71dSDan Murphy * Author: Dan Murphy <dmurphy@ti.com> 7*5df7f71dSDan Murphy * 8*5df7f71dSDan Murphy * This program is free software; you can redistribute it and/or 9*5df7f71dSDan Murphy * modify it under the terms of the GNU General Public License 10*5df7f71dSDan Murphy * version 2 as published by the Free Software Foundation. 11*5df7f71dSDan Murphy * 12*5df7f71dSDan Murphy * This program is distributed in the hope that it will be useful, but 13*5df7f71dSDan Murphy * WITHOUT ANY WARRANTY; without even the implied warranty of 14*5df7f71dSDan Murphy * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15*5df7f71dSDan Murphy * General Public License for more details. 16*5df7f71dSDan Murphy */ 17*5df7f71dSDan Murphy 18*5df7f71dSDan Murphy #ifndef __TAS2552_H__ 19*5df7f71dSDan Murphy #define __TAS2552_H__ 20*5df7f71dSDan Murphy 21*5df7f71dSDan Murphy /* Register Address Map */ 22*5df7f71dSDan Murphy #define TAS2552_DEVICE_STATUS 0x00 23*5df7f71dSDan Murphy #define TAS2552_CFG_1 0x01 24*5df7f71dSDan Murphy #define TAS2552_CFG_2 0x02 25*5df7f71dSDan Murphy #define TAS2552_CFG_3 0x03 26*5df7f71dSDan Murphy #define TAS2552_DOUT 0x04 27*5df7f71dSDan Murphy #define TAS2552_SER_CTRL_1 0x05 28*5df7f71dSDan Murphy #define TAS2552_SER_CTRL_2 0x06 29*5df7f71dSDan Murphy #define TAS2552_OUTPUT_DATA 0x07 30*5df7f71dSDan Murphy #define TAS2552_PLL_CTRL_1 0x08 31*5df7f71dSDan Murphy #define TAS2552_PLL_CTRL_2 0x09 32*5df7f71dSDan Murphy #define TAS2552_PLL_CTRL_3 0x0a 33*5df7f71dSDan Murphy #define TAS2552_BTIP 0x0b 34*5df7f71dSDan Murphy #define TAS2552_BTS_CTRL 0x0c 35*5df7f71dSDan Murphy #define TAS2552_RESERVED_0D 0x0d 36*5df7f71dSDan Murphy #define TAS2552_LIMIT_RATE_HYS 0x0e 37*5df7f71dSDan Murphy #define TAS2552_LIMIT_RELEASE 0x0f 38*5df7f71dSDan Murphy #define TAS2552_LIMIT_INT_COUNT 0x10 39*5df7f71dSDan Murphy #define TAS2552_PDM_CFG 0x11 40*5df7f71dSDan Murphy #define TAS2552_PGA_GAIN 0x12 41*5df7f71dSDan Murphy #define TAS2552_EDGE_RATE_CTRL 0x13 42*5df7f71dSDan Murphy #define TAS2552_BOOST_PT_CTRL 0x14 43*5df7f71dSDan Murphy #define TAS2552_VER_NUM 0x16 44*5df7f71dSDan Murphy #define TAS2552_VBAT_DATA 0x19 45*5df7f71dSDan Murphy #define TAS2552_MAX_REG 0x20 46*5df7f71dSDan Murphy 47*5df7f71dSDan Murphy /* CFG1 Register Masks */ 48*5df7f71dSDan Murphy #define TAS2552_MUTE_MASK (1 << 2) 49*5df7f71dSDan Murphy #define TAS2552_SWS_MASK (1 << 1) 50*5df7f71dSDan Murphy #define TAS2552_WCLK_MASK 0x07 51*5df7f71dSDan Murphy #define TAS2552_CLASSD_EN_MASK (1 << 7) 52*5df7f71dSDan Murphy 53*5df7f71dSDan Murphy /* CFG2 Register Masks */ 54*5df7f71dSDan Murphy #define TAS2552_CLASSD_EN (1 << 7) 55*5df7f71dSDan Murphy #define TAS2552_BOOST_EN (1 << 6) 56*5df7f71dSDan Murphy #define TAS2552_APT_EN (1 << 5) 57*5df7f71dSDan Murphy #define TAS2552_PLL_ENABLE (1 << 3) 58*5df7f71dSDan Murphy #define TAS2552_LIM_EN (1 << 2) 59*5df7f71dSDan Murphy #define TAS2552_IVSENSE_EN (1 << 1) 60*5df7f71dSDan Murphy 61*5df7f71dSDan Murphy /* CFG3 Register Masks */ 62*5df7f71dSDan Murphy #define TAS2552_WORD_CLK_MASK (1 << 7) 63*5df7f71dSDan Murphy #define TAS2552_BIT_CLK_MASK (1 << 6) 64*5df7f71dSDan Murphy #define TAS2552_DATA_FORMAT_MASK (0x11 << 2) 65*5df7f71dSDan Murphy 66*5df7f71dSDan Murphy #define TAS2552_DAIFMT_I2S_MASK 0xf3 67*5df7f71dSDan Murphy #define TAS2552_DAIFMT_DSP (1 << 3) 68*5df7f71dSDan Murphy #define TAS2552_DAIFMT_RIGHT_J (1 << 4) 69*5df7f71dSDan Murphy #define TAS2552_DAIFMT_LEFT_J (0x11 << 3) 70*5df7f71dSDan Murphy 71*5df7f71dSDan Murphy #define TAS2552_PLL_SRC_MCLK 0x00 72*5df7f71dSDan Murphy #define TAS2552_PLL_SRC_BCLK (1 << 3) 73*5df7f71dSDan Murphy #define TAS2552_PLL_SRC_IVCLKIN (1 << 4) 74*5df7f71dSDan Murphy #define TAS2552_PLL_SRC_1_8_FIXED (0x11 << 3) 75*5df7f71dSDan Murphy 76*5df7f71dSDan Murphy #define TAS2552_DIN_SRC_SEL_MUTED 0x00 77*5df7f71dSDan Murphy #define TAS2552_DIN_SRC_SEL_LEFT (1 << 4) 78*5df7f71dSDan Murphy #define TAS2552_DIN_SRC_SEL_RIGHT (1 << 5) 79*5df7f71dSDan Murphy #define TAS2552_DIN_SRC_SEL_AVG_L_R (0x11 << 4) 80*5df7f71dSDan Murphy 81*5df7f71dSDan Murphy #define TAS2552_PDM_IN_SEL (1 << 5) 82*5df7f71dSDan Murphy #define TAS2552_I2S_OUT_SEL (1 << 6) 83*5df7f71dSDan Murphy #define TAS2552_ANALOG_IN_SEL (1 << 7) 84*5df7f71dSDan Murphy 85*5df7f71dSDan Murphy /* CFG3 WCLK Dividers */ 86*5df7f71dSDan Murphy #define TAS2552_8KHZ 0x00 87*5df7f71dSDan Murphy #define TAS2552_11_12KHZ (1 << 1) 88*5df7f71dSDan Murphy #define TAS2552_16KHZ (1 << 2) 89*5df7f71dSDan Murphy #define TAS2552_22_24KHZ (1 << 3) 90*5df7f71dSDan Murphy #define TAS2552_32KHZ (1 << 4) 91*5df7f71dSDan Murphy #define TAS2552_44_48KHZ (1 << 5) 92*5df7f71dSDan Murphy #define TAS2552_88_96KHZ (1 << 6) 93*5df7f71dSDan Murphy #define TAS2552_176_192KHZ (1 << 7) 94*5df7f71dSDan Murphy 95*5df7f71dSDan Murphy /* OUTPUT_DATA register */ 96*5df7f71dSDan Murphy #define TAS2552_PDM_DATA_I 0x00 97*5df7f71dSDan Murphy #define TAS2552_PDM_DATA_V (1 << 6) 98*5df7f71dSDan Murphy #define TAS2552_PDM_DATA_I_V (1 << 7) 99*5df7f71dSDan Murphy #define TAS2552_PDM_DATA_V_I (0x11 << 6) 100*5df7f71dSDan Murphy 101*5df7f71dSDan Murphy /* PDM CFG Register */ 102*5df7f71dSDan Murphy #define TAS2552_PDM_DATA_ES_RISE 0x4 103*5df7f71dSDan Murphy 104*5df7f71dSDan Murphy #define TAS2552_PDM_PLL_CLK_SEL 0x00 105*5df7f71dSDan Murphy #define TAS2552_PDM_IV_CLK_SEL (1 << 1) 106*5df7f71dSDan Murphy #define TAS2552_PDM_BCLK_SEL (1 << 2) 107*5df7f71dSDan Murphy #define TAS2552_PDM_MCLK_SEL (1 << 3) 108*5df7f71dSDan Murphy 109*5df7f71dSDan Murphy /* Boost pass-through register */ 110*5df7f71dSDan Murphy #define TAS2552_APT_DELAY_50 0x00 111*5df7f71dSDan Murphy #define TAS2552_APT_DELAY_75 (1 << 1) 112*5df7f71dSDan Murphy #define TAS2552_APT_DELAY_125 (1 << 2) 113*5df7f71dSDan Murphy #define TAS2552_APT_DELAY_200 (1 << 3) 114*5df7f71dSDan Murphy 115*5df7f71dSDan Murphy #define TAS2552_APT_THRESH_2_5 0x00 116*5df7f71dSDan Murphy #define TAS2552_APT_THRESH_1_7 (1 << 3) 117*5df7f71dSDan Murphy #define TAS2552_APT_THRESH_1_4_1_1 (1 << 4) 118*5df7f71dSDan Murphy #define TAS2552_APT_THRESH_2_1_7 (0x11 << 2) 119*5df7f71dSDan Murphy 120*5df7f71dSDan Murphy /* PLL Control Register */ 121*5df7f71dSDan Murphy #define TAS2552_245MHZ_CLK 24576000 122*5df7f71dSDan Murphy #define TAS2552_225MHZ_CLK 22579200 123*5df7f71dSDan Murphy #define TAS2552_PLL_J_MASK 0x7f 124*5df7f71dSDan Murphy #define TAS2552_PLL_D_UPPER_MASK 0x3f 125*5df7f71dSDan Murphy #define TAS2552_PLL_D_LOWER_MASK 0xff 126*5df7f71dSDan Murphy #define TAS2552_PLL_BYPASS_MASK 0x80 127*5df7f71dSDan Murphy #define TAS2552_PLL_BYPASS 0x80 128*5df7f71dSDan Murphy 129*5df7f71dSDan Murphy #endif 130