1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * rt722-sdca.h -- RT722 SDCA ALSA SoC audio driver header 4 * 5 * Copyright(c) 2023 Realtek Semiconductor Corp. 6 */ 7 8 #ifndef __RT722_H__ 9 #define __RT722_H__ 10 11 #include <linux/pm.h> 12 #include <linux/regmap.h> 13 #include <linux/soundwire/sdw.h> 14 #include <linux/soundwire/sdw_type.h> 15 #include <sound/soc.h> 16 #include <linux/workqueue.h> 17 18 struct rt722_sdca_priv { 19 struct regmap *regmap; 20 struct snd_soc_component *component; 21 struct sdw_slave *slave; 22 struct sdw_bus_params params; 23 bool hw_init; 24 bool first_hw_init; 25 struct mutex calibrate_mutex; 26 struct mutex disable_irq_lock; 27 bool disable_irq; 28 /* For Headset jack & Headphone */ 29 unsigned int scp_sdca_stat1; 30 unsigned int scp_sdca_stat2; 31 struct snd_soc_jack *hs_jack; 32 struct delayed_work jack_detect_work; 33 struct delayed_work jack_btn_check_work; 34 int jack_type; 35 int jd_src; 36 bool fu0f_dapm_mute; 37 bool fu0f_mixer_l_mute; 38 bool fu0f_mixer_r_mute; 39 /* For AMP */ 40 bool fu06_dapm_mute; 41 bool fu06_mixer_l_mute; 42 bool fu06_mixer_r_mute; 43 /* For DMIC */ 44 bool fu1e_dapm_mute; 45 bool fu1e_mixer_mute[4]; 46 int hw_vid; 47 int cae_update_done; 48 }; 49 50 struct rt722_sdca_dmic_kctrl_priv { 51 unsigned int reg_base; 52 unsigned int count; 53 unsigned int max; 54 unsigned int invert; 55 }; 56 57 /* NID */ 58 #define RT722_VENDOR_REG 0x20 59 #define RT722_VENDOR_EQ_CAE 0x53 60 #define RT722_VENDOR_CALI 0x58 61 #define RT722_VENDOR_SPK_EFUSE 0x5c 62 #define RT722_VENDOR_IMS_DRE 0x5b 63 #define RT722_VENDOR_ANALOG_CTL 0x5f 64 #define RT722_VENDOR_HDA_CTL 0x61 65 66 /* Index (NID:20h) */ 67 #define RT722_JD_PRODUCT_NUM 0x00 68 #define RT722_ANALOG_BIAS_CTL3 0x04 69 #define RT722_MISC_CTRL1 0x07 70 #define RT722_JD_CTRL1 0x09 71 #define RT722_LDO2_3_CTL1 0x0e 72 #define RT722_LDO1_CTL 0x1a 73 #define RT722_HP_JD_CTRL 0x24 74 #define RT722_CLSD_CTRL6 0x3c 75 #define RT722_COMBO_JACK_AUTO_CTL1 0x45 76 #define RT722_COMBO_JACK_AUTO_CTL2 0x46 77 #define RT722_COMBO_JACK_AUTO_CTL3 0x47 78 #define RT722_DIGITAL_MISC_CTRL4 0x4a 79 #define RT722_VREFO_GAT 0x63 80 #define RT722_FSM_CTL 0x67 81 #define RT722_SDCA_INTR_REC 0x82 82 #define RT722_SW_CONFIG1 0x8a 83 #define RT722_SW_CONFIG2 0x8b 84 85 /* Index (NID:53h) */ 86 #define RT722_EQ_CTRL_SPK 0x00 87 #define RT722_EQ_CTRL_HP 0x100 88 #define RT722_EQ_CTRL_DMIC 0x200 89 #define RT722_EQ_CTRL_AMIC 0x300 90 91 /* Index (NID:58h) */ 92 #define RT722_DAC_DC_CALI_CTL0 0x00 93 #define RT722_DAC_DC_CALI_CTL1 0x01 94 #define RT722_DAC_DC_CALI_CTL2 0x02 95 #define RT722_DAC_DC_CALI_CTL3 0x03 96 97 /* Index (NID:59h) */ 98 #define RT722_ULTRA_SOUND_DETECTOR6 0x1e 99 100 /* Index (NID:5bh) */ 101 #define RT722_IMS_DIGITAL_CTL1 0x00 102 #define RT722_IMS_DIGITAL_CTL5 0x05 103 #define RT722_HP_DETECT_RLDET_CTL1 0x29 104 #define RT722_HP_DETECT_RLDET_CTL2 0x2a 105 106 /* Index (NID:5fh) */ 107 #define RT722_MISC_POWER_CTL0 0x00 108 #define RT722_MISC_POWER_CTL7 0x08 109 110 /* Index (NID:61h) */ 111 #define RT722_HDA_LEGACY_MUX_CTL0 0x00 112 #define RT722_HDA_LEGACY_UNSOL_CTL 0x03 113 #define RT722_HDA_LEGACY_CONFIG_CTL0 0x06 114 #define RT722_HDA_LEGACY_RESET_CTL 0x08 115 #define RT722_HDA_LEGACY_GPIO_WAKE_EN_CTL 0x0e 116 #define RT722_DMIC_ENT_FLOAT_CTL 0x10 117 #define RT722_DMIC_GAIN_ENT_FLOAT_CTL0 0x11 118 #define RT722_DMIC_GAIN_ENT_FLOAT_CTL2 0x13 119 #define RT722_ADC_ENT_FLOAT_CTL 0x15 120 #define RT722_ADC_VOL_CH_FLOAT_CTL 0x17 121 #define RT722_ADC_SAMPLE_RATE_FLOAT 0x18 122 #define RT722_DAC03_HP_PDE_FLOAT_CTL 0x22 123 #define RT722_MIC2_LINE2_PDE_FLOAT_CTL 0x23 124 #define RT722_ET41_LINE2_PDE_FLOAT_CTL 0x24 125 #define RT722_ADC0A_08_PDE_FLOAT_CTL 0x25 126 #define RT722_ADC10_PDE_FLOAT_CTL 0x26 127 #define RT722_DMIC1_2_PDE_FLOAT_CTL 0x28 128 #define RT722_AMP_PDE_FLOAT_CTL 0x29 129 #define RT722_I2S_IN_OUT_PDE_FLOAT_CTL 0x2f 130 #define RT722_GE_RELATED_CTL1 0x45 131 #define RT722_GE_RELATED_CTL2 0x46 132 #define RT722_MIXER_CTL0 0x52 133 #define RT722_MIXER_CTL1 0x53 134 #define RT722_EAPD_CTL 0x55 135 #define RT722_UMP_HID_CTL0 0x60 136 #define RT722_UMP_HID_CTL1 0x61 137 #define RT722_UMP_HID_CTL2 0x62 138 #define RT722_UMP_HID_CTL3 0x63 139 #define RT722_UMP_HID_CTL4 0x64 140 #define RT722_UMP_HID_CTL5 0x65 141 #define RT722_UMP_HID_CTL6 0x66 142 #define RT722_UMP_HID_CTL7 0x67 143 #define RT722_UMP_HID_CTL8 0x68 144 #define RT722_FLOAT_CTRL_1 0x70 145 #define RT722_ENT_FLOAT_CTRL_1 0x76 146 147 /* Parameter & Verb control 01 (0x1a)(NID:20h) */ 148 #define RT722_HIDDEN_REG_SW_RESET (0x1 << 14) 149 150 /* combo jack auto switch control 2 (0x46)(NID:20h) */ 151 #define RT722_COMBOJACK_AUTO_DET_STATUS (0x1 << 11) 152 #define RT722_COMBOJACK_AUTO_DET_TRS (0x1 << 10) 153 #define RT722_COMBOJACK_AUTO_DET_CTIA (0x1 << 9) 154 #define RT722_COMBOJACK_AUTO_DET_OMTP (0x1 << 8) 155 156 /* DAC calibration control (0x00)(NID:58h) */ 157 #define RT722_DC_CALIB_CTRL (0x1 << 16) 158 /* DAC DC offset calibration control-1 (0x01)(NID:58h) */ 159 #define RT722_PDM_DC_CALIB_STATUS (0x1 << 15) 160 161 #define RT722_EAPD_HIGH 0x2 162 #define RT722_EAPD_LOW 0x0 163 164 /* Buffer address for HID */ 165 #define RT722_BUF_ADDR_HID1 0x44030000 166 #define RT722_BUF_ADDR_HID2 0x44030020 167 168 /* RT722 CAE parameter settings */ 169 #define RT722_SPK_CAE_PARAM1 0x44012000 170 #define RT722_SPK_CAE_PARAM34 0x44012021 171 #define RT722_SPK_CAE_PARAM35 0x44012022 172 #define RT722_SPK_CAE_PARAM38 0x44012025 173 #define RT722_HP_CAE_PARAM39 0x44022000 174 #define RT722_HP_CAE_PARAM64 0x44022019 175 #define RT722_HP_CAE_PARAM65 0x4402201a 176 #define RT722_HP_CAE_PARAM68 0x4402201d 177 #define RT722_MIC_CAE_PARAM39 0x44042000 178 #define RT722_MIC_CAE_PARAM95 0x44042019 179 #define RT722_MIC_CAE_PARAM96 0x4404201a 180 #define RT722_MIC_CAE_PARAM99 0x4404201d 181 182 /* RT722 SDCA Control - function number */ 183 #define FUNC_NUM_JACK_CODEC 0x01 184 #define FUNC_NUM_MIC_ARRAY 0x02 185 #define FUNC_NUM_HID 0x03 186 #define FUNC_NUM_AMP 0x04 187 188 /* RT722 SDCA entity */ 189 #define RT722_SDCA_ENT_HID01 0x01 190 #define RT722_SDCA_ENT_GE49 0x49 191 #define RT722_SDCA_ENT_USER_FU05 0x05 192 #define RT722_SDCA_ENT_USER_FU06 0x06 193 #define RT722_SDCA_ENT_USER_FU0F 0x0f 194 #define RT722_SDCA_ENT_USER_FU10 0x19 195 #define RT722_SDCA_ENT_USER_FU1E 0x1e 196 #define RT722_SDCA_ENT_FU15 0x15 197 #define RT722_SDCA_ENT_PDE23 0x23 198 #define RT722_SDCA_ENT_PDE40 0x40 199 #define RT722_SDCA_ENT_PDE11 0x11 200 #define RT722_SDCA_ENT_PDE12 0x12 201 #define RT722_SDCA_ENT_PDE2A 0x2a 202 #define RT722_SDCA_ENT_CS01 0x01 203 #define RT722_SDCA_ENT_CS11 0x11 204 #define RT722_SDCA_ENT_CS1F 0x1f 205 #define RT722_SDCA_ENT_CS1C 0x1c 206 #define RT722_SDCA_ENT_CS31 0x31 207 #define RT722_SDCA_ENT_OT23 0x42 208 #define RT722_SDCA_ENT_IT26 0x26 209 #define RT722_SDCA_ENT_IT09 0x09 210 #define RT722_SDCA_ENT_PLATFORM_FU15 0x15 211 #define RT722_SDCA_ENT_PLATFORM_FU44 0x44 212 #define RT722_SDCA_ENT_XU03 0x03 213 #define RT722_SDCA_ENT_XU0D 0x0d 214 #define RT722_SDCA_ENT0 0x00 215 216 /* RT722 SDCA control */ 217 #define RT722_SDCA_CTL_SAMPLE_FREQ_INDEX 0x10 218 #define RT722_SDCA_CTL_FU_MUTE 0x01 219 #define RT722_SDCA_CTL_FU_VOLUME 0x02 220 #define RT722_SDCA_CTL_HIDTX_CURRENT_OWNER 0x10 221 #define RT722_SDCA_CTL_HIDTX_SET_OWNER_TO_DEVICE 0x11 222 #define RT722_SDCA_CTL_HIDTX_MESSAGE_OFFSET 0x12 223 #define RT722_SDCA_CTL_HIDTX_MESSAGE_LENGTH 0x13 224 #define RT722_SDCA_CTL_SELECTED_MODE 0x01 225 #define RT722_SDCA_CTL_DETECTED_MODE 0x02 226 #define RT722_SDCA_CTL_REQ_POWER_STATE 0x01 227 #define RT722_SDCA_CTL_VENDOR_DEF 0x30 228 #define RT722_SDCA_CTL_FU_CH_GAIN 0x0b 229 #define RT722_SDCA_CTL_FUNC_STATUS 0x10 230 #define RT722_SDCA_CTL_ACTUAL_POWER_STATE 0x10 231 232 /* RT722 SDCA channel */ 233 #define CH_L 0x01 234 #define CH_R 0x02 235 #define CH_01 0x01 236 #define CH_02 0x02 237 #define CH_03 0x03 238 #define CH_04 0x04 239 #define CH_08 0x08 240 241 /* sample frequency index */ 242 #define RT722_SDCA_RATE_16000HZ 0x04 243 #define RT722_SDCA_RATE_32000HZ 0x07 244 #define RT722_SDCA_RATE_44100HZ 0x08 245 #define RT722_SDCA_RATE_48000HZ 0x09 246 #define RT722_SDCA_RATE_96000HZ 0x0b 247 #define RT722_SDCA_RATE_192000HZ 0x0d 248 249 /* Function_Status */ 250 #define FUNCTION_NEEDS_INITIALIZATION BIT(5) 251 252 enum { 253 RT722_AIF1, /* For headset mic and headphone */ 254 RT722_AIF2, /* For speaker */ 255 RT722_AIF3, /* For dmic */ 256 RT722_AIFS, 257 }; 258 259 enum rt722_sdca_jd_src { 260 RT722_JD_NULL, 261 RT722_JD1, 262 }; 263 264 enum rt722_sdca_version { 265 RT722_VA, 266 RT722_VB, 267 }; 268 269 int rt722_sdca_io_init(struct device *dev, struct sdw_slave *slave); 270 int rt722_sdca_init(struct device *dev, struct regmap *regmap, struct sdw_slave *slave); 271 int rt722_sdca_index_write(struct rt722_sdca_priv *rt722, 272 unsigned int nid, unsigned int reg, unsigned int value); 273 int rt722_sdca_index_read(struct rt722_sdca_priv *rt722, 274 unsigned int nid, unsigned int reg, unsigned int *value); 275 276 int rt722_sdca_jack_detect(struct rt722_sdca_priv *rt722, bool *hp, bool *mic); 277 #endif /* __RT722_H__ */ 278