xref: /linux/sound/soc/codecs/rt721-sdca.h (revision 7f71507851fc7764b36a3221839607d3a45c2025)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * rt721-sdca.h -- RT721 SDCA ALSA SoC audio driver header
4  *
5  * Copyright(c) 2024 Realtek Semiconductor Corp.
6  */
7 
8 #ifndef __RT721_H__
9 #define __RT721_H__
10 
11 #include <linux/pm.h>
12 #include <linux/regmap.h>
13 #include <linux/soundwire/sdw.h>
14 #include <linux/soundwire/sdw_type.h>
15 #include <sound/soc.h>
16 #include <linux/workqueue.h>
17 
18 struct  rt721_sdca_priv {
19 	struct regmap *regmap;
20 	struct regmap *mbq_regmap;
21 	struct snd_soc_component *component;
22 	struct sdw_slave *slave;
23 	struct sdw_bus_params params;
24 	bool hw_init;
25 	bool first_hw_init;
26 	struct mutex calibrate_mutex;
27 	struct mutex disable_irq_lock;
28 	bool disable_irq;
29 	/* For Headset jack & Headphone */
30 	unsigned int scp_sdca_stat1;
31 	unsigned int scp_sdca_stat2;
32 	struct snd_soc_jack *hs_jack;
33 	struct delayed_work jack_detect_work;
34 	struct delayed_work jack_btn_check_work;
35 	int jack_type;
36 	int jd_src;
37 	bool fu0f_dapm_mute;
38 	bool fu0f_mixer_l_mute;
39 	bool fu0f_mixer_r_mute;
40 	/* For DMIC */
41 	bool fu1e_dapm_mute;
42 	bool fu1e_mixer_mute[4];
43 };
44 
45 struct rt721_sdca_dmic_kctrl_priv {
46 	unsigned int reg_base;
47 	unsigned int count;
48 	unsigned int max;
49 	unsigned int invert;
50 };
51 
52 /* NID */
53 #define RT721_ANA_POW_PART			0x01
54 #define RT721_DAC_CTRL				0x04
55 #define RT721_JD_CTRL				0x09
56 #define RT721_CBJ_CTRL				0x0a
57 #define RT721_CAP_PORT_CTRL			0x0c
58 #define RT721_CLASD_AMP_CTRL			0x0d
59 #define RT721_VENDOR_REG			0x20
60 #define RT721_RC_CALIB_CTRL			0x40
61 #define RT721_VENDOR_EQ_L			0x53
62 #define RT721_VENDOR_EQ_R			0x54
63 #define RT721_VENDOR_HP_CALI			0x56
64 #define RT721_VENDOR_CHARGE_PUMP		0x57
65 #define RT721_VENDOR_CLASD_CALI			0x58
66 #define RT721_VENDOR_IMS_DRE			0x5b
67 #define RT721_VENDOR_SPK_EFUSE			0x5c
68 #define RT721_VENDOR_LEVEL_CTRL			0x5d
69 #define RT721_VENDOR_ANA_CTL			0x5f
70 #define RT721_HDA_SDCA_FLOAT			0x61
71 
72 /* Index (NID:01h) */
73 #define RT721_MBIAS_LV_CTRL2			0x07
74 #define RT721_VREF1_HV_CTRL1			0x0a
75 #define RT721_VREF2_LV_CTRL1			0x0b
76 
77 /* Index (NID:04h) */
78 #define RT721_DAC_2CH_CTRL3			0x02
79 #define RT721_DAC_2CH_CTRL4			0x03
80 
81 /* Index (NID:09h) */
82 #define RT721_JD_1PIN_GAT_CTRL2			0x07
83 
84 /* Index (NID:0ah) */
85 #define RT721_CBJ_A0_GAT_CTRL1			0x04
86 #define RT721_CBJ_A0_GAT_CTRL2			0x05
87 
88 /* Index (NID:0Ch) */
89 #define RT721_HP_AMP_2CH_CAL1			0x05
90 #define RT721_HP_AMP_2CH_CAL4			0x08
91 #define RT721_HP_AMP_2CH_CAL18			0x1b
92 
93 /* Index (NID:0dh) */
94 #define RT721_CLASD_AMP_2CH_CAL			0x14
95 
96 /* Index (NID:20h) */
97 #define RT721_JD_PRODUCT_NUM			0x00
98 #define RT721_ANALOG_BIAS_CTL3			0x04
99 #define RT721_JD_CTRL1				0x09
100 #define RT721_LDO2_3_CTL1			0x0e
101 #define RT721_GPIO_PAD_CTRL5			0x13
102 #define RT721_LDO1_CTL				0x1a
103 #define RT721_HP_JD_CTRL			0x24
104 #define RT721_VD_HIDDEN_CTRL			0x26
105 #define RT721_CLSD_CTRL6			0x3c
106 #define RT721_COMBO_JACK_AUTO_CTL1		0x45
107 #define RT721_COMBO_JACK_AUTO_CTL2		0x46
108 #define RT721_COMBO_JACK_AUTO_CTL3		0x47
109 #define RT721_DIGITAL_MISC_CTRL4		0x4a
110 #define RT721_VREFO_GAT				0x63
111 #define RT721_FSM_CTL				0x67
112 #define RT721_SDCA_INTR_REC			0x82
113 #define RT721_SW_CONFIG1			0x8a
114 #define RT721_SW_CONFIG2			0x8b
115 
116 /* Index (NID:40h) */
117 #define RT721_RC_CALIB_CTRL0			0x00
118 
119 /* Index (NID:58h) */
120 #define RT721_DAC_DC_CALI_CTL1			0x01
121 #define RT721_DAC_DC_CALI_CTL2			0x02
122 #define RT721_DAC_DC_CALI_CTL3			0x03
123 
124 /* Index (NID:5fh) */
125 #define RT721_MISC_POWER_CTL0			0x00
126 #define RT721_MISC_POWER_CTL31			0x31
127 #define RT721_UAJ_TOP_TCON13			0x44
128 #define RT721_UAJ_TOP_TCON14			0x45
129 #define RT721_UAJ_TOP_TCON17			0x48
130 
131 /* Index (NID:61h) */
132 #define RT721_HDA_LEGACY_MUX_CTL0		0x00
133 #define RT721_HDA_LEGACY_UAJ_CTL		0x02
134 #define RT721_HDA_LEGACY_CTL1			0x05
135 #define RT721_HDA_LEGACY_RESET_CTL		0x06
136 #define RT721_XU_REL_CTRL			0x0c
137 #define RT721_GE_REL_CTRL1			0x0d
138 #define RT721_HDA_LEGACY_GPIO_WAKE_EN_CTL	0x0e
139 #define RT721_GE_SDCA_RST_CTRL			0x10
140 #define RT721_INT_RST_EN_CTRL			0x11
141 #define RT721_XU_EVENT_EN			0x13
142 #define RT721_INLINE_CTL2			0x17
143 #define RT721_UMP_HID_CTRL1			0x18
144 #define RT721_UMP_HID_CTRL2			0x19
145 #define RT721_UMP_HID_CTRL3			0x1a
146 #define RT721_UMP_HID_CTRL4			0x1b
147 #define RT721_UMP_HID_CTRL5			0x1c
148 #define RT721_FUNC_FLOAT_CTL0			0x22
149 #define RT721_FUNC_FLOAT_CTL1			0x23
150 #define RT721_FUNC_FLOAT_CTL2			0x24
151 #define RT721_FUNC_FLOAT_CTL3			0x25
152 #define RT721_ENT_FLOAT_CTL0			0x29
153 #define RT721_ENT_FLOAT_CTL1			0x2c
154 #define RT721_ENT_FLOAT_CTL2			0x2d
155 #define RT721_ENT_FLOAT_CTL3			0x2e
156 #define RT721_ENT_FLOAT_CTL4			0x2f
157 #define RT721_CH_FLOAT_CTL1			0x45
158 #define RT721_CH_FLOAT_CTL2			0x46
159 #define RT721_ENT_FLOAT_CTL5			0x53
160 #define RT721_ENT_FLOAT_CTL6			0x54
161 #define RT721_ENT_FLOAT_CTL7			0x55
162 #define RT721_ENT_FLOAT_CTL8			0x57
163 #define RT721_ENT_FLOAT_CTL9			0x5a
164 #define RT721_ENT_FLOAT_CTL10			0x5b
165 #define RT721_CH_FLOAT_CTL3			0x6a
166 #define RT721_CH_FLOAT_CTL4			0x6d
167 #define RT721_CH_FLOAT_CTL5			0x70
168 #define RT721_CH_FLOAT_CTL6			0x92
169 
170 /* Parameter & Verb control 01 (0x26)(NID:20h) */
171 #define RT721_HIDDEN_REG_SW_RESET (0x1 << 14)
172 
173 /* Buffer address for HID */
174 #define RT721_BUF_ADDR_HID1			0x44030000
175 #define RT721_BUF_ADDR_HID2			0x44030020
176 
177 /* RT721 SDCA Control - function number */
178 #define FUNC_NUM_JACK_CODEC			0x01
179 #define FUNC_NUM_MIC_ARRAY			0x02
180 #define FUNC_NUM_HID				0x03
181 #define FUNC_NUM_AMP				0x04
182 
183 /* RT721 SDCA entity */
184 #define RT721_SDCA_ENT_HID01			0x01
185 #define RT721_SDCA_ENT_XUV			0x03
186 #define RT721_SDCA_ENT_GE49			0x49
187 #define RT721_SDCA_ENT_USER_FU05		0x05
188 #define RT721_SDCA_ENT_USER_FU06		0x06
189 #define RT721_SDCA_ENT_USER_FU0F		0x0f
190 #define RT721_SDCA_ENT_USER_FU10		0x19
191 #define RT721_SDCA_ENT_USER_FU1E		0x1e
192 #define RT721_SDCA_ENT_FU15			0x15
193 #define RT721_SDCA_ENT_PDE23			0x23
194 #define RT721_SDCA_ENT_PDE40			0x40
195 #define RT721_SDCA_ENT_PDE41			0x41
196 #define RT721_SDCA_ENT_PDE11			0x11
197 #define RT721_SDCA_ENT_PDE12			0x12
198 #define RT721_SDCA_ENT_PDE2A			0x2a
199 #define RT721_SDCA_ENT_CS01			0x01
200 #define RT721_SDCA_ENT_CS11			0x11
201 #define RT721_SDCA_ENT_CS1F			0x1f
202 #define RT721_SDCA_ENT_CS1C			0x1c
203 #define RT721_SDCA_ENT_CS31			0x31
204 #define RT721_SDCA_ENT_OT23			0x42
205 #define RT721_SDCA_ENT_IT26			0x26
206 #define RT721_SDCA_ENT_IT09			0x09
207 #define RT721_SDCA_ENT_PLATFORM_FU15		0x15
208 #define RT721_SDCA_ENT_PLATFORM_FU44		0x44
209 #define RT721_SDCA_ENT_XU03			0x03
210 #define RT721_SDCA_ENT_XU0D			0x0d
211 #define RT721_SDCA_ENT_FU55			0x55
212 
213 /* RT721 SDCA control */
214 #define RT721_SDCA_CTL_SAMPLE_FREQ_INDEX		0x10
215 #define RT721_SDCA_CTL_FU_MUTE				0x01
216 #define RT721_SDCA_CTL_FU_VOLUME			0x02
217 #define RT721_SDCA_CTL_HIDTX_CURRENT_OWNER		0x10
218 #define RT721_SDCA_CTL_HIDTX_SET_OWNER_TO_DEVICE	0x11
219 #define RT721_SDCA_CTL_HIDTX_MESSAGE_OFFSET		0x12
220 #define RT721_SDCA_CTL_HIDTX_MESSAGE_LENGTH		0x13
221 #define RT721_SDCA_CTL_SELECTED_MODE			0x01
222 #define RT721_SDCA_CTL_DETECTED_MODE			0x02
223 #define RT721_SDCA_CTL_REQ_POWER_STATE			0x01
224 #define RT721_SDCA_CTL_VENDOR_DEF			0x30
225 #define RT721_SDCA_CTL_XUV				0x34
226 #define RT721_SDCA_CTL_FU_CH_GAIN			0x0b
227 
228 /* RT721 SDCA channel */
229 #define CH_L	0x01
230 #define CH_R	0x02
231 #define CH_01	0x01
232 #define CH_02	0x02
233 #define CH_03	0x03
234 #define CH_04	0x04
235 #define CH_08	0x08
236 #define CH_09	0x09
237 #define CH_0A	0x0a
238 
239 /* sample frequency index */
240 #define RT721_SDCA_RATE_8000HZ		0x01
241 #define RT721_SDCA_RATE_11025HZ		0x02
242 #define RT721_SDCA_RATE_12000HZ		0x03
243 #define RT721_SDCA_RATE_16000HZ		0x04
244 #define RT721_SDCA_RATE_22050HZ		0x05
245 #define RT721_SDCA_RATE_24000HZ		0x06
246 #define RT721_SDCA_RATE_32000HZ		0x07
247 #define RT721_SDCA_RATE_44100HZ		0x08
248 #define RT721_SDCA_RATE_48000HZ		0x09
249 #define RT721_SDCA_RATE_88200HZ		0x0a
250 #define RT721_SDCA_RATE_96000HZ		0x0b
251 #define RT721_SDCA_RATE_176400HZ	0x0c
252 #define RT721_SDCA_RATE_192000HZ	0x0d
253 #define RT721_SDCA_RATE_384000HZ	0x0e
254 #define RT721_SDCA_RATE_768000HZ	0x0f
255 
256 /* RT721 HID ID */
257 #define RT721_SDCA_HID_ID		0x11
258 
259 enum {
260 	RT721_AIF1, /* For headset mic and headphone */
261 	RT721_AIF2, /* For speaker */
262 	RT721_AIF3, /* For dmic */
263 	RT721_AIFS,
264 };
265 
266 int rt721_sdca_io_init(struct device *dev, struct sdw_slave *slave);
267 int rt721_sdca_init(struct device *dev, struct regmap *regmap,
268 			struct regmap *mbq_regmap, struct sdw_slave *slave);
269 #endif /* __RT721_H__ */
270