1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // rt721-sdca.c -- rt721 SDCA ALSA SoC audio driver 4 // 5 // Copyright(c) 2024 Realtek Semiconductor Corp. 6 // 7 // 8 9 #include <linux/bitops.h> 10 #include <sound/core.h> 11 #include <linux/delay.h> 12 #include <linux/init.h> 13 #include <sound/initval.h> 14 #include <sound/jack.h> 15 #include <linux/kernel.h> 16 #include <linux/module.h> 17 #include <linux/moduleparam.h> 18 #include <sound/pcm.h> 19 #include <linux/pm_runtime.h> 20 #include <sound/pcm_params.h> 21 #include <linux/soundwire/sdw_registers.h> 22 #include <linux/slab.h> 23 #include <sound/soc-dapm.h> 24 #include <sound/tlv.h> 25 26 #include "rt721-sdca.h" 27 #include "rt-sdw-common.h" 28 29 static void rt721_sdca_jack_detect_handler(struct work_struct *work) 30 { 31 struct rt721_sdca_priv *rt721 = 32 container_of(work, struct rt721_sdca_priv, jack_detect_work.work); 33 int btn_type = 0; 34 35 if (!rt721->hs_jack) 36 return; 37 38 if (!rt721->component->card || !rt721->component->card->instantiated) 39 return; 40 41 /* SDW_SCP_SDCA_INT_SDCA_6 is used for jack detection */ 42 if (rt721->scp_sdca_stat1 & SDW_SCP_SDCA_INT_SDCA_0) { 43 rt721->jack_type = rt_sdca_headset_detect(rt721->regmap, 44 RT721_SDCA_ENT_GE49); 45 if (rt721->jack_type < 0) 46 return; 47 } 48 49 /* SDW_SCP_SDCA_INT_SDCA_8 is used for button detection */ 50 if (rt721->scp_sdca_stat2 & SDW_SCP_SDCA_INT_SDCA_8) 51 btn_type = rt_sdca_button_detect(rt721->regmap, 52 RT721_SDCA_ENT_HID01, RT721_BUF_ADDR_HID1, 53 RT721_SDCA_HID_ID); 54 55 if (rt721->jack_type == 0) 56 btn_type = 0; 57 58 dev_dbg(&rt721->slave->dev, 59 "in %s, jack_type=%d\n", __func__, rt721->jack_type); 60 dev_dbg(&rt721->slave->dev, 61 "in %s, btn_type=0x%x\n", __func__, btn_type); 62 dev_dbg(&rt721->slave->dev, 63 "in %s, scp_sdca_stat1=0x%x, scp_sdca_stat2=0x%x\n", __func__, 64 rt721->scp_sdca_stat1, rt721->scp_sdca_stat2); 65 66 snd_soc_jack_report(rt721->hs_jack, rt721->jack_type | btn_type, 67 SND_JACK_HEADSET | 68 SND_JACK_BTN_0 | SND_JACK_BTN_1 | 69 SND_JACK_BTN_2 | SND_JACK_BTN_3); 70 71 if (btn_type) { 72 /* button released */ 73 snd_soc_jack_report(rt721->hs_jack, rt721->jack_type, 74 SND_JACK_HEADSET | 75 SND_JACK_BTN_0 | SND_JACK_BTN_1 | 76 SND_JACK_BTN_2 | SND_JACK_BTN_3); 77 78 mod_delayed_work(system_power_efficient_wq, 79 &rt721->jack_btn_check_work, msecs_to_jiffies(200)); 80 } 81 } 82 83 static void rt721_sdca_btn_check_handler(struct work_struct *work) 84 { 85 struct rt721_sdca_priv *rt721 = 86 container_of(work, struct rt721_sdca_priv, jack_btn_check_work.work); 87 int btn_type = 0, ret, idx; 88 unsigned int det_mode, offset, val; 89 unsigned char buf[3]; 90 91 ret = regmap_read(rt721->regmap, 92 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_GE49, 93 RT721_SDCA_CTL_DETECTED_MODE, 0), &det_mode); 94 if (ret < 0) 95 goto io_error; 96 97 /* pin attached */ 98 if (det_mode) { 99 /* read UMP message offset */ 100 ret = regmap_read(rt721->regmap, 101 SDW_SDCA_CTL(FUNC_NUM_HID, RT721_SDCA_ENT_HID01, 102 RT721_SDCA_CTL_HIDTX_MESSAGE_OFFSET, 0), &offset); 103 if (ret < 0) 104 goto io_error; 105 106 for (idx = 0; idx < sizeof(buf); idx++) { 107 ret = regmap_read(rt721->regmap, 108 RT721_BUF_ADDR_HID1 + offset + idx, &val); 109 if (ret < 0) 110 goto io_error; 111 buf[idx] = val & 0xff; 112 } 113 /* Report ID for HID1 */ 114 if (buf[0] == 0x11) 115 btn_type = rt_sdca_btn_type(&buf[1]); 116 } else 117 rt721->jack_type = 0; 118 119 dev_dbg(&rt721->slave->dev, "%s, btn_type=0x%x\n", __func__, btn_type); 120 snd_soc_jack_report(rt721->hs_jack, rt721->jack_type | btn_type, 121 SND_JACK_HEADSET | 122 SND_JACK_BTN_0 | SND_JACK_BTN_1 | 123 SND_JACK_BTN_2 | SND_JACK_BTN_3); 124 125 if (btn_type) { 126 /* button released */ 127 snd_soc_jack_report(rt721->hs_jack, rt721->jack_type, 128 SND_JACK_HEADSET | 129 SND_JACK_BTN_0 | SND_JACK_BTN_1 | 130 SND_JACK_BTN_2 | SND_JACK_BTN_3); 131 132 mod_delayed_work(system_power_efficient_wq, 133 &rt721->jack_btn_check_work, msecs_to_jiffies(200)); 134 } 135 136 return; 137 138 io_error: 139 pr_err_ratelimited("IO error in %s, ret %d\n", __func__, ret); 140 } 141 142 static void rt721_sdca_dmic_preset(struct rt721_sdca_priv *rt721) 143 { 144 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 145 RT721_MISC_POWER_CTL31, 0x8000); 146 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART, 147 RT721_VREF1_HV_CTRL1, 0xe000); 148 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 149 RT721_MISC_POWER_CTL31, 0x8007); 150 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 151 RT721_ENT_FLOAT_CTL9, 0x2a2a); 152 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 153 RT721_ENT_FLOAT_CTL10, 0x2a00); 154 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 155 RT721_ENT_FLOAT_CTL6, 0x2a2a); 156 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 157 RT721_ENT_FLOAT_CTL5, 0x2626); 158 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 159 RT721_ENT_FLOAT_CTL8, 0x1e00); 160 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 161 RT721_ENT_FLOAT_CTL7, 0x1515); 162 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 163 RT721_CH_FLOAT_CTL3, 0x0304); 164 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 165 RT721_CH_FLOAT_CTL4, 0x0304); 166 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 167 RT721_HDA_LEGACY_CTL1, 0x0000); 168 regmap_write(rt721->regmap, 169 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_IT26, 170 RT721_SDCA_CTL_VENDOR_DEF, 0), 0x01); 171 regmap_write(rt721->mbq_regmap, 0x5910009, 0x2e01); 172 rt_sdca_index_write(rt721->mbq_regmap, RT721_RC_CALIB_CTRL, 173 RT721_RC_CALIB_CTRL0, 0x0b00); 174 rt_sdca_index_write(rt721->mbq_regmap, RT721_RC_CALIB_CTRL, 175 RT721_RC_CALIB_CTRL0, 0x0b40); 176 regmap_write(rt721->regmap, 0x2f5c, 0x25); 177 } 178 179 static void rt721_sdca_amp_preset(struct rt721_sdca_priv *rt721) 180 { 181 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 182 RT721_MISC_POWER_CTL31, 0x8000); 183 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART, 184 RT721_VREF1_HV_CTRL1, 0xe000); 185 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 186 RT721_MISC_POWER_CTL31, 0x8007); 187 regmap_write(rt721->mbq_regmap, 0x5810000, 0x6420); 188 regmap_write(rt721->mbq_regmap, 0x5810000, 0x6421); 189 regmap_write(rt721->mbq_regmap, 0x5810000, 0xe421); 190 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 191 RT721_CH_FLOAT_CTL6, 0x5561); 192 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_REG, 193 RT721_GPIO_PAD_CTRL5, 0x8003); 194 regmap_write(rt721->regmap, 195 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_OT23, 196 RT721_SDCA_CTL_VENDOR_DEF, 0), 0x04); 197 regmap_write(rt721->regmap, 198 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, 199 RT721_SDCA_CTL_FU_MUTE, CH_01), 0x00); 200 regmap_write(rt721->regmap, 201 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, 202 RT721_SDCA_CTL_FU_MUTE, CH_02), 0x00); 203 regmap_write(rt721->regmap, 204 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_FU55, 205 RT721_SDCA_CTL_FU_MUTE, CH_01), 0x00); 206 regmap_write(rt721->regmap, 207 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_FU55, 208 RT721_SDCA_CTL_FU_MUTE, CH_02), 0x00); 209 } 210 211 static void rt721_sdca_jack_preset(struct rt721_sdca_priv *rt721) 212 { 213 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 214 RT721_MISC_POWER_CTL31, 0x8000); 215 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART, 216 RT721_VREF1_HV_CTRL1, 0xe000); 217 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 218 RT721_MISC_POWER_CTL31, 0x8007); 219 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 220 RT721_GE_REL_CTRL1, 0x8011); 221 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 222 RT721_UMP_HID_CTRL3, 0xcf00); 223 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 224 RT721_UMP_HID_CTRL4, 0x000f); 225 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 226 RT721_UMP_HID_CTRL1, 0x1100); 227 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 228 RT721_UMP_HID_CTRL5, 0x0c12); 229 rt_sdca_index_write(rt721->mbq_regmap, RT721_JD_CTRL, 230 RT721_JD_1PIN_GAT_CTRL2, 0xc002); 231 rt_sdca_index_write(rt721->mbq_regmap, RT721_RC_CALIB_CTRL, 232 RT721_RC_CALIB_CTRL0, 0x0b00); 233 rt_sdca_index_write(rt721->mbq_regmap, RT721_RC_CALIB_CTRL, 234 RT721_RC_CALIB_CTRL0, 0x0b40); 235 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 236 RT721_UAJ_TOP_TCON14, 0x3333); 237 regmap_write(rt721->mbq_regmap, 0x5810035, 0x0036); 238 regmap_write(rt721->mbq_regmap, 0x5810030, 0xee00); 239 rt_sdca_index_write(rt721->mbq_regmap, RT721_CAP_PORT_CTRL, 240 RT721_HP_AMP_2CH_CAL1, 0x0140); 241 regmap_write(rt721->mbq_regmap, 0x5810000, 0x0021); 242 regmap_write(rt721->mbq_regmap, 0x5810000, 0x8021); 243 rt_sdca_index_write(rt721->mbq_regmap, RT721_CAP_PORT_CTRL, 244 RT721_HP_AMP_2CH_CAL18, 0x5522); 245 regmap_write(rt721->mbq_regmap, 0x5b10007, 0x2000); 246 regmap_write(rt721->mbq_regmap, 0x5B10017, 0x1b0f); 247 rt_sdca_index_write(rt721->mbq_regmap, RT721_CBJ_CTRL, 248 RT721_CBJ_A0_GAT_CTRL1, 0x2a02); 249 rt_sdca_index_write(rt721->mbq_regmap, RT721_CAP_PORT_CTRL, 250 RT721_HP_AMP_2CH_CAL4, 0xa105); 251 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 252 RT721_UAJ_TOP_TCON14, 0x3b33); 253 regmap_write(rt721->mbq_regmap, 0x310400, 0x3023); 254 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 255 RT721_UAJ_TOP_TCON14, 0x3f33); 256 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 257 RT721_UAJ_TOP_TCON13, 0x6048); 258 regmap_write(rt721->mbq_regmap, 0x310401, 0x3000); 259 regmap_write(rt721->mbq_regmap, 0x310402, 0x1b00); 260 regmap_write(rt721->mbq_regmap, 0x310300, 0x000f); 261 regmap_write(rt721->mbq_regmap, 0x310301, 0x3000); 262 regmap_write(rt721->mbq_regmap, 0x310302, 0x1b00); 263 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 264 RT721_UAJ_TOP_TCON17, 0x0008); 265 rt_sdca_index_write(rt721->mbq_regmap, RT721_DAC_CTRL, 266 RT721_DAC_2CH_CTRL3, 0x55ff); 267 rt_sdca_index_write(rt721->mbq_regmap, RT721_DAC_CTRL, 268 RT721_DAC_2CH_CTRL4, 0xcc00); 269 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART, 270 RT721_MBIAS_LV_CTRL2, 0x6677); 271 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART, 272 RT721_VREF2_LV_CTRL1, 0x7600); 273 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 274 RT721_ENT_FLOAT_CTL2, 0x1234); 275 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 276 RT721_ENT_FLOAT_CTL3, 0x3512); 277 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 278 RT721_ENT_FLOAT_CTL1, 0x4040); 279 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 280 RT721_ENT_FLOAT_CTL4, 0x1201); 281 rt_sdca_index_write(rt721->mbq_regmap, RT721_BOOST_CTRL, 282 RT721_BST_4CH_TOP_GATING_CTRL1, 0x002a); 283 regmap_write(rt721->regmap, 0x2f58, 0x07); 284 285 regmap_write(rt721->regmap, 0x2f51, 0x00); 286 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 287 RT721_MISC_CTL, 0x0004); 288 } 289 290 static void rt721_sdca_jack_init(struct rt721_sdca_priv *rt721) 291 { 292 mutex_lock(&rt721->calibrate_mutex); 293 if (rt721->hs_jack) { 294 sdw_write_no_pm(rt721->slave, SDW_SCP_SDCA_INTMASK1, 295 SDW_SCP_SDCA_INTMASK_SDCA_0); 296 sdw_write_no_pm(rt721->slave, SDW_SCP_SDCA_INTMASK2, 297 SDW_SCP_SDCA_INTMASK_SDCA_8); 298 dev_dbg(&rt721->slave->dev, "in %s enable\n", __func__); 299 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 300 RT721_HDA_LEGACY_UAJ_CTL, 0x036E); 301 regmap_write(rt721->regmap, 302 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_XU03, 303 RT721_SDCA_CTL_SELECTED_MODE, 0), 0); 304 regmap_write(rt721->regmap, 305 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_XU0D, 306 RT721_SDCA_CTL_SELECTED_MODE, 0), 0); 307 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 308 RT721_XU_REL_CTRL, 0x0000); 309 rt_sdca_index_update_bits(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 310 RT721_GE_REL_CTRL1, 0x4000, 0x4000); 311 } 312 mutex_unlock(&rt721->calibrate_mutex); 313 } 314 315 static int rt721_sdca_set_jack_detect(struct snd_soc_component *component, 316 struct snd_soc_jack *hs_jack, void *data) 317 { 318 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 319 int ret; 320 321 rt721->hs_jack = hs_jack; 322 323 ret = pm_runtime_resume_and_get(component->dev); 324 if (ret < 0) { 325 if (ret != -EACCES) { 326 dev_err(component->dev, "%s: failed to resume %d\n", __func__, ret); 327 return ret; 328 } 329 /* pm_runtime not enabled yet */ 330 dev_dbg(component->dev, "%s: skipping jack init for now\n", __func__); 331 return 0; 332 } 333 334 rt721_sdca_jack_init(rt721); 335 336 pm_runtime_put_autosuspend(component->dev); 337 338 return 0; 339 } 340 341 /* For SDCA control DAC/ADC Gain */ 342 static int rt721_sdca_set_gain_put(struct snd_kcontrol *kcontrol, 343 struct snd_ctl_elem_value *ucontrol) 344 { 345 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 346 struct soc_mixer_control *mc = 347 (struct soc_mixer_control *)kcontrol->private_value; 348 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 349 unsigned int read_l, read_r, gain_l_val, gain_r_val; 350 unsigned int adc_vol_flag = 0, changed = 0; 351 unsigned int lvalue, rvalue; 352 const unsigned int interval_offset = 0xc0; 353 const unsigned int tendA = 0x200; 354 const unsigned int tendB = 0xa00; 355 356 if (strstr(ucontrol->id.name, "FU1E Capture Volume") || 357 strstr(ucontrol->id.name, "FU0F Capture Volume")) 358 adc_vol_flag = 1; 359 360 regmap_read(rt721->mbq_regmap, mc->reg, &lvalue); 361 regmap_read(rt721->mbq_regmap, mc->rreg, &rvalue); 362 363 /* L Channel */ 364 gain_l_val = ucontrol->value.integer.value[0]; 365 if (gain_l_val > mc->max) 366 gain_l_val = mc->max; 367 368 if (mc->shift == 8) { 369 /* boost gain */ 370 gain_l_val = gain_l_val * tendB; 371 } else if (mc->shift == 1) { 372 /* FU33 boost gain */ 373 if (gain_l_val == 0) 374 gain_l_val = 0x8000; 375 else 376 gain_l_val = (gain_l_val - 1) * tendA; 377 } else { 378 /* ADC/DAC gain */ 379 if (adc_vol_flag) 380 gain_l_val = 0x1e00 - ((mc->max - gain_l_val) * interval_offset); 381 else 382 gain_l_val = 0 - ((mc->max - gain_l_val) * interval_offset); 383 gain_l_val &= 0xffff; 384 } 385 386 /* R Channel */ 387 gain_r_val = ucontrol->value.integer.value[1]; 388 if (gain_r_val > mc->max) 389 gain_r_val = mc->max; 390 391 if (mc->shift == 8) { 392 /* boost gain */ 393 gain_r_val = gain_r_val * tendB; 394 } else if (mc->shift == 1) { 395 /* FU33 boost gain */ 396 if (gain_r_val == 0) 397 gain_r_val = 0x8000; 398 else 399 gain_r_val = (gain_r_val - 1) * tendA; 400 } else { 401 /* ADC/DAC gain */ 402 if (adc_vol_flag) 403 gain_r_val = 0x1e00 - ((mc->max - gain_r_val) * interval_offset); 404 else 405 gain_r_val = 0 - ((mc->max - gain_r_val) * interval_offset); 406 gain_r_val &= 0xffff; 407 } 408 409 if (lvalue != gain_l_val || rvalue != gain_r_val) 410 changed = 1; 411 else 412 return 0; 413 414 /* Lch*/ 415 regmap_write(rt721->mbq_regmap, mc->reg, gain_l_val); 416 417 /* Rch */ 418 regmap_write(rt721->mbq_regmap, mc->rreg, gain_r_val); 419 420 regmap_read(rt721->mbq_regmap, mc->reg, &read_l); 421 regmap_read(rt721->mbq_regmap, mc->rreg, &read_r); 422 if (read_r == gain_r_val && read_l == gain_l_val) 423 return changed; 424 425 return -EIO; 426 } 427 428 static int rt721_sdca_set_gain_get(struct snd_kcontrol *kcontrol, 429 struct snd_ctl_elem_value *ucontrol) 430 { 431 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 432 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 433 struct soc_mixer_control *mc = 434 (struct soc_mixer_control *)kcontrol->private_value; 435 unsigned int read_l, read_r, ctl_l = 0, ctl_r = 0; 436 unsigned int adc_vol_flag = 0; 437 const unsigned int interval_offset = 0xc0; 438 const unsigned int tendA = 0x200; 439 const unsigned int tendB = 0xa00; 440 441 if (strstr(ucontrol->id.name, "FU1E Capture Volume") || 442 strstr(ucontrol->id.name, "FU0F Capture Volume")) 443 adc_vol_flag = 1; 444 445 regmap_read(rt721->mbq_regmap, mc->reg, &read_l); 446 regmap_read(rt721->mbq_regmap, mc->rreg, &read_r); 447 448 if (mc->shift == 8) { 449 /* boost gain */ 450 ctl_l = read_l / tendB; 451 } else if (mc->shift == 1) { 452 /* FU33 boost gain */ 453 if (read_l == 0x8000 || read_l == 0xfe00) 454 ctl_l = 0; 455 else 456 ctl_l = read_l / tendA + 1; 457 } else { 458 if (adc_vol_flag) 459 ctl_l = mc->max - (((0x1e00 - read_l) & 0xffff) / interval_offset); 460 else 461 ctl_l = mc->max - (((0 - read_l) & 0xffff) / interval_offset); 462 } 463 464 if (read_l != read_r) { 465 if (mc->shift == 8) { 466 /* boost gain */ 467 ctl_r = read_r / tendB; 468 } else if (mc->shift == 1) { 469 /* FU33 boost gain */ 470 if (read_r == 0x8000 || read_r == 0xfe00) 471 ctl_r = 0; 472 else 473 ctl_r = read_r / tendA + 1; 474 } else { /* ADC/DAC gain */ 475 if (adc_vol_flag) 476 ctl_r = mc->max - (((0x1e00 - read_r) & 0xffff) / interval_offset); 477 else 478 ctl_r = mc->max - (((0 - read_r) & 0xffff) / interval_offset); 479 } 480 } else { 481 ctl_r = ctl_l; 482 } 483 484 ucontrol->value.integer.value[0] = ctl_l; 485 ucontrol->value.integer.value[1] = ctl_r; 486 487 return 0; 488 } 489 490 static int rt721_sdca_set_fu1e_capture_ctl(struct rt721_sdca_priv *rt721) 491 { 492 int err, i; 493 unsigned int ch_mute; 494 495 for (i = 0; i < ARRAY_SIZE(rt721->fu1e_mixer_mute); i++) { 496 ch_mute = rt721->fu1e_dapm_mute || rt721->fu1e_mixer_mute[i]; 497 err = regmap_write(rt721->regmap, 498 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, 499 RT721_SDCA_CTL_FU_MUTE, CH_01) + i, ch_mute); 500 if (err < 0) 501 return err; 502 } 503 504 return 0; 505 } 506 507 static int rt721_sdca_fu1e_capture_get(struct snd_kcontrol *kcontrol, 508 struct snd_ctl_elem_value *ucontrol) 509 { 510 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 511 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 512 struct rt721_sdca_dmic_kctrl_priv *p = 513 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value; 514 unsigned int i; 515 516 for (i = 0; i < p->count; i++) 517 ucontrol->value.integer.value[i] = !rt721->fu1e_mixer_mute[i]; 518 519 return 0; 520 } 521 522 static int rt721_sdca_fu1e_capture_put(struct snd_kcontrol *kcontrol, 523 struct snd_ctl_elem_value *ucontrol) 524 { 525 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 526 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 527 struct rt721_sdca_dmic_kctrl_priv *p = 528 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value; 529 int err, changed = 0, i; 530 531 for (i = 0; i < p->count; i++) { 532 if (rt721->fu1e_mixer_mute[i] != !ucontrol->value.integer.value[i]) 533 changed = 1; 534 rt721->fu1e_mixer_mute[i] = !ucontrol->value.integer.value[i]; 535 } 536 537 err = rt721_sdca_set_fu1e_capture_ctl(rt721); 538 if (err < 0) 539 return err; 540 541 return changed; 542 } 543 544 static int rt721_sdca_set_fu0f_capture_ctl(struct rt721_sdca_priv *rt721) 545 { 546 int err; 547 unsigned int ch_l, ch_r; 548 549 ch_l = (rt721->fu0f_dapm_mute || rt721->fu0f_mixer_l_mute) ? 0x01 : 0x00; 550 ch_r = (rt721->fu0f_dapm_mute || rt721->fu0f_mixer_r_mute) ? 0x01 : 0x00; 551 552 err = regmap_write(rt721->regmap, 553 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F, 554 RT721_SDCA_CTL_FU_MUTE, CH_L), ch_l); 555 if (err < 0) 556 return err; 557 558 err = regmap_write(rt721->regmap, 559 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F, 560 RT721_SDCA_CTL_FU_MUTE, CH_R), ch_r); 561 if (err < 0) 562 return err; 563 564 return 0; 565 } 566 567 static int rt721_sdca_fu0f_capture_get(struct snd_kcontrol *kcontrol, 568 struct snd_ctl_elem_value *ucontrol) 569 { 570 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 571 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 572 573 ucontrol->value.integer.value[0] = !rt721->fu0f_mixer_l_mute; 574 ucontrol->value.integer.value[1] = !rt721->fu0f_mixer_r_mute; 575 return 0; 576 } 577 578 static int rt721_sdca_fu0f_capture_put(struct snd_kcontrol *kcontrol, 579 struct snd_ctl_elem_value *ucontrol) 580 { 581 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 582 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 583 int err, changed = 0; 584 585 if (rt721->fu0f_mixer_l_mute != !ucontrol->value.integer.value[0] || 586 rt721->fu0f_mixer_r_mute != !ucontrol->value.integer.value[1]) 587 changed = 1; 588 589 rt721->fu0f_mixer_l_mute = !ucontrol->value.integer.value[0]; 590 rt721->fu0f_mixer_r_mute = !ucontrol->value.integer.value[1]; 591 err = rt721_sdca_set_fu0f_capture_ctl(rt721); 592 if (err < 0) 593 return err; 594 595 return changed; 596 } 597 598 static int rt721_sdca_fu_info(struct snd_kcontrol *kcontrol, 599 struct snd_ctl_elem_info *uinfo) 600 { 601 struct rt721_sdca_dmic_kctrl_priv *p = 602 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value; 603 604 if (p->max == 1) 605 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 606 else 607 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 608 uinfo->count = p->count; 609 uinfo->value.integer.min = 0; 610 uinfo->value.integer.max = p->max; 611 return 0; 612 } 613 614 static int rt721_sdca_dmic_set_gain_get(struct snd_kcontrol *kcontrol, 615 struct snd_ctl_elem_value *ucontrol) 616 { 617 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 618 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 619 struct rt721_sdca_dmic_kctrl_priv *p = 620 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value; 621 unsigned int boost_step = 0x0a00; 622 unsigned int vol_max = 0x1e00; 623 unsigned int regvalue, ctl, i; 624 unsigned int adc_vol_flag = 0; 625 const unsigned int interval_offset = 0xc0; 626 627 if (strstr(ucontrol->id.name, "FU1E Capture Volume")) 628 adc_vol_flag = 1; 629 630 /* check all channels */ 631 for (i = 0; i < p->count; i++) { 632 regmap_read(rt721->mbq_regmap, p->reg_base + i, ®value); 633 634 if (!adc_vol_flag) /* boost gain */ 635 ctl = regvalue / boost_step; 636 else /* ADC gain */ 637 ctl = p->max - (((vol_max - regvalue) & 0xffff) / interval_offset); 638 639 ucontrol->value.integer.value[i] = ctl; 640 } 641 642 return 0; 643 } 644 645 static int rt721_sdca_dmic_set_gain_put(struct snd_kcontrol *kcontrol, 646 struct snd_ctl_elem_value *ucontrol) 647 { 648 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 649 struct rt721_sdca_dmic_kctrl_priv *p = 650 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value; 651 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 652 unsigned int boost_step = 0x0a00; 653 unsigned int vol_max = 0x1e00; 654 unsigned int gain_val[4]; 655 unsigned int i, adc_vol_flag = 0, changed = 0; 656 unsigned int regvalue[4]; 657 const unsigned int interval_offset = 0xc0; 658 int err; 659 660 if (strstr(ucontrol->id.name, "FU1E Capture Volume")) 661 adc_vol_flag = 1; 662 663 /* check all channels */ 664 for (i = 0; i < p->count; i++) { 665 regmap_read(rt721->mbq_regmap, p->reg_base + i, ®value[i]); 666 667 gain_val[i] = ucontrol->value.integer.value[i]; 668 if (gain_val[i] > p->max) 669 gain_val[i] = p->max; 670 671 if (!adc_vol_flag) /* boost gain */ 672 gain_val[i] = gain_val[i] * boost_step; 673 else { /* ADC gain */ 674 gain_val[i] = vol_max - ((p->max - gain_val[i]) * interval_offset); 675 gain_val[i] &= 0xffff; 676 } 677 678 if (regvalue[i] != gain_val[i]) 679 changed = 1; 680 } 681 682 if (!changed) 683 return 0; 684 685 for (i = 0; i < p->count; i++) { 686 err = regmap_write(rt721->mbq_regmap, p->reg_base + i, gain_val[i]); 687 if (err < 0) 688 dev_err(&rt721->slave->dev, "%#08x can't be set\n", p->reg_base + i); 689 } 690 691 return changed; 692 } 693 694 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6525, 75, 0); 695 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -1725, 75, 0); 696 static const DECLARE_TLV_DB_SCALE(boost_vol_tlv, 0, 1000, 0); 697 static const DECLARE_TLV_DB_SCALE(mic2_boost_vol_tlv, -200, 200, 0); 698 699 static const struct snd_kcontrol_new rt721_sdca_controls[] = { 700 /* Headphone playback settings */ 701 SOC_DOUBLE_R_EXT_TLV("FU05 Playback Volume", 702 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, 703 RT721_SDCA_CTL_FU_VOLUME, CH_L), 704 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, 705 RT721_SDCA_CTL_FU_VOLUME, CH_R), 0, 0x57, 0, 706 rt721_sdca_set_gain_get, rt721_sdca_set_gain_put, out_vol_tlv), 707 /* Headset mic capture settings */ 708 SOC_DOUBLE_EXT("FU0F Capture Switch", SND_SOC_NOPM, 0, 1, 1, 0, 709 rt721_sdca_fu0f_capture_get, rt721_sdca_fu0f_capture_put), 710 SOC_DOUBLE_R_EXT_TLV("FU0F Capture Volume", 711 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F, 712 RT721_SDCA_CTL_FU_VOLUME, CH_L), 713 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F, 714 RT721_SDCA_CTL_FU_VOLUME, CH_R), 0, 0x3f, 0, 715 rt721_sdca_set_gain_get, rt721_sdca_set_gain_put, mic_vol_tlv), 716 SOC_DOUBLE_R_EXT_TLV("FU33 Boost Volume", 717 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PLATFORM_FU44, 718 RT721_SDCA_CTL_FU_CH_GAIN, CH_L), 719 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PLATFORM_FU44, 720 RT721_SDCA_CTL_FU_CH_GAIN, CH_R), 1, 0x15, 0, 721 rt721_sdca_set_gain_get, rt721_sdca_set_gain_put, mic2_boost_vol_tlv), 722 /* AMP playback settings */ 723 SOC_DOUBLE_R_EXT_TLV("FU06 Playback Volume", 724 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, 725 RT721_SDCA_CTL_FU_VOLUME, CH_L), 726 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, 727 RT721_SDCA_CTL_FU_VOLUME, CH_R), 0, 0x57, 0, 728 rt721_sdca_set_gain_get, rt721_sdca_set_gain_put, out_vol_tlv), 729 /* DMIC capture settings */ 730 RT_SDCA_FU_CTRL("FU1E Capture Switch", 731 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, 732 RT721_SDCA_CTL_FU_MUTE, CH_01), 1, 1, 4, rt721_sdca_fu_info, 733 rt721_sdca_fu1e_capture_get, rt721_sdca_fu1e_capture_put), 734 RT_SDCA_EXT_TLV("FU1E Capture Volume", 735 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, 736 RT721_SDCA_CTL_FU_VOLUME, CH_01), 737 rt721_sdca_dmic_set_gain_get, rt721_sdca_dmic_set_gain_put, 738 4, 0x3f, mic_vol_tlv, rt721_sdca_fu_info), 739 RT_SDCA_EXT_TLV("FU15 Boost Volume", 740 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_FU15, 741 RT721_SDCA_CTL_FU_CH_GAIN, CH_01), 742 rt721_sdca_dmic_set_gain_get, rt721_sdca_dmic_set_gain_put, 743 4, 3, boost_vol_tlv, rt721_sdca_fu_info), 744 }; 745 746 static int rt721_sdca_adc_mux_get(struct snd_kcontrol *kcontrol, 747 struct snd_ctl_elem_value *ucontrol) 748 { 749 struct snd_soc_component *component = snd_soc_dapm_kcontrol_to_component(kcontrol); 750 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 751 unsigned int val = 0, mask_sft, mask; 752 753 if (strstr(ucontrol->id.name, "ADC 09 Mux")) { 754 mask_sft = 12; 755 mask = 0x7; 756 } else if (strstr(ucontrol->id.name, "ADC 08 R Mux")) { 757 mask_sft = 10; 758 mask = 0x3; 759 } else if (strstr(ucontrol->id.name, "ADC 08 L Mux")) { 760 mask_sft = 8; 761 mask = 0x3; 762 } else if (strstr(ucontrol->id.name, "ADC 10 R Mux")) { 763 mask_sft = 6; 764 mask = 0x3; 765 } else if (strstr(ucontrol->id.name, "ADC 10 L Mux")) { 766 mask_sft = 4; 767 mask = 0x3; 768 } else if (strstr(ucontrol->id.name, "ADC 07 R Mux")) { 769 mask_sft = 2; 770 mask = 0x3; 771 } else if (strstr(ucontrol->id.name, "ADC 07 L Mux")) { 772 mask_sft = 0; 773 mask = 0x3; 774 } else 775 return -EINVAL; 776 777 rt_sdca_index_read(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 778 RT721_HDA_LEGACY_MUX_CTL0, &val); 779 780 ucontrol->value.enumerated.item[0] = (val >> mask_sft) & mask; 781 782 return 0; 783 } 784 785 static int rt721_sdca_adc_mux_put(struct snd_kcontrol *kcontrol, 786 struct snd_ctl_elem_value *ucontrol) 787 { 788 struct snd_soc_component *component = snd_soc_dapm_kcontrol_to_component(kcontrol); 789 struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_to_dapm(kcontrol); 790 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 791 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 792 unsigned int *item = ucontrol->value.enumerated.item; 793 unsigned int val, val2 = 0, change, mask_sft, mask; 794 unsigned int check; 795 796 if (item[0] >= e->items) 797 return -EINVAL; 798 799 if (strstr(ucontrol->id.name, "ADC 09 Mux")) { 800 mask_sft = 12; 801 mask = 0x7; 802 } else if (strstr(ucontrol->id.name, "ADC 08 R Mux")) { 803 mask_sft = 10; 804 mask = 0x3; 805 } else if (strstr(ucontrol->id.name, "ADC 08 L Mux")) { 806 mask_sft = 8; 807 mask = 0x3; 808 } else if (strstr(ucontrol->id.name, "ADC 10 R Mux")) { 809 mask_sft = 6; 810 mask = 0x3; 811 } else if (strstr(ucontrol->id.name, "ADC 10 L Mux")) { 812 mask_sft = 4; 813 mask = 0x3; 814 } else if (strstr(ucontrol->id.name, "ADC 07 R Mux")) { 815 mask_sft = 2; 816 mask = 0x3; 817 } else if (strstr(ucontrol->id.name, "ADC 07 L Mux")) { 818 mask_sft = 0; 819 mask = 0x3; 820 } else 821 return -EINVAL; 822 823 val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l; 824 rt_sdca_index_read(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 825 RT721_HDA_LEGACY_MUX_CTL0, &val2); 826 827 if (strstr(ucontrol->id.name, "ADC 09 Mux")) 828 val2 = (val2 >> mask_sft) & 0x7; 829 else 830 val2 = (val2 >> mask_sft) & 0x3; 831 832 if (val == val2) 833 change = 0; 834 else 835 change = 1; 836 837 if (change) { 838 rt_sdca_index_read(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 839 RT721_HDA_LEGACY_MUX_CTL0, &check); 840 rt_sdca_index_update_bits(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 841 RT721_HDA_LEGACY_MUX_CTL0, mask << mask_sft, 842 val << mask_sft); 843 } 844 845 snd_soc_dapm_mux_update_power(dapm, kcontrol, 846 item[0], e, NULL); 847 848 return change; 849 } 850 851 static const char * const adc09_mux_text[] = { 852 "MIC2", 853 "LINE1", 854 "LINE2", 855 }; 856 static const char * const adc07_10_mux_text[] = { 857 "DMIC1 RE", 858 "DMIC1 FE", 859 "DMIC2 RE", 860 "DMIC2 FE", 861 }; 862 863 static SOC_ENUM_SINGLE_DECL( 864 rt721_adc09_enum, SND_SOC_NOPM, 0, adc09_mux_text); 865 static SOC_ENUM_SINGLE_DECL( 866 rt721_dmic_enum, SND_SOC_NOPM, 0, adc07_10_mux_text); 867 868 static const struct snd_kcontrol_new rt721_sdca_adc09_mux = 869 SOC_DAPM_ENUM_EXT("ADC 09 Mux", rt721_adc09_enum, 870 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 871 static const struct snd_kcontrol_new rt721_sdca_adc08_r_mux = 872 SOC_DAPM_ENUM_EXT("ADC 08 R Mux", rt721_dmic_enum, 873 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 874 static const struct snd_kcontrol_new rt721_sdca_adc08_l_mux = 875 SOC_DAPM_ENUM_EXT("ADC 08 L Mux", rt721_dmic_enum, 876 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 877 static const struct snd_kcontrol_new rt721_sdca_adc10_r_mux = 878 SOC_DAPM_ENUM_EXT("ADC 10 R Mux", rt721_dmic_enum, 879 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 880 static const struct snd_kcontrol_new rt721_sdca_adc10_l_mux = 881 SOC_DAPM_ENUM_EXT("ADC 10 L Mux", rt721_dmic_enum, 882 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 883 static const struct snd_kcontrol_new rt721_sdca_adc07_r_mux = 884 SOC_DAPM_ENUM_EXT("ADC 07 R Mux", rt721_dmic_enum, 885 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 886 static const struct snd_kcontrol_new rt721_sdca_adc07_l_mux = 887 SOC_DAPM_ENUM_EXT("ADC 07 L Mux", rt721_dmic_enum, 888 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 889 890 891 static int rt721_sdca_fu42_event(struct snd_soc_dapm_widget *w, 892 struct snd_kcontrol *kcontrol, int event) 893 { 894 struct snd_soc_component *component = 895 snd_soc_dapm_to_component(w->dapm); 896 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 897 unsigned char unmute = 0x0, mute = 0x1; 898 899 switch (event) { 900 case SND_SOC_DAPM_POST_PMU: 901 msleep(100); 902 regmap_write(rt721->regmap, 903 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, 904 RT721_SDCA_CTL_FU_MUTE, CH_L), unmute); 905 regmap_write(rt721->regmap, 906 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, 907 RT721_SDCA_CTL_FU_MUTE, CH_R), unmute); 908 break; 909 case SND_SOC_DAPM_PRE_PMD: 910 regmap_write(rt721->regmap, 911 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, 912 RT721_SDCA_CTL_FU_MUTE, CH_L), mute); 913 regmap_write(rt721->regmap, 914 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, 915 RT721_SDCA_CTL_FU_MUTE, CH_R), mute); 916 break; 917 } 918 return 0; 919 } 920 921 static int rt721_sdca_fu21_event(struct snd_soc_dapm_widget *w, 922 struct snd_kcontrol *kcontrol, int event) 923 { 924 struct snd_soc_component *component = 925 snd_soc_dapm_to_component(w->dapm); 926 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 927 unsigned char unmute = 0x0, mute = 0x1; 928 929 switch (event) { 930 case SND_SOC_DAPM_POST_PMU: 931 regmap_write(rt721->regmap, 932 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, 933 RT721_SDCA_CTL_FU_MUTE, CH_L), unmute); 934 regmap_write(rt721->regmap, 935 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, 936 RT721_SDCA_CTL_FU_MUTE, CH_R), unmute); 937 break; 938 case SND_SOC_DAPM_PRE_PMD: 939 regmap_write(rt721->regmap, 940 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, 941 RT721_SDCA_CTL_FU_MUTE, CH_L), mute); 942 regmap_write(rt721->regmap, 943 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, 944 RT721_SDCA_CTL_FU_MUTE, CH_R), mute); 945 break; 946 } 947 return 0; 948 } 949 950 static int rt721_sdca_fu23_event(struct snd_soc_dapm_widget *w, 951 struct snd_kcontrol *kcontrol, int event) 952 { 953 struct snd_soc_component *component = 954 snd_soc_dapm_to_component(w->dapm); 955 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 956 unsigned char unmute = 0x0, mute = 0x1; 957 958 switch (event) { 959 case SND_SOC_DAPM_POST_PMU: 960 regmap_write(rt721->regmap, 961 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, 962 RT721_SDCA_CTL_FU_MUTE, CH_L), unmute); 963 regmap_write(rt721->regmap, 964 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, 965 RT721_SDCA_CTL_FU_MUTE, CH_R), unmute); 966 break; 967 case SND_SOC_DAPM_PRE_PMD: 968 regmap_write(rt721->regmap, 969 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, 970 RT721_SDCA_CTL_FU_MUTE, CH_L), mute); 971 regmap_write(rt721->regmap, 972 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, 973 RT721_SDCA_CTL_FU_MUTE, CH_R), mute); 974 break; 975 } 976 return 0; 977 } 978 979 static int rt721_sdca_fu113_event(struct snd_soc_dapm_widget *w, 980 struct snd_kcontrol *kcontrol, int event) 981 { 982 struct snd_soc_component *component = 983 snd_soc_dapm_to_component(w->dapm); 984 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 985 986 switch (event) { 987 case SND_SOC_DAPM_POST_PMU: 988 rt721->fu1e_dapm_mute = false; 989 rt721_sdca_set_fu1e_capture_ctl(rt721); 990 break; 991 case SND_SOC_DAPM_PRE_PMD: 992 rt721->fu1e_dapm_mute = true; 993 rt721_sdca_set_fu1e_capture_ctl(rt721); 994 break; 995 } 996 return 0; 997 } 998 999 static int rt721_sdca_fu36_event(struct snd_soc_dapm_widget *w, 1000 struct snd_kcontrol *kcontrol, int event) 1001 { 1002 struct snd_soc_component *component = 1003 snd_soc_dapm_to_component(w->dapm); 1004 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1005 1006 switch (event) { 1007 case SND_SOC_DAPM_POST_PMU: 1008 rt721->fu0f_dapm_mute = false; 1009 rt721_sdca_set_fu0f_capture_ctl(rt721); 1010 break; 1011 case SND_SOC_DAPM_PRE_PMD: 1012 rt721->fu0f_dapm_mute = true; 1013 rt721_sdca_set_fu0f_capture_ctl(rt721); 1014 break; 1015 } 1016 return 0; 1017 } 1018 1019 static int rt721_sdca_pde47_event(struct snd_soc_dapm_widget *w, 1020 struct snd_kcontrol *kcontrol, int event) 1021 { 1022 struct snd_soc_component *component = 1023 snd_soc_dapm_to_component(w->dapm); 1024 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1025 unsigned char ps0 = 0x0, ps3 = 0x3; 1026 1027 switch (event) { 1028 case SND_SOC_DAPM_POST_PMU: 1029 regmap_write(rt721->regmap, 1030 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE40, 1031 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps0); 1032 break; 1033 case SND_SOC_DAPM_PRE_PMD: 1034 regmap_write(rt721->regmap, 1035 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE40, 1036 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps3); 1037 break; 1038 } 1039 return 0; 1040 } 1041 1042 static int rt721_sdca_pde41_event(struct snd_soc_dapm_widget *w, 1043 struct snd_kcontrol *kcontrol, int event) 1044 { 1045 struct snd_soc_component *component = 1046 snd_soc_dapm_to_component(w->dapm); 1047 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1048 unsigned char ps0 = 0x0, ps3 = 0x3; 1049 1050 switch (event) { 1051 case SND_SOC_DAPM_POST_PMU: 1052 regmap_write(rt721->regmap, 1053 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE41, 1054 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps0); 1055 break; 1056 case SND_SOC_DAPM_PRE_PMD: 1057 regmap_write(rt721->regmap, 1058 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE41, 1059 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps3); 1060 break; 1061 } 1062 return 0; 1063 } 1064 1065 static int rt721_sdca_pde11_event(struct snd_soc_dapm_widget *w, 1066 struct snd_kcontrol *kcontrol, int event) 1067 { 1068 struct snd_soc_component *component = 1069 snd_soc_dapm_to_component(w->dapm); 1070 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1071 unsigned char ps0 = 0x0, ps3 = 0x3; 1072 1073 switch (event) { 1074 case SND_SOC_DAPM_POST_PMU: 1075 regmap_write(rt721->regmap, 1076 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_PDE2A, 1077 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps0); 1078 break; 1079 case SND_SOC_DAPM_PRE_PMD: 1080 regmap_write(rt721->regmap, 1081 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_PDE2A, 1082 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps3); 1083 break; 1084 } 1085 return 0; 1086 } 1087 1088 static int rt721_sdca_pde34_event(struct snd_soc_dapm_widget *w, 1089 struct snd_kcontrol *kcontrol, int event) 1090 { 1091 struct snd_soc_component *component = 1092 snd_soc_dapm_to_component(w->dapm); 1093 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1094 unsigned char ps0 = 0x0, ps3 = 0x3; 1095 1096 switch (event) { 1097 case SND_SOC_DAPM_POST_PMU: 1098 regmap_write(rt721->regmap, 1099 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE12, 1100 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps0); 1101 break; 1102 case SND_SOC_DAPM_PRE_PMD: 1103 regmap_write(rt721->regmap, 1104 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE12, 1105 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps3); 1106 break; 1107 } 1108 return 0; 1109 } 1110 1111 static const struct snd_soc_dapm_widget rt721_sdca_dapm_widgets[] = { 1112 SND_SOC_DAPM_OUTPUT("HP"), 1113 SND_SOC_DAPM_OUTPUT("SPK"), 1114 SND_SOC_DAPM_INPUT("MIC2"), 1115 SND_SOC_DAPM_INPUT("LINE1"), 1116 SND_SOC_DAPM_INPUT("LINE2"), 1117 SND_SOC_DAPM_INPUT("DMIC1_2"), 1118 SND_SOC_DAPM_INPUT("DMIC3_4"), 1119 1120 SND_SOC_DAPM_SUPPLY("PDE 41", SND_SOC_NOPM, 0, 0, 1121 rt721_sdca_pde41_event, 1122 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1123 SND_SOC_DAPM_SUPPLY("PDE 47", SND_SOC_NOPM, 0, 0, 1124 rt721_sdca_pde47_event, 1125 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1126 SND_SOC_DAPM_SUPPLY("PDE 11", SND_SOC_NOPM, 0, 0, 1127 rt721_sdca_pde11_event, 1128 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1129 SND_SOC_DAPM_SUPPLY("PDE 34", SND_SOC_NOPM, 0, 0, 1130 rt721_sdca_pde34_event, 1131 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1132 1133 SND_SOC_DAPM_DAC_E("FU 21", NULL, SND_SOC_NOPM, 0, 0, 1134 rt721_sdca_fu21_event, 1135 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1136 SND_SOC_DAPM_DAC_E("FU 23", NULL, SND_SOC_NOPM, 0, 0, 1137 rt721_sdca_fu23_event, 1138 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1139 SND_SOC_DAPM_DAC_E("FU 42", NULL, SND_SOC_NOPM, 0, 0, 1140 rt721_sdca_fu42_event, 1141 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1142 SND_SOC_DAPM_ADC_E("FU 36", NULL, SND_SOC_NOPM, 0, 0, 1143 rt721_sdca_fu36_event, 1144 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1145 SND_SOC_DAPM_ADC_E("FU 113", NULL, SND_SOC_NOPM, 0, 0, 1146 rt721_sdca_fu113_event, 1147 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1148 SND_SOC_DAPM_MUX("ADC 09 Mux", SND_SOC_NOPM, 0, 0, 1149 &rt721_sdca_adc09_mux), 1150 SND_SOC_DAPM_MUX("ADC 08 R Mux", SND_SOC_NOPM, 0, 0, 1151 &rt721_sdca_adc08_r_mux), 1152 SND_SOC_DAPM_MUX("ADC 08 L Mux", SND_SOC_NOPM, 0, 0, 1153 &rt721_sdca_adc08_l_mux), 1154 SND_SOC_DAPM_MUX("ADC 10 R Mux", SND_SOC_NOPM, 0, 0, 1155 &rt721_sdca_adc10_r_mux), 1156 SND_SOC_DAPM_MUX("ADC 10 L Mux", SND_SOC_NOPM, 0, 0, 1157 &rt721_sdca_adc10_l_mux), 1158 SND_SOC_DAPM_MUX("ADC 07 R Mux", SND_SOC_NOPM, 0, 0, 1159 &rt721_sdca_adc07_r_mux), 1160 SND_SOC_DAPM_MUX("ADC 07 L Mux", SND_SOC_NOPM, 0, 0, 1161 &rt721_sdca_adc07_l_mux), 1162 1163 SND_SOC_DAPM_AIF_IN("DP1RX", "DP1 Headphone Playback", 0, SND_SOC_NOPM, 0, 0), 1164 SND_SOC_DAPM_AIF_OUT("DP2TX", "DP2 Headset Capture", 0, SND_SOC_NOPM, 0, 0), 1165 SND_SOC_DAPM_AIF_IN("DP3RX", "DP3 Speaker Playback", 0, SND_SOC_NOPM, 0, 0), 1166 SND_SOC_DAPM_AIF_OUT("DP6TX", "DP6 DMic Capture", 0, SND_SOC_NOPM, 0, 0), 1167 }; 1168 1169 static const struct snd_soc_dapm_route rt721_sdca_audio_map[] = { 1170 {"FU 42", NULL, "DP1RX"}, 1171 {"FU 21", NULL, "DP3RX"}, 1172 {"FU 23", NULL, "DP3RX"}, 1173 1174 {"ADC 09 Mux", "MIC2", "MIC2"}, 1175 {"ADC 09 Mux", "LINE1", "LINE1"}, 1176 {"ADC 09 Mux", "LINE2", "LINE2"}, 1177 {"ADC 07 R Mux", "DMIC1 RE", "DMIC1_2"}, 1178 {"ADC 07 R Mux", "DMIC1 FE", "DMIC1_2"}, 1179 {"ADC 07 R Mux", "DMIC2 RE", "DMIC3_4"}, 1180 {"ADC 07 R Mux", "DMIC2 FE", "DMIC3_4"}, 1181 {"ADC 07 L Mux", "DMIC1 RE", "DMIC1_2"}, 1182 {"ADC 07 L Mux", "DMIC1 FE", "DMIC1_2"}, 1183 {"ADC 07 L Mux", "DMIC2 RE", "DMIC3_4"}, 1184 {"ADC 07 L Mux", "DMIC2 FE", "DMIC3_4"}, 1185 {"ADC 08 R Mux", "DMIC1 RE", "DMIC1_2"}, 1186 {"ADC 08 R Mux", "DMIC1 FE", "DMIC1_2"}, 1187 {"ADC 08 R Mux", "DMIC2 RE", "DMIC3_4"}, 1188 {"ADC 08 R Mux", "DMIC2 FE", "DMIC3_4"}, 1189 {"ADC 08 L Mux", "DMIC1 RE", "DMIC1_2"}, 1190 {"ADC 08 L Mux", "DMIC1 FE", "DMIC1_2"}, 1191 {"ADC 08 L Mux", "DMIC2 RE", "DMIC3_4"}, 1192 {"ADC 08 L Mux", "DMIC2 FE", "DMIC3_4"}, 1193 {"ADC 10 R Mux", "DMIC1 RE", "DMIC1_2"}, 1194 {"ADC 10 R Mux", "DMIC1 FE", "DMIC1_2"}, 1195 {"ADC 10 R Mux", "DMIC2 RE", "DMIC3_4"}, 1196 {"ADC 10 R Mux", "DMIC2 FE", "DMIC3_4"}, 1197 {"ADC 10 L Mux", "DMIC1 RE", "DMIC1_2"}, 1198 {"ADC 10 L Mux", "DMIC1 FE", "DMIC1_2"}, 1199 {"ADC 10 L Mux", "DMIC2 RE", "DMIC3_4"}, 1200 {"ADC 10 L Mux", "DMIC2 FE", "DMIC3_4"}, 1201 {"FU 36", NULL, "PDE 34"}, 1202 {"FU 36", NULL, "ADC 09 Mux"}, 1203 {"FU 113", NULL, "PDE 11"}, 1204 {"FU 113", NULL, "ADC 07 R Mux"}, 1205 {"FU 113", NULL, "ADC 07 L Mux"}, 1206 {"FU 113", NULL, "ADC 10 R Mux"}, 1207 {"FU 113", NULL, "ADC 10 L Mux"}, 1208 {"DP2TX", NULL, "FU 36"}, 1209 {"DP6TX", NULL, "FU 113"}, 1210 1211 {"HP", NULL, "PDE 47"}, 1212 {"HP", NULL, "FU 42"}, 1213 {"SPK", NULL, "PDE 41"}, 1214 {"SPK", NULL, "FU 21"}, 1215 {"SPK", NULL, "FU 23"}, 1216 }; 1217 1218 static int rt721_sdca_parse_dt(struct rt721_sdca_priv *rt721, struct device *dev) 1219 { 1220 device_property_read_u32(dev, "realtek,jd-src", &rt721->jd_src); 1221 1222 return 0; 1223 } 1224 1225 static int rt721_sdca_probe(struct snd_soc_component *component) 1226 { 1227 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1228 int ret; 1229 1230 rt721_sdca_parse_dt(rt721, &rt721->slave->dev); 1231 rt721->component = component; 1232 1233 ret = pm_runtime_resume(component->dev); 1234 if (ret < 0 && ret != -EACCES) 1235 return ret; 1236 1237 return 0; 1238 } 1239 1240 static const struct snd_soc_component_driver soc_sdca_dev_rt721 = { 1241 .probe = rt721_sdca_probe, 1242 .controls = rt721_sdca_controls, 1243 .num_controls = ARRAY_SIZE(rt721_sdca_controls), 1244 .dapm_widgets = rt721_sdca_dapm_widgets, 1245 .num_dapm_widgets = ARRAY_SIZE(rt721_sdca_dapm_widgets), 1246 .dapm_routes = rt721_sdca_audio_map, 1247 .num_dapm_routes = ARRAY_SIZE(rt721_sdca_audio_map), 1248 .set_jack = rt721_sdca_set_jack_detect, 1249 .endianness = 1, 1250 }; 1251 1252 static int rt721_sdca_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream, 1253 int direction) 1254 { 1255 snd_soc_dai_dma_data_set(dai, direction, sdw_stream); 1256 1257 return 0; 1258 } 1259 1260 static void rt721_sdca_shutdown(struct snd_pcm_substream *substream, 1261 struct snd_soc_dai *dai) 1262 { 1263 snd_soc_dai_set_dma_data(dai, substream, NULL); 1264 } 1265 1266 static int rt721_sdca_pcm_hw_params(struct snd_pcm_substream *substream, 1267 struct snd_pcm_hw_params *params, 1268 struct snd_soc_dai *dai) 1269 { 1270 struct snd_soc_component *component = dai->component; 1271 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1272 struct sdw_stream_config stream_config; 1273 struct sdw_port_config port_config; 1274 enum sdw_data_direction direction; 1275 struct sdw_stream_runtime *sdw_stream; 1276 int retval, port, num_channels; 1277 unsigned int sampling_rate; 1278 1279 dev_dbg(dai->dev, "%s %s", __func__, dai->name); 1280 sdw_stream = snd_soc_dai_get_dma_data(dai, substream); 1281 1282 if (!sdw_stream) 1283 return -EINVAL; 1284 1285 if (!rt721->slave) 1286 return -EINVAL; 1287 1288 /* 1289 * RT721_AIF1 with port = 1 for headphone playback 1290 * RT721_AIF1 with port = 2 for headset-mic capture 1291 * RT721_AIF2 with port = 3 for speaker playback 1292 * RT721_AIF3 with port = 6 for digital-mic capture 1293 */ 1294 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 1295 direction = SDW_DATA_DIR_RX; 1296 if (dai->id == RT721_AIF1) 1297 port = 1; 1298 else if (dai->id == RT721_AIF2) 1299 port = 3; 1300 else 1301 return -EINVAL; 1302 } else { 1303 direction = SDW_DATA_DIR_TX; 1304 if (dai->id == RT721_AIF1) 1305 port = 2; 1306 else if (dai->id == RT721_AIF3) 1307 port = 6; 1308 else 1309 return -EINVAL; 1310 } 1311 stream_config.frame_rate = params_rate(params); 1312 stream_config.ch_count = params_channels(params); 1313 stream_config.bps = snd_pcm_format_width(params_format(params)); 1314 stream_config.direction = direction; 1315 1316 num_channels = params_channels(params); 1317 port_config.ch_mask = GENMASK(num_channels - 1, 0); 1318 port_config.num = port; 1319 1320 retval = sdw_stream_add_slave(rt721->slave, &stream_config, 1321 &port_config, 1, sdw_stream); 1322 if (retval) { 1323 dev_err(dai->dev, "Unable to configure port\n"); 1324 return retval; 1325 } 1326 1327 if (params_channels(params) > 16) { 1328 dev_err(component->dev, "Unsupported channels %d\n", 1329 params_channels(params)); 1330 return -EINVAL; 1331 } 1332 1333 /* sampling rate configuration */ 1334 switch (params_rate(params)) { 1335 case 8000: 1336 sampling_rate = RT721_SDCA_RATE_8000HZ; 1337 break; 1338 case 16000: 1339 sampling_rate = RT721_SDCA_RATE_16000HZ; 1340 break; 1341 case 24000: 1342 sampling_rate = RT721_SDCA_RATE_24000HZ; 1343 break; 1344 case 32000: 1345 sampling_rate = RT721_SDCA_RATE_32000HZ; 1346 break; 1347 case 44100: 1348 sampling_rate = RT721_SDCA_RATE_44100HZ; 1349 break; 1350 case 48000: 1351 sampling_rate = RT721_SDCA_RATE_48000HZ; 1352 break; 1353 case 96000: 1354 sampling_rate = RT721_SDCA_RATE_96000HZ; 1355 break; 1356 case 192000: 1357 sampling_rate = RT721_SDCA_RATE_192000HZ; 1358 break; 1359 case 384000: 1360 sampling_rate = RT721_SDCA_RATE_384000HZ; 1361 break; 1362 case 768000: 1363 sampling_rate = RT721_SDCA_RATE_768000HZ; 1364 break; 1365 default: 1366 dev_err(component->dev, "Rate %d is not supported\n", 1367 params_rate(params)); 1368 return -EINVAL; 1369 } 1370 1371 /* set sampling frequency */ 1372 if (dai->id == RT721_AIF1) { 1373 regmap_write(rt721->regmap, 1374 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_CS01, 1375 RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate); 1376 regmap_write(rt721->regmap, 1377 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_CS11, 1378 RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate); 1379 } 1380 1381 if (dai->id == RT721_AIF2) 1382 regmap_write(rt721->regmap, 1383 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_CS31, 1384 RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate); 1385 1386 if (dai->id == RT721_AIF3) 1387 regmap_write(rt721->regmap, 1388 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_CS1F, 1389 RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate); 1390 1391 return 0; 1392 } 1393 1394 static int rt721_sdca_pcm_hw_free(struct snd_pcm_substream *substream, 1395 struct snd_soc_dai *dai) 1396 { 1397 struct snd_soc_component *component = dai->component; 1398 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1399 struct sdw_stream_runtime *sdw_stream = 1400 snd_soc_dai_get_dma_data(dai, substream); 1401 1402 if (!rt721->slave) 1403 return -EINVAL; 1404 1405 sdw_stream_remove_slave(rt721->slave, sdw_stream); 1406 return 0; 1407 } 1408 1409 #define RT721_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | \ 1410 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000) 1411 #define RT721_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ 1412 SNDRV_PCM_FMTBIT_S24_LE) 1413 1414 static const struct snd_soc_dai_ops rt721_sdca_ops = { 1415 .hw_params = rt721_sdca_pcm_hw_params, 1416 .hw_free = rt721_sdca_pcm_hw_free, 1417 .set_stream = rt721_sdca_set_sdw_stream, 1418 .shutdown = rt721_sdca_shutdown, 1419 }; 1420 1421 static struct snd_soc_dai_driver rt721_sdca_dai[] = { 1422 { 1423 .name = "rt721-sdca-aif1", 1424 .id = RT721_AIF1, 1425 .playback = { 1426 .stream_name = "DP1 Headphone Playback", 1427 .channels_min = 1, 1428 .channels_max = 2, 1429 .rates = RT721_STEREO_RATES, 1430 .formats = RT721_FORMATS, 1431 }, 1432 .capture = { 1433 .stream_name = "DP2 Headset Capture", 1434 .channels_min = 1, 1435 .channels_max = 2, 1436 .rates = RT721_STEREO_RATES, 1437 .formats = RT721_FORMATS, 1438 }, 1439 .ops = &rt721_sdca_ops, 1440 }, 1441 { 1442 .name = "rt721-sdca-aif2", 1443 .id = RT721_AIF2, 1444 .playback = { 1445 .stream_name = "DP3 Speaker Playback", 1446 .channels_min = 1, 1447 .channels_max = 2, 1448 .rates = RT721_STEREO_RATES, 1449 .formats = RT721_FORMATS, 1450 }, 1451 .ops = &rt721_sdca_ops, 1452 }, 1453 { 1454 .name = "rt721-sdca-aif3", 1455 .id = RT721_AIF3, 1456 .capture = { 1457 .stream_name = "DP6 DMic Capture", 1458 .channels_min = 1, 1459 .channels_max = 4, 1460 .rates = RT721_STEREO_RATES, 1461 .formats = RT721_FORMATS, 1462 }, 1463 .ops = &rt721_sdca_ops, 1464 } 1465 }; 1466 1467 int rt721_sdca_init(struct device *dev, struct regmap *regmap, 1468 struct regmap *mbq_regmap, struct sdw_slave *slave) 1469 { 1470 struct rt721_sdca_priv *rt721; 1471 1472 rt721 = devm_kzalloc(dev, sizeof(*rt721), GFP_KERNEL); 1473 if (!rt721) 1474 return -ENOMEM; 1475 1476 dev_set_drvdata(dev, rt721); 1477 rt721->slave = slave; 1478 rt721->regmap = regmap; 1479 rt721->mbq_regmap = mbq_regmap; 1480 1481 regcache_cache_only(rt721->regmap, true); 1482 regcache_cache_only(rt721->mbq_regmap, true); 1483 1484 mutex_init(&rt721->calibrate_mutex); 1485 mutex_init(&rt721->disable_irq_lock); 1486 1487 INIT_DELAYED_WORK(&rt721->jack_detect_work, rt721_sdca_jack_detect_handler); 1488 INIT_DELAYED_WORK(&rt721->jack_btn_check_work, rt721_sdca_btn_check_handler); 1489 1490 /* 1491 * Mark hw_init to false 1492 * HW init will be performed when device reports present 1493 */ 1494 rt721->hw_init = false; 1495 rt721->first_hw_init = false; 1496 rt721->fu1e_dapm_mute = true; 1497 rt721->fu0f_dapm_mute = true; 1498 rt721->fu0f_mixer_l_mute = rt721->fu0f_mixer_r_mute = true; 1499 rt721->fu1e_mixer_mute[0] = rt721->fu1e_mixer_mute[1] = 1500 rt721->fu1e_mixer_mute[2] = rt721->fu1e_mixer_mute[3] = true; 1501 1502 return devm_snd_soc_register_component(dev, 1503 &soc_sdca_dev_rt721, rt721_sdca_dai, ARRAY_SIZE(rt721_sdca_dai)); 1504 } 1505 1506 int rt721_sdca_io_init(struct device *dev, struct sdw_slave *slave) 1507 { 1508 struct rt721_sdca_priv *rt721 = dev_get_drvdata(dev); 1509 1510 rt721->disable_irq = false; 1511 1512 if (rt721->hw_init) 1513 return 0; 1514 1515 regcache_cache_only(rt721->regmap, false); 1516 regcache_cache_only(rt721->mbq_regmap, false); 1517 if (rt721->first_hw_init) { 1518 regcache_cache_bypass(rt721->regmap, true); 1519 regcache_cache_bypass(rt721->mbq_regmap, true); 1520 } else { 1521 /* 1522 * PM runtime is only enabled when a Slave reports as Attached 1523 */ 1524 1525 /* set autosuspend parameters */ 1526 pm_runtime_set_autosuspend_delay(&slave->dev, 3000); 1527 pm_runtime_use_autosuspend(&slave->dev); 1528 1529 /* update count of parent 'active' children */ 1530 pm_runtime_set_active(&slave->dev); 1531 1532 /* make sure the device does not suspend immediately */ 1533 pm_runtime_mark_last_busy(&slave->dev); 1534 1535 pm_runtime_enable(&slave->dev); 1536 } 1537 1538 pm_runtime_get_noresume(&slave->dev); 1539 rt721_sdca_dmic_preset(rt721); 1540 rt721_sdca_amp_preset(rt721); 1541 rt721_sdca_jack_preset(rt721); 1542 if (rt721->first_hw_init) { 1543 regcache_cache_bypass(rt721->regmap, false); 1544 regcache_mark_dirty(rt721->regmap); 1545 regcache_cache_bypass(rt721->mbq_regmap, false); 1546 regcache_mark_dirty(rt721->mbq_regmap); 1547 } else 1548 rt721->first_hw_init = true; 1549 1550 /* Mark Slave initialization complete */ 1551 rt721->hw_init = true; 1552 1553 pm_runtime_put_autosuspend(&slave->dev); 1554 1555 dev_dbg(&slave->dev, "%s hw_init complete\n", __func__); 1556 return 0; 1557 } 1558 1559 MODULE_DESCRIPTION("ASoC RT721 SDCA SDW driver"); 1560 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>"); 1561 MODULE_LICENSE("GPL"); 1562