1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // rt721-sdca.c -- rt721 SDCA ALSA SoC audio driver 4 // 5 // Copyright(c) 2024 Realtek Semiconductor Corp. 6 // 7 // 8 9 #include <linux/bitops.h> 10 #include <sound/core.h> 11 #include <linux/delay.h> 12 #include <linux/init.h> 13 #include <sound/initval.h> 14 #include <sound/jack.h> 15 #include <linux/kernel.h> 16 #include <linux/module.h> 17 #include <linux/moduleparam.h> 18 #include <sound/pcm.h> 19 #include <linux/pm_runtime.h> 20 #include <sound/pcm_params.h> 21 #include <linux/soundwire/sdw_registers.h> 22 #include <linux/slab.h> 23 #include <sound/soc-dapm.h> 24 #include <sound/tlv.h> 25 26 #include "rt721-sdca.h" 27 #include "rt-sdw-common.h" 28 29 static void rt721_sdca_jack_detect_handler(struct work_struct *work) 30 { 31 struct rt721_sdca_priv *rt721 = 32 container_of(work, struct rt721_sdca_priv, jack_detect_work.work); 33 int btn_type = 0; 34 35 if (!rt721->hs_jack) 36 return; 37 38 if (!rt721->component->card || !rt721->component->card->instantiated) 39 return; 40 41 /* SDW_SCP_SDCA_INT_SDCA_6 is used for jack detection */ 42 if (rt721->scp_sdca_stat1 & SDW_SCP_SDCA_INT_SDCA_0) { 43 rt721->jack_type = rt_sdca_headset_detect(rt721->regmap, 44 RT721_SDCA_ENT_GE49); 45 if (rt721->jack_type < 0) 46 return; 47 } 48 49 /* SDW_SCP_SDCA_INT_SDCA_8 is used for button detection */ 50 if (rt721->scp_sdca_stat2 & SDW_SCP_SDCA_INT_SDCA_8) 51 btn_type = rt_sdca_button_detect(rt721->regmap, 52 RT721_SDCA_ENT_HID01, RT721_BUF_ADDR_HID1, 53 RT721_SDCA_HID_ID); 54 55 if (rt721->jack_type == 0) 56 btn_type = 0; 57 58 dev_dbg(&rt721->slave->dev, 59 "in %s, jack_type=%d\n", __func__, rt721->jack_type); 60 dev_dbg(&rt721->slave->dev, 61 "in %s, btn_type=0x%x\n", __func__, btn_type); 62 dev_dbg(&rt721->slave->dev, 63 "in %s, scp_sdca_stat1=0x%x, scp_sdca_stat2=0x%x\n", __func__, 64 rt721->scp_sdca_stat1, rt721->scp_sdca_stat2); 65 66 snd_soc_jack_report(rt721->hs_jack, rt721->jack_type | btn_type, 67 SND_JACK_HEADSET | 68 SND_JACK_BTN_0 | SND_JACK_BTN_1 | 69 SND_JACK_BTN_2 | SND_JACK_BTN_3); 70 71 if (btn_type) { 72 /* button released */ 73 snd_soc_jack_report(rt721->hs_jack, rt721->jack_type, 74 SND_JACK_HEADSET | 75 SND_JACK_BTN_0 | SND_JACK_BTN_1 | 76 SND_JACK_BTN_2 | SND_JACK_BTN_3); 77 78 mod_delayed_work(system_power_efficient_wq, 79 &rt721->jack_btn_check_work, msecs_to_jiffies(200)); 80 } 81 } 82 83 static void rt721_sdca_btn_check_handler(struct work_struct *work) 84 { 85 struct rt721_sdca_priv *rt721 = 86 container_of(work, struct rt721_sdca_priv, jack_btn_check_work.work); 87 int btn_type = 0, ret, idx; 88 unsigned int det_mode, offset, val; 89 unsigned char buf[3]; 90 91 ret = regmap_read(rt721->regmap, 92 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_GE49, 93 RT721_SDCA_CTL_DETECTED_MODE, 0), &det_mode); 94 if (ret < 0) 95 goto io_error; 96 97 /* pin attached */ 98 if (det_mode) { 99 /* read UMP message offset */ 100 ret = regmap_read(rt721->regmap, 101 SDW_SDCA_CTL(FUNC_NUM_HID, RT721_SDCA_ENT_HID01, 102 RT721_SDCA_CTL_HIDTX_MESSAGE_OFFSET, 0), &offset); 103 if (ret < 0) 104 goto io_error; 105 106 for (idx = 0; idx < sizeof(buf); idx++) { 107 ret = regmap_read(rt721->regmap, 108 RT721_BUF_ADDR_HID1 + offset + idx, &val); 109 if (ret < 0) 110 goto io_error; 111 buf[idx] = val & 0xff; 112 } 113 /* Report ID for HID1 */ 114 if (buf[0] == 0x11) 115 btn_type = rt_sdca_btn_type(&buf[1]); 116 } else 117 rt721->jack_type = 0; 118 119 dev_dbg(&rt721->slave->dev, "%s, btn_type=0x%x\n", __func__, btn_type); 120 snd_soc_jack_report(rt721->hs_jack, rt721->jack_type | btn_type, 121 SND_JACK_HEADSET | 122 SND_JACK_BTN_0 | SND_JACK_BTN_1 | 123 SND_JACK_BTN_2 | SND_JACK_BTN_3); 124 125 if (btn_type) { 126 /* button released */ 127 snd_soc_jack_report(rt721->hs_jack, rt721->jack_type, 128 SND_JACK_HEADSET | 129 SND_JACK_BTN_0 | SND_JACK_BTN_1 | 130 SND_JACK_BTN_2 | SND_JACK_BTN_3); 131 132 mod_delayed_work(system_power_efficient_wq, 133 &rt721->jack_btn_check_work, msecs_to_jiffies(200)); 134 } 135 136 return; 137 138 io_error: 139 pr_err_ratelimited("IO error in %s, ret %d\n", __func__, ret); 140 } 141 142 static void rt721_sdca_dmic_preset(struct rt721_sdca_priv *rt721) 143 { 144 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 145 RT721_MISC_POWER_CTL31, 0x8000); 146 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART, 147 RT721_VREF1_HV_CTRL1, 0xe000); 148 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 149 RT721_MISC_POWER_CTL31, 0x8007); 150 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 151 RT721_ENT_FLOAT_CTL9, 0x2a2a); 152 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 153 RT721_ENT_FLOAT_CTL10, 0x2a00); 154 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 155 RT721_ENT_FLOAT_CTL6, 0x2a2a); 156 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 157 RT721_ENT_FLOAT_CTL5, 0x2626); 158 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 159 RT721_ENT_FLOAT_CTL8, 0x1e00); 160 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 161 RT721_ENT_FLOAT_CTL7, 0x1515); 162 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 163 RT721_CH_FLOAT_CTL3, 0x0304); 164 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 165 RT721_CH_FLOAT_CTL4, 0x0304); 166 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 167 RT721_HDA_LEGACY_CTL1, 0x0000); 168 regmap_write(rt721->regmap, 169 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_IT26, 170 RT721_SDCA_CTL_VENDOR_DEF, 0), 0x01); 171 regmap_write(rt721->mbq_regmap, 0x5910009, 0x2e01); 172 rt_sdca_index_write(rt721->mbq_regmap, RT721_RC_CALIB_CTRL, 173 RT721_RC_CALIB_CTRL0, 0x0b00); 174 rt_sdca_index_write(rt721->mbq_regmap, RT721_RC_CALIB_CTRL, 175 RT721_RC_CALIB_CTRL0, 0x0b40); 176 regmap_write(rt721->regmap, 0x2f5c, 0x25); 177 } 178 179 static void rt721_sdca_amp_preset(struct rt721_sdca_priv *rt721) 180 { 181 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 182 RT721_MISC_POWER_CTL31, 0x8000); 183 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART, 184 RT721_VREF1_HV_CTRL1, 0xe000); 185 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 186 RT721_MISC_POWER_CTL31, 0x8007); 187 regmap_write(rt721->mbq_regmap, 0x5810000, 0x6420); 188 regmap_write(rt721->mbq_regmap, 0x5810000, 0x6421); 189 regmap_write(rt721->mbq_regmap, 0x5810000, 0xe421); 190 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 191 RT721_CH_FLOAT_CTL6, 0x5561); 192 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_REG, 193 RT721_GPIO_PAD_CTRL5, 0x8003); 194 regmap_write(rt721->regmap, 195 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_OT23, 196 RT721_SDCA_CTL_VENDOR_DEF, 0), 0x04); 197 regmap_write(rt721->regmap, 198 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, 199 RT721_SDCA_CTL_FU_MUTE, CH_01), 0x00); 200 regmap_write(rt721->regmap, 201 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, 202 RT721_SDCA_CTL_FU_MUTE, CH_02), 0x00); 203 regmap_write(rt721->regmap, 204 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_FU55, 205 RT721_SDCA_CTL_FU_MUTE, CH_01), 0x00); 206 regmap_write(rt721->regmap, 207 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_FU55, 208 RT721_SDCA_CTL_FU_MUTE, CH_02), 0x00); 209 } 210 211 static void rt721_sdca_jack_preset(struct rt721_sdca_priv *rt721) 212 { 213 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 214 RT721_MISC_POWER_CTL31, 0x8000); 215 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART, 216 RT721_VREF1_HV_CTRL1, 0xe000); 217 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 218 RT721_MISC_POWER_CTL31, 0x8007); 219 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 220 RT721_GE_REL_CTRL1, 0x8011); 221 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 222 RT721_UMP_HID_CTRL3, 0xcf00); 223 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 224 RT721_UMP_HID_CTRL4, 0x000f); 225 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 226 RT721_UMP_HID_CTRL1, 0x1100); 227 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 228 RT721_UMP_HID_CTRL5, 0x0c12); 229 rt_sdca_index_write(rt721->mbq_regmap, RT721_JD_CTRL, 230 RT721_JD_1PIN_GAT_CTRL2, 0xc002); 231 rt_sdca_index_write(rt721->mbq_regmap, RT721_RC_CALIB_CTRL, 232 RT721_RC_CALIB_CTRL0, 0x0b00); 233 rt_sdca_index_write(rt721->mbq_regmap, RT721_RC_CALIB_CTRL, 234 RT721_RC_CALIB_CTRL0, 0x0b40); 235 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 236 RT721_UAJ_TOP_TCON14, 0x3333); 237 regmap_write(rt721->mbq_regmap, 0x5810035, 0x0036); 238 regmap_write(rt721->mbq_regmap, 0x5810030, 0xee00); 239 rt_sdca_index_write(rt721->mbq_regmap, RT721_CAP_PORT_CTRL, 240 RT721_HP_AMP_2CH_CAL1, 0x0140); 241 regmap_write(rt721->mbq_regmap, 0x5810000, 0x0021); 242 regmap_write(rt721->mbq_regmap, 0x5810000, 0x8021); 243 rt_sdca_index_write(rt721->mbq_regmap, RT721_CAP_PORT_CTRL, 244 RT721_HP_AMP_2CH_CAL18, 0x5522); 245 regmap_write(rt721->mbq_regmap, 0x5b10007, 0x2000); 246 regmap_write(rt721->mbq_regmap, 0x5B10017, 0x1b0f); 247 rt_sdca_index_write(rt721->mbq_regmap, RT721_CBJ_CTRL, 248 RT721_CBJ_A0_GAT_CTRL1, 0x2a02); 249 rt_sdca_index_write(rt721->mbq_regmap, RT721_CAP_PORT_CTRL, 250 RT721_HP_AMP_2CH_CAL4, 0xa105); 251 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 252 RT721_UAJ_TOP_TCON14, 0x3b33); 253 regmap_write(rt721->mbq_regmap, 0x310400, 0x3023); 254 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 255 RT721_UAJ_TOP_TCON14, 0x3f33); 256 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 257 RT721_UAJ_TOP_TCON13, 0x6048); 258 regmap_write(rt721->mbq_regmap, 0x310401, 0x3000); 259 regmap_write(rt721->mbq_regmap, 0x310402, 0x1b00); 260 regmap_write(rt721->mbq_regmap, 0x310300, 0x000f); 261 regmap_write(rt721->mbq_regmap, 0x310301, 0x3000); 262 regmap_write(rt721->mbq_regmap, 0x310302, 0x1b00); 263 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 264 RT721_UAJ_TOP_TCON17, 0x0008); 265 rt_sdca_index_write(rt721->mbq_regmap, RT721_DAC_CTRL, 266 RT721_DAC_2CH_CTRL3, 0x55ff); 267 rt_sdca_index_write(rt721->mbq_regmap, RT721_DAC_CTRL, 268 RT721_DAC_2CH_CTRL4, 0xcc00); 269 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART, 270 RT721_MBIAS_LV_CTRL2, 0x6677); 271 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART, 272 RT721_VREF2_LV_CTRL1, 0x7600); 273 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 274 RT721_ENT_FLOAT_CTL2, 0x1234); 275 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 276 RT721_ENT_FLOAT_CTL3, 0x3512); 277 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 278 RT721_ENT_FLOAT_CTL1, 0x4040); 279 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 280 RT721_ENT_FLOAT_CTL4, 0x1201); 281 regmap_write(rt721->regmap, 0x2f58, 0x07); 282 } 283 284 static void rt721_sdca_jack_init(struct rt721_sdca_priv *rt721) 285 { 286 mutex_lock(&rt721->calibrate_mutex); 287 if (rt721->hs_jack) { 288 sdw_write_no_pm(rt721->slave, SDW_SCP_SDCA_INTMASK1, 289 SDW_SCP_SDCA_INTMASK_SDCA_0); 290 sdw_write_no_pm(rt721->slave, SDW_SCP_SDCA_INTMASK2, 291 SDW_SCP_SDCA_INTMASK_SDCA_8); 292 dev_dbg(&rt721->slave->dev, "in %s enable\n", __func__); 293 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 294 RT721_HDA_LEGACY_UAJ_CTL, 0x036E); 295 regmap_write(rt721->regmap, 296 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_XU03, 297 RT721_SDCA_CTL_SELECTED_MODE, 0), 0); 298 regmap_write(rt721->regmap, 299 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_XU0D, 300 RT721_SDCA_CTL_SELECTED_MODE, 0), 0); 301 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 302 RT721_XU_REL_CTRL, 0x0000); 303 rt_sdca_index_update_bits(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 304 RT721_GE_REL_CTRL1, 0x4000, 0x4000); 305 } 306 mutex_unlock(&rt721->calibrate_mutex); 307 } 308 309 static int rt721_sdca_set_jack_detect(struct snd_soc_component *component, 310 struct snd_soc_jack *hs_jack, void *data) 311 { 312 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 313 int ret; 314 315 rt721->hs_jack = hs_jack; 316 317 ret = pm_runtime_resume_and_get(component->dev); 318 if (ret < 0) { 319 if (ret != -EACCES) { 320 dev_err(component->dev, "%s: failed to resume %d\n", __func__, ret); 321 return ret; 322 } 323 /* pm_runtime not enabled yet */ 324 dev_dbg(component->dev, "%s: skipping jack init for now\n", __func__); 325 return 0; 326 } 327 328 rt721_sdca_jack_init(rt721); 329 330 pm_runtime_mark_last_busy(component->dev); 331 pm_runtime_put_autosuspend(component->dev); 332 333 return 0; 334 } 335 336 /* For SDCA control DAC/ADC Gain */ 337 static int rt721_sdca_set_gain_put(struct snd_kcontrol *kcontrol, 338 struct snd_ctl_elem_value *ucontrol) 339 { 340 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 341 struct soc_mixer_control *mc = 342 (struct soc_mixer_control *)kcontrol->private_value; 343 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 344 unsigned int read_l, read_r, gain_l_val, gain_r_val; 345 unsigned int adc_vol_flag = 0, changed = 0; 346 unsigned int lvalue, rvalue; 347 const unsigned int interval_offset = 0xc0; 348 const unsigned int tendA = 0x200; 349 const unsigned int tendB = 0xa00; 350 351 if (strstr(ucontrol->id.name, "FU1E Capture Volume") || 352 strstr(ucontrol->id.name, "FU0F Capture Volume")) 353 adc_vol_flag = 1; 354 355 regmap_read(rt721->mbq_regmap, mc->reg, &lvalue); 356 regmap_read(rt721->mbq_regmap, mc->rreg, &rvalue); 357 358 /* L Channel */ 359 gain_l_val = ucontrol->value.integer.value[0]; 360 if (gain_l_val > mc->max) 361 gain_l_val = mc->max; 362 363 if (mc->shift == 8) { 364 /* boost gain */ 365 gain_l_val = gain_l_val * tendB; 366 } else if (mc->shift == 1) { 367 /* FU33 boost gain */ 368 if (gain_l_val == 0) 369 gain_l_val = 0x8000; 370 else 371 gain_l_val = (gain_l_val - 1) * tendA; 372 } else { 373 /* ADC/DAC gain */ 374 if (adc_vol_flag) 375 gain_l_val = 0x1e00 - ((mc->max - gain_l_val) * interval_offset); 376 else 377 gain_l_val = 0 - ((mc->max - gain_l_val) * interval_offset); 378 gain_l_val &= 0xffff; 379 } 380 381 /* R Channel */ 382 gain_r_val = ucontrol->value.integer.value[1]; 383 if (gain_r_val > mc->max) 384 gain_r_val = mc->max; 385 386 if (mc->shift == 8) { 387 /* boost gain */ 388 gain_r_val = gain_r_val * tendB; 389 } else if (mc->shift == 1) { 390 /* FU33 boost gain */ 391 if (gain_r_val == 0) 392 gain_r_val = 0x8000; 393 else 394 gain_r_val = (gain_r_val - 1) * tendA; 395 } else { 396 /* ADC/DAC gain */ 397 if (adc_vol_flag) 398 gain_r_val = 0x1e00 - ((mc->max - gain_r_val) * interval_offset); 399 else 400 gain_r_val = 0 - ((mc->max - gain_r_val) * interval_offset); 401 gain_r_val &= 0xffff; 402 } 403 404 if (lvalue != gain_l_val || rvalue != gain_r_val) 405 changed = 1; 406 else 407 return 0; 408 409 /* Lch*/ 410 regmap_write(rt721->mbq_regmap, mc->reg, gain_l_val); 411 412 /* Rch */ 413 regmap_write(rt721->mbq_regmap, mc->rreg, gain_r_val); 414 415 regmap_read(rt721->mbq_regmap, mc->reg, &read_l); 416 regmap_read(rt721->mbq_regmap, mc->rreg, &read_r); 417 if (read_r == gain_r_val && read_l == gain_l_val) 418 return changed; 419 420 return -EIO; 421 } 422 423 static int rt721_sdca_set_gain_get(struct snd_kcontrol *kcontrol, 424 struct snd_ctl_elem_value *ucontrol) 425 { 426 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 427 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 428 struct soc_mixer_control *mc = 429 (struct soc_mixer_control *)kcontrol->private_value; 430 unsigned int read_l, read_r, ctl_l = 0, ctl_r = 0; 431 unsigned int adc_vol_flag = 0; 432 const unsigned int interval_offset = 0xc0; 433 const unsigned int tendA = 0x200; 434 const unsigned int tendB = 0xa00; 435 436 if (strstr(ucontrol->id.name, "FU1E Capture Volume") || 437 strstr(ucontrol->id.name, "FU0F Capture Volume")) 438 adc_vol_flag = 1; 439 440 regmap_read(rt721->mbq_regmap, mc->reg, &read_l); 441 regmap_read(rt721->mbq_regmap, mc->rreg, &read_r); 442 443 if (mc->shift == 8) { 444 /* boost gain */ 445 ctl_l = read_l / tendB; 446 } else if (mc->shift == 1) { 447 /* FU33 boost gain */ 448 if (read_l == 0x8000 || read_l == 0xfe00) 449 ctl_l = 0; 450 else 451 ctl_l = read_l / tendA + 1; 452 } else { 453 if (adc_vol_flag) 454 ctl_l = mc->max - (((0x1e00 - read_l) & 0xffff) / interval_offset); 455 else 456 ctl_l = mc->max - (((0 - read_l) & 0xffff) / interval_offset); 457 } 458 459 if (read_l != read_r) { 460 if (mc->shift == 8) { 461 /* boost gain */ 462 ctl_r = read_r / tendB; 463 } else if (mc->shift == 1) { 464 /* FU33 boost gain */ 465 if (read_r == 0x8000 || read_r == 0xfe00) 466 ctl_r = 0; 467 else 468 ctl_r = read_r / tendA + 1; 469 } else { /* ADC/DAC gain */ 470 if (adc_vol_flag) 471 ctl_r = mc->max - (((0x1e00 - read_r) & 0xffff) / interval_offset); 472 else 473 ctl_r = mc->max - (((0 - read_r) & 0xffff) / interval_offset); 474 } 475 } else { 476 ctl_r = ctl_l; 477 } 478 479 ucontrol->value.integer.value[0] = ctl_l; 480 ucontrol->value.integer.value[1] = ctl_r; 481 482 return 0; 483 } 484 485 static int rt721_sdca_set_fu1e_capture_ctl(struct rt721_sdca_priv *rt721) 486 { 487 int err, i; 488 unsigned int ch_mute; 489 490 for (i = 0; i < ARRAY_SIZE(rt721->fu1e_mixer_mute); i++) { 491 ch_mute = rt721->fu1e_dapm_mute || rt721->fu1e_mixer_mute[i]; 492 err = regmap_write(rt721->regmap, 493 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, 494 RT721_SDCA_CTL_FU_MUTE, CH_01) + i, ch_mute); 495 if (err < 0) 496 return err; 497 } 498 499 return 0; 500 } 501 502 static int rt721_sdca_fu1e_capture_get(struct snd_kcontrol *kcontrol, 503 struct snd_ctl_elem_value *ucontrol) 504 { 505 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 506 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 507 struct rt721_sdca_dmic_kctrl_priv *p = 508 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value; 509 unsigned int i; 510 511 for (i = 0; i < p->count; i++) 512 ucontrol->value.integer.value[i] = !rt721->fu1e_mixer_mute[i]; 513 514 return 0; 515 } 516 517 static int rt721_sdca_fu1e_capture_put(struct snd_kcontrol *kcontrol, 518 struct snd_ctl_elem_value *ucontrol) 519 { 520 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 521 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 522 struct rt721_sdca_dmic_kctrl_priv *p = 523 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value; 524 int err, changed = 0, i; 525 526 for (i = 0; i < p->count; i++) { 527 if (rt721->fu1e_mixer_mute[i] != !ucontrol->value.integer.value[i]) 528 changed = 1; 529 rt721->fu1e_mixer_mute[i] = !ucontrol->value.integer.value[i]; 530 } 531 532 err = rt721_sdca_set_fu1e_capture_ctl(rt721); 533 if (err < 0) 534 return err; 535 536 return changed; 537 } 538 539 static int rt721_sdca_set_fu0f_capture_ctl(struct rt721_sdca_priv *rt721) 540 { 541 int err; 542 unsigned int ch_l, ch_r; 543 544 ch_l = (rt721->fu0f_dapm_mute || rt721->fu0f_mixer_l_mute) ? 0x01 : 0x00; 545 ch_r = (rt721->fu0f_dapm_mute || rt721->fu0f_mixer_r_mute) ? 0x01 : 0x00; 546 547 err = regmap_write(rt721->regmap, 548 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F, 549 RT721_SDCA_CTL_FU_MUTE, CH_L), ch_l); 550 if (err < 0) 551 return err; 552 553 err = regmap_write(rt721->regmap, 554 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F, 555 RT721_SDCA_CTL_FU_MUTE, CH_R), ch_r); 556 if (err < 0) 557 return err; 558 559 return 0; 560 } 561 562 static int rt721_sdca_fu0f_capture_get(struct snd_kcontrol *kcontrol, 563 struct snd_ctl_elem_value *ucontrol) 564 { 565 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 566 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 567 568 ucontrol->value.integer.value[0] = !rt721->fu0f_mixer_l_mute; 569 ucontrol->value.integer.value[1] = !rt721->fu0f_mixer_r_mute; 570 return 0; 571 } 572 573 static int rt721_sdca_fu0f_capture_put(struct snd_kcontrol *kcontrol, 574 struct snd_ctl_elem_value *ucontrol) 575 { 576 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 577 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 578 int err, changed = 0; 579 580 if (rt721->fu0f_mixer_l_mute != !ucontrol->value.integer.value[0] || 581 rt721->fu0f_mixer_r_mute != !ucontrol->value.integer.value[1]) 582 changed = 1; 583 584 rt721->fu0f_mixer_l_mute = !ucontrol->value.integer.value[0]; 585 rt721->fu0f_mixer_r_mute = !ucontrol->value.integer.value[1]; 586 err = rt721_sdca_set_fu0f_capture_ctl(rt721); 587 if (err < 0) 588 return err; 589 590 return changed; 591 } 592 593 static int rt721_sdca_fu_info(struct snd_kcontrol *kcontrol, 594 struct snd_ctl_elem_info *uinfo) 595 { 596 struct rt721_sdca_dmic_kctrl_priv *p = 597 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value; 598 599 if (p->max == 1) 600 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 601 else 602 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 603 uinfo->count = p->count; 604 uinfo->value.integer.min = 0; 605 uinfo->value.integer.max = p->max; 606 return 0; 607 } 608 609 static int rt721_sdca_dmic_set_gain_get(struct snd_kcontrol *kcontrol, 610 struct snd_ctl_elem_value *ucontrol) 611 { 612 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 613 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 614 struct rt721_sdca_dmic_kctrl_priv *p = 615 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value; 616 unsigned int boost_step = 0x0a00; 617 unsigned int vol_max = 0x1e00; 618 unsigned int regvalue, ctl, i; 619 unsigned int adc_vol_flag = 0; 620 const unsigned int interval_offset = 0xc0; 621 622 if (strstr(ucontrol->id.name, "FU1E Capture Volume")) 623 adc_vol_flag = 1; 624 625 /* check all channels */ 626 for (i = 0; i < p->count; i++) { 627 regmap_read(rt721->mbq_regmap, p->reg_base + i, ®value); 628 629 if (!adc_vol_flag) /* boost gain */ 630 ctl = regvalue / boost_step; 631 else /* ADC gain */ 632 ctl = p->max - (((vol_max - regvalue) & 0xffff) / interval_offset); 633 634 ucontrol->value.integer.value[i] = ctl; 635 } 636 637 return 0; 638 } 639 640 static int rt721_sdca_dmic_set_gain_put(struct snd_kcontrol *kcontrol, 641 struct snd_ctl_elem_value *ucontrol) 642 { 643 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 644 struct rt721_sdca_dmic_kctrl_priv *p = 645 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value; 646 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 647 unsigned int boost_step = 0x0a00; 648 unsigned int vol_max = 0x1e00; 649 unsigned int gain_val[4]; 650 unsigned int i, adc_vol_flag = 0, changed = 0; 651 unsigned int regvalue[4]; 652 const unsigned int interval_offset = 0xc0; 653 int err; 654 655 if (strstr(ucontrol->id.name, "FU1E Capture Volume")) 656 adc_vol_flag = 1; 657 658 /* check all channels */ 659 for (i = 0; i < p->count; i++) { 660 regmap_read(rt721->mbq_regmap, p->reg_base + i, ®value[i]); 661 662 gain_val[i] = ucontrol->value.integer.value[i]; 663 if (gain_val[i] > p->max) 664 gain_val[i] = p->max; 665 666 if (!adc_vol_flag) /* boost gain */ 667 gain_val[i] = gain_val[i] * boost_step; 668 else { /* ADC gain */ 669 gain_val[i] = vol_max - ((p->max - gain_val[i]) * interval_offset); 670 gain_val[i] &= 0xffff; 671 } 672 673 if (regvalue[i] != gain_val[i]) 674 changed = 1; 675 } 676 677 if (!changed) 678 return 0; 679 680 for (i = 0; i < p->count; i++) { 681 err = regmap_write(rt721->mbq_regmap, p->reg_base + i, gain_val[i]); 682 if (err < 0) 683 dev_err(&rt721->slave->dev, "%#08x can't be set\n", p->reg_base + i); 684 } 685 686 return changed; 687 } 688 689 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6525, 75, 0); 690 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -1725, 75, 0); 691 static const DECLARE_TLV_DB_SCALE(boost_vol_tlv, 0, 1000, 0); 692 static const DECLARE_TLV_DB_SCALE(mic2_boost_vol_tlv, -200, 200, 0); 693 694 static const struct snd_kcontrol_new rt721_sdca_controls[] = { 695 /* Headphone playback settings */ 696 SOC_DOUBLE_R_EXT_TLV("FU05 Playback Volume", 697 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, 698 RT721_SDCA_CTL_FU_VOLUME, CH_L), 699 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, 700 RT721_SDCA_CTL_FU_VOLUME, CH_R), 0, 0x57, 0, 701 rt721_sdca_set_gain_get, rt721_sdca_set_gain_put, out_vol_tlv), 702 /* Headset mic capture settings */ 703 SOC_DOUBLE_EXT("FU0F Capture Switch", SND_SOC_NOPM, 0, 1, 1, 0, 704 rt721_sdca_fu0f_capture_get, rt721_sdca_fu0f_capture_put), 705 SOC_DOUBLE_R_EXT_TLV("FU0F Capture Volume", 706 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F, 707 RT721_SDCA_CTL_FU_VOLUME, CH_L), 708 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F, 709 RT721_SDCA_CTL_FU_VOLUME, CH_R), 0, 0x3f, 0, 710 rt721_sdca_set_gain_get, rt721_sdca_set_gain_put, mic_vol_tlv), 711 SOC_DOUBLE_R_EXT_TLV("FU33 Boost Volume", 712 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PLATFORM_FU44, 713 RT721_SDCA_CTL_FU_CH_GAIN, CH_L), 714 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PLATFORM_FU44, 715 RT721_SDCA_CTL_FU_CH_GAIN, CH_R), 1, 0x15, 0, 716 rt721_sdca_set_gain_get, rt721_sdca_set_gain_put, mic2_boost_vol_tlv), 717 /* AMP playback settings */ 718 SOC_DOUBLE_R_EXT_TLV("FU06 Playback Volume", 719 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, 720 RT721_SDCA_CTL_FU_VOLUME, CH_L), 721 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, 722 RT721_SDCA_CTL_FU_VOLUME, CH_R), 0, 0x57, 0, 723 rt721_sdca_set_gain_get, rt721_sdca_set_gain_put, out_vol_tlv), 724 /* DMIC capture settings */ 725 RT_SDCA_FU_CTRL("FU1E Capture Switch", 726 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, 727 RT721_SDCA_CTL_FU_MUTE, CH_01), 1, 1, 4, rt721_sdca_fu_info, 728 rt721_sdca_fu1e_capture_get, rt721_sdca_fu1e_capture_put), 729 RT_SDCA_EXT_TLV("FU1E Capture Volume", 730 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, 731 RT721_SDCA_CTL_FU_VOLUME, CH_01), 732 rt721_sdca_dmic_set_gain_get, rt721_sdca_dmic_set_gain_put, 733 4, 0x3f, mic_vol_tlv, rt721_sdca_fu_info), 734 RT_SDCA_EXT_TLV("FU15 Boost Volume", 735 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_FU15, 736 RT721_SDCA_CTL_FU_CH_GAIN, CH_01), 737 rt721_sdca_dmic_set_gain_get, rt721_sdca_dmic_set_gain_put, 738 4, 3, boost_vol_tlv, rt721_sdca_fu_info), 739 }; 740 741 static int rt721_sdca_adc_mux_get(struct snd_kcontrol *kcontrol, 742 struct snd_ctl_elem_value *ucontrol) 743 { 744 struct snd_soc_component *component = 745 snd_soc_dapm_kcontrol_component(kcontrol); 746 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 747 unsigned int val = 0, mask_sft, mask; 748 749 if (strstr(ucontrol->id.name, "ADC 09 Mux")) { 750 mask_sft = 12; 751 mask = 0x7; 752 } else if (strstr(ucontrol->id.name, "ADC 08 R Mux")) { 753 mask_sft = 10; 754 mask = 0x3; 755 } else if (strstr(ucontrol->id.name, "ADC 08 L Mux")) { 756 mask_sft = 8; 757 mask = 0x3; 758 } else if (strstr(ucontrol->id.name, "ADC 10 R Mux")) { 759 mask_sft = 6; 760 mask = 0x3; 761 } else if (strstr(ucontrol->id.name, "ADC 10 L Mux")) { 762 mask_sft = 4; 763 mask = 0x3; 764 } else if (strstr(ucontrol->id.name, "ADC 07 R Mux")) { 765 mask_sft = 2; 766 mask = 0x3; 767 } else if (strstr(ucontrol->id.name, "ADC 07 L Mux")) { 768 mask_sft = 0; 769 mask = 0x3; 770 } else 771 return -EINVAL; 772 773 rt_sdca_index_read(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 774 RT721_HDA_LEGACY_MUX_CTL0, &val); 775 776 ucontrol->value.enumerated.item[0] = (val >> mask_sft) & mask; 777 778 return 0; 779 } 780 781 static int rt721_sdca_adc_mux_put(struct snd_kcontrol *kcontrol, 782 struct snd_ctl_elem_value *ucontrol) 783 { 784 struct snd_soc_component *component = 785 snd_soc_dapm_kcontrol_component(kcontrol); 786 struct snd_soc_dapm_context *dapm = 787 snd_soc_dapm_kcontrol_dapm(kcontrol); 788 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 789 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 790 unsigned int *item = ucontrol->value.enumerated.item; 791 unsigned int val, val2 = 0, change, mask_sft, mask; 792 unsigned int check; 793 794 if (item[0] >= e->items) 795 return -EINVAL; 796 797 if (strstr(ucontrol->id.name, "ADC 09 Mux")) { 798 mask_sft = 12; 799 mask = 0x7; 800 } else if (strstr(ucontrol->id.name, "ADC 08 R Mux")) { 801 mask_sft = 10; 802 mask = 0x3; 803 } else if (strstr(ucontrol->id.name, "ADC 08 L Mux")) { 804 mask_sft = 8; 805 mask = 0x3; 806 } else if (strstr(ucontrol->id.name, "ADC 10 R Mux")) { 807 mask_sft = 6; 808 mask = 0x3; 809 } else if (strstr(ucontrol->id.name, "ADC 10 L Mux")) { 810 mask_sft = 4; 811 mask = 0x3; 812 } else if (strstr(ucontrol->id.name, "ADC 07 R Mux")) { 813 mask_sft = 2; 814 mask = 0x3; 815 } else if (strstr(ucontrol->id.name, "ADC 07 L Mux")) { 816 mask_sft = 0; 817 mask = 0x3; 818 } else 819 return -EINVAL; 820 821 val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l; 822 rt_sdca_index_read(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 823 RT721_HDA_LEGACY_MUX_CTL0, &val2); 824 825 if (strstr(ucontrol->id.name, "ADC 09 Mux")) 826 val2 = (val2 >> mask_sft) & 0x7; 827 else 828 val2 = (val2 >> mask_sft) & 0x3; 829 830 if (val == val2) 831 change = 0; 832 else 833 change = 1; 834 835 if (change) { 836 rt_sdca_index_read(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 837 RT721_HDA_LEGACY_MUX_CTL0, &check); 838 rt_sdca_index_update_bits(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 839 RT721_HDA_LEGACY_MUX_CTL0, mask << mask_sft, 840 val << mask_sft); 841 } 842 843 snd_soc_dapm_mux_update_power(dapm, kcontrol, 844 item[0], e, NULL); 845 846 return change; 847 } 848 849 static const char * const adc09_mux_text[] = { 850 "MIC2", 851 "LINE1", 852 "LINE2", 853 }; 854 static const char * const adc07_10_mux_text[] = { 855 "DMIC1 RE", 856 "DMIC1 FE", 857 "DMIC2 RE", 858 "DMIC2 FE", 859 }; 860 861 static SOC_ENUM_SINGLE_DECL( 862 rt721_adc09_enum, SND_SOC_NOPM, 0, adc09_mux_text); 863 static SOC_ENUM_SINGLE_DECL( 864 rt721_dmic_enum, SND_SOC_NOPM, 0, adc07_10_mux_text); 865 866 static const struct snd_kcontrol_new rt721_sdca_adc09_mux = 867 SOC_DAPM_ENUM_EXT("ADC 09 Mux", rt721_adc09_enum, 868 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 869 static const struct snd_kcontrol_new rt721_sdca_adc08_r_mux = 870 SOC_DAPM_ENUM_EXT("ADC 08 R Mux", rt721_dmic_enum, 871 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 872 static const struct snd_kcontrol_new rt721_sdca_adc08_l_mux = 873 SOC_DAPM_ENUM_EXT("ADC 08 L Mux", rt721_dmic_enum, 874 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 875 static const struct snd_kcontrol_new rt721_sdca_adc10_r_mux = 876 SOC_DAPM_ENUM_EXT("ADC 10 R Mux", rt721_dmic_enum, 877 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 878 static const struct snd_kcontrol_new rt721_sdca_adc10_l_mux = 879 SOC_DAPM_ENUM_EXT("ADC 10 L Mux", rt721_dmic_enum, 880 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 881 static const struct snd_kcontrol_new rt721_sdca_adc07_r_mux = 882 SOC_DAPM_ENUM_EXT("ADC 07 R Mux", rt721_dmic_enum, 883 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 884 static const struct snd_kcontrol_new rt721_sdca_adc07_l_mux = 885 SOC_DAPM_ENUM_EXT("ADC 07 L Mux", rt721_dmic_enum, 886 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 887 888 889 static int rt721_sdca_fu42_event(struct snd_soc_dapm_widget *w, 890 struct snd_kcontrol *kcontrol, int event) 891 { 892 struct snd_soc_component *component = 893 snd_soc_dapm_to_component(w->dapm); 894 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 895 unsigned char unmute = 0x0, mute = 0x1; 896 897 switch (event) { 898 case SND_SOC_DAPM_POST_PMU: 899 msleep(100); 900 regmap_write(rt721->regmap, 901 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, 902 RT721_SDCA_CTL_FU_MUTE, CH_L), unmute); 903 regmap_write(rt721->regmap, 904 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, 905 RT721_SDCA_CTL_FU_MUTE, CH_R), unmute); 906 break; 907 case SND_SOC_DAPM_PRE_PMD: 908 regmap_write(rt721->regmap, 909 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, 910 RT721_SDCA_CTL_FU_MUTE, CH_L), mute); 911 regmap_write(rt721->regmap, 912 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, 913 RT721_SDCA_CTL_FU_MUTE, CH_R), mute); 914 break; 915 } 916 return 0; 917 } 918 919 static int rt721_sdca_fu21_event(struct snd_soc_dapm_widget *w, 920 struct snd_kcontrol *kcontrol, int event) 921 { 922 struct snd_soc_component *component = 923 snd_soc_dapm_to_component(w->dapm); 924 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 925 unsigned char unmute = 0x0, mute = 0x1; 926 927 switch (event) { 928 case SND_SOC_DAPM_POST_PMU: 929 regmap_write(rt721->regmap, 930 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, 931 RT721_SDCA_CTL_FU_MUTE, CH_L), unmute); 932 regmap_write(rt721->regmap, 933 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, 934 RT721_SDCA_CTL_FU_MUTE, CH_R), unmute); 935 break; 936 case SND_SOC_DAPM_PRE_PMD: 937 regmap_write(rt721->regmap, 938 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, 939 RT721_SDCA_CTL_FU_MUTE, CH_L), mute); 940 regmap_write(rt721->regmap, 941 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, 942 RT721_SDCA_CTL_FU_MUTE, CH_R), mute); 943 break; 944 } 945 return 0; 946 } 947 948 static int rt721_sdca_fu23_event(struct snd_soc_dapm_widget *w, 949 struct snd_kcontrol *kcontrol, int event) 950 { 951 struct snd_soc_component *component = 952 snd_soc_dapm_to_component(w->dapm); 953 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 954 unsigned char unmute = 0x0, mute = 0x1; 955 956 switch (event) { 957 case SND_SOC_DAPM_POST_PMU: 958 regmap_write(rt721->regmap, 959 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, 960 RT721_SDCA_CTL_FU_MUTE, CH_L), unmute); 961 regmap_write(rt721->regmap, 962 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, 963 RT721_SDCA_CTL_FU_MUTE, CH_R), unmute); 964 break; 965 case SND_SOC_DAPM_PRE_PMD: 966 regmap_write(rt721->regmap, 967 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, 968 RT721_SDCA_CTL_FU_MUTE, CH_L), mute); 969 regmap_write(rt721->regmap, 970 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, 971 RT721_SDCA_CTL_FU_MUTE, CH_R), mute); 972 break; 973 } 974 return 0; 975 } 976 977 static int rt721_sdca_fu113_event(struct snd_soc_dapm_widget *w, 978 struct snd_kcontrol *kcontrol, int event) 979 { 980 struct snd_soc_component *component = 981 snd_soc_dapm_to_component(w->dapm); 982 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 983 984 switch (event) { 985 case SND_SOC_DAPM_POST_PMU: 986 rt721->fu1e_dapm_mute = false; 987 rt721_sdca_set_fu1e_capture_ctl(rt721); 988 break; 989 case SND_SOC_DAPM_PRE_PMD: 990 rt721->fu1e_dapm_mute = true; 991 rt721_sdca_set_fu1e_capture_ctl(rt721); 992 break; 993 } 994 return 0; 995 } 996 997 static int rt721_sdca_fu36_event(struct snd_soc_dapm_widget *w, 998 struct snd_kcontrol *kcontrol, int event) 999 { 1000 struct snd_soc_component *component = 1001 snd_soc_dapm_to_component(w->dapm); 1002 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1003 1004 switch (event) { 1005 case SND_SOC_DAPM_POST_PMU: 1006 rt721->fu0f_dapm_mute = false; 1007 rt721_sdca_set_fu0f_capture_ctl(rt721); 1008 break; 1009 case SND_SOC_DAPM_PRE_PMD: 1010 rt721->fu0f_dapm_mute = true; 1011 rt721_sdca_set_fu0f_capture_ctl(rt721); 1012 break; 1013 } 1014 return 0; 1015 } 1016 1017 static int rt721_sdca_pde47_event(struct snd_soc_dapm_widget *w, 1018 struct snd_kcontrol *kcontrol, int event) 1019 { 1020 struct snd_soc_component *component = 1021 snd_soc_dapm_to_component(w->dapm); 1022 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1023 unsigned char ps0 = 0x0, ps3 = 0x3; 1024 1025 switch (event) { 1026 case SND_SOC_DAPM_POST_PMU: 1027 regmap_write(rt721->regmap, 1028 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE40, 1029 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps0); 1030 break; 1031 case SND_SOC_DAPM_PRE_PMD: 1032 regmap_write(rt721->regmap, 1033 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE40, 1034 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps3); 1035 break; 1036 } 1037 return 0; 1038 } 1039 1040 static int rt721_sdca_pde41_event(struct snd_soc_dapm_widget *w, 1041 struct snd_kcontrol *kcontrol, int event) 1042 { 1043 struct snd_soc_component *component = 1044 snd_soc_dapm_to_component(w->dapm); 1045 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1046 unsigned char ps0 = 0x0, ps3 = 0x3; 1047 1048 switch (event) { 1049 case SND_SOC_DAPM_POST_PMU: 1050 regmap_write(rt721->regmap, 1051 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE41, 1052 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps0); 1053 break; 1054 case SND_SOC_DAPM_PRE_PMD: 1055 regmap_write(rt721->regmap, 1056 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE41, 1057 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps3); 1058 break; 1059 } 1060 return 0; 1061 } 1062 1063 static int rt721_sdca_pde11_event(struct snd_soc_dapm_widget *w, 1064 struct snd_kcontrol *kcontrol, int event) 1065 { 1066 struct snd_soc_component *component = 1067 snd_soc_dapm_to_component(w->dapm); 1068 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1069 unsigned char ps0 = 0x0, ps3 = 0x3; 1070 1071 switch (event) { 1072 case SND_SOC_DAPM_POST_PMU: 1073 regmap_write(rt721->regmap, 1074 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_PDE2A, 1075 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps0); 1076 break; 1077 case SND_SOC_DAPM_PRE_PMD: 1078 regmap_write(rt721->regmap, 1079 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_PDE2A, 1080 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps3); 1081 break; 1082 } 1083 return 0; 1084 } 1085 1086 static int rt721_sdca_pde34_event(struct snd_soc_dapm_widget *w, 1087 struct snd_kcontrol *kcontrol, int event) 1088 { 1089 struct snd_soc_component *component = 1090 snd_soc_dapm_to_component(w->dapm); 1091 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1092 unsigned char ps0 = 0x0, ps3 = 0x3; 1093 1094 switch (event) { 1095 case SND_SOC_DAPM_POST_PMU: 1096 regmap_write(rt721->regmap, 1097 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE12, 1098 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps0); 1099 break; 1100 case SND_SOC_DAPM_PRE_PMD: 1101 regmap_write(rt721->regmap, 1102 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE12, 1103 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps3); 1104 break; 1105 } 1106 return 0; 1107 } 1108 1109 static const struct snd_soc_dapm_widget rt721_sdca_dapm_widgets[] = { 1110 SND_SOC_DAPM_OUTPUT("HP"), 1111 SND_SOC_DAPM_OUTPUT("SPK"), 1112 SND_SOC_DAPM_INPUT("MIC2"), 1113 SND_SOC_DAPM_INPUT("LINE1"), 1114 SND_SOC_DAPM_INPUT("LINE2"), 1115 SND_SOC_DAPM_INPUT("DMIC1_2"), 1116 SND_SOC_DAPM_INPUT("DMIC3_4"), 1117 1118 SND_SOC_DAPM_SUPPLY("PDE 41", SND_SOC_NOPM, 0, 0, 1119 rt721_sdca_pde41_event, 1120 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1121 SND_SOC_DAPM_SUPPLY("PDE 47", SND_SOC_NOPM, 0, 0, 1122 rt721_sdca_pde47_event, 1123 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1124 SND_SOC_DAPM_SUPPLY("PDE 11", SND_SOC_NOPM, 0, 0, 1125 rt721_sdca_pde11_event, 1126 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1127 SND_SOC_DAPM_SUPPLY("PDE 34", SND_SOC_NOPM, 0, 0, 1128 rt721_sdca_pde34_event, 1129 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1130 1131 SND_SOC_DAPM_DAC_E("FU 21", NULL, SND_SOC_NOPM, 0, 0, 1132 rt721_sdca_fu21_event, 1133 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1134 SND_SOC_DAPM_DAC_E("FU 23", NULL, SND_SOC_NOPM, 0, 0, 1135 rt721_sdca_fu23_event, 1136 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1137 SND_SOC_DAPM_DAC_E("FU 42", NULL, SND_SOC_NOPM, 0, 0, 1138 rt721_sdca_fu42_event, 1139 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1140 SND_SOC_DAPM_ADC_E("FU 36", NULL, SND_SOC_NOPM, 0, 0, 1141 rt721_sdca_fu36_event, 1142 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1143 SND_SOC_DAPM_ADC_E("FU 113", NULL, SND_SOC_NOPM, 0, 0, 1144 rt721_sdca_fu113_event, 1145 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1146 SND_SOC_DAPM_MUX("ADC 09 Mux", SND_SOC_NOPM, 0, 0, 1147 &rt721_sdca_adc09_mux), 1148 SND_SOC_DAPM_MUX("ADC 08 R Mux", SND_SOC_NOPM, 0, 0, 1149 &rt721_sdca_adc08_r_mux), 1150 SND_SOC_DAPM_MUX("ADC 08 L Mux", SND_SOC_NOPM, 0, 0, 1151 &rt721_sdca_adc08_l_mux), 1152 SND_SOC_DAPM_MUX("ADC 10 R Mux", SND_SOC_NOPM, 0, 0, 1153 &rt721_sdca_adc10_r_mux), 1154 SND_SOC_DAPM_MUX("ADC 10 L Mux", SND_SOC_NOPM, 0, 0, 1155 &rt721_sdca_adc10_l_mux), 1156 SND_SOC_DAPM_MUX("ADC 07 R Mux", SND_SOC_NOPM, 0, 0, 1157 &rt721_sdca_adc07_r_mux), 1158 SND_SOC_DAPM_MUX("ADC 07 L Mux", SND_SOC_NOPM, 0, 0, 1159 &rt721_sdca_adc07_l_mux), 1160 1161 SND_SOC_DAPM_AIF_IN("DP1RX", "DP1 Headphone Playback", 0, SND_SOC_NOPM, 0, 0), 1162 SND_SOC_DAPM_AIF_OUT("DP2TX", "DP2 Headset Capture", 0, SND_SOC_NOPM, 0, 0), 1163 SND_SOC_DAPM_AIF_IN("DP3RX", "DP3 Speaker Playback", 0, SND_SOC_NOPM, 0, 0), 1164 SND_SOC_DAPM_AIF_OUT("DP6TX", "DP6 DMic Capture", 0, SND_SOC_NOPM, 0, 0), 1165 }; 1166 1167 static const struct snd_soc_dapm_route rt721_sdca_audio_map[] = { 1168 {"FU 42", NULL, "DP1RX"}, 1169 {"FU 21", NULL, "DP3RX"}, 1170 {"FU 23", NULL, "DP3RX"}, 1171 1172 {"ADC 09 Mux", "MIC2", "MIC2"}, 1173 {"ADC 09 Mux", "LINE1", "LINE1"}, 1174 {"ADC 09 Mux", "LINE2", "LINE2"}, 1175 {"ADC 07 R Mux", "DMIC1 RE", "DMIC1_2"}, 1176 {"ADC 07 R Mux", "DMIC1 FE", "DMIC1_2"}, 1177 {"ADC 07 R Mux", "DMIC2 RE", "DMIC3_4"}, 1178 {"ADC 07 R Mux", "DMIC2 FE", "DMIC3_4"}, 1179 {"ADC 07 L Mux", "DMIC1 RE", "DMIC1_2"}, 1180 {"ADC 07 L Mux", "DMIC1 FE", "DMIC1_2"}, 1181 {"ADC 07 L Mux", "DMIC2 RE", "DMIC3_4"}, 1182 {"ADC 07 L Mux", "DMIC2 FE", "DMIC3_4"}, 1183 {"ADC 08 R Mux", "DMIC1 RE", "DMIC1_2"}, 1184 {"ADC 08 R Mux", "DMIC1 FE", "DMIC1_2"}, 1185 {"ADC 08 R Mux", "DMIC2 RE", "DMIC3_4"}, 1186 {"ADC 08 R Mux", "DMIC2 FE", "DMIC3_4"}, 1187 {"ADC 08 L Mux", "DMIC1 RE", "DMIC1_2"}, 1188 {"ADC 08 L Mux", "DMIC1 FE", "DMIC1_2"}, 1189 {"ADC 08 L Mux", "DMIC2 RE", "DMIC3_4"}, 1190 {"ADC 08 L Mux", "DMIC2 FE", "DMIC3_4"}, 1191 {"ADC 10 R Mux", "DMIC1 RE", "DMIC1_2"}, 1192 {"ADC 10 R Mux", "DMIC1 FE", "DMIC1_2"}, 1193 {"ADC 10 R Mux", "DMIC2 RE", "DMIC3_4"}, 1194 {"ADC 10 R Mux", "DMIC2 FE", "DMIC3_4"}, 1195 {"ADC 10 L Mux", "DMIC1 RE", "DMIC1_2"}, 1196 {"ADC 10 L Mux", "DMIC1 FE", "DMIC1_2"}, 1197 {"ADC 10 L Mux", "DMIC2 RE", "DMIC3_4"}, 1198 {"ADC 10 L Mux", "DMIC2 FE", "DMIC3_4"}, 1199 {"FU 36", NULL, "PDE 34"}, 1200 {"FU 36", NULL, "ADC 09 Mux"}, 1201 {"FU 113", NULL, "PDE 11"}, 1202 {"FU 113", NULL, "ADC 07 R Mux"}, 1203 {"FU 113", NULL, "ADC 07 L Mux"}, 1204 {"FU 113", NULL, "ADC 10 R Mux"}, 1205 {"FU 113", NULL, "ADC 10 L Mux"}, 1206 {"DP2TX", NULL, "FU 36"}, 1207 {"DP6TX", NULL, "FU 113"}, 1208 1209 {"HP", NULL, "PDE 47"}, 1210 {"HP", NULL, "FU 42"}, 1211 {"SPK", NULL, "PDE 41"}, 1212 {"SPK", NULL, "FU 21"}, 1213 {"SPK", NULL, "FU 23"}, 1214 }; 1215 1216 static int rt721_sdca_parse_dt(struct rt721_sdca_priv *rt721, struct device *dev) 1217 { 1218 device_property_read_u32(dev, "realtek,jd-src", &rt721->jd_src); 1219 1220 return 0; 1221 } 1222 1223 static int rt721_sdca_probe(struct snd_soc_component *component) 1224 { 1225 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1226 int ret; 1227 1228 rt721_sdca_parse_dt(rt721, &rt721->slave->dev); 1229 rt721->component = component; 1230 1231 ret = pm_runtime_resume(component->dev); 1232 if (ret < 0 && ret != -EACCES) 1233 return ret; 1234 1235 return 0; 1236 } 1237 1238 static const struct snd_soc_component_driver soc_sdca_dev_rt721 = { 1239 .probe = rt721_sdca_probe, 1240 .controls = rt721_sdca_controls, 1241 .num_controls = ARRAY_SIZE(rt721_sdca_controls), 1242 .dapm_widgets = rt721_sdca_dapm_widgets, 1243 .num_dapm_widgets = ARRAY_SIZE(rt721_sdca_dapm_widgets), 1244 .dapm_routes = rt721_sdca_audio_map, 1245 .num_dapm_routes = ARRAY_SIZE(rt721_sdca_audio_map), 1246 .set_jack = rt721_sdca_set_jack_detect, 1247 .endianness = 1, 1248 }; 1249 1250 static int rt721_sdca_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream, 1251 int direction) 1252 { 1253 snd_soc_dai_dma_data_set(dai, direction, sdw_stream); 1254 1255 return 0; 1256 } 1257 1258 static void rt721_sdca_shutdown(struct snd_pcm_substream *substream, 1259 struct snd_soc_dai *dai) 1260 { 1261 snd_soc_dai_set_dma_data(dai, substream, NULL); 1262 } 1263 1264 static int rt721_sdca_pcm_hw_params(struct snd_pcm_substream *substream, 1265 struct snd_pcm_hw_params *params, 1266 struct snd_soc_dai *dai) 1267 { 1268 struct snd_soc_component *component = dai->component; 1269 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1270 struct sdw_stream_config stream_config; 1271 struct sdw_port_config port_config; 1272 enum sdw_data_direction direction; 1273 struct sdw_stream_runtime *sdw_stream; 1274 int retval, port, num_channels; 1275 unsigned int sampling_rate; 1276 1277 dev_dbg(dai->dev, "%s %s", __func__, dai->name); 1278 sdw_stream = snd_soc_dai_get_dma_data(dai, substream); 1279 1280 if (!sdw_stream) 1281 return -EINVAL; 1282 1283 if (!rt721->slave) 1284 return -EINVAL; 1285 1286 /* 1287 * RT721_AIF1 with port = 1 for headphone playback 1288 * RT721_AIF1 with port = 2 for headset-mic capture 1289 * RT721_AIF2 with port = 3 for speaker playback 1290 * RT721_AIF3 with port = 6 for digital-mic capture 1291 */ 1292 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 1293 direction = SDW_DATA_DIR_RX; 1294 if (dai->id == RT721_AIF1) 1295 port = 1; 1296 else if (dai->id == RT721_AIF2) 1297 port = 3; 1298 else 1299 return -EINVAL; 1300 } else { 1301 direction = SDW_DATA_DIR_TX; 1302 if (dai->id == RT721_AIF1) 1303 port = 2; 1304 else if (dai->id == RT721_AIF3) 1305 port = 6; 1306 else 1307 return -EINVAL; 1308 } 1309 stream_config.frame_rate = params_rate(params); 1310 stream_config.ch_count = params_channels(params); 1311 stream_config.bps = snd_pcm_format_width(params_format(params)); 1312 stream_config.direction = direction; 1313 1314 num_channels = params_channels(params); 1315 port_config.ch_mask = GENMASK(num_channels - 1, 0); 1316 port_config.num = port; 1317 1318 retval = sdw_stream_add_slave(rt721->slave, &stream_config, 1319 &port_config, 1, sdw_stream); 1320 if (retval) { 1321 dev_err(dai->dev, "Unable to configure port\n"); 1322 return retval; 1323 } 1324 1325 if (params_channels(params) > 16) { 1326 dev_err(component->dev, "Unsupported channels %d\n", 1327 params_channels(params)); 1328 return -EINVAL; 1329 } 1330 1331 /* sampling rate configuration */ 1332 switch (params_rate(params)) { 1333 case 8000: 1334 sampling_rate = RT721_SDCA_RATE_8000HZ; 1335 break; 1336 case 16000: 1337 sampling_rate = RT721_SDCA_RATE_16000HZ; 1338 break; 1339 case 24000: 1340 sampling_rate = RT721_SDCA_RATE_24000HZ; 1341 break; 1342 case 32000: 1343 sampling_rate = RT721_SDCA_RATE_32000HZ; 1344 break; 1345 case 44100: 1346 sampling_rate = RT721_SDCA_RATE_44100HZ; 1347 break; 1348 case 48000: 1349 sampling_rate = RT721_SDCA_RATE_48000HZ; 1350 break; 1351 case 96000: 1352 sampling_rate = RT721_SDCA_RATE_96000HZ; 1353 break; 1354 case 192000: 1355 sampling_rate = RT721_SDCA_RATE_192000HZ; 1356 break; 1357 case 384000: 1358 sampling_rate = RT721_SDCA_RATE_384000HZ; 1359 break; 1360 case 768000: 1361 sampling_rate = RT721_SDCA_RATE_768000HZ; 1362 break; 1363 default: 1364 dev_err(component->dev, "Rate %d is not supported\n", 1365 params_rate(params)); 1366 return -EINVAL; 1367 } 1368 1369 /* set sampling frequency */ 1370 if (dai->id == RT721_AIF1) { 1371 regmap_write(rt721->regmap, 1372 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_CS01, 1373 RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate); 1374 regmap_write(rt721->regmap, 1375 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_CS11, 1376 RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate); 1377 } 1378 1379 if (dai->id == RT721_AIF2) 1380 regmap_write(rt721->regmap, 1381 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_CS31, 1382 RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate); 1383 1384 if (dai->id == RT721_AIF3) 1385 regmap_write(rt721->regmap, 1386 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_CS1F, 1387 RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate); 1388 1389 return 0; 1390 } 1391 1392 static int rt721_sdca_pcm_hw_free(struct snd_pcm_substream *substream, 1393 struct snd_soc_dai *dai) 1394 { 1395 struct snd_soc_component *component = dai->component; 1396 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1397 struct sdw_stream_runtime *sdw_stream = 1398 snd_soc_dai_get_dma_data(dai, substream); 1399 1400 if (!rt721->slave) 1401 return -EINVAL; 1402 1403 sdw_stream_remove_slave(rt721->slave, sdw_stream); 1404 return 0; 1405 } 1406 1407 #define RT721_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | \ 1408 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000) 1409 #define RT721_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ 1410 SNDRV_PCM_FMTBIT_S24_LE) 1411 1412 static const struct snd_soc_dai_ops rt721_sdca_ops = { 1413 .hw_params = rt721_sdca_pcm_hw_params, 1414 .hw_free = rt721_sdca_pcm_hw_free, 1415 .set_stream = rt721_sdca_set_sdw_stream, 1416 .shutdown = rt721_sdca_shutdown, 1417 }; 1418 1419 static struct snd_soc_dai_driver rt721_sdca_dai[] = { 1420 { 1421 .name = "rt721-sdca-aif1", 1422 .id = RT721_AIF1, 1423 .playback = { 1424 .stream_name = "DP1 Headphone Playback", 1425 .channels_min = 1, 1426 .channels_max = 2, 1427 .rates = RT721_STEREO_RATES, 1428 .formats = RT721_FORMATS, 1429 }, 1430 .capture = { 1431 .stream_name = "DP2 Headset Capture", 1432 .channels_min = 1, 1433 .channels_max = 2, 1434 .rates = RT721_STEREO_RATES, 1435 .formats = RT721_FORMATS, 1436 }, 1437 .ops = &rt721_sdca_ops, 1438 }, 1439 { 1440 .name = "rt721-sdca-aif2", 1441 .id = RT721_AIF2, 1442 .playback = { 1443 .stream_name = "DP3 Speaker Playback", 1444 .channels_min = 1, 1445 .channels_max = 2, 1446 .rates = RT721_STEREO_RATES, 1447 .formats = RT721_FORMATS, 1448 }, 1449 .ops = &rt721_sdca_ops, 1450 }, 1451 { 1452 .name = "rt721-sdca-aif3", 1453 .id = RT721_AIF3, 1454 .capture = { 1455 .stream_name = "DP6 DMic Capture", 1456 .channels_min = 1, 1457 .channels_max = 4, 1458 .rates = RT721_STEREO_RATES, 1459 .formats = RT721_FORMATS, 1460 }, 1461 .ops = &rt721_sdca_ops, 1462 } 1463 }; 1464 1465 int rt721_sdca_init(struct device *dev, struct regmap *regmap, 1466 struct regmap *mbq_regmap, struct sdw_slave *slave) 1467 { 1468 struct rt721_sdca_priv *rt721; 1469 1470 rt721 = devm_kzalloc(dev, sizeof(*rt721), GFP_KERNEL); 1471 if (!rt721) 1472 return -ENOMEM; 1473 1474 dev_set_drvdata(dev, rt721); 1475 rt721->slave = slave; 1476 rt721->regmap = regmap; 1477 rt721->mbq_regmap = mbq_regmap; 1478 1479 regcache_cache_only(rt721->regmap, true); 1480 regcache_cache_only(rt721->mbq_regmap, true); 1481 1482 mutex_init(&rt721->calibrate_mutex); 1483 mutex_init(&rt721->disable_irq_lock); 1484 1485 INIT_DELAYED_WORK(&rt721->jack_detect_work, rt721_sdca_jack_detect_handler); 1486 INIT_DELAYED_WORK(&rt721->jack_btn_check_work, rt721_sdca_btn_check_handler); 1487 1488 /* 1489 * Mark hw_init to false 1490 * HW init will be performed when device reports present 1491 */ 1492 rt721->hw_init = false; 1493 rt721->first_hw_init = false; 1494 rt721->fu1e_dapm_mute = true; 1495 rt721->fu0f_dapm_mute = true; 1496 rt721->fu0f_mixer_l_mute = rt721->fu0f_mixer_r_mute = true; 1497 rt721->fu1e_mixer_mute[0] = rt721->fu1e_mixer_mute[1] = 1498 rt721->fu1e_mixer_mute[2] = rt721->fu1e_mixer_mute[3] = true; 1499 1500 return devm_snd_soc_register_component(dev, 1501 &soc_sdca_dev_rt721, rt721_sdca_dai, ARRAY_SIZE(rt721_sdca_dai)); 1502 } 1503 1504 int rt721_sdca_io_init(struct device *dev, struct sdw_slave *slave) 1505 { 1506 struct rt721_sdca_priv *rt721 = dev_get_drvdata(dev); 1507 1508 rt721->disable_irq = false; 1509 1510 if (rt721->hw_init) 1511 return 0; 1512 1513 regcache_cache_only(rt721->regmap, false); 1514 regcache_cache_only(rt721->mbq_regmap, false); 1515 if (rt721->first_hw_init) { 1516 regcache_cache_bypass(rt721->regmap, true); 1517 regcache_cache_bypass(rt721->mbq_regmap, true); 1518 } else { 1519 /* 1520 * PM runtime is only enabled when a Slave reports as Attached 1521 */ 1522 1523 /* set autosuspend parameters */ 1524 pm_runtime_set_autosuspend_delay(&slave->dev, 3000); 1525 pm_runtime_use_autosuspend(&slave->dev); 1526 1527 /* update count of parent 'active' children */ 1528 pm_runtime_set_active(&slave->dev); 1529 1530 /* make sure the device does not suspend immediately */ 1531 pm_runtime_mark_last_busy(&slave->dev); 1532 1533 pm_runtime_enable(&slave->dev); 1534 } 1535 1536 pm_runtime_get_noresume(&slave->dev); 1537 rt721_sdca_dmic_preset(rt721); 1538 rt721_sdca_amp_preset(rt721); 1539 rt721_sdca_jack_preset(rt721); 1540 if (rt721->first_hw_init) { 1541 regcache_cache_bypass(rt721->regmap, false); 1542 regcache_mark_dirty(rt721->regmap); 1543 regcache_cache_bypass(rt721->mbq_regmap, false); 1544 regcache_mark_dirty(rt721->mbq_regmap); 1545 } else 1546 rt721->first_hw_init = true; 1547 1548 /* Mark Slave initialization complete */ 1549 rt721->hw_init = true; 1550 1551 pm_runtime_mark_last_busy(&slave->dev); 1552 pm_runtime_put_autosuspend(&slave->dev); 1553 1554 dev_dbg(&slave->dev, "%s hw_init complete\n", __func__); 1555 return 0; 1556 } 1557 1558 MODULE_DESCRIPTION("ASoC RT721 SDCA SDW driver"); 1559 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>"); 1560 MODULE_LICENSE("GPL"); 1561