1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // rt721-sdca.c -- rt721 SDCA ALSA SoC audio driver 4 // 5 // Copyright(c) 2024 Realtek Semiconductor Corp. 6 // 7 // 8 9 #include <linux/bitops.h> 10 #include <sound/core.h> 11 #include <linux/delay.h> 12 #include <linux/init.h> 13 #include <sound/initval.h> 14 #include <sound/jack.h> 15 #include <linux/kernel.h> 16 #include <linux/module.h> 17 #include <linux/moduleparam.h> 18 #include <sound/pcm.h> 19 #include <linux/pm_runtime.h> 20 #include <sound/pcm_params.h> 21 #include <linux/soundwire/sdw_registers.h> 22 #include <linux/slab.h> 23 #include <sound/soc-dapm.h> 24 #include <sound/tlv.h> 25 26 #include "rt721-sdca.h" 27 #include "rt-sdw-common.h" 28 29 static void rt721_sdca_jack_detect_handler(struct work_struct *work) 30 { 31 struct rt721_sdca_priv *rt721 = 32 container_of(work, struct rt721_sdca_priv, jack_detect_work.work); 33 int btn_type = 0; 34 35 if (!rt721->hs_jack) 36 return; 37 38 if (!rt721->component->card || !rt721->component->card->instantiated) 39 return; 40 41 /* SDW_SCP_SDCA_INT_SDCA_6 is used for jack detection */ 42 if (rt721->scp_sdca_stat1 & SDW_SCP_SDCA_INT_SDCA_0) { 43 rt721->jack_type = rt_sdca_headset_detect(rt721->regmap, 44 RT721_SDCA_ENT_GE49); 45 if (rt721->jack_type < 0) 46 return; 47 } 48 49 /* SDW_SCP_SDCA_INT_SDCA_8 is used for button detection */ 50 if (rt721->scp_sdca_stat2 & SDW_SCP_SDCA_INT_SDCA_8) 51 btn_type = rt_sdca_button_detect(rt721->regmap, 52 RT721_SDCA_ENT_HID01, RT721_BUF_ADDR_HID1, 53 RT721_SDCA_HID_ID); 54 55 if (rt721->jack_type == 0) 56 btn_type = 0; 57 58 dev_dbg(&rt721->slave->dev, 59 "in %s, jack_type=%d\n", __func__, rt721->jack_type); 60 dev_dbg(&rt721->slave->dev, 61 "in %s, btn_type=0x%x\n", __func__, btn_type); 62 dev_dbg(&rt721->slave->dev, 63 "in %s, scp_sdca_stat1=0x%x, scp_sdca_stat2=0x%x\n", __func__, 64 rt721->scp_sdca_stat1, rt721->scp_sdca_stat2); 65 66 snd_soc_jack_report(rt721->hs_jack, rt721->jack_type | btn_type, 67 SND_JACK_HEADSET | 68 SND_JACK_BTN_0 | SND_JACK_BTN_1 | 69 SND_JACK_BTN_2 | SND_JACK_BTN_3); 70 71 if (btn_type) { 72 /* button released */ 73 snd_soc_jack_report(rt721->hs_jack, rt721->jack_type, 74 SND_JACK_HEADSET | 75 SND_JACK_BTN_0 | SND_JACK_BTN_1 | 76 SND_JACK_BTN_2 | SND_JACK_BTN_3); 77 78 mod_delayed_work(system_power_efficient_wq, 79 &rt721->jack_btn_check_work, msecs_to_jiffies(200)); 80 } 81 } 82 83 static void rt721_sdca_btn_check_handler(struct work_struct *work) 84 { 85 struct rt721_sdca_priv *rt721 = 86 container_of(work, struct rt721_sdca_priv, jack_btn_check_work.work); 87 int btn_type = 0, ret, idx; 88 unsigned int det_mode, offset, val; 89 unsigned char buf[3]; 90 91 ret = regmap_read(rt721->regmap, 92 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_GE49, 93 RT721_SDCA_CTL_DETECTED_MODE, 0), &det_mode); 94 if (ret < 0) 95 goto io_error; 96 97 /* pin attached */ 98 if (det_mode) { 99 /* read UMP message offset */ 100 ret = regmap_read(rt721->regmap, 101 SDW_SDCA_CTL(FUNC_NUM_HID, RT721_SDCA_ENT_HID01, 102 RT721_SDCA_CTL_HIDTX_MESSAGE_OFFSET, 0), &offset); 103 if (ret < 0) 104 goto io_error; 105 106 for (idx = 0; idx < sizeof(buf); idx++) { 107 ret = regmap_read(rt721->regmap, 108 RT721_BUF_ADDR_HID1 + offset + idx, &val); 109 if (ret < 0) 110 goto io_error; 111 buf[idx] = val & 0xff; 112 } 113 /* Report ID for HID1 */ 114 if (buf[0] == 0x11) 115 btn_type = rt_sdca_btn_type(&buf[1]); 116 } else 117 rt721->jack_type = 0; 118 119 dev_dbg(&rt721->slave->dev, "%s, btn_type=0x%x\n", __func__, btn_type); 120 snd_soc_jack_report(rt721->hs_jack, rt721->jack_type | btn_type, 121 SND_JACK_HEADSET | 122 SND_JACK_BTN_0 | SND_JACK_BTN_1 | 123 SND_JACK_BTN_2 | SND_JACK_BTN_3); 124 125 if (btn_type) { 126 /* button released */ 127 snd_soc_jack_report(rt721->hs_jack, rt721->jack_type, 128 SND_JACK_HEADSET | 129 SND_JACK_BTN_0 | SND_JACK_BTN_1 | 130 SND_JACK_BTN_2 | SND_JACK_BTN_3); 131 132 mod_delayed_work(system_power_efficient_wq, 133 &rt721->jack_btn_check_work, msecs_to_jiffies(200)); 134 } 135 136 return; 137 138 io_error: 139 pr_err_ratelimited("IO error in %s, ret %d\n", __func__, ret); 140 } 141 142 static void rt721_sdca_dmic_preset(struct rt721_sdca_priv *rt721) 143 { 144 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 145 RT721_MISC_POWER_CTL31, 0x8000); 146 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART, 147 RT721_VREF1_HV_CTRL1, 0xe000); 148 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 149 RT721_MISC_POWER_CTL31, 0x8007); 150 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 151 RT721_ENT_FLOAT_CTL9, 0x2a2a); 152 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 153 RT721_ENT_FLOAT_CTL10, 0x2a00); 154 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 155 RT721_ENT_FLOAT_CTL6, 0x2a2a); 156 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 157 RT721_ENT_FLOAT_CTL5, 0x2626); 158 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 159 RT721_ENT_FLOAT_CTL8, 0x1e00); 160 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 161 RT721_ENT_FLOAT_CTL7, 0x1515); 162 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 163 RT721_CH_FLOAT_CTL3, 0x0304); 164 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 165 RT721_CH_FLOAT_CTL4, 0x0304); 166 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 167 RT721_HDA_LEGACY_CTL1, 0x0000); 168 regmap_write(rt721->regmap, 169 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_IT26, 170 RT721_SDCA_CTL_VENDOR_DEF, 0), 0x01); 171 regmap_write(rt721->mbq_regmap, 0x5910009, 0x2e01); 172 rt_sdca_index_write(rt721->mbq_regmap, RT721_RC_CALIB_CTRL, 173 RT721_RC_CALIB_CTRL0, 0x0b00); 174 rt_sdca_index_write(rt721->mbq_regmap, RT721_RC_CALIB_CTRL, 175 RT721_RC_CALIB_CTRL0, 0x0b40); 176 regmap_write(rt721->regmap, 0x2f5c, 0x25); 177 } 178 179 static void rt721_sdca_amp_preset(struct rt721_sdca_priv *rt721) 180 { 181 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 182 RT721_MISC_POWER_CTL31, 0x8000); 183 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART, 184 RT721_VREF1_HV_CTRL1, 0xe000); 185 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 186 RT721_MISC_POWER_CTL31, 0x8007); 187 regmap_write(rt721->mbq_regmap, 0x5810000, 0x6420); 188 regmap_write(rt721->mbq_regmap, 0x5810000, 0x6421); 189 regmap_write(rt721->mbq_regmap, 0x5810000, 0xe421); 190 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 191 RT721_CH_FLOAT_CTL6, 0x5561); 192 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_REG, 193 RT721_GPIO_PAD_CTRL5, 0x8003); 194 regmap_write(rt721->regmap, 195 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_OT23, 196 RT721_SDCA_CTL_VENDOR_DEF, 0), 0x04); 197 regmap_write(rt721->regmap, 198 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, 199 RT721_SDCA_CTL_FU_MUTE, CH_01), 0x00); 200 regmap_write(rt721->regmap, 201 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, 202 RT721_SDCA_CTL_FU_MUTE, CH_02), 0x00); 203 regmap_write(rt721->regmap, 204 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_FU55, 205 RT721_SDCA_CTL_FU_MUTE, CH_01), 0x00); 206 regmap_write(rt721->regmap, 207 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_FU55, 208 RT721_SDCA_CTL_FU_MUTE, CH_02), 0x00); 209 } 210 211 static void rt721_sdca_jack_preset(struct rt721_sdca_priv *rt721) 212 { 213 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 214 RT721_MISC_POWER_CTL31, 0x8000); 215 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART, 216 RT721_VREF1_HV_CTRL1, 0xe000); 217 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 218 RT721_MISC_POWER_CTL31, 0x8007); 219 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 220 RT721_GE_REL_CTRL1, 0x8011); 221 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 222 RT721_UMP_HID_CTRL3, 0xcf00); 223 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 224 RT721_UMP_HID_CTRL4, 0x000f); 225 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 226 RT721_UMP_HID_CTRL1, 0x1100); 227 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 228 RT721_UMP_HID_CTRL5, 0x0c12); 229 rt_sdca_index_write(rt721->mbq_regmap, RT721_JD_CTRL, 230 RT721_JD_1PIN_GAT_CTRL2, 0xc002); 231 rt_sdca_index_write(rt721->mbq_regmap, RT721_RC_CALIB_CTRL, 232 RT721_RC_CALIB_CTRL0, 0x0b00); 233 rt_sdca_index_write(rt721->mbq_regmap, RT721_RC_CALIB_CTRL, 234 RT721_RC_CALIB_CTRL0, 0x0b40); 235 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 236 RT721_UAJ_TOP_TCON14, 0x3333); 237 regmap_write(rt721->mbq_regmap, 0x5810035, 0x0036); 238 regmap_write(rt721->mbq_regmap, 0x5810030, 0xee00); 239 rt_sdca_index_write(rt721->mbq_regmap, RT721_CAP_PORT_CTRL, 240 RT721_HP_AMP_2CH_CAL1, 0x0140); 241 regmap_write(rt721->mbq_regmap, 0x5810000, 0x0021); 242 regmap_write(rt721->mbq_regmap, 0x5810000, 0x8021); 243 rt_sdca_index_write(rt721->mbq_regmap, RT721_CAP_PORT_CTRL, 244 RT721_HP_AMP_2CH_CAL18, 0x5522); 245 regmap_write(rt721->mbq_regmap, 0x5b10007, 0x2000); 246 regmap_write(rt721->mbq_regmap, 0x5B10017, 0x1b0f); 247 rt_sdca_index_write(rt721->mbq_regmap, RT721_CBJ_CTRL, 248 RT721_CBJ_A0_GAT_CTRL1, 0x2a02); 249 rt_sdca_index_write(rt721->mbq_regmap, RT721_CAP_PORT_CTRL, 250 RT721_HP_AMP_2CH_CAL4, 0xa105); 251 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 252 RT721_UAJ_TOP_TCON14, 0x3b33); 253 regmap_write(rt721->mbq_regmap, 0x310400, 0x3023); 254 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 255 RT721_UAJ_TOP_TCON14, 0x3f33); 256 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 257 RT721_UAJ_TOP_TCON13, 0x6048); 258 regmap_write(rt721->mbq_regmap, 0x310401, 0x3000); 259 regmap_write(rt721->mbq_regmap, 0x310402, 0x1b00); 260 regmap_write(rt721->mbq_regmap, 0x310300, 0x000f); 261 regmap_write(rt721->mbq_regmap, 0x310301, 0x3000); 262 regmap_write(rt721->mbq_regmap, 0x310302, 0x1b00); 263 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 264 RT721_UAJ_TOP_TCON17, 0x0008); 265 rt_sdca_index_write(rt721->mbq_regmap, RT721_DAC_CTRL, 266 RT721_DAC_2CH_CTRL3, 0x55ff); 267 rt_sdca_index_write(rt721->mbq_regmap, RT721_DAC_CTRL, 268 RT721_DAC_2CH_CTRL4, 0xcc00); 269 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART, 270 RT721_MBIAS_LV_CTRL2, 0x6677); 271 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART, 272 RT721_VREF2_LV_CTRL1, 0x7600); 273 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 274 RT721_ENT_FLOAT_CTL2, 0x1234); 275 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 276 RT721_ENT_FLOAT_CTL3, 0x3512); 277 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 278 RT721_ENT_FLOAT_CTL1, 0x4040); 279 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 280 RT721_ENT_FLOAT_CTL4, 0x1201); 281 regmap_write(rt721->regmap, 0x2f58, 0x07); 282 } 283 284 static void rt721_sdca_jack_init(struct rt721_sdca_priv *rt721) 285 { 286 mutex_lock(&rt721->calibrate_mutex); 287 if (rt721->hs_jack) { 288 sdw_write_no_pm(rt721->slave, SDW_SCP_SDCA_INTMASK1, 289 SDW_SCP_SDCA_INTMASK_SDCA_0); 290 sdw_write_no_pm(rt721->slave, SDW_SCP_SDCA_INTMASK2, 291 SDW_SCP_SDCA_INTMASK_SDCA_8); 292 dev_dbg(&rt721->slave->dev, "in %s enable\n", __func__); 293 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 294 RT721_HDA_LEGACY_UAJ_CTL, 0x036E); 295 regmap_write(rt721->regmap, 296 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_XU03, 297 RT721_SDCA_CTL_SELECTED_MODE, 0), 0); 298 regmap_write(rt721->regmap, 299 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_XU0D, 300 RT721_SDCA_CTL_SELECTED_MODE, 0), 0); 301 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 302 RT721_XU_REL_CTRL, 0x0000); 303 rt_sdca_index_update_bits(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 304 RT721_GE_REL_CTRL1, 0x4000, 0x4000); 305 } 306 mutex_unlock(&rt721->calibrate_mutex); 307 } 308 309 static int rt721_sdca_set_jack_detect(struct snd_soc_component *component, 310 struct snd_soc_jack *hs_jack, void *data) 311 { 312 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 313 int ret; 314 315 rt721->hs_jack = hs_jack; 316 317 ret = pm_runtime_resume_and_get(component->dev); 318 if (ret < 0) { 319 if (ret != -EACCES) { 320 dev_err(component->dev, "%s: failed to resume %d\n", __func__, ret); 321 return ret; 322 } 323 /* pm_runtime not enabled yet */ 324 dev_dbg(component->dev, "%s: skipping jack init for now\n", __func__); 325 return 0; 326 } 327 328 rt721_sdca_jack_init(rt721); 329 330 pm_runtime_mark_last_busy(component->dev); 331 pm_runtime_put_autosuspend(component->dev); 332 333 return 0; 334 } 335 336 /* For SDCA control DAC/ADC Gain */ 337 static int rt721_sdca_set_gain_put(struct snd_kcontrol *kcontrol, 338 struct snd_ctl_elem_value *ucontrol) 339 { 340 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 341 struct soc_mixer_control *mc = 342 (struct soc_mixer_control *)kcontrol->private_value; 343 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 344 unsigned int read_l, read_r, gain_l_val, gain_r_val; 345 unsigned int adc_vol_flag = 0, changed = 0; 346 unsigned int lvalue, rvalue; 347 const unsigned int interval_offset = 0xc0; 348 const unsigned int tendA = 0x200; 349 const unsigned int tendB = 0xa00; 350 351 if (strstr(ucontrol->id.name, "FU1E Capture Volume") || 352 strstr(ucontrol->id.name, "FU0F Capture Volume")) 353 adc_vol_flag = 1; 354 355 regmap_read(rt721->mbq_regmap, mc->reg, &lvalue); 356 regmap_read(rt721->mbq_regmap, mc->rreg, &rvalue); 357 358 /* L Channel */ 359 gain_l_val = ucontrol->value.integer.value[0]; 360 if (gain_l_val > mc->max) 361 gain_l_val = mc->max; 362 363 if (mc->shift == 8) { 364 /* boost gain */ 365 gain_l_val = gain_l_val * tendB; 366 } else if (mc->shift == 1) { 367 /* FU33 boost gain */ 368 if (gain_l_val == 0) 369 gain_l_val = 0x8000; 370 else 371 gain_l_val = (gain_l_val - 1) * tendA; 372 } else { 373 /* ADC/DAC gain */ 374 if (adc_vol_flag) 375 gain_l_val = 0x1e00 - ((mc->max - gain_l_val) * interval_offset); 376 else 377 gain_l_val = 0 - ((mc->max - gain_l_val) * interval_offset); 378 gain_l_val &= 0xffff; 379 } 380 381 /* R Channel */ 382 gain_r_val = ucontrol->value.integer.value[1]; 383 if (gain_r_val > mc->max) 384 gain_r_val = mc->max; 385 386 if (mc->shift == 8) { 387 /* boost gain */ 388 gain_r_val = gain_r_val * tendB; 389 } else if (mc->shift == 1) { 390 /* FU33 boost gain */ 391 if (gain_r_val == 0) 392 gain_r_val = 0x8000; 393 else 394 gain_r_val = (gain_r_val - 1) * tendA; 395 } else { 396 /* ADC/DAC gain */ 397 if (adc_vol_flag) 398 gain_r_val = 0x1e00 - ((mc->max - gain_r_val) * interval_offset); 399 else 400 gain_r_val = 0 - ((mc->max - gain_r_val) * interval_offset); 401 gain_r_val &= 0xffff; 402 } 403 404 if (lvalue != gain_l_val || rvalue != gain_r_val) 405 changed = 1; 406 else 407 return 0; 408 409 /* Lch*/ 410 regmap_write(rt721->mbq_regmap, mc->reg, gain_l_val); 411 412 /* Rch */ 413 regmap_write(rt721->mbq_regmap, mc->rreg, gain_r_val); 414 415 regmap_read(rt721->mbq_regmap, mc->reg, &read_l); 416 regmap_read(rt721->mbq_regmap, mc->rreg, &read_r); 417 if (read_r == gain_r_val && read_l == gain_l_val) 418 return changed; 419 420 return -EIO; 421 } 422 423 static int rt721_sdca_set_gain_get(struct snd_kcontrol *kcontrol, 424 struct snd_ctl_elem_value *ucontrol) 425 { 426 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 427 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 428 struct soc_mixer_control *mc = 429 (struct soc_mixer_control *)kcontrol->private_value; 430 unsigned int read_l, read_r, ctl_l = 0, ctl_r = 0; 431 unsigned int adc_vol_flag = 0; 432 const unsigned int interval_offset = 0xc0; 433 const unsigned int tendB = 0xa00; 434 435 if (strstr(ucontrol->id.name, "FU1E Capture Volume") || 436 strstr(ucontrol->id.name, "FU0F Capture Volume")) 437 adc_vol_flag = 1; 438 439 regmap_read(rt721->mbq_regmap, mc->reg, &read_l); 440 regmap_read(rt721->mbq_regmap, mc->rreg, &read_r); 441 442 if (mc->shift == 8) /* boost gain */ 443 ctl_l = read_l / tendB; 444 else { 445 if (adc_vol_flag) 446 ctl_l = mc->max - (((0x1e00 - read_l) & 0xffff) / interval_offset); 447 else 448 ctl_l = mc->max - (((0 - read_l) & 0xffff) / interval_offset); 449 } 450 451 if (read_l != read_r) { 452 if (mc->shift == 8) /* boost gain */ 453 ctl_r = read_r / tendB; 454 else { /* ADC/DAC gain */ 455 if (adc_vol_flag) 456 ctl_r = mc->max - (((0x1e00 - read_r) & 0xffff) / interval_offset); 457 else 458 ctl_r = mc->max - (((0 - read_r) & 0xffff) / interval_offset); 459 } 460 } else { 461 ctl_r = ctl_l; 462 } 463 464 ucontrol->value.integer.value[0] = ctl_l; 465 ucontrol->value.integer.value[1] = ctl_r; 466 467 return 0; 468 } 469 470 static int rt721_sdca_set_fu1e_capture_ctl(struct rt721_sdca_priv *rt721) 471 { 472 int err, i; 473 unsigned int ch_mute; 474 475 for (i = 0; i < ARRAY_SIZE(rt721->fu1e_mixer_mute); i++) { 476 ch_mute = rt721->fu1e_dapm_mute || rt721->fu1e_mixer_mute[i]; 477 err = regmap_write(rt721->regmap, 478 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, 479 RT721_SDCA_CTL_FU_MUTE, CH_01) + i, ch_mute); 480 if (err < 0) 481 return err; 482 } 483 484 return 0; 485 } 486 487 static int rt721_sdca_fu1e_capture_get(struct snd_kcontrol *kcontrol, 488 struct snd_ctl_elem_value *ucontrol) 489 { 490 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 491 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 492 struct rt721_sdca_dmic_kctrl_priv *p = 493 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value; 494 unsigned int i; 495 496 for (i = 0; i < p->count; i++) 497 ucontrol->value.integer.value[i] = !rt721->fu1e_mixer_mute[i]; 498 499 return 0; 500 } 501 502 static int rt721_sdca_fu1e_capture_put(struct snd_kcontrol *kcontrol, 503 struct snd_ctl_elem_value *ucontrol) 504 { 505 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 506 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 507 struct rt721_sdca_dmic_kctrl_priv *p = 508 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value; 509 int err, changed = 0, i; 510 511 for (i = 0; i < p->count; i++) { 512 if (rt721->fu1e_mixer_mute[i] != !ucontrol->value.integer.value[i]) 513 changed = 1; 514 rt721->fu1e_mixer_mute[i] = !ucontrol->value.integer.value[i]; 515 } 516 517 err = rt721_sdca_set_fu1e_capture_ctl(rt721); 518 if (err < 0) 519 return err; 520 521 return changed; 522 } 523 524 static int rt721_sdca_set_fu0f_capture_ctl(struct rt721_sdca_priv *rt721) 525 { 526 int err; 527 unsigned int ch_l, ch_r; 528 529 ch_l = (rt721->fu0f_dapm_mute || rt721->fu0f_mixer_l_mute) ? 0x01 : 0x00; 530 ch_r = (rt721->fu0f_dapm_mute || rt721->fu0f_mixer_r_mute) ? 0x01 : 0x00; 531 532 err = regmap_write(rt721->regmap, 533 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F, 534 RT721_SDCA_CTL_FU_MUTE, CH_L), ch_l); 535 if (err < 0) 536 return err; 537 538 err = regmap_write(rt721->regmap, 539 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F, 540 RT721_SDCA_CTL_FU_MUTE, CH_R), ch_r); 541 if (err < 0) 542 return err; 543 544 return 0; 545 } 546 547 static int rt721_sdca_fu0f_capture_get(struct snd_kcontrol *kcontrol, 548 struct snd_ctl_elem_value *ucontrol) 549 { 550 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 551 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 552 553 ucontrol->value.integer.value[0] = !rt721->fu0f_mixer_l_mute; 554 ucontrol->value.integer.value[1] = !rt721->fu0f_mixer_r_mute; 555 return 0; 556 } 557 558 static int rt721_sdca_fu0f_capture_put(struct snd_kcontrol *kcontrol, 559 struct snd_ctl_elem_value *ucontrol) 560 { 561 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 562 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 563 int err, changed = 0; 564 565 if (rt721->fu0f_mixer_l_mute != !ucontrol->value.integer.value[0] || 566 rt721->fu0f_mixer_r_mute != !ucontrol->value.integer.value[1]) 567 changed = 1; 568 569 rt721->fu0f_mixer_l_mute = !ucontrol->value.integer.value[0]; 570 rt721->fu0f_mixer_r_mute = !ucontrol->value.integer.value[1]; 571 err = rt721_sdca_set_fu0f_capture_ctl(rt721); 572 if (err < 0) 573 return err; 574 575 return changed; 576 } 577 578 static int rt721_sdca_fu_info(struct snd_kcontrol *kcontrol, 579 struct snd_ctl_elem_info *uinfo) 580 { 581 struct rt721_sdca_dmic_kctrl_priv *p = 582 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value; 583 584 if (p->max == 1) 585 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 586 else 587 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 588 uinfo->count = p->count; 589 uinfo->value.integer.min = 0; 590 uinfo->value.integer.max = p->max; 591 return 0; 592 } 593 594 static int rt721_sdca_dmic_set_gain_get(struct snd_kcontrol *kcontrol, 595 struct snd_ctl_elem_value *ucontrol) 596 { 597 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 598 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 599 struct rt721_sdca_dmic_kctrl_priv *p = 600 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value; 601 unsigned int boost_step = 0x0a00; 602 unsigned int vol_max = 0x1e00; 603 unsigned int regvalue, ctl, i; 604 unsigned int adc_vol_flag = 0; 605 const unsigned int interval_offset = 0xc0; 606 607 if (strstr(ucontrol->id.name, "FU1E Capture Volume")) 608 adc_vol_flag = 1; 609 610 /* check all channels */ 611 for (i = 0; i < p->count; i++) { 612 regmap_read(rt721->mbq_regmap, p->reg_base + i, ®value); 613 614 if (!adc_vol_flag) /* boost gain */ 615 ctl = regvalue / boost_step; 616 else /* ADC gain */ 617 ctl = p->max - (((vol_max - regvalue) & 0xffff) / interval_offset); 618 619 ucontrol->value.integer.value[i] = ctl; 620 } 621 622 return 0; 623 } 624 625 static int rt721_sdca_dmic_set_gain_put(struct snd_kcontrol *kcontrol, 626 struct snd_ctl_elem_value *ucontrol) 627 { 628 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 629 struct rt721_sdca_dmic_kctrl_priv *p = 630 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value; 631 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 632 unsigned int boost_step = 0x0a00; 633 unsigned int vol_max = 0x1e00; 634 unsigned int gain_val[4]; 635 unsigned int i, adc_vol_flag = 0, changed = 0; 636 unsigned int regvalue[4]; 637 const unsigned int interval_offset = 0xc0; 638 int err; 639 640 if (strstr(ucontrol->id.name, "FU1E Capture Volume")) 641 adc_vol_flag = 1; 642 643 /* check all channels */ 644 for (i = 0; i < p->count; i++) { 645 regmap_read(rt721->mbq_regmap, p->reg_base + i, ®value[i]); 646 647 gain_val[i] = ucontrol->value.integer.value[i]; 648 if (gain_val[i] > p->max) 649 gain_val[i] = p->max; 650 651 if (!adc_vol_flag) /* boost gain */ 652 gain_val[i] = gain_val[i] * boost_step; 653 else { /* ADC gain */ 654 gain_val[i] = vol_max - ((p->max - gain_val[i]) * interval_offset); 655 gain_val[i] &= 0xffff; 656 } 657 658 if (regvalue[i] != gain_val[i]) 659 changed = 1; 660 } 661 662 if (!changed) 663 return 0; 664 665 for (i = 0; i < p->count; i++) { 666 err = regmap_write(rt721->mbq_regmap, p->reg_base + i, gain_val[i]); 667 if (err < 0) 668 dev_err(&rt721->slave->dev, "%#08x can't be set\n", p->reg_base + i); 669 } 670 671 return changed; 672 } 673 674 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6525, 75, 0); 675 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -1725, 75, 0); 676 static const DECLARE_TLV_DB_SCALE(boost_vol_tlv, 0, 1000, 0); 677 static const DECLARE_TLV_DB_SCALE(mic2_boost_vol_tlv, -200, 200, 0); 678 679 static const struct snd_kcontrol_new rt721_sdca_controls[] = { 680 /* Headphone playback settings */ 681 SOC_DOUBLE_R_EXT_TLV("FU05 Playback Volume", 682 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, 683 RT721_SDCA_CTL_FU_VOLUME, CH_L), 684 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, 685 RT721_SDCA_CTL_FU_VOLUME, CH_R), 0, 0x57, 0, 686 rt721_sdca_set_gain_get, rt721_sdca_set_gain_put, out_vol_tlv), 687 /* Headset mic capture settings */ 688 SOC_DOUBLE_EXT("FU0F Capture Switch", SND_SOC_NOPM, 0, 1, 1, 0, 689 rt721_sdca_fu0f_capture_get, rt721_sdca_fu0f_capture_put), 690 SOC_DOUBLE_R_EXT_TLV("FU0F Capture Volume", 691 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F, 692 RT721_SDCA_CTL_FU_VOLUME, CH_L), 693 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F, 694 RT721_SDCA_CTL_FU_VOLUME, CH_R), 0, 0x3f, 0, 695 rt721_sdca_set_gain_get, rt721_sdca_set_gain_put, mic_vol_tlv), 696 SOC_DOUBLE_R_EXT_TLV("FU33 Boost Volume", 697 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PLATFORM_FU44, 698 RT721_SDCA_CTL_FU_CH_GAIN, CH_L), 699 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PLATFORM_FU44, 700 RT721_SDCA_CTL_FU_CH_GAIN, CH_R), 1, 0x15, 0, 701 rt721_sdca_set_gain_get, rt721_sdca_set_gain_put, mic2_boost_vol_tlv), 702 /* AMP playback settings */ 703 SOC_DOUBLE_R_EXT_TLV("FU06 Playback Volume", 704 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, 705 RT721_SDCA_CTL_FU_VOLUME, CH_L), 706 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, 707 RT721_SDCA_CTL_FU_VOLUME, CH_R), 0, 0x57, 0, 708 rt721_sdca_set_gain_get, rt721_sdca_set_gain_put, out_vol_tlv), 709 /* DMIC capture settings */ 710 RT_SDCA_FU_CTRL("FU1E Capture Switch", 711 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, 712 RT721_SDCA_CTL_FU_MUTE, CH_01), 1, 1, 4, rt721_sdca_fu_info, 713 rt721_sdca_fu1e_capture_get, rt721_sdca_fu1e_capture_put), 714 RT_SDCA_EXT_TLV("FU1E Capture Volume", 715 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, 716 RT721_SDCA_CTL_FU_VOLUME, CH_01), 717 rt721_sdca_dmic_set_gain_get, rt721_sdca_dmic_set_gain_put, 718 4, 0x3f, mic_vol_tlv, rt721_sdca_fu_info), 719 RT_SDCA_EXT_TLV("FU15 Boost Volume", 720 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_FU15, 721 RT721_SDCA_CTL_FU_CH_GAIN, CH_01), 722 rt721_sdca_dmic_set_gain_get, rt721_sdca_dmic_set_gain_put, 723 4, 3, boost_vol_tlv, rt721_sdca_fu_info), 724 }; 725 726 static int rt721_sdca_adc_mux_get(struct snd_kcontrol *kcontrol, 727 struct snd_ctl_elem_value *ucontrol) 728 { 729 struct snd_soc_component *component = 730 snd_soc_dapm_kcontrol_component(kcontrol); 731 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 732 unsigned int val = 0, mask_sft, mask; 733 734 if (strstr(ucontrol->id.name, "ADC 09 Mux")) { 735 mask_sft = 12; 736 mask = 0x7; 737 } else if (strstr(ucontrol->id.name, "ADC 08 R Mux")) { 738 mask_sft = 10; 739 mask = 0x3; 740 } else if (strstr(ucontrol->id.name, "ADC 08 L Mux")) { 741 mask_sft = 8; 742 mask = 0x3; 743 } else if (strstr(ucontrol->id.name, "ADC 10 R Mux")) { 744 mask_sft = 6; 745 mask = 0x3; 746 } else if (strstr(ucontrol->id.name, "ADC 10 L Mux")) { 747 mask_sft = 4; 748 mask = 0x3; 749 } else if (strstr(ucontrol->id.name, "ADC 07 R Mux")) { 750 mask_sft = 2; 751 mask = 0x3; 752 } else if (strstr(ucontrol->id.name, "ADC 07 L Mux")) { 753 mask_sft = 0; 754 mask = 0x3; 755 } else 756 return -EINVAL; 757 758 rt_sdca_index_read(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 759 RT721_HDA_LEGACY_MUX_CTL0, &val); 760 761 ucontrol->value.enumerated.item[0] = (val >> mask_sft) & mask; 762 763 return 0; 764 } 765 766 static int rt721_sdca_adc_mux_put(struct snd_kcontrol *kcontrol, 767 struct snd_ctl_elem_value *ucontrol) 768 { 769 struct snd_soc_component *component = 770 snd_soc_dapm_kcontrol_component(kcontrol); 771 struct snd_soc_dapm_context *dapm = 772 snd_soc_dapm_kcontrol_dapm(kcontrol); 773 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 774 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 775 unsigned int *item = ucontrol->value.enumerated.item; 776 unsigned int val, val2 = 0, change, mask_sft, mask; 777 unsigned int check; 778 779 if (item[0] >= e->items) 780 return -EINVAL; 781 782 if (strstr(ucontrol->id.name, "ADC 09 Mux")) { 783 mask_sft = 12; 784 mask = 0x7; 785 } else if (strstr(ucontrol->id.name, "ADC 08 R Mux")) { 786 mask_sft = 10; 787 mask = 0x3; 788 } else if (strstr(ucontrol->id.name, "ADC 08 L Mux")) { 789 mask_sft = 8; 790 mask = 0x3; 791 } else if (strstr(ucontrol->id.name, "ADC 10 R Mux")) { 792 mask_sft = 6; 793 mask = 0x3; 794 } else if (strstr(ucontrol->id.name, "ADC 10 L Mux")) { 795 mask_sft = 4; 796 mask = 0x3; 797 } else if (strstr(ucontrol->id.name, "ADC 07 R Mux")) { 798 mask_sft = 2; 799 mask = 0x3; 800 } else if (strstr(ucontrol->id.name, "ADC 07 L Mux")) { 801 mask_sft = 0; 802 mask = 0x3; 803 } else 804 return -EINVAL; 805 806 val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l; 807 rt_sdca_index_read(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 808 RT721_HDA_LEGACY_MUX_CTL0, &val2); 809 810 if (strstr(ucontrol->id.name, "ADC 09 Mux")) 811 val2 = (val2 >> mask_sft) & 0x7; 812 else 813 val2 = (val2 >> mask_sft) & 0x3; 814 815 if (val == val2) 816 change = 0; 817 else 818 change = 1; 819 820 if (change) { 821 rt_sdca_index_read(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 822 RT721_HDA_LEGACY_MUX_CTL0, &check); 823 rt_sdca_index_update_bits(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 824 RT721_HDA_LEGACY_MUX_CTL0, mask << mask_sft, 825 val << mask_sft); 826 } 827 828 snd_soc_dapm_mux_update_power(dapm, kcontrol, 829 item[0], e, NULL); 830 831 return change; 832 } 833 834 static const char * const adc09_mux_text[] = { 835 "MIC2", 836 "LINE1", 837 "LINE2", 838 }; 839 static const char * const adc07_10_mux_text[] = { 840 "DMIC1 RE", 841 "DMIC1 FE", 842 "DMIC2 RE", 843 "DMIC2 FE", 844 }; 845 846 static SOC_ENUM_SINGLE_DECL( 847 rt721_adc09_enum, SND_SOC_NOPM, 0, adc09_mux_text); 848 static SOC_ENUM_SINGLE_DECL( 849 rt721_dmic_enum, SND_SOC_NOPM, 0, adc07_10_mux_text); 850 851 static const struct snd_kcontrol_new rt721_sdca_adc09_mux = 852 SOC_DAPM_ENUM_EXT("ADC 09 Mux", rt721_adc09_enum, 853 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 854 static const struct snd_kcontrol_new rt721_sdca_adc08_r_mux = 855 SOC_DAPM_ENUM_EXT("ADC 08 R Mux", rt721_dmic_enum, 856 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 857 static const struct snd_kcontrol_new rt721_sdca_adc08_l_mux = 858 SOC_DAPM_ENUM_EXT("ADC 08 L Mux", rt721_dmic_enum, 859 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 860 static const struct snd_kcontrol_new rt721_sdca_adc10_r_mux = 861 SOC_DAPM_ENUM_EXT("ADC 10 R Mux", rt721_dmic_enum, 862 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 863 static const struct snd_kcontrol_new rt721_sdca_adc10_l_mux = 864 SOC_DAPM_ENUM_EXT("ADC 10 L Mux", rt721_dmic_enum, 865 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 866 static const struct snd_kcontrol_new rt721_sdca_adc07_r_mux = 867 SOC_DAPM_ENUM_EXT("ADC 07 R Mux", rt721_dmic_enum, 868 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 869 static const struct snd_kcontrol_new rt721_sdca_adc07_l_mux = 870 SOC_DAPM_ENUM_EXT("ADC 07 L Mux", rt721_dmic_enum, 871 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 872 873 874 static int rt721_sdca_fu42_event(struct snd_soc_dapm_widget *w, 875 struct snd_kcontrol *kcontrol, int event) 876 { 877 struct snd_soc_component *component = 878 snd_soc_dapm_to_component(w->dapm); 879 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 880 unsigned char unmute = 0x0, mute = 0x1; 881 882 switch (event) { 883 case SND_SOC_DAPM_POST_PMU: 884 msleep(100); 885 regmap_write(rt721->regmap, 886 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, 887 RT721_SDCA_CTL_FU_MUTE, CH_L), unmute); 888 regmap_write(rt721->regmap, 889 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, 890 RT721_SDCA_CTL_FU_MUTE, CH_R), unmute); 891 break; 892 case SND_SOC_DAPM_PRE_PMD: 893 regmap_write(rt721->regmap, 894 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, 895 RT721_SDCA_CTL_FU_MUTE, CH_L), mute); 896 regmap_write(rt721->regmap, 897 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, 898 RT721_SDCA_CTL_FU_MUTE, CH_R), mute); 899 break; 900 } 901 return 0; 902 } 903 904 static int rt721_sdca_fu21_event(struct snd_soc_dapm_widget *w, 905 struct snd_kcontrol *kcontrol, int event) 906 { 907 struct snd_soc_component *component = 908 snd_soc_dapm_to_component(w->dapm); 909 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 910 unsigned char unmute = 0x0, mute = 0x1; 911 912 switch (event) { 913 case SND_SOC_DAPM_POST_PMU: 914 regmap_write(rt721->regmap, 915 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, 916 RT721_SDCA_CTL_FU_MUTE, CH_L), unmute); 917 regmap_write(rt721->regmap, 918 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, 919 RT721_SDCA_CTL_FU_MUTE, CH_R), unmute); 920 break; 921 case SND_SOC_DAPM_PRE_PMD: 922 regmap_write(rt721->regmap, 923 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, 924 RT721_SDCA_CTL_FU_MUTE, CH_L), mute); 925 regmap_write(rt721->regmap, 926 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, 927 RT721_SDCA_CTL_FU_MUTE, CH_R), mute); 928 break; 929 } 930 return 0; 931 } 932 933 static int rt721_sdca_fu23_event(struct snd_soc_dapm_widget *w, 934 struct snd_kcontrol *kcontrol, int event) 935 { 936 struct snd_soc_component *component = 937 snd_soc_dapm_to_component(w->dapm); 938 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 939 unsigned char unmute = 0x0, mute = 0x1; 940 941 switch (event) { 942 case SND_SOC_DAPM_POST_PMU: 943 regmap_write(rt721->regmap, 944 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, 945 RT721_SDCA_CTL_FU_MUTE, CH_L), unmute); 946 regmap_write(rt721->regmap, 947 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, 948 RT721_SDCA_CTL_FU_MUTE, CH_R), unmute); 949 break; 950 case SND_SOC_DAPM_PRE_PMD: 951 regmap_write(rt721->regmap, 952 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, 953 RT721_SDCA_CTL_FU_MUTE, CH_L), mute); 954 regmap_write(rt721->regmap, 955 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, 956 RT721_SDCA_CTL_FU_MUTE, CH_R), mute); 957 break; 958 } 959 return 0; 960 } 961 962 static int rt721_sdca_fu113_event(struct snd_soc_dapm_widget *w, 963 struct snd_kcontrol *kcontrol, int event) 964 { 965 struct snd_soc_component *component = 966 snd_soc_dapm_to_component(w->dapm); 967 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 968 969 switch (event) { 970 case SND_SOC_DAPM_POST_PMU: 971 rt721->fu1e_dapm_mute = false; 972 rt721_sdca_set_fu1e_capture_ctl(rt721); 973 break; 974 case SND_SOC_DAPM_PRE_PMD: 975 rt721->fu1e_dapm_mute = true; 976 rt721_sdca_set_fu1e_capture_ctl(rt721); 977 break; 978 } 979 return 0; 980 } 981 982 static int rt721_sdca_fu36_event(struct snd_soc_dapm_widget *w, 983 struct snd_kcontrol *kcontrol, int event) 984 { 985 struct snd_soc_component *component = 986 snd_soc_dapm_to_component(w->dapm); 987 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 988 989 switch (event) { 990 case SND_SOC_DAPM_POST_PMU: 991 rt721->fu0f_dapm_mute = false; 992 rt721_sdca_set_fu0f_capture_ctl(rt721); 993 break; 994 case SND_SOC_DAPM_PRE_PMD: 995 rt721->fu0f_dapm_mute = true; 996 rt721_sdca_set_fu0f_capture_ctl(rt721); 997 break; 998 } 999 return 0; 1000 } 1001 1002 static int rt721_sdca_pde47_event(struct snd_soc_dapm_widget *w, 1003 struct snd_kcontrol *kcontrol, int event) 1004 { 1005 struct snd_soc_component *component = 1006 snd_soc_dapm_to_component(w->dapm); 1007 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1008 unsigned char ps0 = 0x0, ps3 = 0x3; 1009 1010 switch (event) { 1011 case SND_SOC_DAPM_POST_PMU: 1012 regmap_write(rt721->regmap, 1013 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE40, 1014 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps0); 1015 break; 1016 case SND_SOC_DAPM_PRE_PMD: 1017 regmap_write(rt721->regmap, 1018 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE40, 1019 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps3); 1020 break; 1021 } 1022 return 0; 1023 } 1024 1025 static int rt721_sdca_pde41_event(struct snd_soc_dapm_widget *w, 1026 struct snd_kcontrol *kcontrol, int event) 1027 { 1028 struct snd_soc_component *component = 1029 snd_soc_dapm_to_component(w->dapm); 1030 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1031 unsigned char ps0 = 0x0, ps3 = 0x3; 1032 1033 switch (event) { 1034 case SND_SOC_DAPM_POST_PMU: 1035 regmap_write(rt721->regmap, 1036 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE41, 1037 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps0); 1038 break; 1039 case SND_SOC_DAPM_PRE_PMD: 1040 regmap_write(rt721->regmap, 1041 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE41, 1042 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps3); 1043 break; 1044 } 1045 return 0; 1046 } 1047 1048 static int rt721_sdca_pde11_event(struct snd_soc_dapm_widget *w, 1049 struct snd_kcontrol *kcontrol, int event) 1050 { 1051 struct snd_soc_component *component = 1052 snd_soc_dapm_to_component(w->dapm); 1053 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1054 unsigned char ps0 = 0x0, ps3 = 0x3; 1055 1056 switch (event) { 1057 case SND_SOC_DAPM_POST_PMU: 1058 regmap_write(rt721->regmap, 1059 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_PDE2A, 1060 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps0); 1061 break; 1062 case SND_SOC_DAPM_PRE_PMD: 1063 regmap_write(rt721->regmap, 1064 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_PDE2A, 1065 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps3); 1066 break; 1067 } 1068 return 0; 1069 } 1070 1071 static int rt721_sdca_pde34_event(struct snd_soc_dapm_widget *w, 1072 struct snd_kcontrol *kcontrol, int event) 1073 { 1074 struct snd_soc_component *component = 1075 snd_soc_dapm_to_component(w->dapm); 1076 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1077 unsigned char ps0 = 0x0, ps3 = 0x3; 1078 1079 switch (event) { 1080 case SND_SOC_DAPM_POST_PMU: 1081 regmap_write(rt721->regmap, 1082 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE12, 1083 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps0); 1084 break; 1085 case SND_SOC_DAPM_PRE_PMD: 1086 regmap_write(rt721->regmap, 1087 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE12, 1088 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps3); 1089 break; 1090 } 1091 return 0; 1092 } 1093 1094 static const struct snd_soc_dapm_widget rt721_sdca_dapm_widgets[] = { 1095 SND_SOC_DAPM_OUTPUT("HP"), 1096 SND_SOC_DAPM_OUTPUT("SPK"), 1097 SND_SOC_DAPM_INPUT("MIC2"), 1098 SND_SOC_DAPM_INPUT("LINE1"), 1099 SND_SOC_DAPM_INPUT("LINE2"), 1100 SND_SOC_DAPM_INPUT("DMIC1_2"), 1101 SND_SOC_DAPM_INPUT("DMIC3_4"), 1102 1103 SND_SOC_DAPM_SUPPLY("PDE 41", SND_SOC_NOPM, 0, 0, 1104 rt721_sdca_pde41_event, 1105 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1106 SND_SOC_DAPM_SUPPLY("PDE 47", SND_SOC_NOPM, 0, 0, 1107 rt721_sdca_pde47_event, 1108 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1109 SND_SOC_DAPM_SUPPLY("PDE 11", SND_SOC_NOPM, 0, 0, 1110 rt721_sdca_pde11_event, 1111 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1112 SND_SOC_DAPM_SUPPLY("PDE 34", SND_SOC_NOPM, 0, 0, 1113 rt721_sdca_pde34_event, 1114 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1115 1116 SND_SOC_DAPM_DAC_E("FU 21", NULL, SND_SOC_NOPM, 0, 0, 1117 rt721_sdca_fu21_event, 1118 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1119 SND_SOC_DAPM_DAC_E("FU 23", NULL, SND_SOC_NOPM, 0, 0, 1120 rt721_sdca_fu23_event, 1121 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1122 SND_SOC_DAPM_DAC_E("FU 42", NULL, SND_SOC_NOPM, 0, 0, 1123 rt721_sdca_fu42_event, 1124 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1125 SND_SOC_DAPM_ADC_E("FU 36", NULL, SND_SOC_NOPM, 0, 0, 1126 rt721_sdca_fu36_event, 1127 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1128 SND_SOC_DAPM_ADC_E("FU 113", NULL, SND_SOC_NOPM, 0, 0, 1129 rt721_sdca_fu113_event, 1130 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1131 SND_SOC_DAPM_MUX("ADC 09 Mux", SND_SOC_NOPM, 0, 0, 1132 &rt721_sdca_adc09_mux), 1133 SND_SOC_DAPM_MUX("ADC 08 R Mux", SND_SOC_NOPM, 0, 0, 1134 &rt721_sdca_adc08_r_mux), 1135 SND_SOC_DAPM_MUX("ADC 08 L Mux", SND_SOC_NOPM, 0, 0, 1136 &rt721_sdca_adc08_l_mux), 1137 SND_SOC_DAPM_MUX("ADC 10 R Mux", SND_SOC_NOPM, 0, 0, 1138 &rt721_sdca_adc10_r_mux), 1139 SND_SOC_DAPM_MUX("ADC 10 L Mux", SND_SOC_NOPM, 0, 0, 1140 &rt721_sdca_adc10_l_mux), 1141 SND_SOC_DAPM_MUX("ADC 07 R Mux", SND_SOC_NOPM, 0, 0, 1142 &rt721_sdca_adc07_r_mux), 1143 SND_SOC_DAPM_MUX("ADC 07 L Mux", SND_SOC_NOPM, 0, 0, 1144 &rt721_sdca_adc07_l_mux), 1145 1146 SND_SOC_DAPM_AIF_IN("DP1RX", "DP1 Headphone Playback", 0, SND_SOC_NOPM, 0, 0), 1147 SND_SOC_DAPM_AIF_OUT("DP2TX", "DP2 Headset Capture", 0, SND_SOC_NOPM, 0, 0), 1148 SND_SOC_DAPM_AIF_IN("DP3RX", "DP3 Speaker Playback", 0, SND_SOC_NOPM, 0, 0), 1149 SND_SOC_DAPM_AIF_OUT("DP6TX", "DP6 DMic Capture", 0, SND_SOC_NOPM, 0, 0), 1150 }; 1151 1152 static const struct snd_soc_dapm_route rt721_sdca_audio_map[] = { 1153 {"FU 42", NULL, "DP1RX"}, 1154 {"FU 21", NULL, "DP3RX"}, 1155 {"FU 23", NULL, "DP3RX"}, 1156 1157 {"ADC 09 Mux", "MIC2", "MIC2"}, 1158 {"ADC 09 Mux", "LINE1", "LINE1"}, 1159 {"ADC 09 Mux", "LINE2", "LINE2"}, 1160 {"ADC 07 R Mux", "DMIC1 RE", "DMIC1_2"}, 1161 {"ADC 07 R Mux", "DMIC1 FE", "DMIC1_2"}, 1162 {"ADC 07 R Mux", "DMIC2 RE", "DMIC3_4"}, 1163 {"ADC 07 R Mux", "DMIC2 FE", "DMIC3_4"}, 1164 {"ADC 07 L Mux", "DMIC1 RE", "DMIC1_2"}, 1165 {"ADC 07 L Mux", "DMIC1 FE", "DMIC1_2"}, 1166 {"ADC 07 L Mux", "DMIC2 RE", "DMIC3_4"}, 1167 {"ADC 07 L Mux", "DMIC2 FE", "DMIC3_4"}, 1168 {"ADC 08 R Mux", "DMIC1 RE", "DMIC1_2"}, 1169 {"ADC 08 R Mux", "DMIC1 FE", "DMIC1_2"}, 1170 {"ADC 08 R Mux", "DMIC2 RE", "DMIC3_4"}, 1171 {"ADC 08 R Mux", "DMIC2 FE", "DMIC3_4"}, 1172 {"ADC 08 L Mux", "DMIC1 RE", "DMIC1_2"}, 1173 {"ADC 08 L Mux", "DMIC1 FE", "DMIC1_2"}, 1174 {"ADC 08 L Mux", "DMIC2 RE", "DMIC3_4"}, 1175 {"ADC 08 L Mux", "DMIC2 FE", "DMIC3_4"}, 1176 {"ADC 10 R Mux", "DMIC1 RE", "DMIC1_2"}, 1177 {"ADC 10 R Mux", "DMIC1 FE", "DMIC1_2"}, 1178 {"ADC 10 R Mux", "DMIC2 RE", "DMIC3_4"}, 1179 {"ADC 10 R Mux", "DMIC2 FE", "DMIC3_4"}, 1180 {"ADC 10 L Mux", "DMIC1 RE", "DMIC1_2"}, 1181 {"ADC 10 L Mux", "DMIC1 FE", "DMIC1_2"}, 1182 {"ADC 10 L Mux", "DMIC2 RE", "DMIC3_4"}, 1183 {"ADC 10 L Mux", "DMIC2 FE", "DMIC3_4"}, 1184 {"FU 36", NULL, "PDE 34"}, 1185 {"FU 36", NULL, "ADC 09 Mux"}, 1186 {"FU 113", NULL, "PDE 11"}, 1187 {"FU 113", NULL, "ADC 07 R Mux"}, 1188 {"FU 113", NULL, "ADC 07 L Mux"}, 1189 {"FU 113", NULL, "ADC 10 R Mux"}, 1190 {"FU 113", NULL, "ADC 10 L Mux"}, 1191 {"DP2TX", NULL, "FU 36"}, 1192 {"DP6TX", NULL, "FU 113"}, 1193 1194 {"HP", NULL, "PDE 47"}, 1195 {"HP", NULL, "FU 42"}, 1196 {"SPK", NULL, "PDE 41"}, 1197 {"SPK", NULL, "FU 21"}, 1198 {"SPK", NULL, "FU 23"}, 1199 }; 1200 1201 static int rt721_sdca_parse_dt(struct rt721_sdca_priv *rt721, struct device *dev) 1202 { 1203 device_property_read_u32(dev, "realtek,jd-src", &rt721->jd_src); 1204 1205 return 0; 1206 } 1207 1208 static int rt721_sdca_probe(struct snd_soc_component *component) 1209 { 1210 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1211 int ret; 1212 1213 rt721_sdca_parse_dt(rt721, &rt721->slave->dev); 1214 rt721->component = component; 1215 1216 ret = pm_runtime_resume(component->dev); 1217 if (ret < 0 && ret != -EACCES) 1218 return ret; 1219 1220 return 0; 1221 } 1222 1223 static const struct snd_soc_component_driver soc_sdca_dev_rt721 = { 1224 .probe = rt721_sdca_probe, 1225 .controls = rt721_sdca_controls, 1226 .num_controls = ARRAY_SIZE(rt721_sdca_controls), 1227 .dapm_widgets = rt721_sdca_dapm_widgets, 1228 .num_dapm_widgets = ARRAY_SIZE(rt721_sdca_dapm_widgets), 1229 .dapm_routes = rt721_sdca_audio_map, 1230 .num_dapm_routes = ARRAY_SIZE(rt721_sdca_audio_map), 1231 .set_jack = rt721_sdca_set_jack_detect, 1232 .endianness = 1, 1233 }; 1234 1235 static int rt721_sdca_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream, 1236 int direction) 1237 { 1238 snd_soc_dai_dma_data_set(dai, direction, sdw_stream); 1239 1240 return 0; 1241 } 1242 1243 static void rt721_sdca_shutdown(struct snd_pcm_substream *substream, 1244 struct snd_soc_dai *dai) 1245 { 1246 snd_soc_dai_set_dma_data(dai, substream, NULL); 1247 } 1248 1249 static int rt721_sdca_pcm_hw_params(struct snd_pcm_substream *substream, 1250 struct snd_pcm_hw_params *params, 1251 struct snd_soc_dai *dai) 1252 { 1253 struct snd_soc_component *component = dai->component; 1254 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1255 struct sdw_stream_config stream_config; 1256 struct sdw_port_config port_config; 1257 enum sdw_data_direction direction; 1258 struct sdw_stream_runtime *sdw_stream; 1259 int retval, port, num_channels; 1260 unsigned int sampling_rate; 1261 1262 dev_dbg(dai->dev, "%s %s", __func__, dai->name); 1263 sdw_stream = snd_soc_dai_get_dma_data(dai, substream); 1264 1265 if (!sdw_stream) 1266 return -EINVAL; 1267 1268 if (!rt721->slave) 1269 return -EINVAL; 1270 1271 /* 1272 * RT721_AIF1 with port = 1 for headphone playback 1273 * RT721_AIF1 with port = 2 for headset-mic capture 1274 * RT721_AIF2 with port = 3 for speaker playback 1275 * RT721_AIF3 with port = 6 for digital-mic capture 1276 */ 1277 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 1278 direction = SDW_DATA_DIR_RX; 1279 if (dai->id == RT721_AIF1) 1280 port = 1; 1281 else if (dai->id == RT721_AIF2) 1282 port = 3; 1283 else 1284 return -EINVAL; 1285 } else { 1286 direction = SDW_DATA_DIR_TX; 1287 if (dai->id == RT721_AIF1) 1288 port = 2; 1289 else if (dai->id == RT721_AIF3) 1290 port = 6; 1291 else 1292 return -EINVAL; 1293 } 1294 stream_config.frame_rate = params_rate(params); 1295 stream_config.ch_count = params_channels(params); 1296 stream_config.bps = snd_pcm_format_width(params_format(params)); 1297 stream_config.direction = direction; 1298 1299 num_channels = params_channels(params); 1300 port_config.ch_mask = GENMASK(num_channels - 1, 0); 1301 port_config.num = port; 1302 1303 retval = sdw_stream_add_slave(rt721->slave, &stream_config, 1304 &port_config, 1, sdw_stream); 1305 if (retval) { 1306 dev_err(dai->dev, "Unable to configure port\n"); 1307 return retval; 1308 } 1309 1310 if (params_channels(params) > 16) { 1311 dev_err(component->dev, "Unsupported channels %d\n", 1312 params_channels(params)); 1313 return -EINVAL; 1314 } 1315 1316 /* sampling rate configuration */ 1317 switch (params_rate(params)) { 1318 case 8000: 1319 sampling_rate = RT721_SDCA_RATE_8000HZ; 1320 break; 1321 case 16000: 1322 sampling_rate = RT721_SDCA_RATE_16000HZ; 1323 break; 1324 case 24000: 1325 sampling_rate = RT721_SDCA_RATE_24000HZ; 1326 break; 1327 case 32000: 1328 sampling_rate = RT721_SDCA_RATE_32000HZ; 1329 break; 1330 case 44100: 1331 sampling_rate = RT721_SDCA_RATE_44100HZ; 1332 break; 1333 case 48000: 1334 sampling_rate = RT721_SDCA_RATE_48000HZ; 1335 break; 1336 case 96000: 1337 sampling_rate = RT721_SDCA_RATE_96000HZ; 1338 break; 1339 case 192000: 1340 sampling_rate = RT721_SDCA_RATE_192000HZ; 1341 break; 1342 case 384000: 1343 sampling_rate = RT721_SDCA_RATE_384000HZ; 1344 break; 1345 case 768000: 1346 sampling_rate = RT721_SDCA_RATE_768000HZ; 1347 break; 1348 default: 1349 dev_err(component->dev, "Rate %d is not supported\n", 1350 params_rate(params)); 1351 return -EINVAL; 1352 } 1353 1354 /* set sampling frequency */ 1355 if (dai->id == RT721_AIF1) { 1356 regmap_write(rt721->regmap, 1357 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_CS01, 1358 RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate); 1359 regmap_write(rt721->regmap, 1360 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_CS11, 1361 RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate); 1362 } 1363 1364 if (dai->id == RT721_AIF2) 1365 regmap_write(rt721->regmap, 1366 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_CS31, 1367 RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate); 1368 1369 if (dai->id == RT721_AIF3) 1370 regmap_write(rt721->regmap, 1371 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_CS1F, 1372 RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate); 1373 1374 return 0; 1375 } 1376 1377 static int rt721_sdca_pcm_hw_free(struct snd_pcm_substream *substream, 1378 struct snd_soc_dai *dai) 1379 { 1380 struct snd_soc_component *component = dai->component; 1381 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1382 struct sdw_stream_runtime *sdw_stream = 1383 snd_soc_dai_get_dma_data(dai, substream); 1384 1385 if (!rt721->slave) 1386 return -EINVAL; 1387 1388 sdw_stream_remove_slave(rt721->slave, sdw_stream); 1389 return 0; 1390 } 1391 1392 #define RT721_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | \ 1393 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000) 1394 #define RT721_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ 1395 SNDRV_PCM_FMTBIT_S24_LE) 1396 1397 static const struct snd_soc_dai_ops rt721_sdca_ops = { 1398 .hw_params = rt721_sdca_pcm_hw_params, 1399 .hw_free = rt721_sdca_pcm_hw_free, 1400 .set_stream = rt721_sdca_set_sdw_stream, 1401 .shutdown = rt721_sdca_shutdown, 1402 }; 1403 1404 static struct snd_soc_dai_driver rt721_sdca_dai[] = { 1405 { 1406 .name = "rt721-sdca-aif1", 1407 .id = RT721_AIF1, 1408 .playback = { 1409 .stream_name = "DP1 Headphone Playback", 1410 .channels_min = 1, 1411 .channels_max = 2, 1412 .rates = RT721_STEREO_RATES, 1413 .formats = RT721_FORMATS, 1414 }, 1415 .capture = { 1416 .stream_name = "DP2 Headset Capture", 1417 .channels_min = 1, 1418 .channels_max = 2, 1419 .rates = RT721_STEREO_RATES, 1420 .formats = RT721_FORMATS, 1421 }, 1422 .ops = &rt721_sdca_ops, 1423 }, 1424 { 1425 .name = "rt721-sdca-aif2", 1426 .id = RT721_AIF2, 1427 .playback = { 1428 .stream_name = "DP3 Speaker Playback", 1429 .channels_min = 1, 1430 .channels_max = 2, 1431 .rates = RT721_STEREO_RATES, 1432 .formats = RT721_FORMATS, 1433 }, 1434 .ops = &rt721_sdca_ops, 1435 }, 1436 { 1437 .name = "rt721-sdca-aif3", 1438 .id = RT721_AIF3, 1439 .capture = { 1440 .stream_name = "DP6 DMic Capture", 1441 .channels_min = 1, 1442 .channels_max = 4, 1443 .rates = RT721_STEREO_RATES, 1444 .formats = RT721_FORMATS, 1445 }, 1446 .ops = &rt721_sdca_ops, 1447 } 1448 }; 1449 1450 int rt721_sdca_init(struct device *dev, struct regmap *regmap, 1451 struct regmap *mbq_regmap, struct sdw_slave *slave) 1452 { 1453 struct rt721_sdca_priv *rt721; 1454 1455 rt721 = devm_kzalloc(dev, sizeof(*rt721), GFP_KERNEL); 1456 if (!rt721) 1457 return -ENOMEM; 1458 1459 dev_set_drvdata(dev, rt721); 1460 rt721->slave = slave; 1461 rt721->regmap = regmap; 1462 rt721->mbq_regmap = mbq_regmap; 1463 1464 regcache_cache_only(rt721->regmap, true); 1465 regcache_cache_only(rt721->mbq_regmap, true); 1466 1467 mutex_init(&rt721->calibrate_mutex); 1468 mutex_init(&rt721->disable_irq_lock); 1469 1470 INIT_DELAYED_WORK(&rt721->jack_detect_work, rt721_sdca_jack_detect_handler); 1471 INIT_DELAYED_WORK(&rt721->jack_btn_check_work, rt721_sdca_btn_check_handler); 1472 1473 /* 1474 * Mark hw_init to false 1475 * HW init will be performed when device reports present 1476 */ 1477 rt721->hw_init = false; 1478 rt721->first_hw_init = false; 1479 rt721->fu1e_dapm_mute = true; 1480 rt721->fu0f_dapm_mute = true; 1481 rt721->fu0f_mixer_l_mute = rt721->fu0f_mixer_r_mute = true; 1482 rt721->fu1e_mixer_mute[0] = rt721->fu1e_mixer_mute[1] = 1483 rt721->fu1e_mixer_mute[2] = rt721->fu1e_mixer_mute[3] = true; 1484 1485 return devm_snd_soc_register_component(dev, 1486 &soc_sdca_dev_rt721, rt721_sdca_dai, ARRAY_SIZE(rt721_sdca_dai)); 1487 } 1488 1489 int rt721_sdca_io_init(struct device *dev, struct sdw_slave *slave) 1490 { 1491 struct rt721_sdca_priv *rt721 = dev_get_drvdata(dev); 1492 1493 rt721->disable_irq = false; 1494 1495 if (rt721->hw_init) 1496 return 0; 1497 1498 regcache_cache_only(rt721->regmap, false); 1499 regcache_cache_only(rt721->mbq_regmap, false); 1500 if (rt721->first_hw_init) { 1501 regcache_cache_bypass(rt721->regmap, true); 1502 regcache_cache_bypass(rt721->mbq_regmap, true); 1503 } else { 1504 /* 1505 * PM runtime is only enabled when a Slave reports as Attached 1506 */ 1507 1508 /* set autosuspend parameters */ 1509 pm_runtime_set_autosuspend_delay(&slave->dev, 3000); 1510 pm_runtime_use_autosuspend(&slave->dev); 1511 1512 /* update count of parent 'active' children */ 1513 pm_runtime_set_active(&slave->dev); 1514 1515 /* make sure the device does not suspend immediately */ 1516 pm_runtime_mark_last_busy(&slave->dev); 1517 1518 pm_runtime_enable(&slave->dev); 1519 } 1520 1521 pm_runtime_get_noresume(&slave->dev); 1522 rt721_sdca_dmic_preset(rt721); 1523 rt721_sdca_amp_preset(rt721); 1524 rt721_sdca_jack_preset(rt721); 1525 if (rt721->first_hw_init) { 1526 regcache_cache_bypass(rt721->regmap, false); 1527 regcache_mark_dirty(rt721->regmap); 1528 regcache_cache_bypass(rt721->mbq_regmap, false); 1529 regcache_mark_dirty(rt721->mbq_regmap); 1530 } else 1531 rt721->first_hw_init = true; 1532 1533 /* Mark Slave initialization complete */ 1534 rt721->hw_init = true; 1535 1536 pm_runtime_mark_last_busy(&slave->dev); 1537 pm_runtime_put_autosuspend(&slave->dev); 1538 1539 dev_dbg(&slave->dev, "%s hw_init complete\n", __func__); 1540 return 0; 1541 } 1542 1543 MODULE_DESCRIPTION("ASoC RT721 SDCA SDW driver"); 1544 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>"); 1545 MODULE_LICENSE("GPL"); 1546