1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // rt721-sdca.c -- rt721 SDCA ALSA SoC audio driver 4 // 5 // Copyright(c) 2024 Realtek Semiconductor Corp. 6 // 7 // 8 9 #include <linux/bitops.h> 10 #include <sound/core.h> 11 #include <linux/delay.h> 12 #include <linux/init.h> 13 #include <sound/initval.h> 14 #include <sound/jack.h> 15 #include <linux/kernel.h> 16 #include <linux/module.h> 17 #include <linux/moduleparam.h> 18 #include <sound/pcm.h> 19 #include <linux/pm_runtime.h> 20 #include <sound/pcm_params.h> 21 #include <linux/soundwire/sdw_registers.h> 22 #include <linux/slab.h> 23 #include <sound/soc-dapm.h> 24 #include <sound/tlv.h> 25 26 #include "rt721-sdca.h" 27 #include "rt-sdw-common.h" 28 29 static void rt721_sdca_jack_detect_handler(struct work_struct *work) 30 { 31 struct rt721_sdca_priv *rt721 = 32 container_of(work, struct rt721_sdca_priv, jack_detect_work.work); 33 int btn_type = 0; 34 35 if (!rt721->hs_jack) 36 return; 37 38 if (!rt721->component->card || !rt721->component->card->instantiated) 39 return; 40 41 /* SDW_SCP_SDCA_INT_SDCA_6 is used for jack detection */ 42 if (rt721->scp_sdca_stat1 & SDW_SCP_SDCA_INT_SDCA_0) { 43 rt721->jack_type = rt_sdca_headset_detect(rt721->regmap, 44 RT721_SDCA_ENT_GE49); 45 if (rt721->jack_type < 0) 46 return; 47 } 48 49 /* SDW_SCP_SDCA_INT_SDCA_8 is used for button detection */ 50 if (rt721->scp_sdca_stat2 & SDW_SCP_SDCA_INT_SDCA_8) 51 btn_type = rt_sdca_button_detect(rt721->regmap, 52 RT721_SDCA_ENT_HID01, RT721_BUF_ADDR_HID1, 53 RT721_SDCA_HID_ID); 54 55 if (rt721->jack_type == 0) 56 btn_type = 0; 57 58 dev_dbg(&rt721->slave->dev, 59 "in %s, jack_type=%d\n", __func__, rt721->jack_type); 60 dev_dbg(&rt721->slave->dev, 61 "in %s, btn_type=0x%x\n", __func__, btn_type); 62 dev_dbg(&rt721->slave->dev, 63 "in %s, scp_sdca_stat1=0x%x, scp_sdca_stat2=0x%x\n", __func__, 64 rt721->scp_sdca_stat1, rt721->scp_sdca_stat2); 65 66 snd_soc_jack_report(rt721->hs_jack, rt721->jack_type | btn_type, 67 SND_JACK_HEADSET | 68 SND_JACK_BTN_0 | SND_JACK_BTN_1 | 69 SND_JACK_BTN_2 | SND_JACK_BTN_3); 70 71 if (btn_type) { 72 /* button released */ 73 snd_soc_jack_report(rt721->hs_jack, rt721->jack_type, 74 SND_JACK_HEADSET | 75 SND_JACK_BTN_0 | SND_JACK_BTN_1 | 76 SND_JACK_BTN_2 | SND_JACK_BTN_3); 77 78 mod_delayed_work(system_power_efficient_wq, 79 &rt721->jack_btn_check_work, msecs_to_jiffies(200)); 80 } 81 } 82 83 static void rt721_sdca_btn_check_handler(struct work_struct *work) 84 { 85 struct rt721_sdca_priv *rt721 = 86 container_of(work, struct rt721_sdca_priv, jack_btn_check_work.work); 87 int btn_type = 0, ret, idx; 88 unsigned int det_mode, offset, val; 89 unsigned char buf[3]; 90 91 ret = regmap_read(rt721->regmap, 92 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_GE49, 93 RT721_SDCA_CTL_DETECTED_MODE, 0), &det_mode); 94 if (ret < 0) 95 goto io_error; 96 97 /* pin attached */ 98 if (det_mode) { 99 /* read UMP message offset */ 100 ret = regmap_read(rt721->regmap, 101 SDW_SDCA_CTL(FUNC_NUM_HID, RT721_SDCA_ENT_HID01, 102 RT721_SDCA_CTL_HIDTX_MESSAGE_OFFSET, 0), &offset); 103 if (ret < 0) 104 goto io_error; 105 106 for (idx = 0; idx < sizeof(buf); idx++) { 107 ret = regmap_read(rt721->regmap, 108 RT721_BUF_ADDR_HID1 + offset + idx, &val); 109 if (ret < 0) 110 goto io_error; 111 buf[idx] = val & 0xff; 112 } 113 /* Report ID for HID1 */ 114 if (buf[0] == 0x11) 115 btn_type = rt_sdca_btn_type(&buf[1]); 116 } else 117 rt721->jack_type = 0; 118 119 dev_dbg(&rt721->slave->dev, "%s, btn_type=0x%x\n", __func__, btn_type); 120 snd_soc_jack_report(rt721->hs_jack, rt721->jack_type | btn_type, 121 SND_JACK_HEADSET | 122 SND_JACK_BTN_0 | SND_JACK_BTN_1 | 123 SND_JACK_BTN_2 | SND_JACK_BTN_3); 124 125 if (btn_type) { 126 /* button released */ 127 snd_soc_jack_report(rt721->hs_jack, rt721->jack_type, 128 SND_JACK_HEADSET | 129 SND_JACK_BTN_0 | SND_JACK_BTN_1 | 130 SND_JACK_BTN_2 | SND_JACK_BTN_3); 131 132 mod_delayed_work(system_power_efficient_wq, 133 &rt721->jack_btn_check_work, msecs_to_jiffies(200)); 134 } 135 136 return; 137 138 io_error: 139 pr_err_ratelimited("IO error in %s, ret %d\n", __func__, ret); 140 } 141 142 static void rt721_sdca_dmic_preset(struct rt721_sdca_priv *rt721) 143 { 144 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 145 RT721_MISC_POWER_CTL31, 0x8000); 146 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART, 147 RT721_VREF1_HV_CTRL1, 0xe000); 148 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 149 RT721_MISC_POWER_CTL31, 0x8007); 150 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 151 RT721_ENT_FLOAT_CTL9, 0x2a2a); 152 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 153 RT721_ENT_FLOAT_CTL10, 0x2a00); 154 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 155 RT721_ENT_FLOAT_CTL6, 0x2a2a); 156 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 157 RT721_ENT_FLOAT_CTL5, 0x2626); 158 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 159 RT721_ENT_FLOAT_CTL8, 0x1e00); 160 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 161 RT721_ENT_FLOAT_CTL7, 0x1515); 162 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 163 RT721_CH_FLOAT_CTL3, 0x0304); 164 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 165 RT721_CH_FLOAT_CTL4, 0x0304); 166 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 167 RT721_HDA_LEGACY_CTL1, 0x0000); 168 regmap_write(rt721->regmap, 169 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_IT26, 170 RT721_SDCA_CTL_VENDOR_DEF, 0), 0x01); 171 regmap_write(rt721->mbq_regmap, 0x5910009, 0x2e01); 172 rt_sdca_index_write(rt721->mbq_regmap, RT721_RC_CALIB_CTRL, 173 RT721_RC_CALIB_CTRL0, 0x0b00); 174 rt_sdca_index_write(rt721->mbq_regmap, RT721_RC_CALIB_CTRL, 175 RT721_RC_CALIB_CTRL0, 0x0b40); 176 regmap_write(rt721->regmap, 0x2f5c, 0x25); 177 } 178 179 static void rt721_sdca_amp_preset(struct rt721_sdca_priv *rt721) 180 { 181 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 182 RT721_MISC_POWER_CTL31, 0x8000); 183 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART, 184 RT721_VREF1_HV_CTRL1, 0xe000); 185 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 186 RT721_MISC_POWER_CTL31, 0x8007); 187 regmap_write(rt721->mbq_regmap, 0x5810000, 0x6420); 188 regmap_write(rt721->mbq_regmap, 0x5810000, 0x6421); 189 regmap_write(rt721->mbq_regmap, 0x5810000, 0xe421); 190 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 191 RT721_CH_FLOAT_CTL6, 0x5561); 192 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_REG, 193 RT721_GPIO_PAD_CTRL5, 0x8003); 194 regmap_write(rt721->regmap, 195 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_OT23, 196 RT721_SDCA_CTL_VENDOR_DEF, 0), 0x04); 197 regmap_write(rt721->regmap, 198 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, 199 RT721_SDCA_CTL_FU_MUTE, CH_01), 0x00); 200 regmap_write(rt721->regmap, 201 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, 202 RT721_SDCA_CTL_FU_MUTE, CH_02), 0x00); 203 regmap_write(rt721->regmap, 204 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_FU55, 205 RT721_SDCA_CTL_FU_MUTE, CH_01), 0x00); 206 regmap_write(rt721->regmap, 207 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_FU55, 208 RT721_SDCA_CTL_FU_MUTE, CH_02), 0x00); 209 } 210 211 static void rt721_sdca_jack_preset(struct rt721_sdca_priv *rt721) 212 { 213 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 214 RT721_MISC_POWER_CTL31, 0x8000); 215 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART, 216 RT721_VREF1_HV_CTRL1, 0xe000); 217 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 218 RT721_MISC_POWER_CTL31, 0x8007); 219 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 220 RT721_GE_REL_CTRL1, 0x8011); 221 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 222 RT721_UMP_HID_CTRL3, 0xcf00); 223 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 224 RT721_UMP_HID_CTRL4, 0x000f); 225 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 226 RT721_UMP_HID_CTRL1, 0x1100); 227 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 228 RT721_UMP_HID_CTRL5, 0x0c12); 229 rt_sdca_index_write(rt721->mbq_regmap, RT721_JD_CTRL, 230 RT721_JD_1PIN_GAT_CTRL2, 0xc002); 231 rt_sdca_index_write(rt721->mbq_regmap, RT721_RC_CALIB_CTRL, 232 RT721_RC_CALIB_CTRL0, 0x0b00); 233 rt_sdca_index_write(rt721->mbq_regmap, RT721_RC_CALIB_CTRL, 234 RT721_RC_CALIB_CTRL0, 0x0b40); 235 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 236 RT721_UAJ_TOP_TCON14, 0x3333); 237 regmap_write(rt721->mbq_regmap, 0x5810035, 0x0036); 238 regmap_write(rt721->mbq_regmap, 0x5810030, 0xee00); 239 rt_sdca_index_write(rt721->mbq_regmap, RT721_CAP_PORT_CTRL, 240 RT721_HP_AMP_2CH_CAL1, 0x0140); 241 regmap_write(rt721->mbq_regmap, 0x5810000, 0x0021); 242 regmap_write(rt721->mbq_regmap, 0x5810000, 0x8021); 243 rt_sdca_index_write(rt721->mbq_regmap, RT721_CAP_PORT_CTRL, 244 RT721_HP_AMP_2CH_CAL18, 0x5522); 245 regmap_write(rt721->mbq_regmap, 0x5b10007, 0x2000); 246 regmap_write(rt721->mbq_regmap, 0x5B10017, 0x1b0f); 247 rt_sdca_index_write(rt721->mbq_regmap, RT721_CBJ_CTRL, 248 RT721_CBJ_A0_GAT_CTRL1, 0x2a02); 249 rt_sdca_index_write(rt721->mbq_regmap, RT721_CAP_PORT_CTRL, 250 RT721_HP_AMP_2CH_CAL4, 0xa105); 251 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 252 RT721_UAJ_TOP_TCON14, 0x3b33); 253 regmap_write(rt721->mbq_regmap, 0x310400, 0x3023); 254 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 255 RT721_UAJ_TOP_TCON14, 0x3f33); 256 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 257 RT721_UAJ_TOP_TCON13, 0x6048); 258 regmap_write(rt721->mbq_regmap, 0x310401, 0x3000); 259 regmap_write(rt721->mbq_regmap, 0x310402, 0x1b00); 260 regmap_write(rt721->mbq_regmap, 0x310300, 0x000f); 261 regmap_write(rt721->mbq_regmap, 0x310301, 0x3000); 262 regmap_write(rt721->mbq_regmap, 0x310302, 0x1b00); 263 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL, 264 RT721_UAJ_TOP_TCON17, 0x0008); 265 rt_sdca_index_write(rt721->mbq_regmap, RT721_DAC_CTRL, 266 RT721_DAC_2CH_CTRL3, 0x55ff); 267 rt_sdca_index_write(rt721->mbq_regmap, RT721_DAC_CTRL, 268 RT721_DAC_2CH_CTRL4, 0xcc00); 269 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART, 270 RT721_MBIAS_LV_CTRL2, 0x6677); 271 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART, 272 RT721_VREF2_LV_CTRL1, 0x7600); 273 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 274 RT721_ENT_FLOAT_CTL2, 0x1234); 275 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 276 RT721_ENT_FLOAT_CTL3, 0x3512); 277 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 278 RT721_ENT_FLOAT_CTL1, 0x4040); 279 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 280 RT721_ENT_FLOAT_CTL4, 0x1201); 281 regmap_write(rt721->regmap, 0x2f58, 0x07); 282 } 283 284 static void rt721_sdca_jack_init(struct rt721_sdca_priv *rt721) 285 { 286 mutex_lock(&rt721->calibrate_mutex); 287 if (rt721->hs_jack) { 288 sdw_write_no_pm(rt721->slave, SDW_SCP_SDCA_INTMASK1, 289 SDW_SCP_SDCA_INTMASK_SDCA_0); 290 sdw_write_no_pm(rt721->slave, SDW_SCP_SDCA_INTMASK2, 291 SDW_SCP_SDCA_INTMASK_SDCA_8); 292 dev_dbg(&rt721->slave->dev, "in %s enable\n", __func__); 293 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 294 RT721_HDA_LEGACY_UAJ_CTL, 0x036E); 295 regmap_write(rt721->regmap, 296 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_XU03, 297 RT721_SDCA_CTL_SELECTED_MODE, 0), 0); 298 regmap_write(rt721->regmap, 299 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_XU0D, 300 RT721_SDCA_CTL_SELECTED_MODE, 0), 0); 301 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 302 RT721_XU_REL_CTRL, 0x0000); 303 rt_sdca_index_update_bits(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 304 RT721_GE_REL_CTRL1, 0x4000, 0x4000); 305 } 306 mutex_unlock(&rt721->calibrate_mutex); 307 } 308 309 static int rt721_sdca_set_jack_detect(struct snd_soc_component *component, 310 struct snd_soc_jack *hs_jack, void *data) 311 { 312 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 313 int ret; 314 315 rt721->hs_jack = hs_jack; 316 317 ret = pm_runtime_resume_and_get(component->dev); 318 if (ret < 0) { 319 if (ret != -EACCES) { 320 dev_err(component->dev, "%s: failed to resume %d\n", __func__, ret); 321 return ret; 322 } 323 /* pm_runtime not enabled yet */ 324 dev_dbg(component->dev, "%s: skipping jack init for now\n", __func__); 325 return 0; 326 } 327 328 rt721_sdca_jack_init(rt721); 329 330 pm_runtime_put_autosuspend(component->dev); 331 332 return 0; 333 } 334 335 /* For SDCA control DAC/ADC Gain */ 336 static int rt721_sdca_set_gain_put(struct snd_kcontrol *kcontrol, 337 struct snd_ctl_elem_value *ucontrol) 338 { 339 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 340 struct soc_mixer_control *mc = 341 (struct soc_mixer_control *)kcontrol->private_value; 342 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 343 unsigned int read_l, read_r, gain_l_val, gain_r_val; 344 unsigned int adc_vol_flag = 0, changed = 0; 345 unsigned int lvalue, rvalue; 346 const unsigned int interval_offset = 0xc0; 347 const unsigned int tendA = 0x200; 348 const unsigned int tendB = 0xa00; 349 350 if (strstr(ucontrol->id.name, "FU1E Capture Volume") || 351 strstr(ucontrol->id.name, "FU0F Capture Volume")) 352 adc_vol_flag = 1; 353 354 regmap_read(rt721->mbq_regmap, mc->reg, &lvalue); 355 regmap_read(rt721->mbq_regmap, mc->rreg, &rvalue); 356 357 /* L Channel */ 358 gain_l_val = ucontrol->value.integer.value[0]; 359 if (gain_l_val > mc->max) 360 gain_l_val = mc->max; 361 362 if (mc->shift == 8) { 363 /* boost gain */ 364 gain_l_val = gain_l_val * tendB; 365 } else if (mc->shift == 1) { 366 /* FU33 boost gain */ 367 if (gain_l_val == 0) 368 gain_l_val = 0x8000; 369 else 370 gain_l_val = (gain_l_val - 1) * tendA; 371 } else { 372 /* ADC/DAC gain */ 373 if (adc_vol_flag) 374 gain_l_val = 0x1e00 - ((mc->max - gain_l_val) * interval_offset); 375 else 376 gain_l_val = 0 - ((mc->max - gain_l_val) * interval_offset); 377 gain_l_val &= 0xffff; 378 } 379 380 /* R Channel */ 381 gain_r_val = ucontrol->value.integer.value[1]; 382 if (gain_r_val > mc->max) 383 gain_r_val = mc->max; 384 385 if (mc->shift == 8) { 386 /* boost gain */ 387 gain_r_val = gain_r_val * tendB; 388 } else if (mc->shift == 1) { 389 /* FU33 boost gain */ 390 if (gain_r_val == 0) 391 gain_r_val = 0x8000; 392 else 393 gain_r_val = (gain_r_val - 1) * tendA; 394 } else { 395 /* ADC/DAC gain */ 396 if (adc_vol_flag) 397 gain_r_val = 0x1e00 - ((mc->max - gain_r_val) * interval_offset); 398 else 399 gain_r_val = 0 - ((mc->max - gain_r_val) * interval_offset); 400 gain_r_val &= 0xffff; 401 } 402 403 if (lvalue != gain_l_val || rvalue != gain_r_val) 404 changed = 1; 405 else 406 return 0; 407 408 /* Lch*/ 409 regmap_write(rt721->mbq_regmap, mc->reg, gain_l_val); 410 411 /* Rch */ 412 regmap_write(rt721->mbq_regmap, mc->rreg, gain_r_val); 413 414 regmap_read(rt721->mbq_regmap, mc->reg, &read_l); 415 regmap_read(rt721->mbq_regmap, mc->rreg, &read_r); 416 if (read_r == gain_r_val && read_l == gain_l_val) 417 return changed; 418 419 return -EIO; 420 } 421 422 static int rt721_sdca_set_gain_get(struct snd_kcontrol *kcontrol, 423 struct snd_ctl_elem_value *ucontrol) 424 { 425 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 426 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 427 struct soc_mixer_control *mc = 428 (struct soc_mixer_control *)kcontrol->private_value; 429 unsigned int read_l, read_r, ctl_l = 0, ctl_r = 0; 430 unsigned int adc_vol_flag = 0; 431 const unsigned int interval_offset = 0xc0; 432 const unsigned int tendA = 0x200; 433 const unsigned int tendB = 0xa00; 434 435 if (strstr(ucontrol->id.name, "FU1E Capture Volume") || 436 strstr(ucontrol->id.name, "FU0F Capture Volume")) 437 adc_vol_flag = 1; 438 439 regmap_read(rt721->mbq_regmap, mc->reg, &read_l); 440 regmap_read(rt721->mbq_regmap, mc->rreg, &read_r); 441 442 if (mc->shift == 8) { 443 /* boost gain */ 444 ctl_l = read_l / tendB; 445 } else if (mc->shift == 1) { 446 /* FU33 boost gain */ 447 if (read_l == 0x8000 || read_l == 0xfe00) 448 ctl_l = 0; 449 else 450 ctl_l = read_l / tendA + 1; 451 } else { 452 if (adc_vol_flag) 453 ctl_l = mc->max - (((0x1e00 - read_l) & 0xffff) / interval_offset); 454 else 455 ctl_l = mc->max - (((0 - read_l) & 0xffff) / interval_offset); 456 } 457 458 if (read_l != read_r) { 459 if (mc->shift == 8) { 460 /* boost gain */ 461 ctl_r = read_r / tendB; 462 } else if (mc->shift == 1) { 463 /* FU33 boost gain */ 464 if (read_r == 0x8000 || read_r == 0xfe00) 465 ctl_r = 0; 466 else 467 ctl_r = read_r / tendA + 1; 468 } else { /* ADC/DAC gain */ 469 if (adc_vol_flag) 470 ctl_r = mc->max - (((0x1e00 - read_r) & 0xffff) / interval_offset); 471 else 472 ctl_r = mc->max - (((0 - read_r) & 0xffff) / interval_offset); 473 } 474 } else { 475 ctl_r = ctl_l; 476 } 477 478 ucontrol->value.integer.value[0] = ctl_l; 479 ucontrol->value.integer.value[1] = ctl_r; 480 481 return 0; 482 } 483 484 static int rt721_sdca_set_fu1e_capture_ctl(struct rt721_sdca_priv *rt721) 485 { 486 int err, i; 487 unsigned int ch_mute; 488 489 for (i = 0; i < ARRAY_SIZE(rt721->fu1e_mixer_mute); i++) { 490 ch_mute = rt721->fu1e_dapm_mute || rt721->fu1e_mixer_mute[i]; 491 err = regmap_write(rt721->regmap, 492 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, 493 RT721_SDCA_CTL_FU_MUTE, CH_01) + i, ch_mute); 494 if (err < 0) 495 return err; 496 } 497 498 return 0; 499 } 500 501 static int rt721_sdca_fu1e_capture_get(struct snd_kcontrol *kcontrol, 502 struct snd_ctl_elem_value *ucontrol) 503 { 504 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 505 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 506 struct rt721_sdca_dmic_kctrl_priv *p = 507 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value; 508 unsigned int i; 509 510 for (i = 0; i < p->count; i++) 511 ucontrol->value.integer.value[i] = !rt721->fu1e_mixer_mute[i]; 512 513 return 0; 514 } 515 516 static int rt721_sdca_fu1e_capture_put(struct snd_kcontrol *kcontrol, 517 struct snd_ctl_elem_value *ucontrol) 518 { 519 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 520 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 521 struct rt721_sdca_dmic_kctrl_priv *p = 522 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value; 523 int err, changed = 0, i; 524 525 for (i = 0; i < p->count; i++) { 526 if (rt721->fu1e_mixer_mute[i] != !ucontrol->value.integer.value[i]) 527 changed = 1; 528 rt721->fu1e_mixer_mute[i] = !ucontrol->value.integer.value[i]; 529 } 530 531 err = rt721_sdca_set_fu1e_capture_ctl(rt721); 532 if (err < 0) 533 return err; 534 535 return changed; 536 } 537 538 static int rt721_sdca_set_fu0f_capture_ctl(struct rt721_sdca_priv *rt721) 539 { 540 int err; 541 unsigned int ch_l, ch_r; 542 543 ch_l = (rt721->fu0f_dapm_mute || rt721->fu0f_mixer_l_mute) ? 0x01 : 0x00; 544 ch_r = (rt721->fu0f_dapm_mute || rt721->fu0f_mixer_r_mute) ? 0x01 : 0x00; 545 546 err = regmap_write(rt721->regmap, 547 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F, 548 RT721_SDCA_CTL_FU_MUTE, CH_L), ch_l); 549 if (err < 0) 550 return err; 551 552 err = regmap_write(rt721->regmap, 553 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F, 554 RT721_SDCA_CTL_FU_MUTE, CH_R), ch_r); 555 if (err < 0) 556 return err; 557 558 return 0; 559 } 560 561 static int rt721_sdca_fu0f_capture_get(struct snd_kcontrol *kcontrol, 562 struct snd_ctl_elem_value *ucontrol) 563 { 564 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 565 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 566 567 ucontrol->value.integer.value[0] = !rt721->fu0f_mixer_l_mute; 568 ucontrol->value.integer.value[1] = !rt721->fu0f_mixer_r_mute; 569 return 0; 570 } 571 572 static int rt721_sdca_fu0f_capture_put(struct snd_kcontrol *kcontrol, 573 struct snd_ctl_elem_value *ucontrol) 574 { 575 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 576 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 577 int err, changed = 0; 578 579 if (rt721->fu0f_mixer_l_mute != !ucontrol->value.integer.value[0] || 580 rt721->fu0f_mixer_r_mute != !ucontrol->value.integer.value[1]) 581 changed = 1; 582 583 rt721->fu0f_mixer_l_mute = !ucontrol->value.integer.value[0]; 584 rt721->fu0f_mixer_r_mute = !ucontrol->value.integer.value[1]; 585 err = rt721_sdca_set_fu0f_capture_ctl(rt721); 586 if (err < 0) 587 return err; 588 589 return changed; 590 } 591 592 static int rt721_sdca_fu_info(struct snd_kcontrol *kcontrol, 593 struct snd_ctl_elem_info *uinfo) 594 { 595 struct rt721_sdca_dmic_kctrl_priv *p = 596 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value; 597 598 if (p->max == 1) 599 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 600 else 601 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 602 uinfo->count = p->count; 603 uinfo->value.integer.min = 0; 604 uinfo->value.integer.max = p->max; 605 return 0; 606 } 607 608 static int rt721_sdca_dmic_set_gain_get(struct snd_kcontrol *kcontrol, 609 struct snd_ctl_elem_value *ucontrol) 610 { 611 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 612 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 613 struct rt721_sdca_dmic_kctrl_priv *p = 614 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value; 615 unsigned int boost_step = 0x0a00; 616 unsigned int vol_max = 0x1e00; 617 unsigned int regvalue, ctl, i; 618 unsigned int adc_vol_flag = 0; 619 const unsigned int interval_offset = 0xc0; 620 621 if (strstr(ucontrol->id.name, "FU1E Capture Volume")) 622 adc_vol_flag = 1; 623 624 /* check all channels */ 625 for (i = 0; i < p->count; i++) { 626 regmap_read(rt721->mbq_regmap, p->reg_base + i, ®value); 627 628 if (!adc_vol_flag) /* boost gain */ 629 ctl = regvalue / boost_step; 630 else /* ADC gain */ 631 ctl = p->max - (((vol_max - regvalue) & 0xffff) / interval_offset); 632 633 ucontrol->value.integer.value[i] = ctl; 634 } 635 636 return 0; 637 } 638 639 static int rt721_sdca_dmic_set_gain_put(struct snd_kcontrol *kcontrol, 640 struct snd_ctl_elem_value *ucontrol) 641 { 642 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 643 struct rt721_sdca_dmic_kctrl_priv *p = 644 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value; 645 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 646 unsigned int boost_step = 0x0a00; 647 unsigned int vol_max = 0x1e00; 648 unsigned int gain_val[4]; 649 unsigned int i, adc_vol_flag = 0, changed = 0; 650 unsigned int regvalue[4]; 651 const unsigned int interval_offset = 0xc0; 652 int err; 653 654 if (strstr(ucontrol->id.name, "FU1E Capture Volume")) 655 adc_vol_flag = 1; 656 657 /* check all channels */ 658 for (i = 0; i < p->count; i++) { 659 regmap_read(rt721->mbq_regmap, p->reg_base + i, ®value[i]); 660 661 gain_val[i] = ucontrol->value.integer.value[i]; 662 if (gain_val[i] > p->max) 663 gain_val[i] = p->max; 664 665 if (!adc_vol_flag) /* boost gain */ 666 gain_val[i] = gain_val[i] * boost_step; 667 else { /* ADC gain */ 668 gain_val[i] = vol_max - ((p->max - gain_val[i]) * interval_offset); 669 gain_val[i] &= 0xffff; 670 } 671 672 if (regvalue[i] != gain_val[i]) 673 changed = 1; 674 } 675 676 if (!changed) 677 return 0; 678 679 for (i = 0; i < p->count; i++) { 680 err = regmap_write(rt721->mbq_regmap, p->reg_base + i, gain_val[i]); 681 if (err < 0) 682 dev_err(&rt721->slave->dev, "%#08x can't be set\n", p->reg_base + i); 683 } 684 685 return changed; 686 } 687 688 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6525, 75, 0); 689 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -1725, 75, 0); 690 static const DECLARE_TLV_DB_SCALE(boost_vol_tlv, 0, 1000, 0); 691 static const DECLARE_TLV_DB_SCALE(mic2_boost_vol_tlv, -200, 200, 0); 692 693 static const struct snd_kcontrol_new rt721_sdca_controls[] = { 694 /* Headphone playback settings */ 695 SOC_DOUBLE_R_EXT_TLV("FU05 Playback Volume", 696 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, 697 RT721_SDCA_CTL_FU_VOLUME, CH_L), 698 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, 699 RT721_SDCA_CTL_FU_VOLUME, CH_R), 0, 0x57, 0, 700 rt721_sdca_set_gain_get, rt721_sdca_set_gain_put, out_vol_tlv), 701 /* Headset mic capture settings */ 702 SOC_DOUBLE_EXT("FU0F Capture Switch", SND_SOC_NOPM, 0, 1, 1, 0, 703 rt721_sdca_fu0f_capture_get, rt721_sdca_fu0f_capture_put), 704 SOC_DOUBLE_R_EXT_TLV("FU0F Capture Volume", 705 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F, 706 RT721_SDCA_CTL_FU_VOLUME, CH_L), 707 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F, 708 RT721_SDCA_CTL_FU_VOLUME, CH_R), 0, 0x3f, 0, 709 rt721_sdca_set_gain_get, rt721_sdca_set_gain_put, mic_vol_tlv), 710 SOC_DOUBLE_R_EXT_TLV("FU33 Boost Volume", 711 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PLATFORM_FU44, 712 RT721_SDCA_CTL_FU_CH_GAIN, CH_L), 713 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PLATFORM_FU44, 714 RT721_SDCA_CTL_FU_CH_GAIN, CH_R), 1, 0x15, 0, 715 rt721_sdca_set_gain_get, rt721_sdca_set_gain_put, mic2_boost_vol_tlv), 716 /* AMP playback settings */ 717 SOC_DOUBLE_R_EXT_TLV("FU06 Playback Volume", 718 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, 719 RT721_SDCA_CTL_FU_VOLUME, CH_L), 720 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, 721 RT721_SDCA_CTL_FU_VOLUME, CH_R), 0, 0x57, 0, 722 rt721_sdca_set_gain_get, rt721_sdca_set_gain_put, out_vol_tlv), 723 /* DMIC capture settings */ 724 RT_SDCA_FU_CTRL("FU1E Capture Switch", 725 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, 726 RT721_SDCA_CTL_FU_MUTE, CH_01), 1, 1, 4, rt721_sdca_fu_info, 727 rt721_sdca_fu1e_capture_get, rt721_sdca_fu1e_capture_put), 728 RT_SDCA_EXT_TLV("FU1E Capture Volume", 729 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, 730 RT721_SDCA_CTL_FU_VOLUME, CH_01), 731 rt721_sdca_dmic_set_gain_get, rt721_sdca_dmic_set_gain_put, 732 4, 0x3f, mic_vol_tlv, rt721_sdca_fu_info), 733 RT_SDCA_EXT_TLV("FU15 Boost Volume", 734 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_FU15, 735 RT721_SDCA_CTL_FU_CH_GAIN, CH_01), 736 rt721_sdca_dmic_set_gain_get, rt721_sdca_dmic_set_gain_put, 737 4, 3, boost_vol_tlv, rt721_sdca_fu_info), 738 }; 739 740 static int rt721_sdca_adc_mux_get(struct snd_kcontrol *kcontrol, 741 struct snd_ctl_elem_value *ucontrol) 742 { 743 struct snd_soc_component *component = 744 snd_soc_dapm_kcontrol_component(kcontrol); 745 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 746 unsigned int val = 0, mask_sft, mask; 747 748 if (strstr(ucontrol->id.name, "ADC 09 Mux")) { 749 mask_sft = 12; 750 mask = 0x7; 751 } else if (strstr(ucontrol->id.name, "ADC 08 R Mux")) { 752 mask_sft = 10; 753 mask = 0x3; 754 } else if (strstr(ucontrol->id.name, "ADC 08 L Mux")) { 755 mask_sft = 8; 756 mask = 0x3; 757 } else if (strstr(ucontrol->id.name, "ADC 10 R Mux")) { 758 mask_sft = 6; 759 mask = 0x3; 760 } else if (strstr(ucontrol->id.name, "ADC 10 L Mux")) { 761 mask_sft = 4; 762 mask = 0x3; 763 } else if (strstr(ucontrol->id.name, "ADC 07 R Mux")) { 764 mask_sft = 2; 765 mask = 0x3; 766 } else if (strstr(ucontrol->id.name, "ADC 07 L Mux")) { 767 mask_sft = 0; 768 mask = 0x3; 769 } else 770 return -EINVAL; 771 772 rt_sdca_index_read(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 773 RT721_HDA_LEGACY_MUX_CTL0, &val); 774 775 ucontrol->value.enumerated.item[0] = (val >> mask_sft) & mask; 776 777 return 0; 778 } 779 780 static int rt721_sdca_adc_mux_put(struct snd_kcontrol *kcontrol, 781 struct snd_ctl_elem_value *ucontrol) 782 { 783 struct snd_soc_component *component = 784 snd_soc_dapm_kcontrol_component(kcontrol); 785 struct snd_soc_dapm_context *dapm = 786 snd_soc_dapm_kcontrol_dapm(kcontrol); 787 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 788 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 789 unsigned int *item = ucontrol->value.enumerated.item; 790 unsigned int val, val2 = 0, change, mask_sft, mask; 791 unsigned int check; 792 793 if (item[0] >= e->items) 794 return -EINVAL; 795 796 if (strstr(ucontrol->id.name, "ADC 09 Mux")) { 797 mask_sft = 12; 798 mask = 0x7; 799 } else if (strstr(ucontrol->id.name, "ADC 08 R Mux")) { 800 mask_sft = 10; 801 mask = 0x3; 802 } else if (strstr(ucontrol->id.name, "ADC 08 L Mux")) { 803 mask_sft = 8; 804 mask = 0x3; 805 } else if (strstr(ucontrol->id.name, "ADC 10 R Mux")) { 806 mask_sft = 6; 807 mask = 0x3; 808 } else if (strstr(ucontrol->id.name, "ADC 10 L Mux")) { 809 mask_sft = 4; 810 mask = 0x3; 811 } else if (strstr(ucontrol->id.name, "ADC 07 R Mux")) { 812 mask_sft = 2; 813 mask = 0x3; 814 } else if (strstr(ucontrol->id.name, "ADC 07 L Mux")) { 815 mask_sft = 0; 816 mask = 0x3; 817 } else 818 return -EINVAL; 819 820 val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l; 821 rt_sdca_index_read(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 822 RT721_HDA_LEGACY_MUX_CTL0, &val2); 823 824 if (strstr(ucontrol->id.name, "ADC 09 Mux")) 825 val2 = (val2 >> mask_sft) & 0x7; 826 else 827 val2 = (val2 >> mask_sft) & 0x3; 828 829 if (val == val2) 830 change = 0; 831 else 832 change = 1; 833 834 if (change) { 835 rt_sdca_index_read(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 836 RT721_HDA_LEGACY_MUX_CTL0, &check); 837 rt_sdca_index_update_bits(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, 838 RT721_HDA_LEGACY_MUX_CTL0, mask << mask_sft, 839 val << mask_sft); 840 } 841 842 snd_soc_dapm_mux_update_power(dapm, kcontrol, 843 item[0], e, NULL); 844 845 return change; 846 } 847 848 static const char * const adc09_mux_text[] = { 849 "MIC2", 850 "LINE1", 851 "LINE2", 852 }; 853 static const char * const adc07_10_mux_text[] = { 854 "DMIC1 RE", 855 "DMIC1 FE", 856 "DMIC2 RE", 857 "DMIC2 FE", 858 }; 859 860 static SOC_ENUM_SINGLE_DECL( 861 rt721_adc09_enum, SND_SOC_NOPM, 0, adc09_mux_text); 862 static SOC_ENUM_SINGLE_DECL( 863 rt721_dmic_enum, SND_SOC_NOPM, 0, adc07_10_mux_text); 864 865 static const struct snd_kcontrol_new rt721_sdca_adc09_mux = 866 SOC_DAPM_ENUM_EXT("ADC 09 Mux", rt721_adc09_enum, 867 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 868 static const struct snd_kcontrol_new rt721_sdca_adc08_r_mux = 869 SOC_DAPM_ENUM_EXT("ADC 08 R Mux", rt721_dmic_enum, 870 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 871 static const struct snd_kcontrol_new rt721_sdca_adc08_l_mux = 872 SOC_DAPM_ENUM_EXT("ADC 08 L Mux", rt721_dmic_enum, 873 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 874 static const struct snd_kcontrol_new rt721_sdca_adc10_r_mux = 875 SOC_DAPM_ENUM_EXT("ADC 10 R Mux", rt721_dmic_enum, 876 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 877 static const struct snd_kcontrol_new rt721_sdca_adc10_l_mux = 878 SOC_DAPM_ENUM_EXT("ADC 10 L Mux", rt721_dmic_enum, 879 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 880 static const struct snd_kcontrol_new rt721_sdca_adc07_r_mux = 881 SOC_DAPM_ENUM_EXT("ADC 07 R Mux", rt721_dmic_enum, 882 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 883 static const struct snd_kcontrol_new rt721_sdca_adc07_l_mux = 884 SOC_DAPM_ENUM_EXT("ADC 07 L Mux", rt721_dmic_enum, 885 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put); 886 887 888 static int rt721_sdca_fu42_event(struct snd_soc_dapm_widget *w, 889 struct snd_kcontrol *kcontrol, int event) 890 { 891 struct snd_soc_component *component = 892 snd_soc_dapm_to_component(w->dapm); 893 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 894 unsigned char unmute = 0x0, mute = 0x1; 895 896 switch (event) { 897 case SND_SOC_DAPM_POST_PMU: 898 msleep(100); 899 regmap_write(rt721->regmap, 900 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, 901 RT721_SDCA_CTL_FU_MUTE, CH_L), unmute); 902 regmap_write(rt721->regmap, 903 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, 904 RT721_SDCA_CTL_FU_MUTE, CH_R), unmute); 905 break; 906 case SND_SOC_DAPM_PRE_PMD: 907 regmap_write(rt721->regmap, 908 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, 909 RT721_SDCA_CTL_FU_MUTE, CH_L), mute); 910 regmap_write(rt721->regmap, 911 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, 912 RT721_SDCA_CTL_FU_MUTE, CH_R), mute); 913 break; 914 } 915 return 0; 916 } 917 918 static int rt721_sdca_fu21_event(struct snd_soc_dapm_widget *w, 919 struct snd_kcontrol *kcontrol, int event) 920 { 921 struct snd_soc_component *component = 922 snd_soc_dapm_to_component(w->dapm); 923 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 924 unsigned char unmute = 0x0, mute = 0x1; 925 926 switch (event) { 927 case SND_SOC_DAPM_POST_PMU: 928 regmap_write(rt721->regmap, 929 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, 930 RT721_SDCA_CTL_FU_MUTE, CH_L), unmute); 931 regmap_write(rt721->regmap, 932 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, 933 RT721_SDCA_CTL_FU_MUTE, CH_R), unmute); 934 break; 935 case SND_SOC_DAPM_PRE_PMD: 936 regmap_write(rt721->regmap, 937 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, 938 RT721_SDCA_CTL_FU_MUTE, CH_L), mute); 939 regmap_write(rt721->regmap, 940 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, 941 RT721_SDCA_CTL_FU_MUTE, CH_R), mute); 942 break; 943 } 944 return 0; 945 } 946 947 static int rt721_sdca_fu23_event(struct snd_soc_dapm_widget *w, 948 struct snd_kcontrol *kcontrol, int event) 949 { 950 struct snd_soc_component *component = 951 snd_soc_dapm_to_component(w->dapm); 952 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 953 unsigned char unmute = 0x0, mute = 0x1; 954 955 switch (event) { 956 case SND_SOC_DAPM_POST_PMU: 957 regmap_write(rt721->regmap, 958 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, 959 RT721_SDCA_CTL_FU_MUTE, CH_L), unmute); 960 regmap_write(rt721->regmap, 961 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, 962 RT721_SDCA_CTL_FU_MUTE, CH_R), unmute); 963 break; 964 case SND_SOC_DAPM_PRE_PMD: 965 regmap_write(rt721->regmap, 966 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, 967 RT721_SDCA_CTL_FU_MUTE, CH_L), mute); 968 regmap_write(rt721->regmap, 969 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, 970 RT721_SDCA_CTL_FU_MUTE, CH_R), mute); 971 break; 972 } 973 return 0; 974 } 975 976 static int rt721_sdca_fu113_event(struct snd_soc_dapm_widget *w, 977 struct snd_kcontrol *kcontrol, int event) 978 { 979 struct snd_soc_component *component = 980 snd_soc_dapm_to_component(w->dapm); 981 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 982 983 switch (event) { 984 case SND_SOC_DAPM_POST_PMU: 985 rt721->fu1e_dapm_mute = false; 986 rt721_sdca_set_fu1e_capture_ctl(rt721); 987 break; 988 case SND_SOC_DAPM_PRE_PMD: 989 rt721->fu1e_dapm_mute = true; 990 rt721_sdca_set_fu1e_capture_ctl(rt721); 991 break; 992 } 993 return 0; 994 } 995 996 static int rt721_sdca_fu36_event(struct snd_soc_dapm_widget *w, 997 struct snd_kcontrol *kcontrol, int event) 998 { 999 struct snd_soc_component *component = 1000 snd_soc_dapm_to_component(w->dapm); 1001 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1002 1003 switch (event) { 1004 case SND_SOC_DAPM_POST_PMU: 1005 rt721->fu0f_dapm_mute = false; 1006 rt721_sdca_set_fu0f_capture_ctl(rt721); 1007 break; 1008 case SND_SOC_DAPM_PRE_PMD: 1009 rt721->fu0f_dapm_mute = true; 1010 rt721_sdca_set_fu0f_capture_ctl(rt721); 1011 break; 1012 } 1013 return 0; 1014 } 1015 1016 static int rt721_sdca_pde47_event(struct snd_soc_dapm_widget *w, 1017 struct snd_kcontrol *kcontrol, int event) 1018 { 1019 struct snd_soc_component *component = 1020 snd_soc_dapm_to_component(w->dapm); 1021 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1022 unsigned char ps0 = 0x0, ps3 = 0x3; 1023 1024 switch (event) { 1025 case SND_SOC_DAPM_POST_PMU: 1026 regmap_write(rt721->regmap, 1027 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE40, 1028 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps0); 1029 break; 1030 case SND_SOC_DAPM_PRE_PMD: 1031 regmap_write(rt721->regmap, 1032 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE40, 1033 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps3); 1034 break; 1035 } 1036 return 0; 1037 } 1038 1039 static int rt721_sdca_pde41_event(struct snd_soc_dapm_widget *w, 1040 struct snd_kcontrol *kcontrol, int event) 1041 { 1042 struct snd_soc_component *component = 1043 snd_soc_dapm_to_component(w->dapm); 1044 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1045 unsigned char ps0 = 0x0, ps3 = 0x3; 1046 1047 switch (event) { 1048 case SND_SOC_DAPM_POST_PMU: 1049 regmap_write(rt721->regmap, 1050 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE41, 1051 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps0); 1052 break; 1053 case SND_SOC_DAPM_PRE_PMD: 1054 regmap_write(rt721->regmap, 1055 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE41, 1056 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps3); 1057 break; 1058 } 1059 return 0; 1060 } 1061 1062 static int rt721_sdca_pde11_event(struct snd_soc_dapm_widget *w, 1063 struct snd_kcontrol *kcontrol, int event) 1064 { 1065 struct snd_soc_component *component = 1066 snd_soc_dapm_to_component(w->dapm); 1067 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1068 unsigned char ps0 = 0x0, ps3 = 0x3; 1069 1070 switch (event) { 1071 case SND_SOC_DAPM_POST_PMU: 1072 regmap_write(rt721->regmap, 1073 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_PDE2A, 1074 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps0); 1075 break; 1076 case SND_SOC_DAPM_PRE_PMD: 1077 regmap_write(rt721->regmap, 1078 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_PDE2A, 1079 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps3); 1080 break; 1081 } 1082 return 0; 1083 } 1084 1085 static int rt721_sdca_pde34_event(struct snd_soc_dapm_widget *w, 1086 struct snd_kcontrol *kcontrol, int event) 1087 { 1088 struct snd_soc_component *component = 1089 snd_soc_dapm_to_component(w->dapm); 1090 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1091 unsigned char ps0 = 0x0, ps3 = 0x3; 1092 1093 switch (event) { 1094 case SND_SOC_DAPM_POST_PMU: 1095 regmap_write(rt721->regmap, 1096 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE12, 1097 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps0); 1098 break; 1099 case SND_SOC_DAPM_PRE_PMD: 1100 regmap_write(rt721->regmap, 1101 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE12, 1102 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps3); 1103 break; 1104 } 1105 return 0; 1106 } 1107 1108 static const struct snd_soc_dapm_widget rt721_sdca_dapm_widgets[] = { 1109 SND_SOC_DAPM_OUTPUT("HP"), 1110 SND_SOC_DAPM_OUTPUT("SPK"), 1111 SND_SOC_DAPM_INPUT("MIC2"), 1112 SND_SOC_DAPM_INPUT("LINE1"), 1113 SND_SOC_DAPM_INPUT("LINE2"), 1114 SND_SOC_DAPM_INPUT("DMIC1_2"), 1115 SND_SOC_DAPM_INPUT("DMIC3_4"), 1116 1117 SND_SOC_DAPM_SUPPLY("PDE 41", SND_SOC_NOPM, 0, 0, 1118 rt721_sdca_pde41_event, 1119 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1120 SND_SOC_DAPM_SUPPLY("PDE 47", SND_SOC_NOPM, 0, 0, 1121 rt721_sdca_pde47_event, 1122 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1123 SND_SOC_DAPM_SUPPLY("PDE 11", SND_SOC_NOPM, 0, 0, 1124 rt721_sdca_pde11_event, 1125 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1126 SND_SOC_DAPM_SUPPLY("PDE 34", SND_SOC_NOPM, 0, 0, 1127 rt721_sdca_pde34_event, 1128 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1129 1130 SND_SOC_DAPM_DAC_E("FU 21", NULL, SND_SOC_NOPM, 0, 0, 1131 rt721_sdca_fu21_event, 1132 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1133 SND_SOC_DAPM_DAC_E("FU 23", NULL, SND_SOC_NOPM, 0, 0, 1134 rt721_sdca_fu23_event, 1135 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1136 SND_SOC_DAPM_DAC_E("FU 42", NULL, SND_SOC_NOPM, 0, 0, 1137 rt721_sdca_fu42_event, 1138 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1139 SND_SOC_DAPM_ADC_E("FU 36", NULL, SND_SOC_NOPM, 0, 0, 1140 rt721_sdca_fu36_event, 1141 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1142 SND_SOC_DAPM_ADC_E("FU 113", NULL, SND_SOC_NOPM, 0, 0, 1143 rt721_sdca_fu113_event, 1144 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1145 SND_SOC_DAPM_MUX("ADC 09 Mux", SND_SOC_NOPM, 0, 0, 1146 &rt721_sdca_adc09_mux), 1147 SND_SOC_DAPM_MUX("ADC 08 R Mux", SND_SOC_NOPM, 0, 0, 1148 &rt721_sdca_adc08_r_mux), 1149 SND_SOC_DAPM_MUX("ADC 08 L Mux", SND_SOC_NOPM, 0, 0, 1150 &rt721_sdca_adc08_l_mux), 1151 SND_SOC_DAPM_MUX("ADC 10 R Mux", SND_SOC_NOPM, 0, 0, 1152 &rt721_sdca_adc10_r_mux), 1153 SND_SOC_DAPM_MUX("ADC 10 L Mux", SND_SOC_NOPM, 0, 0, 1154 &rt721_sdca_adc10_l_mux), 1155 SND_SOC_DAPM_MUX("ADC 07 R Mux", SND_SOC_NOPM, 0, 0, 1156 &rt721_sdca_adc07_r_mux), 1157 SND_SOC_DAPM_MUX("ADC 07 L Mux", SND_SOC_NOPM, 0, 0, 1158 &rt721_sdca_adc07_l_mux), 1159 1160 SND_SOC_DAPM_AIF_IN("DP1RX", "DP1 Headphone Playback", 0, SND_SOC_NOPM, 0, 0), 1161 SND_SOC_DAPM_AIF_OUT("DP2TX", "DP2 Headset Capture", 0, SND_SOC_NOPM, 0, 0), 1162 SND_SOC_DAPM_AIF_IN("DP3RX", "DP3 Speaker Playback", 0, SND_SOC_NOPM, 0, 0), 1163 SND_SOC_DAPM_AIF_OUT("DP6TX", "DP6 DMic Capture", 0, SND_SOC_NOPM, 0, 0), 1164 }; 1165 1166 static const struct snd_soc_dapm_route rt721_sdca_audio_map[] = { 1167 {"FU 42", NULL, "DP1RX"}, 1168 {"FU 21", NULL, "DP3RX"}, 1169 {"FU 23", NULL, "DP3RX"}, 1170 1171 {"ADC 09 Mux", "MIC2", "MIC2"}, 1172 {"ADC 09 Mux", "LINE1", "LINE1"}, 1173 {"ADC 09 Mux", "LINE2", "LINE2"}, 1174 {"ADC 07 R Mux", "DMIC1 RE", "DMIC1_2"}, 1175 {"ADC 07 R Mux", "DMIC1 FE", "DMIC1_2"}, 1176 {"ADC 07 R Mux", "DMIC2 RE", "DMIC3_4"}, 1177 {"ADC 07 R Mux", "DMIC2 FE", "DMIC3_4"}, 1178 {"ADC 07 L Mux", "DMIC1 RE", "DMIC1_2"}, 1179 {"ADC 07 L Mux", "DMIC1 FE", "DMIC1_2"}, 1180 {"ADC 07 L Mux", "DMIC2 RE", "DMIC3_4"}, 1181 {"ADC 07 L Mux", "DMIC2 FE", "DMIC3_4"}, 1182 {"ADC 08 R Mux", "DMIC1 RE", "DMIC1_2"}, 1183 {"ADC 08 R Mux", "DMIC1 FE", "DMIC1_2"}, 1184 {"ADC 08 R Mux", "DMIC2 RE", "DMIC3_4"}, 1185 {"ADC 08 R Mux", "DMIC2 FE", "DMIC3_4"}, 1186 {"ADC 08 L Mux", "DMIC1 RE", "DMIC1_2"}, 1187 {"ADC 08 L Mux", "DMIC1 FE", "DMIC1_2"}, 1188 {"ADC 08 L Mux", "DMIC2 RE", "DMIC3_4"}, 1189 {"ADC 08 L Mux", "DMIC2 FE", "DMIC3_4"}, 1190 {"ADC 10 R Mux", "DMIC1 RE", "DMIC1_2"}, 1191 {"ADC 10 R Mux", "DMIC1 FE", "DMIC1_2"}, 1192 {"ADC 10 R Mux", "DMIC2 RE", "DMIC3_4"}, 1193 {"ADC 10 R Mux", "DMIC2 FE", "DMIC3_4"}, 1194 {"ADC 10 L Mux", "DMIC1 RE", "DMIC1_2"}, 1195 {"ADC 10 L Mux", "DMIC1 FE", "DMIC1_2"}, 1196 {"ADC 10 L Mux", "DMIC2 RE", "DMIC3_4"}, 1197 {"ADC 10 L Mux", "DMIC2 FE", "DMIC3_4"}, 1198 {"FU 36", NULL, "PDE 34"}, 1199 {"FU 36", NULL, "ADC 09 Mux"}, 1200 {"FU 113", NULL, "PDE 11"}, 1201 {"FU 113", NULL, "ADC 07 R Mux"}, 1202 {"FU 113", NULL, "ADC 07 L Mux"}, 1203 {"FU 113", NULL, "ADC 10 R Mux"}, 1204 {"FU 113", NULL, "ADC 10 L Mux"}, 1205 {"DP2TX", NULL, "FU 36"}, 1206 {"DP6TX", NULL, "FU 113"}, 1207 1208 {"HP", NULL, "PDE 47"}, 1209 {"HP", NULL, "FU 42"}, 1210 {"SPK", NULL, "PDE 41"}, 1211 {"SPK", NULL, "FU 21"}, 1212 {"SPK", NULL, "FU 23"}, 1213 }; 1214 1215 static int rt721_sdca_parse_dt(struct rt721_sdca_priv *rt721, struct device *dev) 1216 { 1217 device_property_read_u32(dev, "realtek,jd-src", &rt721->jd_src); 1218 1219 return 0; 1220 } 1221 1222 static int rt721_sdca_probe(struct snd_soc_component *component) 1223 { 1224 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1225 int ret; 1226 1227 rt721_sdca_parse_dt(rt721, &rt721->slave->dev); 1228 rt721->component = component; 1229 1230 ret = pm_runtime_resume(component->dev); 1231 if (ret < 0 && ret != -EACCES) 1232 return ret; 1233 1234 return 0; 1235 } 1236 1237 static const struct snd_soc_component_driver soc_sdca_dev_rt721 = { 1238 .probe = rt721_sdca_probe, 1239 .controls = rt721_sdca_controls, 1240 .num_controls = ARRAY_SIZE(rt721_sdca_controls), 1241 .dapm_widgets = rt721_sdca_dapm_widgets, 1242 .num_dapm_widgets = ARRAY_SIZE(rt721_sdca_dapm_widgets), 1243 .dapm_routes = rt721_sdca_audio_map, 1244 .num_dapm_routes = ARRAY_SIZE(rt721_sdca_audio_map), 1245 .set_jack = rt721_sdca_set_jack_detect, 1246 .endianness = 1, 1247 }; 1248 1249 static int rt721_sdca_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream, 1250 int direction) 1251 { 1252 snd_soc_dai_dma_data_set(dai, direction, sdw_stream); 1253 1254 return 0; 1255 } 1256 1257 static void rt721_sdca_shutdown(struct snd_pcm_substream *substream, 1258 struct snd_soc_dai *dai) 1259 { 1260 snd_soc_dai_set_dma_data(dai, substream, NULL); 1261 } 1262 1263 static int rt721_sdca_pcm_hw_params(struct snd_pcm_substream *substream, 1264 struct snd_pcm_hw_params *params, 1265 struct snd_soc_dai *dai) 1266 { 1267 struct snd_soc_component *component = dai->component; 1268 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1269 struct sdw_stream_config stream_config; 1270 struct sdw_port_config port_config; 1271 enum sdw_data_direction direction; 1272 struct sdw_stream_runtime *sdw_stream; 1273 int retval, port, num_channels; 1274 unsigned int sampling_rate; 1275 1276 dev_dbg(dai->dev, "%s %s", __func__, dai->name); 1277 sdw_stream = snd_soc_dai_get_dma_data(dai, substream); 1278 1279 if (!sdw_stream) 1280 return -EINVAL; 1281 1282 if (!rt721->slave) 1283 return -EINVAL; 1284 1285 /* 1286 * RT721_AIF1 with port = 1 for headphone playback 1287 * RT721_AIF1 with port = 2 for headset-mic capture 1288 * RT721_AIF2 with port = 3 for speaker playback 1289 * RT721_AIF3 with port = 6 for digital-mic capture 1290 */ 1291 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 1292 direction = SDW_DATA_DIR_RX; 1293 if (dai->id == RT721_AIF1) 1294 port = 1; 1295 else if (dai->id == RT721_AIF2) 1296 port = 3; 1297 else 1298 return -EINVAL; 1299 } else { 1300 direction = SDW_DATA_DIR_TX; 1301 if (dai->id == RT721_AIF1) 1302 port = 2; 1303 else if (dai->id == RT721_AIF3) 1304 port = 6; 1305 else 1306 return -EINVAL; 1307 } 1308 stream_config.frame_rate = params_rate(params); 1309 stream_config.ch_count = params_channels(params); 1310 stream_config.bps = snd_pcm_format_width(params_format(params)); 1311 stream_config.direction = direction; 1312 1313 num_channels = params_channels(params); 1314 port_config.ch_mask = GENMASK(num_channels - 1, 0); 1315 port_config.num = port; 1316 1317 retval = sdw_stream_add_slave(rt721->slave, &stream_config, 1318 &port_config, 1, sdw_stream); 1319 if (retval) { 1320 dev_err(dai->dev, "Unable to configure port\n"); 1321 return retval; 1322 } 1323 1324 if (params_channels(params) > 16) { 1325 dev_err(component->dev, "Unsupported channels %d\n", 1326 params_channels(params)); 1327 return -EINVAL; 1328 } 1329 1330 /* sampling rate configuration */ 1331 switch (params_rate(params)) { 1332 case 8000: 1333 sampling_rate = RT721_SDCA_RATE_8000HZ; 1334 break; 1335 case 16000: 1336 sampling_rate = RT721_SDCA_RATE_16000HZ; 1337 break; 1338 case 24000: 1339 sampling_rate = RT721_SDCA_RATE_24000HZ; 1340 break; 1341 case 32000: 1342 sampling_rate = RT721_SDCA_RATE_32000HZ; 1343 break; 1344 case 44100: 1345 sampling_rate = RT721_SDCA_RATE_44100HZ; 1346 break; 1347 case 48000: 1348 sampling_rate = RT721_SDCA_RATE_48000HZ; 1349 break; 1350 case 96000: 1351 sampling_rate = RT721_SDCA_RATE_96000HZ; 1352 break; 1353 case 192000: 1354 sampling_rate = RT721_SDCA_RATE_192000HZ; 1355 break; 1356 case 384000: 1357 sampling_rate = RT721_SDCA_RATE_384000HZ; 1358 break; 1359 case 768000: 1360 sampling_rate = RT721_SDCA_RATE_768000HZ; 1361 break; 1362 default: 1363 dev_err(component->dev, "Rate %d is not supported\n", 1364 params_rate(params)); 1365 return -EINVAL; 1366 } 1367 1368 /* set sampling frequency */ 1369 if (dai->id == RT721_AIF1) { 1370 regmap_write(rt721->regmap, 1371 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_CS01, 1372 RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate); 1373 regmap_write(rt721->regmap, 1374 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_CS11, 1375 RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate); 1376 } 1377 1378 if (dai->id == RT721_AIF2) 1379 regmap_write(rt721->regmap, 1380 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_CS31, 1381 RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate); 1382 1383 if (dai->id == RT721_AIF3) 1384 regmap_write(rt721->regmap, 1385 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_CS1F, 1386 RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate); 1387 1388 return 0; 1389 } 1390 1391 static int rt721_sdca_pcm_hw_free(struct snd_pcm_substream *substream, 1392 struct snd_soc_dai *dai) 1393 { 1394 struct snd_soc_component *component = dai->component; 1395 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component); 1396 struct sdw_stream_runtime *sdw_stream = 1397 snd_soc_dai_get_dma_data(dai, substream); 1398 1399 if (!rt721->slave) 1400 return -EINVAL; 1401 1402 sdw_stream_remove_slave(rt721->slave, sdw_stream); 1403 return 0; 1404 } 1405 1406 #define RT721_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | \ 1407 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000) 1408 #define RT721_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ 1409 SNDRV_PCM_FMTBIT_S24_LE) 1410 1411 static const struct snd_soc_dai_ops rt721_sdca_ops = { 1412 .hw_params = rt721_sdca_pcm_hw_params, 1413 .hw_free = rt721_sdca_pcm_hw_free, 1414 .set_stream = rt721_sdca_set_sdw_stream, 1415 .shutdown = rt721_sdca_shutdown, 1416 }; 1417 1418 static struct snd_soc_dai_driver rt721_sdca_dai[] = { 1419 { 1420 .name = "rt721-sdca-aif1", 1421 .id = RT721_AIF1, 1422 .playback = { 1423 .stream_name = "DP1 Headphone Playback", 1424 .channels_min = 1, 1425 .channels_max = 2, 1426 .rates = RT721_STEREO_RATES, 1427 .formats = RT721_FORMATS, 1428 }, 1429 .capture = { 1430 .stream_name = "DP2 Headset Capture", 1431 .channels_min = 1, 1432 .channels_max = 2, 1433 .rates = RT721_STEREO_RATES, 1434 .formats = RT721_FORMATS, 1435 }, 1436 .ops = &rt721_sdca_ops, 1437 }, 1438 { 1439 .name = "rt721-sdca-aif2", 1440 .id = RT721_AIF2, 1441 .playback = { 1442 .stream_name = "DP3 Speaker Playback", 1443 .channels_min = 1, 1444 .channels_max = 2, 1445 .rates = RT721_STEREO_RATES, 1446 .formats = RT721_FORMATS, 1447 }, 1448 .ops = &rt721_sdca_ops, 1449 }, 1450 { 1451 .name = "rt721-sdca-aif3", 1452 .id = RT721_AIF3, 1453 .capture = { 1454 .stream_name = "DP6 DMic Capture", 1455 .channels_min = 1, 1456 .channels_max = 4, 1457 .rates = RT721_STEREO_RATES, 1458 .formats = RT721_FORMATS, 1459 }, 1460 .ops = &rt721_sdca_ops, 1461 } 1462 }; 1463 1464 int rt721_sdca_init(struct device *dev, struct regmap *regmap, 1465 struct regmap *mbq_regmap, struct sdw_slave *slave) 1466 { 1467 struct rt721_sdca_priv *rt721; 1468 1469 rt721 = devm_kzalloc(dev, sizeof(*rt721), GFP_KERNEL); 1470 if (!rt721) 1471 return -ENOMEM; 1472 1473 dev_set_drvdata(dev, rt721); 1474 rt721->slave = slave; 1475 rt721->regmap = regmap; 1476 rt721->mbq_regmap = mbq_regmap; 1477 1478 regcache_cache_only(rt721->regmap, true); 1479 regcache_cache_only(rt721->mbq_regmap, true); 1480 1481 mutex_init(&rt721->calibrate_mutex); 1482 mutex_init(&rt721->disable_irq_lock); 1483 1484 INIT_DELAYED_WORK(&rt721->jack_detect_work, rt721_sdca_jack_detect_handler); 1485 INIT_DELAYED_WORK(&rt721->jack_btn_check_work, rt721_sdca_btn_check_handler); 1486 1487 /* 1488 * Mark hw_init to false 1489 * HW init will be performed when device reports present 1490 */ 1491 rt721->hw_init = false; 1492 rt721->first_hw_init = false; 1493 rt721->fu1e_dapm_mute = true; 1494 rt721->fu0f_dapm_mute = true; 1495 rt721->fu0f_mixer_l_mute = rt721->fu0f_mixer_r_mute = true; 1496 rt721->fu1e_mixer_mute[0] = rt721->fu1e_mixer_mute[1] = 1497 rt721->fu1e_mixer_mute[2] = rt721->fu1e_mixer_mute[3] = true; 1498 1499 return devm_snd_soc_register_component(dev, 1500 &soc_sdca_dev_rt721, rt721_sdca_dai, ARRAY_SIZE(rt721_sdca_dai)); 1501 } 1502 1503 int rt721_sdca_io_init(struct device *dev, struct sdw_slave *slave) 1504 { 1505 struct rt721_sdca_priv *rt721 = dev_get_drvdata(dev); 1506 1507 rt721->disable_irq = false; 1508 1509 if (rt721->hw_init) 1510 return 0; 1511 1512 regcache_cache_only(rt721->regmap, false); 1513 regcache_cache_only(rt721->mbq_regmap, false); 1514 if (rt721->first_hw_init) { 1515 regcache_cache_bypass(rt721->regmap, true); 1516 regcache_cache_bypass(rt721->mbq_regmap, true); 1517 } else { 1518 /* 1519 * PM runtime is only enabled when a Slave reports as Attached 1520 */ 1521 1522 /* set autosuspend parameters */ 1523 pm_runtime_set_autosuspend_delay(&slave->dev, 3000); 1524 pm_runtime_use_autosuspend(&slave->dev); 1525 1526 /* update count of parent 'active' children */ 1527 pm_runtime_set_active(&slave->dev); 1528 1529 /* make sure the device does not suspend immediately */ 1530 pm_runtime_mark_last_busy(&slave->dev); 1531 1532 pm_runtime_enable(&slave->dev); 1533 } 1534 1535 pm_runtime_get_noresume(&slave->dev); 1536 rt721_sdca_dmic_preset(rt721); 1537 rt721_sdca_amp_preset(rt721); 1538 rt721_sdca_jack_preset(rt721); 1539 if (rt721->first_hw_init) { 1540 regcache_cache_bypass(rt721->regmap, false); 1541 regcache_mark_dirty(rt721->regmap); 1542 regcache_cache_bypass(rt721->mbq_regmap, false); 1543 regcache_mark_dirty(rt721->mbq_regmap); 1544 } else 1545 rt721->first_hw_init = true; 1546 1547 /* Mark Slave initialization complete */ 1548 rt721->hw_init = true; 1549 1550 pm_runtime_put_autosuspend(&slave->dev); 1551 1552 dev_dbg(&slave->dev, "%s hw_init complete\n", __func__); 1553 return 0; 1554 } 1555 1556 MODULE_DESCRIPTION("ASoC RT721 SDCA SDW driver"); 1557 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>"); 1558 MODULE_LICENSE("GPL"); 1559