1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * rt715-sdca.h -- RT715 ALSA SoC audio driver header 4 * 5 * Copyright(c) 2020 Realtek Semiconductor Corp. 6 */ 7 8 #ifndef __RT715_SDCA_H__ 9 #define __RT715_SDCA_H__ 10 11 #include <linux/regmap.h> 12 #include <linux/soundwire/sdw.h> 13 #include <linux/soundwire/sdw_type.h> 14 #include <sound/soc.h> 15 #include <linux/workqueue.h> 16 #include <linux/device.h> 17 18 struct rt715_sdca_priv { 19 struct regmap *regmap; 20 struct regmap *mbq_regmap; 21 struct snd_soc_codec *codec; 22 struct sdw_slave *slave; 23 struct delayed_work adc_mute_work; 24 int dbg_nid; 25 int dbg_vid; 26 int dbg_payload; 27 enum sdw_slave_status status; 28 struct sdw_bus_params params; 29 bool hw_init; 30 bool first_hw_init; 31 int l_is_unmute; 32 int r_is_unmute; 33 int hw_sdw_ver; 34 int kctl_switch_orig[4]; 35 int kctl_2ch_orig[2]; 36 int kctl_4ch_orig[4]; 37 int kctl_8ch_orig[8]; 38 }; 39 40 struct rt715_sdca_kcontrol_private { 41 unsigned int reg_base; 42 unsigned int count; 43 unsigned int max; 44 unsigned int shift; 45 unsigned int invert; 46 }; 47 48 /* MIPI Register */ 49 #define RT715_INT_CTRL 0x005a 50 #define RT715_INT_MASK 0x005e 51 52 /* NID */ 53 #define RT715_AUDIO_FUNCTION_GROUP 0x01 54 #define RT715_MIC_ADC 0x07 55 #define RT715_LINE_ADC 0x08 56 #define RT715_MIX_ADC 0x09 57 #define RT715_DMIC1 0x12 58 #define RT715_DMIC2 0x13 59 #define RT715_MIC1 0x18 60 #define RT715_MIC2 0x19 61 #define RT715_LINE1 0x1a 62 #define RT715_LINE2 0x1b 63 #define RT715_DMIC3 0x1d 64 #define RT715_DMIC4 0x29 65 #define RT715_VENDOR_REG 0x20 66 #define RT715_MUX_IN1 0x22 67 #define RT715_MUX_IN2 0x23 68 #define RT715_MUX_IN3 0x24 69 #define RT715_MUX_IN4 0x25 70 #define RT715_MIX_ADC2 0x27 71 #define RT715_INLINE_CMD 0x55 72 #define RT715_VENDOR_HDA_CTL 0x61 73 74 /* Index (NID:20h) */ 75 #define RT715_PRODUCT_NUM 0x0 76 #define RT715_IRQ_CTRL 0x2b 77 #define RT715_AD_FUNC_EN 0x36 78 #define RT715_REV_1 0x37 79 #define RT715_SDW_INPUT_SEL 0x39 80 #define RT715_DFLL_VAD 0x44 81 #define RT715_EXT_DMIC_CLK_CTRL2 0x54 82 83 /* Index (NID:61h) */ 84 #define RT715_HDA_LEGACY_MUX_CTL1 0x00 85 86 /* SDCA (Function) */ 87 #define FUN_JACK_CODEC 0x01 88 #define FUN_MIC_ARRAY 0x02 89 #define FUN_HID 0x03 90 /* SDCA (Entity) */ 91 #define RT715_SDCA_ST_EN 0x00 92 #define RT715_SDCA_CS_FREQ_IND_EN 0x01 93 #define RT715_SDCA_FU_ADC8_9_VOL 0x02 94 #define RT715_SDCA_SMPU_TRIG_ST_EN 0x05 95 #define RT715_SDCA_FU_ADC10_11_VOL 0x06 96 #define RT715_SDCA_FU_ADC7_27_VOL 0x0a 97 #define RT715_SDCA_FU_AMIC_GAIN_EN 0x0c 98 #define RT715_SDCA_FU_DMIC_GAIN_EN 0x0e 99 #define RT715_SDCA_CX_CLK_SEL_EN 0x10 100 #define RT715_SDCA_CREQ_POW_EN 0x18 101 /* SDCA (Control) */ 102 #define RT715_SDCA_ST_CTRL 0x00 103 #define RT715_SDCA_CX_CLK_SEL_CTRL 0x01 104 #define RT715_SDCA_REQ_POW_CTRL 0x01 105 #define RT715_SDCA_FU_MUTE_CTRL 0x01 106 #define RT715_SDCA_FU_VOL_CTRL 0x02 107 #define RT715_SDCA_FU_DMIC_GAIN_CTRL 0x0b 108 #define RT715_SDCA_FREQ_IND_CTRL 0x10 109 #define RT715_SDCA_SMPU_TRIG_EN_CTRL 0x10 110 #define RT715_SDCA_SMPU_TRIG_ST_CTRL 0x11 111 /* SDCA (Channel) */ 112 #define CH_00 0x00 113 #define CH_01 0x01 114 #define CH_02 0x02 115 #define CH_03 0x03 116 #define CH_04 0x04 117 #define CH_05 0x05 118 #define CH_06 0x06 119 #define CH_07 0x07 120 #define CH_08 0x08 121 122 #define RT715_SDCA_DB_STEP 375 123 124 enum { 125 RT715_AIF1, 126 RT715_AIF2, 127 }; 128 129 int rt715_sdca_io_init(struct device *dev, struct sdw_slave *slave); 130 int rt715_sdca_init(struct device *dev, struct regmap *mbq_regmap, 131 struct regmap *regmap, struct sdw_slave *slave); 132 133 #endif /* __RT715_SDCA_H__ */ 134