1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // rt5682-sdw.c -- RT5682 ALSA SoC audio component driver 4 // 5 // Copyright 2019 Realtek Semiconductor Corp. 6 // Author: Oder Chiou <oder_chiou@realtek.com> 7 // 8 9 #include <linux/module.h> 10 #include <linux/moduleparam.h> 11 #include <linux/init.h> 12 #include <linux/delay.h> 13 #include <linux/pm.h> 14 #include <linux/acpi.h> 15 #include <linux/gpio.h> 16 #include <linux/of_gpio.h> 17 #include <linux/pm_runtime.h> 18 #include <linux/regulator/consumer.h> 19 #include <linux/mutex.h> 20 #include <linux/soundwire/sdw.h> 21 #include <linux/soundwire/sdw_type.h> 22 #include <linux/soundwire/sdw_registers.h> 23 #include <sound/core.h> 24 #include <sound/pcm.h> 25 #include <sound/pcm_params.h> 26 #include <sound/jack.h> 27 #include <sound/sdw.h> 28 #include <sound/soc.h> 29 #include <sound/soc-dapm.h> 30 #include <sound/initval.h> 31 #include <sound/tlv.h> 32 33 #include "rt5682.h" 34 35 #define RT5682_SDW_ADDR_L 0x3000 36 #define RT5682_SDW_ADDR_H 0x3001 37 #define RT5682_SDW_DATA_L 0x3004 38 #define RT5682_SDW_DATA_H 0x3005 39 #define RT5682_SDW_CMD 0x3008 40 41 static int rt5682_sdw_read(void *context, unsigned int reg, unsigned int *val) 42 { 43 struct device *dev = context; 44 struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 45 unsigned int data_l, data_h; 46 47 regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 0); 48 regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff); 49 regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff)); 50 regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_H, &data_h); 51 regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_L, &data_l); 52 53 *val = (data_h << 8) | data_l; 54 55 dev_vdbg(dev, "[%s] %04x => %04x\n", __func__, reg, *val); 56 57 return 0; 58 } 59 60 static int rt5682_sdw_write(void *context, unsigned int reg, unsigned int val) 61 { 62 struct device *dev = context; 63 struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 64 65 regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 1); 66 regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff); 67 regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff)); 68 regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_H, (val >> 8) & 0xff); 69 regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_L, (val & 0xff)); 70 71 dev_vdbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val); 72 73 return 0; 74 } 75 76 static const struct regmap_config rt5682_sdw_indirect_regmap = { 77 .reg_bits = 16, 78 .val_bits = 16, 79 .max_register = RT5682_I2C_MODE, 80 .volatile_reg = rt5682_volatile_register, 81 .readable_reg = rt5682_readable_register, 82 .cache_type = REGCACHE_RBTREE, 83 .reg_defaults = rt5682_reg, 84 .num_reg_defaults = RT5682_REG_NUM, 85 .use_single_read = true, 86 .use_single_write = true, 87 .reg_read = rt5682_sdw_read, 88 .reg_write = rt5682_sdw_write, 89 }; 90 91 struct sdw_stream_data { 92 struct sdw_stream_runtime *sdw_stream; 93 }; 94 95 static int rt5682_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream, 96 int direction) 97 { 98 struct sdw_stream_data *stream; 99 100 if (!sdw_stream) 101 return 0; 102 103 stream = kzalloc(sizeof(*stream), GFP_KERNEL); 104 if (!stream) 105 return -ENOMEM; 106 107 stream->sdw_stream = sdw_stream; 108 109 /* Use tx_mask or rx_mask to configure stream tag and set dma_data */ 110 if (direction == SNDRV_PCM_STREAM_PLAYBACK) 111 dai->playback_dma_data = stream; 112 else 113 dai->capture_dma_data = stream; 114 115 return 0; 116 } 117 118 static void rt5682_sdw_shutdown(struct snd_pcm_substream *substream, 119 struct snd_soc_dai *dai) 120 { 121 struct sdw_stream_data *stream; 122 123 stream = snd_soc_dai_get_dma_data(dai, substream); 124 snd_soc_dai_set_dma_data(dai, substream, NULL); 125 kfree(stream); 126 } 127 128 static int rt5682_sdw_hw_params(struct snd_pcm_substream *substream, 129 struct snd_pcm_hw_params *params, 130 struct snd_soc_dai *dai) 131 { 132 struct snd_soc_component *component = dai->component; 133 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component); 134 struct sdw_stream_config stream_config = {0}; 135 struct sdw_port_config port_config = {0}; 136 struct sdw_stream_data *stream; 137 int retval; 138 unsigned int val_p = 0, val_c = 0, osr_p = 0, osr_c = 0; 139 140 dev_dbg(dai->dev, "%s %s", __func__, dai->name); 141 142 stream = snd_soc_dai_get_dma_data(dai, substream); 143 if (!stream) 144 return -ENOMEM; 145 146 if (!rt5682->slave) 147 return -EINVAL; 148 149 /* SoundWire specific configuration */ 150 snd_sdw_params_to_config(substream, params, &stream_config, &port_config); 151 152 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 153 port_config.num = 1; 154 else 155 port_config.num = 2; 156 157 retval = sdw_stream_add_slave(rt5682->slave, &stream_config, 158 &port_config, 1, stream->sdw_stream); 159 if (retval) { 160 dev_err(dai->dev, "Unable to configure port\n"); 161 return retval; 162 } 163 164 switch (params_rate(params)) { 165 case 48000: 166 val_p = RT5682_SDW_REF_1_48K; 167 val_c = RT5682_SDW_REF_2_48K; 168 break; 169 case 96000: 170 val_p = RT5682_SDW_REF_1_96K; 171 val_c = RT5682_SDW_REF_2_96K; 172 break; 173 case 192000: 174 val_p = RT5682_SDW_REF_1_192K; 175 val_c = RT5682_SDW_REF_2_192K; 176 break; 177 case 32000: 178 val_p = RT5682_SDW_REF_1_32K; 179 val_c = RT5682_SDW_REF_2_32K; 180 break; 181 case 24000: 182 val_p = RT5682_SDW_REF_1_24K; 183 val_c = RT5682_SDW_REF_2_24K; 184 break; 185 case 16000: 186 val_p = RT5682_SDW_REF_1_16K; 187 val_c = RT5682_SDW_REF_2_16K; 188 break; 189 case 12000: 190 val_p = RT5682_SDW_REF_1_12K; 191 val_c = RT5682_SDW_REF_2_12K; 192 break; 193 case 8000: 194 val_p = RT5682_SDW_REF_1_8K; 195 val_c = RT5682_SDW_REF_2_8K; 196 break; 197 case 44100: 198 val_p = RT5682_SDW_REF_1_44K; 199 val_c = RT5682_SDW_REF_2_44K; 200 break; 201 case 88200: 202 val_p = RT5682_SDW_REF_1_88K; 203 val_c = RT5682_SDW_REF_2_88K; 204 break; 205 case 176400: 206 val_p = RT5682_SDW_REF_1_176K; 207 val_c = RT5682_SDW_REF_2_176K; 208 break; 209 case 22050: 210 val_p = RT5682_SDW_REF_1_22K; 211 val_c = RT5682_SDW_REF_2_22K; 212 break; 213 case 11025: 214 val_p = RT5682_SDW_REF_1_11K; 215 val_c = RT5682_SDW_REF_2_11K; 216 break; 217 default: 218 return -EINVAL; 219 } 220 221 if (params_rate(params) <= 48000) { 222 osr_p = RT5682_DAC_OSR_D_8; 223 osr_c = RT5682_ADC_OSR_D_8; 224 } else if (params_rate(params) <= 96000) { 225 osr_p = RT5682_DAC_OSR_D_4; 226 osr_c = RT5682_ADC_OSR_D_4; 227 } else { 228 osr_p = RT5682_DAC_OSR_D_2; 229 osr_c = RT5682_ADC_OSR_D_2; 230 } 231 232 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 233 regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK, 234 RT5682_SDW_REF_1_MASK, val_p); 235 regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1, 236 RT5682_DAC_OSR_MASK, osr_p); 237 } else { 238 regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK, 239 RT5682_SDW_REF_2_MASK, val_c); 240 regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1, 241 RT5682_ADC_OSR_MASK, osr_c); 242 } 243 244 return retval; 245 } 246 247 static int rt5682_sdw_hw_free(struct snd_pcm_substream *substream, 248 struct snd_soc_dai *dai) 249 { 250 struct snd_soc_component *component = dai->component; 251 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component); 252 struct sdw_stream_data *stream = 253 snd_soc_dai_get_dma_data(dai, substream); 254 255 if (!rt5682->slave) 256 return -EINVAL; 257 258 sdw_stream_remove_slave(rt5682->slave, stream->sdw_stream); 259 return 0; 260 } 261 262 static const struct snd_soc_dai_ops rt5682_sdw_ops = { 263 .hw_params = rt5682_sdw_hw_params, 264 .hw_free = rt5682_sdw_hw_free, 265 .set_stream = rt5682_set_sdw_stream, 266 .shutdown = rt5682_sdw_shutdown, 267 }; 268 269 static struct snd_soc_dai_driver rt5682_dai[] = { 270 { 271 .name = "rt5682-aif1", 272 .id = RT5682_AIF1, 273 .playback = { 274 .stream_name = "AIF1 Playback", 275 .channels_min = 1, 276 .channels_max = 2, 277 .rates = RT5682_STEREO_RATES, 278 .formats = RT5682_FORMATS, 279 }, 280 .capture = { 281 .stream_name = "AIF1 Capture", 282 .channels_min = 1, 283 .channels_max = 2, 284 .rates = RT5682_STEREO_RATES, 285 .formats = RT5682_FORMATS, 286 }, 287 .ops = &rt5682_aif1_dai_ops, 288 }, 289 { 290 .name = "rt5682-aif2", 291 .id = RT5682_AIF2, 292 .capture = { 293 .stream_name = "AIF2 Capture", 294 .channels_min = 1, 295 .channels_max = 2, 296 .rates = RT5682_STEREO_RATES, 297 .formats = RT5682_FORMATS, 298 }, 299 .ops = &rt5682_aif2_dai_ops, 300 }, 301 { 302 .name = "rt5682-sdw", 303 .id = RT5682_SDW, 304 .playback = { 305 .stream_name = "SDW Playback", 306 .channels_min = 1, 307 .channels_max = 2, 308 .rates = RT5682_STEREO_RATES, 309 .formats = RT5682_FORMATS, 310 }, 311 .capture = { 312 .stream_name = "SDW Capture", 313 .channels_min = 1, 314 .channels_max = 2, 315 .rates = RT5682_STEREO_RATES, 316 .formats = RT5682_FORMATS, 317 }, 318 .ops = &rt5682_sdw_ops, 319 }, 320 }; 321 322 static int rt5682_sdw_init(struct device *dev, struct regmap *regmap, 323 struct sdw_slave *slave) 324 { 325 struct rt5682_priv *rt5682; 326 int ret; 327 328 rt5682 = devm_kzalloc(dev, sizeof(*rt5682), GFP_KERNEL); 329 if (!rt5682) 330 return -ENOMEM; 331 332 dev_set_drvdata(dev, rt5682); 333 rt5682->slave = slave; 334 rt5682->sdw_regmap = regmap; 335 rt5682->is_sdw = true; 336 337 mutex_init(&rt5682->disable_irq_lock); 338 339 rt5682->regmap = devm_regmap_init(dev, NULL, dev, 340 &rt5682_sdw_indirect_regmap); 341 if (IS_ERR(rt5682->regmap)) { 342 ret = PTR_ERR(rt5682->regmap); 343 dev_err(dev, "Failed to allocate register map: %d\n", 344 ret); 345 return ret; 346 } 347 348 /* 349 * Mark hw_init to false 350 * HW init will be performed when device reports present 351 */ 352 rt5682->hw_init = false; 353 rt5682->first_hw_init = false; 354 355 mutex_init(&rt5682->calibrate_mutex); 356 INIT_DELAYED_WORK(&rt5682->jack_detect_work, 357 rt5682_jack_detect_handler); 358 359 ret = devm_snd_soc_register_component(dev, 360 &rt5682_soc_component_dev, 361 rt5682_dai, ARRAY_SIZE(rt5682_dai)); 362 dev_dbg(&slave->dev, "%s\n", __func__); 363 364 return ret; 365 } 366 367 static int rt5682_io_init(struct device *dev, struct sdw_slave *slave) 368 { 369 struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 370 int ret = 0, loop = 10; 371 unsigned int val; 372 373 rt5682->disable_irq = false; 374 375 if (rt5682->hw_init) 376 return 0; 377 378 /* 379 * PM runtime is only enabled when a Slave reports as Attached 380 */ 381 if (!rt5682->first_hw_init) { 382 /* set autosuspend parameters */ 383 pm_runtime_set_autosuspend_delay(&slave->dev, 3000); 384 pm_runtime_use_autosuspend(&slave->dev); 385 386 /* update count of parent 'active' children */ 387 pm_runtime_set_active(&slave->dev); 388 389 /* make sure the device does not suspend immediately */ 390 pm_runtime_mark_last_busy(&slave->dev); 391 392 pm_runtime_enable(&slave->dev); 393 } 394 395 pm_runtime_get_noresume(&slave->dev); 396 397 if (rt5682->first_hw_init) { 398 regcache_cache_only(rt5682->regmap, false); 399 regcache_cache_bypass(rt5682->regmap, true); 400 } 401 402 while (loop > 0) { 403 regmap_read(rt5682->regmap, RT5682_DEVICE_ID, &val); 404 if (val == DEVICE_ID) 405 break; 406 dev_warn(dev, "Device with ID register %x is not rt5682\n", val); 407 usleep_range(30000, 30005); 408 loop--; 409 } 410 411 if (val != DEVICE_ID) { 412 dev_err(dev, "Device with ID register %x is not rt5682\n", val); 413 ret = -ENODEV; 414 goto err_nodev; 415 } 416 417 rt5682_calibrate(rt5682); 418 419 if (rt5682->first_hw_init) { 420 regcache_cache_bypass(rt5682->regmap, false); 421 regcache_mark_dirty(rt5682->regmap); 422 regcache_sync(rt5682->regmap); 423 424 /* volatile registers */ 425 regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2, 426 RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL); 427 428 goto reinit; 429 } 430 431 rt5682_apply_patch_list(rt5682, dev); 432 433 regmap_write(rt5682->regmap, RT5682_DEPOP_1, 0x0000); 434 435 regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1, 436 RT5682_LDO1_DVO_MASK | RT5682_HP_DRIVER_MASK, 437 RT5682_LDO1_DVO_12 | RT5682_HP_DRIVER_5X); 438 regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0080); 439 regmap_write(rt5682->regmap, RT5682_TEST_MODE_CTRL_1, 0x0000); 440 regmap_update_bits(rt5682->regmap, RT5682_BIAS_CUR_CTRL_8, 441 RT5682_HPA_CP_BIAS_CTRL_MASK, RT5682_HPA_CP_BIAS_3UA); 442 regmap_update_bits(rt5682->regmap, RT5682_CHARGE_PUMP_1, 443 RT5682_CP_CLK_HP_MASK, RT5682_CP_CLK_HP_300KHZ); 444 regmap_update_bits(rt5682->regmap, RT5682_HP_CHARGE_PUMP_1, 445 RT5682_PM_HP_MASK, RT5682_PM_HP_HV); 446 447 /* Soundwire */ 448 regmap_write(rt5682->regmap, RT5682_PLL2_INTERNAL, 0xa266); 449 regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_1, 0x1700); 450 regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_2, 0x0006); 451 regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_3, 0x2600); 452 regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_4, 0x0c8f); 453 regmap_write(rt5682->regmap, RT5682_PLL_TRACK_2, 0x3000); 454 regmap_write(rt5682->regmap, RT5682_PLL_TRACK_3, 0x4000); 455 regmap_update_bits(rt5682->regmap, RT5682_GLB_CLK, 456 RT5682_SCLK_SRC_MASK | RT5682_PLL2_SRC_MASK, 457 RT5682_SCLK_SRC_PLL2 | RT5682_PLL2_SRC_SDW); 458 459 regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2, 460 RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL); 461 regmap_write(rt5682->regmap, RT5682_CBJ_CTRL_1, 0xd142); 462 regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_5, 0x0700, 0x0600); 463 regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_3, 464 RT5682_CBJ_IN_BUF_EN, RT5682_CBJ_IN_BUF_EN); 465 regmap_update_bits(rt5682->regmap, RT5682_SAR_IL_CMD_1, 466 RT5682_SAR_POW_MASK, RT5682_SAR_POW_EN); 467 regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL, 468 RT5682_POW_IRQ | RT5682_POW_JDH | 469 RT5682_POW_ANA, RT5682_POW_IRQ | 470 RT5682_POW_JDH | RT5682_POW_ANA); 471 regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_2, 472 RT5682_PWR_JDH, RT5682_PWR_JDH); 473 regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2, 474 RT5682_JD1_EN_MASK | RT5682_JD1_IRQ_MASK, 475 RT5682_JD1_EN | RT5682_JD1_IRQ_PUL); 476 477 reinit: 478 mod_delayed_work(system_power_efficient_wq, 479 &rt5682->jack_detect_work, msecs_to_jiffies(250)); 480 481 /* Mark Slave initialization complete */ 482 rt5682->hw_init = true; 483 rt5682->first_hw_init = true; 484 485 err_nodev: 486 pm_runtime_mark_last_busy(&slave->dev); 487 pm_runtime_put_autosuspend(&slave->dev); 488 489 dev_dbg(&slave->dev, "%s hw_init complete: %d\n", __func__, ret); 490 491 return ret; 492 } 493 494 static bool rt5682_sdw_readable_register(struct device *dev, unsigned int reg) 495 { 496 switch (reg) { 497 case 0x00e0: 498 case 0x00f0: 499 case 0x3000: 500 case 0x3001: 501 case 0x3004: 502 case 0x3005: 503 case 0x3008: 504 return true; 505 default: 506 return false; 507 } 508 } 509 510 static const struct regmap_config rt5682_sdw_regmap = { 511 .name = "sdw", 512 .reg_bits = 32, 513 .val_bits = 8, 514 .max_register = RT5682_I2C_MODE, 515 .readable_reg = rt5682_sdw_readable_register, 516 .cache_type = REGCACHE_NONE, 517 .use_single_read = true, 518 .use_single_write = true, 519 }; 520 521 static int rt5682_update_status(struct sdw_slave *slave, 522 enum sdw_slave_status status) 523 { 524 struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev); 525 526 /* Update the status */ 527 rt5682->status = status; 528 529 if (status == SDW_SLAVE_UNATTACHED) 530 rt5682->hw_init = false; 531 532 /* 533 * Perform initialization only if slave status is present and 534 * hw_init flag is false 535 */ 536 if (rt5682->hw_init || rt5682->status != SDW_SLAVE_ATTACHED) 537 return 0; 538 539 /* perform I/O transfers required for Slave initialization */ 540 return rt5682_io_init(&slave->dev, slave); 541 } 542 543 static int rt5682_read_prop(struct sdw_slave *slave) 544 { 545 struct sdw_slave_prop *prop = &slave->prop; 546 int nval, i; 547 u32 bit; 548 unsigned long addr; 549 struct sdw_dpn_prop *dpn; 550 551 prop->scp_int1_mask = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH | 552 SDW_SCP_INT1_PARITY; 553 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY; 554 555 prop->paging_support = false; 556 557 /* first we need to allocate memory for set bits in port lists */ 558 prop->source_ports = 0x4; /* BITMAP: 00000100 */ 559 prop->sink_ports = 0x2; /* BITMAP: 00000010 */ 560 561 nval = hweight32(prop->source_ports); 562 prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval, 563 sizeof(*prop->src_dpn_prop), 564 GFP_KERNEL); 565 if (!prop->src_dpn_prop) 566 return -ENOMEM; 567 568 i = 0; 569 dpn = prop->src_dpn_prop; 570 addr = prop->source_ports; 571 for_each_set_bit(bit, &addr, 32) { 572 dpn[i].num = bit; 573 dpn[i].type = SDW_DPN_FULL; 574 dpn[i].simple_ch_prep_sm = true; 575 dpn[i].ch_prep_timeout = 10; 576 i++; 577 } 578 579 /* do this again for sink now */ 580 nval = hweight32(prop->sink_ports); 581 prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval, 582 sizeof(*prop->sink_dpn_prop), 583 GFP_KERNEL); 584 if (!prop->sink_dpn_prop) 585 return -ENOMEM; 586 587 i = 0; 588 dpn = prop->sink_dpn_prop; 589 addr = prop->sink_ports; 590 for_each_set_bit(bit, &addr, 32) { 591 dpn[i].num = bit; 592 dpn[i].type = SDW_DPN_FULL; 593 dpn[i].simple_ch_prep_sm = true; 594 dpn[i].ch_prep_timeout = 10; 595 i++; 596 } 597 598 /* set the timeout values */ 599 prop->clk_stop_timeout = 20; 600 601 /* wake-up event */ 602 prop->wake_capable = 1; 603 604 return 0; 605 } 606 607 /* Bus clock frequency */ 608 #define RT5682_CLK_FREQ_9600000HZ 9600000 609 #define RT5682_CLK_FREQ_12000000HZ 12000000 610 #define RT5682_CLK_FREQ_6000000HZ 6000000 611 #define RT5682_CLK_FREQ_4800000HZ 4800000 612 #define RT5682_CLK_FREQ_2400000HZ 2400000 613 #define RT5682_CLK_FREQ_12288000HZ 12288000 614 615 static int rt5682_clock_config(struct device *dev) 616 { 617 struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 618 unsigned int clk_freq, value; 619 620 clk_freq = (rt5682->params.curr_dr_freq >> 1); 621 622 switch (clk_freq) { 623 case RT5682_CLK_FREQ_12000000HZ: 624 value = 0x0; 625 break; 626 case RT5682_CLK_FREQ_6000000HZ: 627 value = 0x1; 628 break; 629 case RT5682_CLK_FREQ_9600000HZ: 630 value = 0x2; 631 break; 632 case RT5682_CLK_FREQ_4800000HZ: 633 value = 0x3; 634 break; 635 case RT5682_CLK_FREQ_2400000HZ: 636 value = 0x4; 637 break; 638 case RT5682_CLK_FREQ_12288000HZ: 639 value = 0x5; 640 break; 641 default: 642 return -EINVAL; 643 } 644 645 regmap_write(rt5682->sdw_regmap, 0xe0, value); 646 regmap_write(rt5682->sdw_regmap, 0xf0, value); 647 648 dev_dbg(dev, "%s complete, clk_freq=%d\n", __func__, clk_freq); 649 650 return 0; 651 } 652 653 static int rt5682_bus_config(struct sdw_slave *slave, 654 struct sdw_bus_params *params) 655 { 656 struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev); 657 int ret; 658 659 memcpy(&rt5682->params, params, sizeof(*params)); 660 661 ret = rt5682_clock_config(&slave->dev); 662 if (ret < 0) 663 dev_err(&slave->dev, "Invalid clk config"); 664 665 return ret; 666 } 667 668 static int rt5682_interrupt_callback(struct sdw_slave *slave, 669 struct sdw_slave_intr_status *status) 670 { 671 struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev); 672 673 dev_dbg(&slave->dev, 674 "%s control_port_stat=%x", __func__, status->control_port); 675 676 mutex_lock(&rt5682->disable_irq_lock); 677 if (status->control_port & 0x4 && !rt5682->disable_irq) { 678 mod_delayed_work(system_power_efficient_wq, 679 &rt5682->jack_detect_work, msecs_to_jiffies(rt5682->irq_work_delay_time)); 680 } 681 mutex_unlock(&rt5682->disable_irq_lock); 682 683 return 0; 684 } 685 686 static const struct sdw_slave_ops rt5682_slave_ops = { 687 .read_prop = rt5682_read_prop, 688 .interrupt_callback = rt5682_interrupt_callback, 689 .update_status = rt5682_update_status, 690 .bus_config = rt5682_bus_config, 691 }; 692 693 static int rt5682_sdw_probe(struct sdw_slave *slave, 694 const struct sdw_device_id *id) 695 { 696 struct regmap *regmap; 697 698 /* Regmap Initialization */ 699 regmap = devm_regmap_init_sdw(slave, &rt5682_sdw_regmap); 700 if (IS_ERR(regmap)) 701 return -EINVAL; 702 703 rt5682_sdw_init(&slave->dev, regmap, slave); 704 705 return 0; 706 } 707 708 static int rt5682_sdw_remove(struct sdw_slave *slave) 709 { 710 struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev); 711 712 if (rt5682->hw_init) 713 cancel_delayed_work_sync(&rt5682->jack_detect_work); 714 715 if (rt5682->first_hw_init) 716 pm_runtime_disable(&slave->dev); 717 718 return 0; 719 } 720 721 static const struct sdw_device_id rt5682_id[] = { 722 SDW_SLAVE_ENTRY_EXT(0x025d, 0x5682, 0x2, 0, 0), 723 {}, 724 }; 725 MODULE_DEVICE_TABLE(sdw, rt5682_id); 726 727 static int __maybe_unused rt5682_dev_suspend(struct device *dev) 728 { 729 struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 730 731 if (!rt5682->hw_init) 732 return 0; 733 734 cancel_delayed_work_sync(&rt5682->jack_detect_work); 735 736 regcache_cache_only(rt5682->regmap, true); 737 regcache_mark_dirty(rt5682->regmap); 738 739 return 0; 740 } 741 742 static int __maybe_unused rt5682_dev_system_suspend(struct device *dev) 743 { 744 struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 745 struct sdw_slave *slave = dev_to_sdw_dev(dev); 746 int ret; 747 748 if (!rt5682->hw_init) 749 return 0; 750 751 /* 752 * prevent new interrupts from being handled after the 753 * deferred work completes and before the parent disables 754 * interrupts on the link 755 */ 756 mutex_lock(&rt5682->disable_irq_lock); 757 rt5682->disable_irq = true; 758 ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1, 759 SDW_SCP_INT1_IMPL_DEF, 0); 760 mutex_unlock(&rt5682->disable_irq_lock); 761 762 if (ret < 0) { 763 /* log but don't prevent suspend from happening */ 764 dev_dbg(&slave->dev, "%s: could not disable imp-def interrupts\n:", __func__); 765 } 766 767 return rt5682_dev_suspend(dev); 768 } 769 770 static int __maybe_unused rt5682_dev_resume(struct device *dev) 771 { 772 struct sdw_slave *slave = dev_to_sdw_dev(dev); 773 struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 774 unsigned long time; 775 776 if (!rt5682->first_hw_init) 777 return 0; 778 779 if (!slave->unattach_request) 780 goto regmap_sync; 781 782 time = wait_for_completion_timeout(&slave->initialization_complete, 783 msecs_to_jiffies(RT5682_PROBE_TIMEOUT)); 784 if (!time) { 785 dev_err(&slave->dev, "Initialization not complete, timed out\n"); 786 sdw_show_ping_status(slave->bus, true); 787 788 return -ETIMEDOUT; 789 } 790 791 regmap_sync: 792 slave->unattach_request = 0; 793 regcache_cache_only(rt5682->regmap, false); 794 regcache_sync(rt5682->regmap); 795 796 return 0; 797 } 798 799 static const struct dev_pm_ops rt5682_pm = { 800 SET_SYSTEM_SLEEP_PM_OPS(rt5682_dev_system_suspend, rt5682_dev_resume) 801 SET_RUNTIME_PM_OPS(rt5682_dev_suspend, rt5682_dev_resume, NULL) 802 }; 803 804 static struct sdw_driver rt5682_sdw_driver = { 805 .driver = { 806 .name = "rt5682", 807 .owner = THIS_MODULE, 808 .pm = &rt5682_pm, 809 }, 810 .probe = rt5682_sdw_probe, 811 .remove = rt5682_sdw_remove, 812 .ops = &rt5682_slave_ops, 813 .id_table = rt5682_id, 814 }; 815 module_sdw_driver(rt5682_sdw_driver); 816 817 MODULE_DESCRIPTION("ASoC RT5682 driver SDW"); 818 MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>"); 819 MODULE_LICENSE("GPL v2"); 820