1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // rt5682-sdw.c -- RT5682 ALSA SoC audio component driver 4 // 5 // Copyright 2019 Realtek Semiconductor Corp. 6 // Author: Oder Chiou <oder_chiou@realtek.com> 7 // 8 9 #include <linux/module.h> 10 #include <linux/moduleparam.h> 11 #include <linux/init.h> 12 #include <linux/delay.h> 13 #include <linux/pm.h> 14 #include <linux/acpi.h> 15 #include <linux/gpio.h> 16 #include <linux/of_gpio.h> 17 #include <linux/pm_runtime.h> 18 #include <linux/regulator/consumer.h> 19 #include <linux/mutex.h> 20 #include <linux/soundwire/sdw.h> 21 #include <linux/soundwire/sdw_type.h> 22 #include <linux/soundwire/sdw_registers.h> 23 #include <sound/core.h> 24 #include <sound/pcm.h> 25 #include <sound/pcm_params.h> 26 #include <sound/jack.h> 27 #include <sound/sdw.h> 28 #include <sound/soc.h> 29 #include <sound/soc-dapm.h> 30 #include <sound/initval.h> 31 #include <sound/tlv.h> 32 33 #include "rt5682.h" 34 35 #define RT5682_SDW_ADDR_L 0x3000 36 #define RT5682_SDW_ADDR_H 0x3001 37 #define RT5682_SDW_DATA_L 0x3004 38 #define RT5682_SDW_DATA_H 0x3005 39 #define RT5682_SDW_CMD 0x3008 40 41 static int rt5682_sdw_read(void *context, unsigned int reg, unsigned int *val) 42 { 43 struct device *dev = context; 44 struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 45 unsigned int data_l, data_h; 46 47 regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 0); 48 regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff); 49 regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff)); 50 regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_H, &data_h); 51 regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_L, &data_l); 52 53 *val = (data_h << 8) | data_l; 54 55 dev_vdbg(dev, "[%s] %04x => %04x\n", __func__, reg, *val); 56 57 return 0; 58 } 59 60 static int rt5682_sdw_write(void *context, unsigned int reg, unsigned int val) 61 { 62 struct device *dev = context; 63 struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 64 65 regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 1); 66 regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff); 67 regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff)); 68 regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_H, (val >> 8) & 0xff); 69 regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_L, (val & 0xff)); 70 71 dev_vdbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val); 72 73 return 0; 74 } 75 76 static const struct regmap_config rt5682_sdw_indirect_regmap = { 77 .reg_bits = 16, 78 .val_bits = 16, 79 .max_register = RT5682_I2C_MODE, 80 .volatile_reg = rt5682_volatile_register, 81 .readable_reg = rt5682_readable_register, 82 .cache_type = REGCACHE_RBTREE, 83 .reg_defaults = rt5682_reg, 84 .num_reg_defaults = RT5682_REG_NUM, 85 .use_single_read = true, 86 .use_single_write = true, 87 .reg_read = rt5682_sdw_read, 88 .reg_write = rt5682_sdw_write, 89 }; 90 91 struct sdw_stream_data { 92 struct sdw_stream_runtime *sdw_stream; 93 }; 94 95 static int rt5682_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream, 96 int direction) 97 { 98 struct sdw_stream_data *stream; 99 100 if (!sdw_stream) 101 return 0; 102 103 stream = kzalloc(sizeof(*stream), GFP_KERNEL); 104 if (!stream) 105 return -ENOMEM; 106 107 stream->sdw_stream = sdw_stream; 108 109 /* Use tx_mask or rx_mask to configure stream tag and set dma_data */ 110 snd_soc_dai_dma_data_set(dai, direction, stream); 111 112 return 0; 113 } 114 115 static void rt5682_sdw_shutdown(struct snd_pcm_substream *substream, 116 struct snd_soc_dai *dai) 117 { 118 struct sdw_stream_data *stream; 119 120 stream = snd_soc_dai_get_dma_data(dai, substream); 121 snd_soc_dai_set_dma_data(dai, substream, NULL); 122 kfree(stream); 123 } 124 125 static int rt5682_sdw_hw_params(struct snd_pcm_substream *substream, 126 struct snd_pcm_hw_params *params, 127 struct snd_soc_dai *dai) 128 { 129 struct snd_soc_component *component = dai->component; 130 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component); 131 struct sdw_stream_config stream_config = {0}; 132 struct sdw_port_config port_config = {0}; 133 struct sdw_stream_data *stream; 134 int retval; 135 unsigned int val_p = 0, val_c = 0, osr_p = 0, osr_c = 0; 136 137 dev_dbg(dai->dev, "%s %s", __func__, dai->name); 138 139 stream = snd_soc_dai_get_dma_data(dai, substream); 140 if (!stream) 141 return -ENOMEM; 142 143 if (!rt5682->slave) 144 return -EINVAL; 145 146 /* SoundWire specific configuration */ 147 snd_sdw_params_to_config(substream, params, &stream_config, &port_config); 148 149 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 150 port_config.num = 1; 151 else 152 port_config.num = 2; 153 154 retval = sdw_stream_add_slave(rt5682->slave, &stream_config, 155 &port_config, 1, stream->sdw_stream); 156 if (retval) { 157 dev_err(dai->dev, "Unable to configure port\n"); 158 return retval; 159 } 160 161 switch (params_rate(params)) { 162 case 48000: 163 val_p = RT5682_SDW_REF_1_48K; 164 val_c = RT5682_SDW_REF_2_48K; 165 break; 166 case 96000: 167 val_p = RT5682_SDW_REF_1_96K; 168 val_c = RT5682_SDW_REF_2_96K; 169 break; 170 case 192000: 171 val_p = RT5682_SDW_REF_1_192K; 172 val_c = RT5682_SDW_REF_2_192K; 173 break; 174 case 32000: 175 val_p = RT5682_SDW_REF_1_32K; 176 val_c = RT5682_SDW_REF_2_32K; 177 break; 178 case 24000: 179 val_p = RT5682_SDW_REF_1_24K; 180 val_c = RT5682_SDW_REF_2_24K; 181 break; 182 case 16000: 183 val_p = RT5682_SDW_REF_1_16K; 184 val_c = RT5682_SDW_REF_2_16K; 185 break; 186 case 12000: 187 val_p = RT5682_SDW_REF_1_12K; 188 val_c = RT5682_SDW_REF_2_12K; 189 break; 190 case 8000: 191 val_p = RT5682_SDW_REF_1_8K; 192 val_c = RT5682_SDW_REF_2_8K; 193 break; 194 case 44100: 195 val_p = RT5682_SDW_REF_1_44K; 196 val_c = RT5682_SDW_REF_2_44K; 197 break; 198 case 88200: 199 val_p = RT5682_SDW_REF_1_88K; 200 val_c = RT5682_SDW_REF_2_88K; 201 break; 202 case 176400: 203 val_p = RT5682_SDW_REF_1_176K; 204 val_c = RT5682_SDW_REF_2_176K; 205 break; 206 case 22050: 207 val_p = RT5682_SDW_REF_1_22K; 208 val_c = RT5682_SDW_REF_2_22K; 209 break; 210 case 11025: 211 val_p = RT5682_SDW_REF_1_11K; 212 val_c = RT5682_SDW_REF_2_11K; 213 break; 214 default: 215 return -EINVAL; 216 } 217 218 if (params_rate(params) <= 48000) { 219 osr_p = RT5682_DAC_OSR_D_8; 220 osr_c = RT5682_ADC_OSR_D_8; 221 } else if (params_rate(params) <= 96000) { 222 osr_p = RT5682_DAC_OSR_D_4; 223 osr_c = RT5682_ADC_OSR_D_4; 224 } else { 225 osr_p = RT5682_DAC_OSR_D_2; 226 osr_c = RT5682_ADC_OSR_D_2; 227 } 228 229 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 230 regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK, 231 RT5682_SDW_REF_1_MASK, val_p); 232 regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1, 233 RT5682_DAC_OSR_MASK, osr_p); 234 } else { 235 regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK, 236 RT5682_SDW_REF_2_MASK, val_c); 237 regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1, 238 RT5682_ADC_OSR_MASK, osr_c); 239 } 240 241 return retval; 242 } 243 244 static int rt5682_sdw_hw_free(struct snd_pcm_substream *substream, 245 struct snd_soc_dai *dai) 246 { 247 struct snd_soc_component *component = dai->component; 248 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component); 249 struct sdw_stream_data *stream = 250 snd_soc_dai_get_dma_data(dai, substream); 251 252 if (!rt5682->slave) 253 return -EINVAL; 254 255 sdw_stream_remove_slave(rt5682->slave, stream->sdw_stream); 256 return 0; 257 } 258 259 static const struct snd_soc_dai_ops rt5682_sdw_ops = { 260 .hw_params = rt5682_sdw_hw_params, 261 .hw_free = rt5682_sdw_hw_free, 262 .set_stream = rt5682_set_sdw_stream, 263 .shutdown = rt5682_sdw_shutdown, 264 }; 265 266 static struct snd_soc_dai_driver rt5682_dai[] = { 267 { 268 .name = "rt5682-aif1", 269 .id = RT5682_AIF1, 270 .playback = { 271 .stream_name = "AIF1 Playback", 272 .channels_min = 1, 273 .channels_max = 2, 274 .rates = RT5682_STEREO_RATES, 275 .formats = RT5682_FORMATS, 276 }, 277 .capture = { 278 .stream_name = "AIF1 Capture", 279 .channels_min = 1, 280 .channels_max = 2, 281 .rates = RT5682_STEREO_RATES, 282 .formats = RT5682_FORMATS, 283 }, 284 .ops = &rt5682_aif1_dai_ops, 285 }, 286 { 287 .name = "rt5682-aif2", 288 .id = RT5682_AIF2, 289 .capture = { 290 .stream_name = "AIF2 Capture", 291 .channels_min = 1, 292 .channels_max = 2, 293 .rates = RT5682_STEREO_RATES, 294 .formats = RT5682_FORMATS, 295 }, 296 .ops = &rt5682_aif2_dai_ops, 297 }, 298 { 299 .name = "rt5682-sdw", 300 .id = RT5682_SDW, 301 .playback = { 302 .stream_name = "SDW Playback", 303 .channels_min = 1, 304 .channels_max = 2, 305 .rates = RT5682_STEREO_RATES, 306 .formats = RT5682_FORMATS, 307 }, 308 .capture = { 309 .stream_name = "SDW Capture", 310 .channels_min = 1, 311 .channels_max = 2, 312 .rates = RT5682_STEREO_RATES, 313 .formats = RT5682_FORMATS, 314 }, 315 .ops = &rt5682_sdw_ops, 316 }, 317 }; 318 319 static int rt5682_sdw_init(struct device *dev, struct regmap *regmap, 320 struct sdw_slave *slave) 321 { 322 struct rt5682_priv *rt5682; 323 int ret; 324 325 rt5682 = devm_kzalloc(dev, sizeof(*rt5682), GFP_KERNEL); 326 if (!rt5682) 327 return -ENOMEM; 328 329 dev_set_drvdata(dev, rt5682); 330 rt5682->slave = slave; 331 rt5682->sdw_regmap = regmap; 332 rt5682->is_sdw = true; 333 334 mutex_init(&rt5682->disable_irq_lock); 335 336 rt5682->regmap = devm_regmap_init(dev, NULL, dev, 337 &rt5682_sdw_indirect_regmap); 338 if (IS_ERR(rt5682->regmap)) { 339 ret = PTR_ERR(rt5682->regmap); 340 dev_err(dev, "Failed to allocate register map: %d\n", 341 ret); 342 return ret; 343 } 344 345 /* 346 * Mark hw_init to false 347 * HW init will be performed when device reports present 348 */ 349 rt5682->hw_init = false; 350 rt5682->first_hw_init = false; 351 352 mutex_init(&rt5682->calibrate_mutex); 353 INIT_DELAYED_WORK(&rt5682->jack_detect_work, 354 rt5682_jack_detect_handler); 355 356 ret = devm_snd_soc_register_component(dev, 357 &rt5682_soc_component_dev, 358 rt5682_dai, ARRAY_SIZE(rt5682_dai)); 359 dev_dbg(&slave->dev, "%s\n", __func__); 360 361 return ret; 362 } 363 364 static int rt5682_io_init(struct device *dev, struct sdw_slave *slave) 365 { 366 struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 367 int ret = 0, loop = 10; 368 unsigned int val; 369 370 rt5682->disable_irq = false; 371 372 if (rt5682->hw_init) 373 return 0; 374 375 /* 376 * PM runtime is only enabled when a Slave reports as Attached 377 */ 378 if (!rt5682->first_hw_init) { 379 /* set autosuspend parameters */ 380 pm_runtime_set_autosuspend_delay(&slave->dev, 3000); 381 pm_runtime_use_autosuspend(&slave->dev); 382 383 /* update count of parent 'active' children */ 384 pm_runtime_set_active(&slave->dev); 385 386 /* make sure the device does not suspend immediately */ 387 pm_runtime_mark_last_busy(&slave->dev); 388 389 pm_runtime_enable(&slave->dev); 390 } 391 392 pm_runtime_get_noresume(&slave->dev); 393 394 if (rt5682->first_hw_init) { 395 regcache_cache_only(rt5682->regmap, false); 396 regcache_cache_bypass(rt5682->regmap, true); 397 } 398 399 while (loop > 0) { 400 regmap_read(rt5682->regmap, RT5682_DEVICE_ID, &val); 401 if (val == DEVICE_ID) 402 break; 403 dev_warn(dev, "Device with ID register %x is not rt5682\n", val); 404 usleep_range(30000, 30005); 405 loop--; 406 } 407 408 if (val != DEVICE_ID) { 409 dev_err(dev, "Device with ID register %x is not rt5682\n", val); 410 ret = -ENODEV; 411 goto err_nodev; 412 } 413 414 rt5682_calibrate(rt5682); 415 416 if (rt5682->first_hw_init) { 417 regcache_cache_bypass(rt5682->regmap, false); 418 regcache_mark_dirty(rt5682->regmap); 419 regcache_sync(rt5682->regmap); 420 421 /* volatile registers */ 422 regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2, 423 RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL); 424 425 goto reinit; 426 } 427 428 rt5682_apply_patch_list(rt5682, dev); 429 430 regmap_write(rt5682->regmap, RT5682_DEPOP_1, 0x0000); 431 432 regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1, 433 RT5682_LDO1_DVO_MASK | RT5682_HP_DRIVER_MASK, 434 RT5682_LDO1_DVO_12 | RT5682_HP_DRIVER_5X); 435 regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0080); 436 regmap_write(rt5682->regmap, RT5682_TEST_MODE_CTRL_1, 0x0000); 437 regmap_update_bits(rt5682->regmap, RT5682_BIAS_CUR_CTRL_8, 438 RT5682_HPA_CP_BIAS_CTRL_MASK, RT5682_HPA_CP_BIAS_3UA); 439 regmap_update_bits(rt5682->regmap, RT5682_CHARGE_PUMP_1, 440 RT5682_CP_CLK_HP_MASK, RT5682_CP_CLK_HP_300KHZ); 441 regmap_update_bits(rt5682->regmap, RT5682_HP_CHARGE_PUMP_1, 442 RT5682_PM_HP_MASK, RT5682_PM_HP_HV); 443 444 /* Soundwire */ 445 regmap_write(rt5682->regmap, RT5682_PLL2_INTERNAL, 0xa266); 446 regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_1, 0x1700); 447 regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_2, 0x0006); 448 regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_3, 0x2600); 449 regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_4, 0x0c8f); 450 regmap_write(rt5682->regmap, RT5682_PLL_TRACK_2, 0x3000); 451 regmap_write(rt5682->regmap, RT5682_PLL_TRACK_3, 0x4000); 452 regmap_update_bits(rt5682->regmap, RT5682_GLB_CLK, 453 RT5682_SCLK_SRC_MASK | RT5682_PLL2_SRC_MASK, 454 RT5682_SCLK_SRC_PLL2 | RT5682_PLL2_SRC_SDW); 455 456 regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2, 457 RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL); 458 regmap_write(rt5682->regmap, RT5682_CBJ_CTRL_1, 0xd142); 459 regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_5, 0x0700, 0x0600); 460 regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_3, 461 RT5682_CBJ_IN_BUF_EN, RT5682_CBJ_IN_BUF_EN); 462 regmap_update_bits(rt5682->regmap, RT5682_SAR_IL_CMD_1, 463 RT5682_SAR_POW_MASK, RT5682_SAR_POW_EN); 464 regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL, 465 RT5682_POW_IRQ | RT5682_POW_JDH | 466 RT5682_POW_ANA, RT5682_POW_IRQ | 467 RT5682_POW_JDH | RT5682_POW_ANA); 468 regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_2, 469 RT5682_PWR_JDH, RT5682_PWR_JDH); 470 regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2, 471 RT5682_JD1_EN_MASK | RT5682_JD1_IRQ_MASK, 472 RT5682_JD1_EN | RT5682_JD1_IRQ_PUL); 473 474 reinit: 475 mod_delayed_work(system_power_efficient_wq, 476 &rt5682->jack_detect_work, msecs_to_jiffies(250)); 477 478 /* Mark Slave initialization complete */ 479 rt5682->hw_init = true; 480 rt5682->first_hw_init = true; 481 482 err_nodev: 483 pm_runtime_mark_last_busy(&slave->dev); 484 pm_runtime_put_autosuspend(&slave->dev); 485 486 dev_dbg(&slave->dev, "%s hw_init complete: %d\n", __func__, ret); 487 488 return ret; 489 } 490 491 static bool rt5682_sdw_readable_register(struct device *dev, unsigned int reg) 492 { 493 switch (reg) { 494 case 0x00e0: 495 case 0x00f0: 496 case 0x3000: 497 case 0x3001: 498 case 0x3004: 499 case 0x3005: 500 case 0x3008: 501 return true; 502 default: 503 return false; 504 } 505 } 506 507 static const struct regmap_config rt5682_sdw_regmap = { 508 .name = "sdw", 509 .reg_bits = 32, 510 .val_bits = 8, 511 .max_register = RT5682_I2C_MODE, 512 .readable_reg = rt5682_sdw_readable_register, 513 .cache_type = REGCACHE_NONE, 514 .use_single_read = true, 515 .use_single_write = true, 516 }; 517 518 static int rt5682_update_status(struct sdw_slave *slave, 519 enum sdw_slave_status status) 520 { 521 struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev); 522 523 /* Update the status */ 524 rt5682->status = status; 525 526 if (status == SDW_SLAVE_UNATTACHED) 527 rt5682->hw_init = false; 528 529 /* 530 * Perform initialization only if slave status is present and 531 * hw_init flag is false 532 */ 533 if (rt5682->hw_init || rt5682->status != SDW_SLAVE_ATTACHED) 534 return 0; 535 536 /* perform I/O transfers required for Slave initialization */ 537 return rt5682_io_init(&slave->dev, slave); 538 } 539 540 static int rt5682_read_prop(struct sdw_slave *slave) 541 { 542 struct sdw_slave_prop *prop = &slave->prop; 543 int nval, i; 544 u32 bit; 545 unsigned long addr; 546 struct sdw_dpn_prop *dpn; 547 548 prop->scp_int1_mask = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH | 549 SDW_SCP_INT1_PARITY; 550 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY; 551 552 prop->paging_support = false; 553 554 /* first we need to allocate memory for set bits in port lists */ 555 prop->source_ports = 0x4; /* BITMAP: 00000100 */ 556 prop->sink_ports = 0x2; /* BITMAP: 00000010 */ 557 558 nval = hweight32(prop->source_ports); 559 prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval, 560 sizeof(*prop->src_dpn_prop), 561 GFP_KERNEL); 562 if (!prop->src_dpn_prop) 563 return -ENOMEM; 564 565 i = 0; 566 dpn = prop->src_dpn_prop; 567 addr = prop->source_ports; 568 for_each_set_bit(bit, &addr, 32) { 569 dpn[i].num = bit; 570 dpn[i].type = SDW_DPN_FULL; 571 dpn[i].simple_ch_prep_sm = true; 572 dpn[i].ch_prep_timeout = 10; 573 i++; 574 } 575 576 /* do this again for sink now */ 577 nval = hweight32(prop->sink_ports); 578 prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval, 579 sizeof(*prop->sink_dpn_prop), 580 GFP_KERNEL); 581 if (!prop->sink_dpn_prop) 582 return -ENOMEM; 583 584 i = 0; 585 dpn = prop->sink_dpn_prop; 586 addr = prop->sink_ports; 587 for_each_set_bit(bit, &addr, 32) { 588 dpn[i].num = bit; 589 dpn[i].type = SDW_DPN_FULL; 590 dpn[i].simple_ch_prep_sm = true; 591 dpn[i].ch_prep_timeout = 10; 592 i++; 593 } 594 595 /* set the timeout values */ 596 prop->clk_stop_timeout = 20; 597 598 /* wake-up event */ 599 prop->wake_capable = 1; 600 601 return 0; 602 } 603 604 /* Bus clock frequency */ 605 #define RT5682_CLK_FREQ_9600000HZ 9600000 606 #define RT5682_CLK_FREQ_12000000HZ 12000000 607 #define RT5682_CLK_FREQ_6000000HZ 6000000 608 #define RT5682_CLK_FREQ_4800000HZ 4800000 609 #define RT5682_CLK_FREQ_2400000HZ 2400000 610 #define RT5682_CLK_FREQ_12288000HZ 12288000 611 612 static int rt5682_clock_config(struct device *dev) 613 { 614 struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 615 unsigned int clk_freq, value; 616 617 clk_freq = (rt5682->params.curr_dr_freq >> 1); 618 619 switch (clk_freq) { 620 case RT5682_CLK_FREQ_12000000HZ: 621 value = 0x0; 622 break; 623 case RT5682_CLK_FREQ_6000000HZ: 624 value = 0x1; 625 break; 626 case RT5682_CLK_FREQ_9600000HZ: 627 value = 0x2; 628 break; 629 case RT5682_CLK_FREQ_4800000HZ: 630 value = 0x3; 631 break; 632 case RT5682_CLK_FREQ_2400000HZ: 633 value = 0x4; 634 break; 635 case RT5682_CLK_FREQ_12288000HZ: 636 value = 0x5; 637 break; 638 default: 639 return -EINVAL; 640 } 641 642 regmap_write(rt5682->sdw_regmap, 0xe0, value); 643 regmap_write(rt5682->sdw_regmap, 0xf0, value); 644 645 dev_dbg(dev, "%s complete, clk_freq=%d\n", __func__, clk_freq); 646 647 return 0; 648 } 649 650 static int rt5682_bus_config(struct sdw_slave *slave, 651 struct sdw_bus_params *params) 652 { 653 struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev); 654 int ret; 655 656 memcpy(&rt5682->params, params, sizeof(*params)); 657 658 ret = rt5682_clock_config(&slave->dev); 659 if (ret < 0) 660 dev_err(&slave->dev, "Invalid clk config"); 661 662 return ret; 663 } 664 665 static int rt5682_interrupt_callback(struct sdw_slave *slave, 666 struct sdw_slave_intr_status *status) 667 { 668 struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev); 669 670 dev_dbg(&slave->dev, 671 "%s control_port_stat=%x", __func__, status->control_port); 672 673 mutex_lock(&rt5682->disable_irq_lock); 674 if (status->control_port & 0x4 && !rt5682->disable_irq) { 675 mod_delayed_work(system_power_efficient_wq, 676 &rt5682->jack_detect_work, msecs_to_jiffies(rt5682->irq_work_delay_time)); 677 } 678 mutex_unlock(&rt5682->disable_irq_lock); 679 680 return 0; 681 } 682 683 static const struct sdw_slave_ops rt5682_slave_ops = { 684 .read_prop = rt5682_read_prop, 685 .interrupt_callback = rt5682_interrupt_callback, 686 .update_status = rt5682_update_status, 687 .bus_config = rt5682_bus_config, 688 }; 689 690 static int rt5682_sdw_probe(struct sdw_slave *slave, 691 const struct sdw_device_id *id) 692 { 693 struct regmap *regmap; 694 695 /* Regmap Initialization */ 696 regmap = devm_regmap_init_sdw(slave, &rt5682_sdw_regmap); 697 if (IS_ERR(regmap)) 698 return -EINVAL; 699 700 rt5682_sdw_init(&slave->dev, regmap, slave); 701 702 return 0; 703 } 704 705 static int rt5682_sdw_remove(struct sdw_slave *slave) 706 { 707 struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev); 708 709 if (rt5682->hw_init) 710 cancel_delayed_work_sync(&rt5682->jack_detect_work); 711 712 if (rt5682->first_hw_init) 713 pm_runtime_disable(&slave->dev); 714 715 return 0; 716 } 717 718 static const struct sdw_device_id rt5682_id[] = { 719 SDW_SLAVE_ENTRY_EXT(0x025d, 0x5682, 0x2, 0, 0), 720 {}, 721 }; 722 MODULE_DEVICE_TABLE(sdw, rt5682_id); 723 724 static int __maybe_unused rt5682_dev_suspend(struct device *dev) 725 { 726 struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 727 728 if (!rt5682->hw_init) 729 return 0; 730 731 cancel_delayed_work_sync(&rt5682->jack_detect_work); 732 733 regcache_cache_only(rt5682->regmap, true); 734 regcache_mark_dirty(rt5682->regmap); 735 736 return 0; 737 } 738 739 static int __maybe_unused rt5682_dev_system_suspend(struct device *dev) 740 { 741 struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 742 struct sdw_slave *slave = dev_to_sdw_dev(dev); 743 int ret; 744 745 if (!rt5682->hw_init) 746 return 0; 747 748 /* 749 * prevent new interrupts from being handled after the 750 * deferred work completes and before the parent disables 751 * interrupts on the link 752 */ 753 mutex_lock(&rt5682->disable_irq_lock); 754 rt5682->disable_irq = true; 755 ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1, 756 SDW_SCP_INT1_IMPL_DEF, 0); 757 mutex_unlock(&rt5682->disable_irq_lock); 758 759 if (ret < 0) { 760 /* log but don't prevent suspend from happening */ 761 dev_dbg(&slave->dev, "%s: could not disable imp-def interrupts\n:", __func__); 762 } 763 764 return rt5682_dev_suspend(dev); 765 } 766 767 static int __maybe_unused rt5682_dev_resume(struct device *dev) 768 { 769 struct sdw_slave *slave = dev_to_sdw_dev(dev); 770 struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 771 unsigned long time; 772 773 if (!rt5682->first_hw_init) 774 return 0; 775 776 if (!slave->unattach_request) 777 goto regmap_sync; 778 779 time = wait_for_completion_timeout(&slave->initialization_complete, 780 msecs_to_jiffies(RT5682_PROBE_TIMEOUT)); 781 if (!time) { 782 dev_err(&slave->dev, "Initialization not complete, timed out\n"); 783 sdw_show_ping_status(slave->bus, true); 784 785 return -ETIMEDOUT; 786 } 787 788 regmap_sync: 789 slave->unattach_request = 0; 790 regcache_cache_only(rt5682->regmap, false); 791 regcache_sync(rt5682->regmap); 792 793 return 0; 794 } 795 796 static const struct dev_pm_ops rt5682_pm = { 797 SET_SYSTEM_SLEEP_PM_OPS(rt5682_dev_system_suspend, rt5682_dev_resume) 798 SET_RUNTIME_PM_OPS(rt5682_dev_suspend, rt5682_dev_resume, NULL) 799 }; 800 801 static struct sdw_driver rt5682_sdw_driver = { 802 .driver = { 803 .name = "rt5682", 804 .owner = THIS_MODULE, 805 .pm = &rt5682_pm, 806 }, 807 .probe = rt5682_sdw_probe, 808 .remove = rt5682_sdw_remove, 809 .ops = &rt5682_slave_ops, 810 .id_table = rt5682_id, 811 }; 812 module_sdw_driver(rt5682_sdw_driver); 813 814 MODULE_DESCRIPTION("ASoC RT5682 driver SDW"); 815 MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>"); 816 MODULE_LICENSE("GPL v2"); 817