xref: /linux/sound/soc/codecs/rt5670.c (revision e0bf6c5ca2d3281f231c5f0c9bf145e9513644de)
1 /*
2  * rt5670.c  --  RT5670 ALSA SoC audio codec driver
3  *
4  * Copyright 2014 Realtek Semiconductor Corp.
5  * Author: Bard Liao <bardliao@realtek.com>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  */
11 
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
16 #include <linux/pm.h>
17 #include <linux/pm_runtime.h>
18 #include <linux/i2c.h>
19 #include <linux/platform_device.h>
20 #include <linux/acpi.h>
21 #include <linux/spi/spi.h>
22 #include <linux/dmi.h>
23 #include <sound/core.h>
24 #include <sound/pcm.h>
25 #include <sound/pcm_params.h>
26 #include <sound/jack.h>
27 #include <sound/soc.h>
28 #include <sound/soc-dapm.h>
29 #include <sound/initval.h>
30 #include <sound/tlv.h>
31 #include <sound/rt5670.h>
32 
33 #include "rl6231.h"
34 #include "rt5670.h"
35 #include "rt5670-dsp.h"
36 
37 #define RT5670_DEVICE_ID 0x6271
38 
39 #define RT5670_PR_RANGE_BASE (0xff + 1)
40 #define RT5670_PR_SPACING 0x100
41 
42 #define RT5670_PR_BASE (RT5670_PR_RANGE_BASE + (0 * RT5670_PR_SPACING))
43 
44 static const struct regmap_range_cfg rt5670_ranges[] = {
45 	{ .name = "PR", .range_min = RT5670_PR_BASE,
46 	  .range_max = RT5670_PR_BASE + 0xf8,
47 	  .selector_reg = RT5670_PRIV_INDEX,
48 	  .selector_mask = 0xff,
49 	  .selector_shift = 0x0,
50 	  .window_start = RT5670_PRIV_DATA,
51 	  .window_len = 0x1, },
52 };
53 
54 static struct reg_default init_list[] = {
55 	{ RT5670_PR_BASE + 0x14, 0x9a8a },
56 	{ RT5670_PR_BASE + 0x38, 0x3ba1 },
57 	{ RT5670_PR_BASE + 0x3d, 0x3640 },
58 };
59 #define RT5670_INIT_REG_LEN ARRAY_SIZE(init_list)
60 
61 static const struct reg_default rt5670_reg[] = {
62 	{ 0x00, 0x0000 },
63 	{ 0x02, 0x8888 },
64 	{ 0x03, 0x8888 },
65 	{ 0x0a, 0x0001 },
66 	{ 0x0b, 0x0827 },
67 	{ 0x0c, 0x0000 },
68 	{ 0x0d, 0x0008 },
69 	{ 0x0e, 0x0000 },
70 	{ 0x0f, 0x0808 },
71 	{ 0x19, 0xafaf },
72 	{ 0x1a, 0xafaf },
73 	{ 0x1b, 0x0011 },
74 	{ 0x1c, 0x2f2f },
75 	{ 0x1d, 0x2f2f },
76 	{ 0x1e, 0x0000 },
77 	{ 0x1f, 0x2f2f },
78 	{ 0x20, 0x0000 },
79 	{ 0x26, 0x7860 },
80 	{ 0x27, 0x7860 },
81 	{ 0x28, 0x7871 },
82 	{ 0x29, 0x8080 },
83 	{ 0x2a, 0x5656 },
84 	{ 0x2b, 0x5454 },
85 	{ 0x2c, 0xaaa0 },
86 	{ 0x2d, 0x0000 },
87 	{ 0x2e, 0x2f2f },
88 	{ 0x2f, 0x1002 },
89 	{ 0x30, 0x0000 },
90 	{ 0x31, 0x5f00 },
91 	{ 0x32, 0x0000 },
92 	{ 0x33, 0x0000 },
93 	{ 0x34, 0x0000 },
94 	{ 0x35, 0x0000 },
95 	{ 0x36, 0x0000 },
96 	{ 0x37, 0x0000 },
97 	{ 0x38, 0x0000 },
98 	{ 0x3b, 0x0000 },
99 	{ 0x3c, 0x007f },
100 	{ 0x3d, 0x0000 },
101 	{ 0x3e, 0x007f },
102 	{ 0x45, 0xe00f },
103 	{ 0x4c, 0x5380 },
104 	{ 0x4f, 0x0073 },
105 	{ 0x52, 0x00d3 },
106 	{ 0x53, 0xf000 },
107 	{ 0x61, 0x0000 },
108 	{ 0x62, 0x0001 },
109 	{ 0x63, 0x00c3 },
110 	{ 0x64, 0x0000 },
111 	{ 0x65, 0x0001 },
112 	{ 0x66, 0x0000 },
113 	{ 0x6f, 0x8000 },
114 	{ 0x70, 0x8000 },
115 	{ 0x71, 0x8000 },
116 	{ 0x72, 0x8000 },
117 	{ 0x73, 0x7770 },
118 	{ 0x74, 0x0e00 },
119 	{ 0x75, 0x1505 },
120 	{ 0x76, 0x0015 },
121 	{ 0x77, 0x0c00 },
122 	{ 0x78, 0x4000 },
123 	{ 0x79, 0x0123 },
124 	{ 0x7f, 0x1100 },
125 	{ 0x80, 0x0000 },
126 	{ 0x81, 0x0000 },
127 	{ 0x82, 0x0000 },
128 	{ 0x83, 0x0000 },
129 	{ 0x84, 0x0000 },
130 	{ 0x85, 0x0000 },
131 	{ 0x86, 0x0004 },
132 	{ 0x87, 0x0000 },
133 	{ 0x88, 0x0000 },
134 	{ 0x89, 0x0000 },
135 	{ 0x8a, 0x0000 },
136 	{ 0x8b, 0x0000 },
137 	{ 0x8c, 0x0003 },
138 	{ 0x8d, 0x0000 },
139 	{ 0x8e, 0x0004 },
140 	{ 0x8f, 0x1100 },
141 	{ 0x90, 0x0646 },
142 	{ 0x91, 0x0c06 },
143 	{ 0x93, 0x0000 },
144 	{ 0x94, 0x1270 },
145 	{ 0x95, 0x1000 },
146 	{ 0x97, 0x0000 },
147 	{ 0x98, 0x0000 },
148 	{ 0x99, 0x0000 },
149 	{ 0x9a, 0x2184 },
150 	{ 0x9b, 0x010a },
151 	{ 0x9c, 0x0aea },
152 	{ 0x9d, 0x000c },
153 	{ 0x9e, 0x0400 },
154 	{ 0xae, 0x7000 },
155 	{ 0xaf, 0x0000 },
156 	{ 0xb0, 0x7000 },
157 	{ 0xb1, 0x0000 },
158 	{ 0xb2, 0x0000 },
159 	{ 0xb3, 0x001f },
160 	{ 0xb4, 0x220c },
161 	{ 0xb5, 0x1f00 },
162 	{ 0xb6, 0x0000 },
163 	{ 0xb7, 0x0000 },
164 	{ 0xbb, 0x0000 },
165 	{ 0xbc, 0x0000 },
166 	{ 0xbd, 0x0000 },
167 	{ 0xbe, 0x0000 },
168 	{ 0xbf, 0x0000 },
169 	{ 0xc0, 0x0000 },
170 	{ 0xc1, 0x0000 },
171 	{ 0xc2, 0x0000 },
172 	{ 0xcd, 0x0000 },
173 	{ 0xce, 0x0000 },
174 	{ 0xcf, 0x1813 },
175 	{ 0xd0, 0x0690 },
176 	{ 0xd1, 0x1c17 },
177 	{ 0xd3, 0xa220 },
178 	{ 0xd4, 0x0000 },
179 	{ 0xd6, 0x0400 },
180 	{ 0xd9, 0x0809 },
181 	{ 0xda, 0x0000 },
182 	{ 0xdb, 0x0001 },
183 	{ 0xdc, 0x0049 },
184 	{ 0xdd, 0x0024 },
185 	{ 0xe6, 0x8000 },
186 	{ 0xe7, 0x0000 },
187 	{ 0xec, 0xa200 },
188 	{ 0xed, 0x0000 },
189 	{ 0xee, 0xa200 },
190 	{ 0xef, 0x0000 },
191 	{ 0xf8, 0x0000 },
192 	{ 0xf9, 0x0000 },
193 	{ 0xfa, 0x8010 },
194 	{ 0xfb, 0x0033 },
195 	{ 0xfc, 0x0100 },
196 };
197 
198 static bool rt5670_volatile_register(struct device *dev, unsigned int reg)
199 {
200 	int i;
201 
202 	for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) {
203 		if ((reg >= rt5670_ranges[i].window_start &&
204 		     reg <= rt5670_ranges[i].window_start +
205 		     rt5670_ranges[i].window_len) ||
206 		    (reg >= rt5670_ranges[i].range_min &&
207 		     reg <= rt5670_ranges[i].range_max)) {
208 			return true;
209 		}
210 	}
211 
212 	switch (reg) {
213 	case RT5670_RESET:
214 	case RT5670_PDM_DATA_CTRL1:
215 	case RT5670_PDM1_DATA_CTRL4:
216 	case RT5670_PDM2_DATA_CTRL4:
217 	case RT5670_PRIV_DATA:
218 	case RT5670_ASRC_5:
219 	case RT5670_CJ_CTRL1:
220 	case RT5670_CJ_CTRL2:
221 	case RT5670_CJ_CTRL3:
222 	case RT5670_A_JD_CTRL1:
223 	case RT5670_A_JD_CTRL2:
224 	case RT5670_VAD_CTRL5:
225 	case RT5670_ADC_EQ_CTRL1:
226 	case RT5670_EQ_CTRL1:
227 	case RT5670_ALC_CTRL_1:
228 	case RT5670_IRQ_CTRL2:
229 	case RT5670_INT_IRQ_ST:
230 	case RT5670_IL_CMD:
231 	case RT5670_DSP_CTRL1:
232 	case RT5670_DSP_CTRL2:
233 	case RT5670_DSP_CTRL3:
234 	case RT5670_DSP_CTRL4:
235 	case RT5670_DSP_CTRL5:
236 	case RT5670_VENDOR_ID:
237 	case RT5670_VENDOR_ID1:
238 	case RT5670_VENDOR_ID2:
239 		return true;
240 	default:
241 		return false;
242 	}
243 }
244 
245 static bool rt5670_readable_register(struct device *dev, unsigned int reg)
246 {
247 	int i;
248 
249 	for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) {
250 		if ((reg >= rt5670_ranges[i].window_start &&
251 		     reg <= rt5670_ranges[i].window_start +
252 		     rt5670_ranges[i].window_len) ||
253 		    (reg >= rt5670_ranges[i].range_min &&
254 		     reg <= rt5670_ranges[i].range_max)) {
255 			return true;
256 		}
257 	}
258 
259 	switch (reg) {
260 	case RT5670_RESET:
261 	case RT5670_HP_VOL:
262 	case RT5670_LOUT1:
263 	case RT5670_CJ_CTRL1:
264 	case RT5670_CJ_CTRL2:
265 	case RT5670_CJ_CTRL3:
266 	case RT5670_IN2:
267 	case RT5670_INL1_INR1_VOL:
268 	case RT5670_DAC1_DIG_VOL:
269 	case RT5670_DAC2_DIG_VOL:
270 	case RT5670_DAC_CTRL:
271 	case RT5670_STO1_ADC_DIG_VOL:
272 	case RT5670_MONO_ADC_DIG_VOL:
273 	case RT5670_STO2_ADC_DIG_VOL:
274 	case RT5670_ADC_BST_VOL1:
275 	case RT5670_ADC_BST_VOL2:
276 	case RT5670_STO2_ADC_MIXER:
277 	case RT5670_STO1_ADC_MIXER:
278 	case RT5670_MONO_ADC_MIXER:
279 	case RT5670_AD_DA_MIXER:
280 	case RT5670_STO_DAC_MIXER:
281 	case RT5670_DD_MIXER:
282 	case RT5670_DIG_MIXER:
283 	case RT5670_DSP_PATH1:
284 	case RT5670_DSP_PATH2:
285 	case RT5670_DIG_INF1_DATA:
286 	case RT5670_DIG_INF2_DATA:
287 	case RT5670_PDM_OUT_CTRL:
288 	case RT5670_PDM_DATA_CTRL1:
289 	case RT5670_PDM1_DATA_CTRL2:
290 	case RT5670_PDM1_DATA_CTRL3:
291 	case RT5670_PDM1_DATA_CTRL4:
292 	case RT5670_PDM2_DATA_CTRL2:
293 	case RT5670_PDM2_DATA_CTRL3:
294 	case RT5670_PDM2_DATA_CTRL4:
295 	case RT5670_REC_L1_MIXER:
296 	case RT5670_REC_L2_MIXER:
297 	case RT5670_REC_R1_MIXER:
298 	case RT5670_REC_R2_MIXER:
299 	case RT5670_HPO_MIXER:
300 	case RT5670_MONO_MIXER:
301 	case RT5670_OUT_L1_MIXER:
302 	case RT5670_OUT_R1_MIXER:
303 	case RT5670_LOUT_MIXER:
304 	case RT5670_PWR_DIG1:
305 	case RT5670_PWR_DIG2:
306 	case RT5670_PWR_ANLG1:
307 	case RT5670_PWR_ANLG2:
308 	case RT5670_PWR_MIXER:
309 	case RT5670_PWR_VOL:
310 	case RT5670_PRIV_INDEX:
311 	case RT5670_PRIV_DATA:
312 	case RT5670_I2S4_SDP:
313 	case RT5670_I2S1_SDP:
314 	case RT5670_I2S2_SDP:
315 	case RT5670_I2S3_SDP:
316 	case RT5670_ADDA_CLK1:
317 	case RT5670_ADDA_CLK2:
318 	case RT5670_DMIC_CTRL1:
319 	case RT5670_DMIC_CTRL2:
320 	case RT5670_TDM_CTRL_1:
321 	case RT5670_TDM_CTRL_2:
322 	case RT5670_TDM_CTRL_3:
323 	case RT5670_DSP_CLK:
324 	case RT5670_GLB_CLK:
325 	case RT5670_PLL_CTRL1:
326 	case RT5670_PLL_CTRL2:
327 	case RT5670_ASRC_1:
328 	case RT5670_ASRC_2:
329 	case RT5670_ASRC_3:
330 	case RT5670_ASRC_4:
331 	case RT5670_ASRC_5:
332 	case RT5670_ASRC_7:
333 	case RT5670_ASRC_8:
334 	case RT5670_ASRC_9:
335 	case RT5670_ASRC_10:
336 	case RT5670_ASRC_11:
337 	case RT5670_ASRC_12:
338 	case RT5670_ASRC_13:
339 	case RT5670_ASRC_14:
340 	case RT5670_DEPOP_M1:
341 	case RT5670_DEPOP_M2:
342 	case RT5670_DEPOP_M3:
343 	case RT5670_CHARGE_PUMP:
344 	case RT5670_MICBIAS:
345 	case RT5670_A_JD_CTRL1:
346 	case RT5670_A_JD_CTRL2:
347 	case RT5670_VAD_CTRL1:
348 	case RT5670_VAD_CTRL2:
349 	case RT5670_VAD_CTRL3:
350 	case RT5670_VAD_CTRL4:
351 	case RT5670_VAD_CTRL5:
352 	case RT5670_ADC_EQ_CTRL1:
353 	case RT5670_ADC_EQ_CTRL2:
354 	case RT5670_EQ_CTRL1:
355 	case RT5670_EQ_CTRL2:
356 	case RT5670_ALC_DRC_CTRL1:
357 	case RT5670_ALC_DRC_CTRL2:
358 	case RT5670_ALC_CTRL_1:
359 	case RT5670_ALC_CTRL_2:
360 	case RT5670_ALC_CTRL_3:
361 	case RT5670_JD_CTRL:
362 	case RT5670_IRQ_CTRL1:
363 	case RT5670_IRQ_CTRL2:
364 	case RT5670_INT_IRQ_ST:
365 	case RT5670_GPIO_CTRL1:
366 	case RT5670_GPIO_CTRL2:
367 	case RT5670_GPIO_CTRL3:
368 	case RT5670_SCRABBLE_FUN:
369 	case RT5670_SCRABBLE_CTRL:
370 	case RT5670_BASE_BACK:
371 	case RT5670_MP3_PLUS1:
372 	case RT5670_MP3_PLUS2:
373 	case RT5670_ADJ_HPF1:
374 	case RT5670_ADJ_HPF2:
375 	case RT5670_HP_CALIB_AMP_DET:
376 	case RT5670_SV_ZCD1:
377 	case RT5670_SV_ZCD2:
378 	case RT5670_IL_CMD:
379 	case RT5670_IL_CMD2:
380 	case RT5670_IL_CMD3:
381 	case RT5670_DRC_HL_CTRL1:
382 	case RT5670_DRC_HL_CTRL2:
383 	case RT5670_ADC_MONO_HP_CTRL1:
384 	case RT5670_ADC_MONO_HP_CTRL2:
385 	case RT5670_ADC_STO2_HP_CTRL1:
386 	case RT5670_ADC_STO2_HP_CTRL2:
387 	case RT5670_JD_CTRL3:
388 	case RT5670_JD_CTRL4:
389 	case RT5670_DIG_MISC:
390 	case RT5670_DSP_CTRL1:
391 	case RT5670_DSP_CTRL2:
392 	case RT5670_DSP_CTRL3:
393 	case RT5670_DSP_CTRL4:
394 	case RT5670_DSP_CTRL5:
395 	case RT5670_GEN_CTRL2:
396 	case RT5670_GEN_CTRL3:
397 	case RT5670_VENDOR_ID:
398 	case RT5670_VENDOR_ID1:
399 	case RT5670_VENDOR_ID2:
400 		return true;
401 	default:
402 		return false;
403 	}
404 }
405 
406 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
407 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
408 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
409 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
410 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
411 
412 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
413 static unsigned int bst_tlv[] = {
414 	TLV_DB_RANGE_HEAD(7),
415 	0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
416 	1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
417 	2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
418 	3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
419 	6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
420 	7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
421 	8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
422 };
423 
424 /* Interface data select */
425 static const char * const rt5670_data_select[] = {
426 	"Normal", "Swap", "left copy to right", "right copy to left"
427 };
428 
429 static SOC_ENUM_SINGLE_DECL(rt5670_if2_dac_enum, RT5670_DIG_INF1_DATA,
430 				RT5670_IF2_DAC_SEL_SFT, rt5670_data_select);
431 
432 static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_enum, RT5670_DIG_INF1_DATA,
433 				RT5670_IF2_ADC_SEL_SFT, rt5670_data_select);
434 
435 static const struct snd_kcontrol_new rt5670_snd_controls[] = {
436 	/* Headphone Output Volume */
437 	SOC_DOUBLE("HP Playback Switch", RT5670_HP_VOL,
438 		RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1),
439 	SOC_DOUBLE_TLV("HP Playback Volume", RT5670_HP_VOL,
440 		RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
441 		39, 0, out_vol_tlv),
442 	/* OUTPUT Control */
443 	SOC_DOUBLE("OUT Channel Switch", RT5670_LOUT1,
444 		RT5670_VOL_L_SFT, RT5670_VOL_R_SFT, 1, 1),
445 	SOC_DOUBLE_TLV("OUT Playback Volume", RT5670_LOUT1,
446 		RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 39, 1, out_vol_tlv),
447 	/* DAC Digital Volume */
448 	SOC_DOUBLE("DAC2 Playback Switch", RT5670_DAC_CTRL,
449 		RT5670_M_DAC_L2_VOL_SFT, RT5670_M_DAC_R2_VOL_SFT, 1, 1),
450 	SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5670_DAC1_DIG_VOL,
451 			RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
452 			175, 0, dac_vol_tlv),
453 	SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5670_DAC2_DIG_VOL,
454 			RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
455 			175, 0, dac_vol_tlv),
456 	/* IN1/IN2 Control */
457 	SOC_SINGLE_TLV("IN1 Boost Volume", RT5670_CJ_CTRL1,
458 		RT5670_BST_SFT1, 8, 0, bst_tlv),
459 	SOC_SINGLE_TLV("IN2 Boost Volume", RT5670_IN2,
460 		RT5670_BST_SFT1, 8, 0, bst_tlv),
461 	/* INL/INR Volume Control */
462 	SOC_DOUBLE_TLV("IN Capture Volume", RT5670_INL1_INR1_VOL,
463 			RT5670_INL_VOL_SFT, RT5670_INR_VOL_SFT,
464 			31, 1, in_vol_tlv),
465 	/* ADC Digital Volume Control */
466 	SOC_DOUBLE("ADC Capture Switch", RT5670_STO1_ADC_DIG_VOL,
467 		RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1),
468 	SOC_DOUBLE_TLV("ADC Capture Volume", RT5670_STO1_ADC_DIG_VOL,
469 			RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
470 			127, 0, adc_vol_tlv),
471 
472 	SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5670_MONO_ADC_DIG_VOL,
473 			RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
474 			127, 0, adc_vol_tlv),
475 
476 	/* ADC Boost Volume Control */
477 	SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
478 			RT5670_STO1_ADC_L_BST_SFT, RT5670_STO1_ADC_R_BST_SFT,
479 			3, 0, adc_bst_tlv),
480 
481 	SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
482 			RT5670_STO2_ADC_L_BST_SFT, RT5670_STO2_ADC_R_BST_SFT,
483 			3, 0, adc_bst_tlv),
484 
485 	SOC_ENUM("ADC IF2 Data Switch", rt5670_if2_adc_enum),
486 	SOC_ENUM("DAC IF2 Data Switch", rt5670_if2_dac_enum),
487 };
488 
489 /**
490  * set_dmic_clk - Set parameter of dmic.
491  *
492  * @w: DAPM widget.
493  * @kcontrol: The kcontrol of this widget.
494  * @event: Event id.
495  *
496  * Choose dmic clock between 1MHz and 3MHz.
497  * It is better for clock to approximate 3MHz.
498  */
499 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
500 	struct snd_kcontrol *kcontrol, int event)
501 {
502 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
503 	struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
504 	int idx = -EINVAL;
505 
506 	idx = rl6231_calc_dmic_clk(rt5670->sysclk);
507 
508 	if (idx < 0)
509 		dev_err(codec->dev, "Failed to set DMIC clock\n");
510 	else
511 		snd_soc_update_bits(codec, RT5670_DMIC_CTRL1,
512 			RT5670_DMIC_CLK_MASK, idx << RT5670_DMIC_CLK_SFT);
513 	return idx;
514 }
515 
516 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
517 			 struct snd_soc_dapm_widget *sink)
518 {
519 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
520 	unsigned int val;
521 
522 	val = snd_soc_read(codec, RT5670_GLB_CLK);
523 	val &= RT5670_SCLK_SRC_MASK;
524 	if (val == RT5670_SCLK_SRC_PLL1)
525 		return 1;
526 	else
527 		return 0;
528 }
529 
530 static int is_using_asrc(struct snd_soc_dapm_widget *source,
531 			 struct snd_soc_dapm_widget *sink)
532 {
533 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
534 	unsigned int reg, shift, val;
535 
536 	switch (source->shift) {
537 	case 0:
538 		reg = RT5670_ASRC_3;
539 		shift = 0;
540 		break;
541 	case 1:
542 		reg = RT5670_ASRC_3;
543 		shift = 4;
544 		break;
545 	case 2:
546 		reg = RT5670_ASRC_5;
547 		shift = 12;
548 		break;
549 	case 3:
550 		reg = RT5670_ASRC_2;
551 		shift = 0;
552 		break;
553 	case 8:
554 		reg = RT5670_ASRC_2;
555 		shift = 4;
556 		break;
557 	case 9:
558 		reg = RT5670_ASRC_2;
559 		shift = 8;
560 		break;
561 	case 10:
562 		reg = RT5670_ASRC_2;
563 		shift = 12;
564 		break;
565 	default:
566 		return 0;
567 	}
568 
569 	val = (snd_soc_read(codec, reg) >> shift) & 0xf;
570 	switch (val) {
571 	case 1:
572 	case 2:
573 	case 3:
574 	case 4:
575 		return 1;
576 	default:
577 		return 0;
578 	}
579 
580 }
581 
582 static int can_use_asrc(struct snd_soc_dapm_widget *source,
583 			 struct snd_soc_dapm_widget *sink)
584 {
585 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
586 	struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
587 
588 	if (rt5670->sysclk > rt5670->lrck[RT5670_AIF1] * 384)
589 		return 1;
590 
591 	return 0;
592 }
593 
594 
595 /**
596  * rt5670_sel_asrc_clk_src - select ASRC clock source for a set of filters
597  * @codec: SoC audio codec device.
598  * @filter_mask: mask of filters.
599  * @clk_src: clock source
600  *
601  * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5670 can
602  * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
603  * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
604  * ASRC function will track i2s clock and generate a corresponding system clock
605  * for codec. This function provides an API to select the clock source for a
606  * set of filters specified by the mask. And the codec driver will turn on ASRC
607  * for these filters if ASRC is selected as their clock source.
608  */
609 int rt5670_sel_asrc_clk_src(struct snd_soc_codec *codec,
610 			    unsigned int filter_mask, unsigned int clk_src)
611 {
612 	unsigned int asrc2_mask = 0, asrc2_value = 0;
613 	unsigned int asrc3_mask = 0, asrc3_value = 0;
614 
615 	if (clk_src > RT5670_CLK_SEL_SYS3)
616 		return -EINVAL;
617 
618 	if (filter_mask & RT5670_DA_STEREO_FILTER) {
619 		asrc2_mask |= RT5670_DA_STO_CLK_SEL_MASK;
620 		asrc2_value = (asrc2_value & ~RT5670_DA_STO_CLK_SEL_MASK)
621 				| (clk_src <<  RT5670_DA_STO_CLK_SEL_SFT);
622 	}
623 
624 	if (filter_mask & RT5670_DA_MONO_L_FILTER) {
625 		asrc2_mask |= RT5670_DA_MONOL_CLK_SEL_MASK;
626 		asrc2_value = (asrc2_value & ~RT5670_DA_MONOL_CLK_SEL_MASK)
627 				| (clk_src <<  RT5670_DA_MONOL_CLK_SEL_SFT);
628 	}
629 
630 	if (filter_mask & RT5670_DA_MONO_R_FILTER) {
631 		asrc2_mask |= RT5670_DA_MONOR_CLK_SEL_MASK;
632 		asrc2_value = (asrc2_value & ~RT5670_DA_MONOR_CLK_SEL_MASK)
633 				| (clk_src <<  RT5670_DA_MONOR_CLK_SEL_SFT);
634 	}
635 
636 	if (filter_mask & RT5670_AD_STEREO_FILTER) {
637 		asrc2_mask |= RT5670_AD_STO1_CLK_SEL_MASK;
638 		asrc2_value = (asrc2_value & ~RT5670_AD_STO1_CLK_SEL_MASK)
639 				| (clk_src <<  RT5670_AD_STO1_CLK_SEL_SFT);
640 	}
641 
642 	if (filter_mask & RT5670_AD_MONO_L_FILTER) {
643 		asrc3_mask |= RT5670_AD_MONOL_CLK_SEL_MASK;
644 		asrc3_value = (asrc3_value & ~RT5670_AD_MONOL_CLK_SEL_MASK)
645 				| (clk_src <<  RT5670_AD_MONOL_CLK_SEL_SFT);
646 	}
647 
648 	if (filter_mask & RT5670_AD_MONO_R_FILTER)  {
649 		asrc3_mask |= RT5670_AD_MONOR_CLK_SEL_MASK;
650 		asrc3_value = (asrc3_value & ~RT5670_AD_MONOR_CLK_SEL_MASK)
651 				| (clk_src <<  RT5670_AD_MONOR_CLK_SEL_SFT);
652 	}
653 
654 	if (filter_mask & RT5670_UP_RATE_FILTER) {
655 		asrc3_mask |= RT5670_UP_CLK_SEL_MASK;
656 		asrc3_value = (asrc3_value & ~RT5670_UP_CLK_SEL_MASK)
657 				| (clk_src <<  RT5670_UP_CLK_SEL_SFT);
658 	}
659 
660 	if (filter_mask & RT5670_DOWN_RATE_FILTER) {
661 		asrc3_mask |= RT5670_DOWN_CLK_SEL_MASK;
662 		asrc3_value = (asrc3_value & ~RT5670_DOWN_CLK_SEL_MASK)
663 				| (clk_src <<  RT5670_DOWN_CLK_SEL_SFT);
664 	}
665 
666 	if (asrc2_mask)
667 		snd_soc_update_bits(codec, RT5670_ASRC_2,
668 				    asrc2_mask, asrc2_value);
669 
670 	if (asrc3_mask)
671 		snd_soc_update_bits(codec, RT5670_ASRC_3,
672 				    asrc3_mask, asrc3_value);
673 	return 0;
674 }
675 EXPORT_SYMBOL_GPL(rt5670_sel_asrc_clk_src);
676 
677 /* Digital Mixer */
678 static const struct snd_kcontrol_new rt5670_sto1_adc_l_mix[] = {
679 	SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER,
680 			RT5670_M_ADC_L1_SFT, 1, 1),
681 	SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER,
682 			RT5670_M_ADC_L2_SFT, 1, 1),
683 };
684 
685 static const struct snd_kcontrol_new rt5670_sto1_adc_r_mix[] = {
686 	SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER,
687 			RT5670_M_ADC_R1_SFT, 1, 1),
688 	SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER,
689 			RT5670_M_ADC_R2_SFT, 1, 1),
690 };
691 
692 static const struct snd_kcontrol_new rt5670_sto2_adc_l_mix[] = {
693 	SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER,
694 			RT5670_M_ADC_L1_SFT, 1, 1),
695 	SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER,
696 			RT5670_M_ADC_L2_SFT, 1, 1),
697 };
698 
699 static const struct snd_kcontrol_new rt5670_sto2_adc_r_mix[] = {
700 	SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER,
701 			RT5670_M_ADC_R1_SFT, 1, 1),
702 	SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER,
703 			RT5670_M_ADC_R2_SFT, 1, 1),
704 };
705 
706 static const struct snd_kcontrol_new rt5670_mono_adc_l_mix[] = {
707 	SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER,
708 			RT5670_M_MONO_ADC_L1_SFT, 1, 1),
709 	SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER,
710 			RT5670_M_MONO_ADC_L2_SFT, 1, 1),
711 };
712 
713 static const struct snd_kcontrol_new rt5670_mono_adc_r_mix[] = {
714 	SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER,
715 			RT5670_M_MONO_ADC_R1_SFT, 1, 1),
716 	SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER,
717 			RT5670_M_MONO_ADC_R2_SFT, 1, 1),
718 };
719 
720 static const struct snd_kcontrol_new rt5670_dac_l_mix[] = {
721 	SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
722 			RT5670_M_ADCMIX_L_SFT, 1, 1),
723 	SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER,
724 			RT5670_M_DAC1_L_SFT, 1, 1),
725 };
726 
727 static const struct snd_kcontrol_new rt5670_dac_r_mix[] = {
728 	SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
729 			RT5670_M_ADCMIX_R_SFT, 1, 1),
730 	SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER,
731 			RT5670_M_DAC1_R_SFT, 1, 1),
732 };
733 
734 static const struct snd_kcontrol_new rt5670_sto_dac_l_mix[] = {
735 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER,
736 			RT5670_M_DAC_L1_SFT, 1, 1),
737 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_STO_DAC_MIXER,
738 			RT5670_M_DAC_L2_SFT, 1, 1),
739 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER,
740 			RT5670_M_DAC_R1_STO_L_SFT, 1, 1),
741 };
742 
743 static const struct snd_kcontrol_new rt5670_sto_dac_r_mix[] = {
744 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER,
745 			RT5670_M_DAC_R1_SFT, 1, 1),
746 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_STO_DAC_MIXER,
747 			RT5670_M_DAC_R2_SFT, 1, 1),
748 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER,
749 			RT5670_M_DAC_L1_STO_R_SFT, 1, 1),
750 };
751 
752 static const struct snd_kcontrol_new rt5670_mono_dac_l_mix[] = {
753 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_DD_MIXER,
754 			RT5670_M_DAC_L1_MONO_L_SFT, 1, 1),
755 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER,
756 			RT5670_M_DAC_L2_MONO_L_SFT, 1, 1),
757 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER,
758 			RT5670_M_DAC_R2_MONO_L_SFT, 1, 1),
759 };
760 
761 static const struct snd_kcontrol_new rt5670_mono_dac_r_mix[] = {
762 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_DD_MIXER,
763 			RT5670_M_DAC_R1_MONO_R_SFT, 1, 1),
764 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER,
765 			RT5670_M_DAC_R2_MONO_R_SFT, 1, 1),
766 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER,
767 			RT5670_M_DAC_L2_MONO_R_SFT, 1, 1),
768 };
769 
770 static const struct snd_kcontrol_new rt5670_dig_l_mix[] = {
771 	SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5670_DIG_MIXER,
772 			RT5670_M_STO_L_DAC_L_SFT, 1, 1),
773 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER,
774 			RT5670_M_DAC_L2_DAC_L_SFT, 1, 1),
775 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER,
776 			RT5670_M_DAC_R2_DAC_L_SFT, 1, 1),
777 };
778 
779 static const struct snd_kcontrol_new rt5670_dig_r_mix[] = {
780 	SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5670_DIG_MIXER,
781 			RT5670_M_STO_R_DAC_R_SFT, 1, 1),
782 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER,
783 			RT5670_M_DAC_R2_DAC_R_SFT, 1, 1),
784 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER,
785 			RT5670_M_DAC_L2_DAC_R_SFT, 1, 1),
786 };
787 
788 /* Analog Input Mixer */
789 static const struct snd_kcontrol_new rt5670_rec_l_mix[] = {
790 	SOC_DAPM_SINGLE("INL Switch", RT5670_REC_L2_MIXER,
791 			RT5670_M_IN_L_RM_L_SFT, 1, 1),
792 	SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_L2_MIXER,
793 			RT5670_M_BST2_RM_L_SFT, 1, 1),
794 	SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_L2_MIXER,
795 			RT5670_M_BST1_RM_L_SFT, 1, 1),
796 };
797 
798 static const struct snd_kcontrol_new rt5670_rec_r_mix[] = {
799 	SOC_DAPM_SINGLE("INR Switch", RT5670_REC_R2_MIXER,
800 			RT5670_M_IN_R_RM_R_SFT, 1, 1),
801 	SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_R2_MIXER,
802 			RT5670_M_BST2_RM_R_SFT, 1, 1),
803 	SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_R2_MIXER,
804 			RT5670_M_BST1_RM_R_SFT, 1, 1),
805 };
806 
807 static const struct snd_kcontrol_new rt5670_out_l_mix[] = {
808 	SOC_DAPM_SINGLE("BST1 Switch", RT5670_OUT_L1_MIXER,
809 			RT5670_M_BST1_OM_L_SFT, 1, 1),
810 	SOC_DAPM_SINGLE("INL Switch", RT5670_OUT_L1_MIXER,
811 			RT5670_M_IN_L_OM_L_SFT, 1, 1),
812 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_OUT_L1_MIXER,
813 			RT5670_M_DAC_L2_OM_L_SFT, 1, 1),
814 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_OUT_L1_MIXER,
815 			RT5670_M_DAC_L1_OM_L_SFT, 1, 1),
816 };
817 
818 static const struct snd_kcontrol_new rt5670_out_r_mix[] = {
819 	SOC_DAPM_SINGLE("BST2 Switch", RT5670_OUT_R1_MIXER,
820 			RT5670_M_BST2_OM_R_SFT, 1, 1),
821 	SOC_DAPM_SINGLE("INR Switch", RT5670_OUT_R1_MIXER,
822 			RT5670_M_IN_R_OM_R_SFT, 1, 1),
823 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_OUT_R1_MIXER,
824 			RT5670_M_DAC_R2_OM_R_SFT, 1, 1),
825 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_OUT_R1_MIXER,
826 			RT5670_M_DAC_R1_OM_R_SFT, 1, 1),
827 };
828 
829 static const struct snd_kcontrol_new rt5670_hpo_mix[] = {
830 	SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
831 			RT5670_M_DAC1_HM_SFT, 1, 1),
832 	SOC_DAPM_SINGLE("HPVOL Switch", RT5670_HPO_MIXER,
833 			RT5670_M_HPVOL_HM_SFT, 1, 1),
834 };
835 
836 static const struct snd_kcontrol_new rt5670_hpvoll_mix[] = {
837 	SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
838 			RT5670_M_DACL1_HML_SFT, 1, 1),
839 	SOC_DAPM_SINGLE("INL Switch", RT5670_HPO_MIXER,
840 			RT5670_M_INL1_HML_SFT, 1, 1),
841 };
842 
843 static const struct snd_kcontrol_new rt5670_hpvolr_mix[] = {
844 	SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
845 			RT5670_M_DACR1_HMR_SFT, 1, 1),
846 	SOC_DAPM_SINGLE("INR Switch", RT5670_HPO_MIXER,
847 			RT5670_M_INR1_HMR_SFT, 1, 1),
848 };
849 
850 static const struct snd_kcontrol_new rt5670_lout_mix[] = {
851 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_LOUT_MIXER,
852 			RT5670_M_DAC_L1_LM_SFT, 1, 1),
853 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_LOUT_MIXER,
854 			RT5670_M_DAC_R1_LM_SFT, 1, 1),
855 	SOC_DAPM_SINGLE("OUTMIX L Switch", RT5670_LOUT_MIXER,
856 			RT5670_M_OV_L_LM_SFT, 1, 1),
857 	SOC_DAPM_SINGLE("OUTMIX R Switch", RT5670_LOUT_MIXER,
858 			RT5670_M_OV_R_LM_SFT, 1, 1),
859 };
860 
861 static const struct snd_kcontrol_new rt5670_hpl_mix[] = {
862 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_HPO_MIXER,
863 			RT5670_M_DACL1_HML_SFT, 1, 1),
864 	SOC_DAPM_SINGLE("INL1 Switch", RT5670_HPO_MIXER,
865 			RT5670_M_INL1_HML_SFT, 1, 1),
866 };
867 
868 static const struct snd_kcontrol_new rt5670_hpr_mix[] = {
869 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_HPO_MIXER,
870 			RT5670_M_DACR1_HMR_SFT, 1, 1),
871 	SOC_DAPM_SINGLE("INR1 Switch", RT5670_HPO_MIXER,
872 			RT5670_M_INR1_HMR_SFT, 1, 1),
873 };
874 
875 static const struct snd_kcontrol_new lout_l_enable_control =
876 	SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1,
877 		RT5670_L_MUTE_SFT, 1, 1);
878 
879 static const struct snd_kcontrol_new lout_r_enable_control =
880 	SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1,
881 		RT5670_R_MUTE_SFT, 1, 1);
882 
883 /* DAC1 L/R source */ /* MX-29 [9:8] [11:10] */
884 static const char * const rt5670_dac1_src[] = {
885 	"IF1 DAC", "IF2 DAC"
886 };
887 
888 static SOC_ENUM_SINGLE_DECL(rt5670_dac1l_enum, RT5670_AD_DA_MIXER,
889 	RT5670_DAC1_L_SEL_SFT, rt5670_dac1_src);
890 
891 static const struct snd_kcontrol_new rt5670_dac1l_mux =
892 	SOC_DAPM_ENUM("DAC1 L source", rt5670_dac1l_enum);
893 
894 static SOC_ENUM_SINGLE_DECL(rt5670_dac1r_enum, RT5670_AD_DA_MIXER,
895 	RT5670_DAC1_R_SEL_SFT, rt5670_dac1_src);
896 
897 static const struct snd_kcontrol_new rt5670_dac1r_mux =
898 	SOC_DAPM_ENUM("DAC1 R source", rt5670_dac1r_enum);
899 
900 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
901 /* TODO Use SOC_VALUE_ENUM_SINGLE_DECL */
902 static const char * const rt5670_dac12_src[] = {
903 	"IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC",
904 	"Bass", "VAD_ADC", "IF4 DAC"
905 };
906 
907 static SOC_ENUM_SINGLE_DECL(rt5670_dac2l_enum, RT5670_DAC_CTRL,
908 	RT5670_DAC2_L_SEL_SFT, rt5670_dac12_src);
909 
910 static const struct snd_kcontrol_new rt5670_dac_l2_mux =
911 	SOC_DAPM_ENUM("DAC2 L source", rt5670_dac2l_enum);
912 
913 static const char * const rt5670_dacr2_src[] = {
914 	"IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC", "TxDP ADC", "IF4 DAC"
915 };
916 
917 static SOC_ENUM_SINGLE_DECL(rt5670_dac2r_enum, RT5670_DAC_CTRL,
918 	RT5670_DAC2_R_SEL_SFT, rt5670_dacr2_src);
919 
920 static const struct snd_kcontrol_new rt5670_dac_r2_mux =
921 	SOC_DAPM_ENUM("DAC2 R source", rt5670_dac2r_enum);
922 
923 /*RxDP source*/ /* MX-2D [15:13] */
924 static const char * const rt5670_rxdp_src[] = {
925 	"IF2 DAC", "IF1 DAC", "STO1 ADC Mixer", "STO2 ADC Mixer",
926 	"Mono ADC Mixer L", "Mono ADC Mixer R", "DAC1"
927 };
928 
929 static SOC_ENUM_SINGLE_DECL(rt5670_rxdp_enum, RT5670_DSP_PATH1,
930 	RT5670_RXDP_SEL_SFT, rt5670_rxdp_src);
931 
932 static const struct snd_kcontrol_new rt5670_rxdp_mux =
933 	SOC_DAPM_ENUM("DAC2 L source", rt5670_rxdp_enum);
934 
935 /* MX-2D [1] [0] */
936 static const char * const rt5670_dsp_bypass_src[] = {
937 	"DSP", "Bypass"
938 };
939 
940 static SOC_ENUM_SINGLE_DECL(rt5670_dsp_ul_enum, RT5670_DSP_PATH1,
941 	RT5670_DSP_UL_SFT, rt5670_dsp_bypass_src);
942 
943 static const struct snd_kcontrol_new rt5670_dsp_ul_mux =
944 	SOC_DAPM_ENUM("DSP UL source", rt5670_dsp_ul_enum);
945 
946 static SOC_ENUM_SINGLE_DECL(rt5670_dsp_dl_enum, RT5670_DSP_PATH1,
947 	RT5670_DSP_DL_SFT, rt5670_dsp_bypass_src);
948 
949 static const struct snd_kcontrol_new rt5670_dsp_dl_mux =
950 	SOC_DAPM_ENUM("DSP DL source", rt5670_dsp_dl_enum);
951 
952 /* Stereo2 ADC source */
953 /* MX-26 [15] */
954 static const char * const rt5670_stereo2_adc_lr_src[] = {
955 	"L", "LR"
956 };
957 
958 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_lr_enum, RT5670_STO2_ADC_MIXER,
959 	RT5670_STO2_ADC_SRC_SFT, rt5670_stereo2_adc_lr_src);
960 
961 static const struct snd_kcontrol_new rt5670_sto2_adc_lr_mux =
962 	SOC_DAPM_ENUM("Stereo2 ADC LR source", rt5670_stereo2_adc_lr_enum);
963 
964 /* Stereo1 ADC source */
965 /* MX-27 MX-26 [12] */
966 static const char * const rt5670_stereo_adc1_src[] = {
967 	"DAC MIX", "ADC"
968 };
969 
970 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc1_enum, RT5670_STO1_ADC_MIXER,
971 	RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src);
972 
973 static const struct snd_kcontrol_new rt5670_sto_adc_l1_mux =
974 	SOC_DAPM_ENUM("Stereo1 ADC L1 source", rt5670_stereo1_adc1_enum);
975 
976 static const struct snd_kcontrol_new rt5670_sto_adc_r1_mux =
977 	SOC_DAPM_ENUM("Stereo1 ADC R1 source", rt5670_stereo1_adc1_enum);
978 
979 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc1_enum, RT5670_STO2_ADC_MIXER,
980 	RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src);
981 
982 static const struct snd_kcontrol_new rt5670_sto2_adc_l1_mux =
983 	SOC_DAPM_ENUM("Stereo2 ADC L1 source", rt5670_stereo2_adc1_enum);
984 
985 static const struct snd_kcontrol_new rt5670_sto2_adc_r1_mux =
986 	SOC_DAPM_ENUM("Stereo2 ADC R1 source", rt5670_stereo2_adc1_enum);
987 
988 /* MX-27 MX-26 [11] */
989 static const char * const rt5670_stereo_adc2_src[] = {
990 	"DAC MIX", "DMIC"
991 };
992 
993 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc2_enum, RT5670_STO1_ADC_MIXER,
994 	RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src);
995 
996 static const struct snd_kcontrol_new rt5670_sto_adc_l2_mux =
997 	SOC_DAPM_ENUM("Stereo1 ADC L2 source", rt5670_stereo1_adc2_enum);
998 
999 static const struct snd_kcontrol_new rt5670_sto_adc_r2_mux =
1000 	SOC_DAPM_ENUM("Stereo1 ADC R2 source", rt5670_stereo1_adc2_enum);
1001 
1002 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc2_enum, RT5670_STO2_ADC_MIXER,
1003 	RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src);
1004 
1005 static const struct snd_kcontrol_new rt5670_sto2_adc_l2_mux =
1006 	SOC_DAPM_ENUM("Stereo2 ADC L2 source", rt5670_stereo2_adc2_enum);
1007 
1008 static const struct snd_kcontrol_new rt5670_sto2_adc_r2_mux =
1009 	SOC_DAPM_ENUM("Stereo2 ADC R2 source", rt5670_stereo2_adc2_enum);
1010 
1011 /* MX-27 MX26 [10] */
1012 static const char * const rt5670_stereo_adc_src[] = {
1013 	"ADC1L ADC2R", "ADC3"
1014 };
1015 
1016 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc_enum, RT5670_STO1_ADC_MIXER,
1017 	RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src);
1018 
1019 static const struct snd_kcontrol_new rt5670_sto_adc_mux =
1020 	SOC_DAPM_ENUM("Stereo1 ADC source", rt5670_stereo1_adc_enum);
1021 
1022 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_enum, RT5670_STO2_ADC_MIXER,
1023 	RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src);
1024 
1025 static const struct snd_kcontrol_new rt5670_sto2_adc_mux =
1026 	SOC_DAPM_ENUM("Stereo2 ADC source", rt5670_stereo2_adc_enum);
1027 
1028 /* MX-27 MX-26 [9:8] */
1029 static const char * const rt5670_stereo_dmic_src[] = {
1030 	"DMIC1", "DMIC2", "DMIC3"
1031 };
1032 
1033 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_dmic_enum, RT5670_STO1_ADC_MIXER,
1034 	RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src);
1035 
1036 static const struct snd_kcontrol_new rt5670_sto1_dmic_mux =
1037 	SOC_DAPM_ENUM("Stereo1 DMIC source", rt5670_stereo1_dmic_enum);
1038 
1039 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_dmic_enum, RT5670_STO2_ADC_MIXER,
1040 	RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src);
1041 
1042 static const struct snd_kcontrol_new rt5670_sto2_dmic_mux =
1043 	SOC_DAPM_ENUM("Stereo2 DMIC source", rt5670_stereo2_dmic_enum);
1044 
1045 /* MX-27 [0] */
1046 static const char * const rt5670_stereo_dmic3_src[] = {
1047 	"DMIC3", "PDM ADC"
1048 };
1049 
1050 static SOC_ENUM_SINGLE_DECL(rt5670_stereo_dmic3_enum, RT5670_STO1_ADC_MIXER,
1051 	RT5670_DMIC3_SRC_SFT, rt5670_stereo_dmic3_src);
1052 
1053 static const struct snd_kcontrol_new rt5670_sto_dmic3_mux =
1054 	SOC_DAPM_ENUM("Stereo DMIC3 source", rt5670_stereo_dmic3_enum);
1055 
1056 /* Mono ADC source */
1057 /* MX-28 [12] */
1058 static const char * const rt5670_mono_adc_l1_src[] = {
1059 	"Mono DAC MIXL", "ADC1"
1060 };
1061 
1062 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l1_enum, RT5670_MONO_ADC_MIXER,
1063 	RT5670_MONO_ADC_L1_SRC_SFT, rt5670_mono_adc_l1_src);
1064 
1065 static const struct snd_kcontrol_new rt5670_mono_adc_l1_mux =
1066 	SOC_DAPM_ENUM("Mono ADC1 left source", rt5670_mono_adc_l1_enum);
1067 /* MX-28 [11] */
1068 static const char * const rt5670_mono_adc_l2_src[] = {
1069 	"Mono DAC MIXL", "DMIC"
1070 };
1071 
1072 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l2_enum, RT5670_MONO_ADC_MIXER,
1073 	RT5670_MONO_ADC_L2_SRC_SFT, rt5670_mono_adc_l2_src);
1074 
1075 static const struct snd_kcontrol_new rt5670_mono_adc_l2_mux =
1076 	SOC_DAPM_ENUM("Mono ADC2 left source", rt5670_mono_adc_l2_enum);
1077 
1078 /* MX-28 [9:8] */
1079 static const char * const rt5670_mono_dmic_src[] = {
1080 	"DMIC1", "DMIC2", "DMIC3"
1081 };
1082 
1083 static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_l_enum, RT5670_MONO_ADC_MIXER,
1084 	RT5670_MONO_DMIC_L_SRC_SFT, rt5670_mono_dmic_src);
1085 
1086 static const struct snd_kcontrol_new rt5670_mono_dmic_l_mux =
1087 	SOC_DAPM_ENUM("Mono DMIC left source", rt5670_mono_dmic_l_enum);
1088 /* MX-28 [1:0] */
1089 static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_r_enum, RT5670_MONO_ADC_MIXER,
1090 	RT5670_MONO_DMIC_R_SRC_SFT, rt5670_mono_dmic_src);
1091 
1092 static const struct snd_kcontrol_new rt5670_mono_dmic_r_mux =
1093 	SOC_DAPM_ENUM("Mono DMIC Right source", rt5670_mono_dmic_r_enum);
1094 /* MX-28 [4] */
1095 static const char * const rt5670_mono_adc_r1_src[] = {
1096 	"Mono DAC MIXR", "ADC2"
1097 };
1098 
1099 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r1_enum, RT5670_MONO_ADC_MIXER,
1100 	RT5670_MONO_ADC_R1_SRC_SFT, rt5670_mono_adc_r1_src);
1101 
1102 static const struct snd_kcontrol_new rt5670_mono_adc_r1_mux =
1103 	SOC_DAPM_ENUM("Mono ADC1 right source", rt5670_mono_adc_r1_enum);
1104 /* MX-28 [3] */
1105 static const char * const rt5670_mono_adc_r2_src[] = {
1106 	"Mono DAC MIXR", "DMIC"
1107 };
1108 
1109 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r2_enum, RT5670_MONO_ADC_MIXER,
1110 	RT5670_MONO_ADC_R2_SRC_SFT, rt5670_mono_adc_r2_src);
1111 
1112 static const struct snd_kcontrol_new rt5670_mono_adc_r2_mux =
1113 	SOC_DAPM_ENUM("Mono ADC2 right source", rt5670_mono_adc_r2_enum);
1114 
1115 /* MX-2D [3:2] */
1116 static const char * const rt5670_txdp_slot_src[] = {
1117 	"Slot 0-1", "Slot 2-3", "Slot 4-5", "Slot 6-7"
1118 };
1119 
1120 static SOC_ENUM_SINGLE_DECL(rt5670_txdp_slot_enum, RT5670_DSP_PATH1,
1121 	RT5670_TXDP_SLOT_SEL_SFT, rt5670_txdp_slot_src);
1122 
1123 static const struct snd_kcontrol_new rt5670_txdp_slot_mux =
1124 	SOC_DAPM_ENUM("TxDP Slot source", rt5670_txdp_slot_enum);
1125 
1126 /* MX-2F [15] */
1127 static const char * const rt5670_if1_adc2_in_src[] = {
1128 	"IF_ADC2", "VAD_ADC"
1129 };
1130 
1131 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in_enum, RT5670_DIG_INF1_DATA,
1132 	RT5670_IF1_ADC2_IN_SFT, rt5670_if1_adc2_in_src);
1133 
1134 static const struct snd_kcontrol_new rt5670_if1_adc2_in_mux =
1135 	SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5670_if1_adc2_in_enum);
1136 
1137 /* MX-2F [14:12] */
1138 static const char * const rt5670_if2_adc_in_src[] = {
1139 	"IF_ADC1", "IF_ADC2", "IF_ADC3", "TxDC_DAC", "TxDP_ADC", "VAD_ADC"
1140 };
1141 
1142 static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_in_enum, RT5670_DIG_INF1_DATA,
1143 	RT5670_IF2_ADC_IN_SFT, rt5670_if2_adc_in_src);
1144 
1145 static const struct snd_kcontrol_new rt5670_if2_adc_in_mux =
1146 	SOC_DAPM_ENUM("IF2 ADC IN source", rt5670_if2_adc_in_enum);
1147 
1148 /* MX-30 [5:4] */
1149 static const char * const rt5670_if4_adc_in_src[] = {
1150 	"IF_ADC1", "IF_ADC2", "IF_ADC3"
1151 };
1152 
1153 static SOC_ENUM_SINGLE_DECL(rt5670_if4_adc_in_enum, RT5670_DIG_INF2_DATA,
1154 	RT5670_IF4_ADC_IN_SFT, rt5670_if4_adc_in_src);
1155 
1156 static const struct snd_kcontrol_new rt5670_if4_adc_in_mux =
1157 	SOC_DAPM_ENUM("IF4 ADC IN source", rt5670_if4_adc_in_enum);
1158 
1159 /* MX-31 [15] [13] [11] [9] */
1160 static const char * const rt5670_pdm_src[] = {
1161 	"Mono DAC", "Stereo DAC"
1162 };
1163 
1164 static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_l_enum, RT5670_PDM_OUT_CTRL,
1165 	RT5670_PDM1_L_SFT, rt5670_pdm_src);
1166 
1167 static const struct snd_kcontrol_new rt5670_pdm1_l_mux =
1168 	SOC_DAPM_ENUM("PDM1 L source", rt5670_pdm1_l_enum);
1169 
1170 static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_r_enum, RT5670_PDM_OUT_CTRL,
1171 	RT5670_PDM1_R_SFT, rt5670_pdm_src);
1172 
1173 static const struct snd_kcontrol_new rt5670_pdm1_r_mux =
1174 	SOC_DAPM_ENUM("PDM1 R source", rt5670_pdm1_r_enum);
1175 
1176 static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_l_enum, RT5670_PDM_OUT_CTRL,
1177 	RT5670_PDM2_L_SFT, rt5670_pdm_src);
1178 
1179 static const struct snd_kcontrol_new rt5670_pdm2_l_mux =
1180 	SOC_DAPM_ENUM("PDM2 L source", rt5670_pdm2_l_enum);
1181 
1182 static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_r_enum, RT5670_PDM_OUT_CTRL,
1183 	RT5670_PDM2_R_SFT, rt5670_pdm_src);
1184 
1185 static const struct snd_kcontrol_new rt5670_pdm2_r_mux =
1186 	SOC_DAPM_ENUM("PDM2 R source", rt5670_pdm2_r_enum);
1187 
1188 /* MX-FA [12] */
1189 static const char * const rt5670_if1_adc1_in1_src[] = {
1190 	"IF_ADC1", "IF1_ADC3"
1191 };
1192 
1193 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in1_enum, RT5670_DIG_MISC,
1194 	RT5670_IF1_ADC1_IN1_SFT, rt5670_if1_adc1_in1_src);
1195 
1196 static const struct snd_kcontrol_new rt5670_if1_adc1_in1_mux =
1197 	SOC_DAPM_ENUM("IF1 ADC1 IN1 source", rt5670_if1_adc1_in1_enum);
1198 
1199 /* MX-FA [11] */
1200 static const char * const rt5670_if1_adc1_in2_src[] = {
1201 	"IF1_ADC1_IN1", "IF1_ADC4"
1202 };
1203 
1204 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in2_enum, RT5670_DIG_MISC,
1205 	RT5670_IF1_ADC1_IN2_SFT, rt5670_if1_adc1_in2_src);
1206 
1207 static const struct snd_kcontrol_new rt5670_if1_adc1_in2_mux =
1208 	SOC_DAPM_ENUM("IF1 ADC1 IN2 source", rt5670_if1_adc1_in2_enum);
1209 
1210 /* MX-FA [10] */
1211 static const char * const rt5670_if1_adc2_in1_src[] = {
1212 	"IF1_ADC2_IN", "IF1_ADC4"
1213 };
1214 
1215 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in1_enum, RT5670_DIG_MISC,
1216 	RT5670_IF1_ADC2_IN1_SFT, rt5670_if1_adc2_in1_src);
1217 
1218 static const struct snd_kcontrol_new rt5670_if1_adc2_in1_mux =
1219 	SOC_DAPM_ENUM("IF1 ADC2 IN1 source", rt5670_if1_adc2_in1_enum);
1220 
1221 /* MX-9D [9:8] */
1222 static const char * const rt5670_vad_adc_src[] = {
1223 	"Sto1 ADC L", "Mono ADC L", "Mono ADC R", "Sto2 ADC L"
1224 };
1225 
1226 static SOC_ENUM_SINGLE_DECL(rt5670_vad_adc_enum, RT5670_VAD_CTRL4,
1227 	RT5670_VAD_SEL_SFT, rt5670_vad_adc_src);
1228 
1229 static const struct snd_kcontrol_new rt5670_vad_adc_mux =
1230 	SOC_DAPM_ENUM("VAD ADC source", rt5670_vad_adc_enum);
1231 
1232 static int rt5670_hp_power_event(struct snd_soc_dapm_widget *w,
1233 			   struct snd_kcontrol *kcontrol, int event)
1234 {
1235 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1236 	struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
1237 
1238 	switch (event) {
1239 	case SND_SOC_DAPM_POST_PMU:
1240 		regmap_update_bits(rt5670->regmap, RT5670_CHARGE_PUMP,
1241 			RT5670_PM_HP_MASK, RT5670_PM_HP_HV);
1242 		regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2,
1243 			0x0400, 0x0400);
1244 		/* headphone amp power on */
1245 		regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
1246 			RT5670_PWR_HA |	RT5670_PWR_FV1 |
1247 			RT5670_PWR_FV2,	RT5670_PWR_HA |
1248 			RT5670_PWR_FV1 | RT5670_PWR_FV2);
1249 		/* depop parameters */
1250 		regmap_write(rt5670->regmap, RT5670_DEPOP_M2, 0x3100);
1251 		regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8009);
1252 		regmap_write(rt5670->regmap, RT5670_PR_BASE +
1253 			RT5670_HP_DCC_INT1, 0x9f00);
1254 		mdelay(20);
1255 		regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1256 		break;
1257 	case SND_SOC_DAPM_PRE_PMD:
1258 		regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x0004);
1259 		msleep(30);
1260 		break;
1261 	default:
1262 		return 0;
1263 	}
1264 
1265 	return 0;
1266 }
1267 
1268 static int rt5670_hp_event(struct snd_soc_dapm_widget *w,
1269 	struct snd_kcontrol *kcontrol, int event)
1270 {
1271 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1272 	struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
1273 
1274 	switch (event) {
1275 	case SND_SOC_DAPM_POST_PMU:
1276 		/* headphone unmute sequence */
1277 		regmap_write(rt5670->regmap, RT5670_PR_BASE +
1278 				RT5670_MAMP_INT_REG2, 0xb400);
1279 		regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772);
1280 		regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x805d);
1281 		regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d);
1282 		regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2,
1283 				0x0300, 0x0300);
1284 		regmap_update_bits(rt5670->regmap, RT5670_HP_VOL,
1285 			RT5670_L_MUTE | RT5670_R_MUTE, 0);
1286 		msleep(80);
1287 		regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1288 		break;
1289 
1290 	case SND_SOC_DAPM_PRE_PMD:
1291 		/* headphone mute sequence */
1292 		regmap_write(rt5670->regmap, RT5670_PR_BASE +
1293 				RT5670_MAMP_INT_REG2, 0xb400);
1294 		regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772);
1295 		regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x803d);
1296 		mdelay(10);
1297 		regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d);
1298 		mdelay(10);
1299 		regmap_update_bits(rt5670->regmap, RT5670_HP_VOL,
1300 				   RT5670_L_MUTE | RT5670_R_MUTE,
1301 				   RT5670_L_MUTE | RT5670_R_MUTE);
1302 		msleep(20);
1303 		regmap_update_bits(rt5670->regmap,
1304 				   RT5670_GEN_CTRL2, 0x0300, 0x0);
1305 		regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1306 		regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0707);
1307 		regmap_write(rt5670->regmap, RT5670_PR_BASE +
1308 				RT5670_MAMP_INT_REG2, 0xfc00);
1309 		break;
1310 
1311 	default:
1312 		return 0;
1313 	}
1314 
1315 	return 0;
1316 }
1317 
1318 static int rt5670_bst1_event(struct snd_soc_dapm_widget *w,
1319 	struct snd_kcontrol *kcontrol, int event)
1320 {
1321 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1322 
1323 	switch (event) {
1324 	case SND_SOC_DAPM_POST_PMU:
1325 		snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
1326 				    RT5670_PWR_BST1_P, RT5670_PWR_BST1_P);
1327 		break;
1328 
1329 	case SND_SOC_DAPM_PRE_PMD:
1330 		snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
1331 				    RT5670_PWR_BST1_P, 0);
1332 		break;
1333 
1334 	default:
1335 		return 0;
1336 	}
1337 
1338 	return 0;
1339 }
1340 
1341 static int rt5670_bst2_event(struct snd_soc_dapm_widget *w,
1342 	struct snd_kcontrol *kcontrol, int event)
1343 {
1344 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1345 
1346 	switch (event) {
1347 	case SND_SOC_DAPM_POST_PMU:
1348 		snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
1349 				    RT5670_PWR_BST2_P, RT5670_PWR_BST2_P);
1350 		break;
1351 
1352 	case SND_SOC_DAPM_PRE_PMD:
1353 		snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
1354 				    RT5670_PWR_BST2_P, 0);
1355 		break;
1356 
1357 	default:
1358 		return 0;
1359 	}
1360 
1361 	return 0;
1362 }
1363 
1364 static const struct snd_soc_dapm_widget rt5670_dapm_widgets[] = {
1365 	SND_SOC_DAPM_SUPPLY("PLL1", RT5670_PWR_ANLG2,
1366 			    RT5670_PWR_PLL_BIT, 0, NULL, 0),
1367 	SND_SOC_DAPM_SUPPLY("I2S DSP", RT5670_PWR_DIG2,
1368 			    RT5670_PWR_I2S_DSP_BIT, 0, NULL, 0),
1369 	SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5670_PWR_VOL,
1370 			    RT5670_PWR_MIC_DET_BIT, 0, NULL, 0),
1371 
1372 	/* ASRC */
1373 	SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5670_ASRC_1,
1374 			      11, 0, NULL, 0),
1375 	SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5670_ASRC_1,
1376 			      12, 0, NULL, 0),
1377 	SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5670_ASRC_1,
1378 			      10, 0, NULL, 0),
1379 	SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5670_ASRC_1,
1380 			      9, 0, NULL, 0),
1381 	SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5670_ASRC_1,
1382 			      8, 0, NULL, 0),
1383 	SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5670_ASRC_1,
1384 			      7, 0, NULL, 0),
1385 	SND_SOC_DAPM_SUPPLY_S("DMIC STO2 ASRC", 1, RT5670_ASRC_1,
1386 			      6, 0, NULL, 0),
1387 	SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5670_ASRC_1,
1388 			      5, 0, NULL, 0),
1389 	SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5670_ASRC_1,
1390 			      4, 0, NULL, 0),
1391 	SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5670_ASRC_1,
1392 			      3, 0, NULL, 0),
1393 	SND_SOC_DAPM_SUPPLY_S("ADC STO2 ASRC", 1, RT5670_ASRC_1,
1394 			      2, 0, NULL, 0),
1395 	SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5670_ASRC_1,
1396 			      1, 0, NULL, 0),
1397 	SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5670_ASRC_1,
1398 			      0, 0, NULL, 0),
1399 
1400 	/* Input Side */
1401 	/* micbias */
1402 	SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5670_PWR_ANLG2,
1403 			     RT5670_PWR_MB1_BIT, 0, NULL, 0),
1404 
1405 	/* Input Lines */
1406 	SND_SOC_DAPM_INPUT("DMIC L1"),
1407 	SND_SOC_DAPM_INPUT("DMIC R1"),
1408 	SND_SOC_DAPM_INPUT("DMIC L2"),
1409 	SND_SOC_DAPM_INPUT("DMIC R2"),
1410 	SND_SOC_DAPM_INPUT("DMIC L3"),
1411 	SND_SOC_DAPM_INPUT("DMIC R3"),
1412 
1413 	SND_SOC_DAPM_INPUT("IN1P"),
1414 	SND_SOC_DAPM_INPUT("IN1N"),
1415 	SND_SOC_DAPM_INPUT("IN2P"),
1416 	SND_SOC_DAPM_INPUT("IN2N"),
1417 
1418 	SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1419 	SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1420 	SND_SOC_DAPM_PGA("DMIC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1421 
1422 	SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1423 			    set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1424 	SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5670_DMIC_CTRL1,
1425 			    RT5670_DMIC_1_EN_SFT, 0, NULL, 0),
1426 	SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5670_DMIC_CTRL1,
1427 			    RT5670_DMIC_2_EN_SFT, 0, NULL, 0),
1428 	SND_SOC_DAPM_SUPPLY("DMIC3 Power", RT5670_DMIC_CTRL1,
1429 			    RT5670_DMIC_3_EN_SFT, 0, NULL, 0),
1430 	/* Boost */
1431 	SND_SOC_DAPM_PGA_E("BST1", RT5670_PWR_ANLG2, RT5670_PWR_BST1_BIT,
1432 			   0, NULL, 0, rt5670_bst1_event,
1433 			   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1434 	SND_SOC_DAPM_PGA_E("BST2", RT5670_PWR_ANLG2, RT5670_PWR_BST2_BIT,
1435 			   0, NULL, 0, rt5670_bst2_event,
1436 			   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1437 	/* Input Volume */
1438 	SND_SOC_DAPM_PGA("INL VOL", RT5670_PWR_VOL,
1439 			 RT5670_PWR_IN_L_BIT, 0, NULL, 0),
1440 	SND_SOC_DAPM_PGA("INR VOL", RT5670_PWR_VOL,
1441 			 RT5670_PWR_IN_R_BIT, 0, NULL, 0),
1442 
1443 	/* REC Mixer */
1444 	SND_SOC_DAPM_MIXER("RECMIXL", RT5670_PWR_MIXER, RT5670_PWR_RM_L_BIT, 0,
1445 			   rt5670_rec_l_mix, ARRAY_SIZE(rt5670_rec_l_mix)),
1446 	SND_SOC_DAPM_MIXER("RECMIXR", RT5670_PWR_MIXER, RT5670_PWR_RM_R_BIT, 0,
1447 			   rt5670_rec_r_mix, ARRAY_SIZE(rt5670_rec_r_mix)),
1448 	/* ADCs */
1449 	SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0),
1450 	SND_SOC_DAPM_ADC("ADC 2", NULL, SND_SOC_NOPM, 0, 0),
1451 
1452 	SND_SOC_DAPM_PGA("ADC 1_2", SND_SOC_NOPM, 0, 0, NULL, 0),
1453 
1454 	SND_SOC_DAPM_SUPPLY("ADC 1 power", RT5670_PWR_DIG1,
1455 			    RT5670_PWR_ADC_L_BIT, 0, NULL, 0),
1456 	SND_SOC_DAPM_SUPPLY("ADC 2 power", RT5670_PWR_DIG1,
1457 			    RT5670_PWR_ADC_R_BIT, 0, NULL, 0),
1458 	SND_SOC_DAPM_SUPPLY("ADC clock", RT5670_PR_BASE +
1459 			    RT5670_CHOP_DAC_ADC, 12, 0, NULL, 0),
1460 	/* ADC Mux */
1461 	SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
1462 			 &rt5670_sto1_dmic_mux),
1463 	SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1464 			 &rt5670_sto_adc_l2_mux),
1465 	SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1466 			 &rt5670_sto_adc_r2_mux),
1467 	SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1468 			 &rt5670_sto_adc_l1_mux),
1469 	SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1470 			 &rt5670_sto_adc_r1_mux),
1471 	SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0,
1472 			 &rt5670_sto2_dmic_mux),
1473 	SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1474 			 &rt5670_sto2_adc_l2_mux),
1475 	SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1476 			 &rt5670_sto2_adc_r2_mux),
1477 	SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1478 			 &rt5670_sto2_adc_l1_mux),
1479 	SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1480 			 &rt5670_sto2_adc_r1_mux),
1481 	SND_SOC_DAPM_MUX("Stereo2 ADC LR Mux", SND_SOC_NOPM, 0, 0,
1482 			 &rt5670_sto2_adc_lr_mux),
1483 	SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
1484 			 &rt5670_mono_dmic_l_mux),
1485 	SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
1486 			 &rt5670_mono_dmic_r_mux),
1487 	SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1488 			 &rt5670_mono_adc_l2_mux),
1489 	SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1490 			 &rt5670_mono_adc_l1_mux),
1491 	SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1492 			 &rt5670_mono_adc_r1_mux),
1493 	SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1494 			 &rt5670_mono_adc_r2_mux),
1495 	/* ADC Mixer */
1496 	SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5670_PWR_DIG2,
1497 			    RT5670_PWR_ADC_S1F_BIT, 0, NULL, 0),
1498 	SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5670_PWR_DIG2,
1499 			    RT5670_PWR_ADC_S2F_BIT, 0, NULL, 0),
1500 	SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", RT5670_STO1_ADC_DIG_VOL,
1501 			   RT5670_L_MUTE_SFT, 1, rt5670_sto1_adc_l_mix,
1502 			   ARRAY_SIZE(rt5670_sto1_adc_l_mix)),
1503 	SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", RT5670_STO1_ADC_DIG_VOL,
1504 			   RT5670_R_MUTE_SFT, 1, rt5670_sto1_adc_r_mix,
1505 			   ARRAY_SIZE(rt5670_sto1_adc_r_mix)),
1506 	SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0,
1507 			   rt5670_sto2_adc_l_mix,
1508 			   ARRAY_SIZE(rt5670_sto2_adc_l_mix)),
1509 	SND_SOC_DAPM_MIXER("Sto2 ADC MIXR", SND_SOC_NOPM, 0, 0,
1510 			   rt5670_sto2_adc_r_mix,
1511 			   ARRAY_SIZE(rt5670_sto2_adc_r_mix)),
1512 	SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5670_PWR_DIG2,
1513 			    RT5670_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1514 	SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5670_MONO_ADC_DIG_VOL,
1515 			   RT5670_L_MUTE_SFT, 1, rt5670_mono_adc_l_mix,
1516 			   ARRAY_SIZE(rt5670_mono_adc_l_mix)),
1517 	SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5670_PWR_DIG2,
1518 			    RT5670_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1519 	SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5670_MONO_ADC_DIG_VOL,
1520 			   RT5670_R_MUTE_SFT, 1, rt5670_mono_adc_r_mix,
1521 			   ARRAY_SIZE(rt5670_mono_adc_r_mix)),
1522 
1523 	/* ADC PGA */
1524 	SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1525 	SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1526 	SND_SOC_DAPM_PGA("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1527 	SND_SOC_DAPM_PGA("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1528 	SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1529 	SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1530 	SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1531 	SND_SOC_DAPM_PGA("Mono ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1532 	SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1533 	SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1534 	SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1535 	SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1536 	SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1537 	SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1538 	SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1539 	SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1540 
1541 	/* DSP */
1542 	SND_SOC_DAPM_PGA("TxDP_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1543 	SND_SOC_DAPM_PGA("TxDP_ADC_L", SND_SOC_NOPM, 0, 0, NULL, 0),
1544 	SND_SOC_DAPM_PGA("TxDP_ADC_R", SND_SOC_NOPM, 0, 0, NULL, 0),
1545 	SND_SOC_DAPM_PGA("TxDC_DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1546 
1547 	SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0,
1548 			 &rt5670_txdp_slot_mux),
1549 
1550 	SND_SOC_DAPM_MUX("DSP UL Mux", SND_SOC_NOPM, 0, 0,
1551 			 &rt5670_dsp_ul_mux),
1552 	SND_SOC_DAPM_MUX("DSP DL Mux", SND_SOC_NOPM, 0, 0,
1553 			 &rt5670_dsp_dl_mux),
1554 
1555 	SND_SOC_DAPM_MUX("RxDP Mux", SND_SOC_NOPM, 0, 0,
1556 			 &rt5670_rxdp_mux),
1557 
1558 	/* IF2 Mux */
1559 	SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0,
1560 			 &rt5670_if2_adc_in_mux),
1561 
1562 	/* Digital Interface */
1563 	SND_SOC_DAPM_SUPPLY("I2S1", RT5670_PWR_DIG1,
1564 			    RT5670_PWR_I2S1_BIT, 0, NULL, 0),
1565 	SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1566 	SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1567 	SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1568 	SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1569 	SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1570 	SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1571 	SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1572 	SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1573 	SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1574 	SND_SOC_DAPM_SUPPLY("I2S2", RT5670_PWR_DIG1,
1575 			    RT5670_PWR_I2S2_BIT, 0, NULL, 0),
1576 	SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1577 	SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1578 	SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1579 	SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1580 	SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1581 	SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1582 
1583 	/* Digital Interface Select */
1584 	SND_SOC_DAPM_MUX("IF1 ADC1 IN1 Mux", SND_SOC_NOPM, 0, 0,
1585 			 &rt5670_if1_adc1_in1_mux),
1586 	SND_SOC_DAPM_MUX("IF1 ADC1 IN2 Mux", SND_SOC_NOPM, 0, 0,
1587 			 &rt5670_if1_adc1_in2_mux),
1588 	SND_SOC_DAPM_MUX("IF1 ADC2 IN Mux", SND_SOC_NOPM, 0, 0,
1589 			 &rt5670_if1_adc2_in_mux),
1590 	SND_SOC_DAPM_MUX("IF1 ADC2 IN1 Mux", SND_SOC_NOPM, 0, 0,
1591 			 &rt5670_if1_adc2_in1_mux),
1592 	SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM, 0, 0,
1593 			 &rt5670_vad_adc_mux),
1594 
1595 	/* Audio Interface */
1596 	SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1597 	SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1598 	SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1599 	SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0,
1600 			     RT5670_GPIO_CTRL1, RT5670_I2S2_PIN_SFT, 1),
1601 
1602 	/* Audio DSP */
1603 	SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1604 
1605 	/* Output Side */
1606 	/* DAC mixer before sound effect  */
1607 	SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
1608 			   rt5670_dac_l_mix, ARRAY_SIZE(rt5670_dac_l_mix)),
1609 	SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
1610 			   rt5670_dac_r_mix, ARRAY_SIZE(rt5670_dac_r_mix)),
1611 	SND_SOC_DAPM_PGA("DAC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1612 
1613 	/* DAC2 channel Mux */
1614 	SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1615 			 &rt5670_dac_l2_mux),
1616 	SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1617 			 &rt5670_dac_r2_mux),
1618 	SND_SOC_DAPM_PGA("DAC L2 Volume", RT5670_PWR_DIG1,
1619 			 RT5670_PWR_DAC_L2_BIT, 0, NULL, 0),
1620 	SND_SOC_DAPM_PGA("DAC R2 Volume", RT5670_PWR_DIG1,
1621 			 RT5670_PWR_DAC_R2_BIT, 0, NULL, 0),
1622 
1623 	SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1l_mux),
1624 	SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1r_mux),
1625 
1626 	/* DAC Mixer */
1627 	SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5670_PWR_DIG2,
1628 			    RT5670_PWR_DAC_S1F_BIT, 0, NULL, 0),
1629 	SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5670_PWR_DIG2,
1630 			    RT5670_PWR_DAC_MF_L_BIT, 0, NULL, 0),
1631 	SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5670_PWR_DIG2,
1632 			    RT5670_PWR_DAC_MF_R_BIT, 0, NULL, 0),
1633 	SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1634 			   rt5670_sto_dac_l_mix,
1635 			   ARRAY_SIZE(rt5670_sto_dac_l_mix)),
1636 	SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1637 			   rt5670_sto_dac_r_mix,
1638 			   ARRAY_SIZE(rt5670_sto_dac_r_mix)),
1639 	SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1640 			   rt5670_mono_dac_l_mix,
1641 			   ARRAY_SIZE(rt5670_mono_dac_l_mix)),
1642 	SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1643 			   rt5670_mono_dac_r_mix,
1644 			   ARRAY_SIZE(rt5670_mono_dac_r_mix)),
1645 	SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1646 			   rt5670_dig_l_mix,
1647 			   ARRAY_SIZE(rt5670_dig_l_mix)),
1648 	SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1649 			   rt5670_dig_r_mix,
1650 			   ARRAY_SIZE(rt5670_dig_r_mix)),
1651 
1652 	/* DACs */
1653 	SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5670_PWR_DIG1,
1654 			    RT5670_PWR_DAC_L1_BIT, 0, NULL, 0),
1655 	SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5670_PWR_DIG1,
1656 			    RT5670_PWR_DAC_R1_BIT, 0, NULL, 0),
1657 	SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
1658 	SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
1659 	SND_SOC_DAPM_DAC("DAC L2", NULL, RT5670_PWR_DIG1,
1660 			 RT5670_PWR_DAC_L2_BIT, 0),
1661 
1662 	SND_SOC_DAPM_DAC("DAC R2", NULL, RT5670_PWR_DIG1,
1663 			 RT5670_PWR_DAC_R2_BIT, 0),
1664 	/* OUT Mixer */
1665 
1666 	SND_SOC_DAPM_MIXER("OUT MIXL", RT5670_PWR_MIXER, RT5670_PWR_OM_L_BIT,
1667 			   0, rt5670_out_l_mix, ARRAY_SIZE(rt5670_out_l_mix)),
1668 	SND_SOC_DAPM_MIXER("OUT MIXR", RT5670_PWR_MIXER, RT5670_PWR_OM_R_BIT,
1669 			   0, rt5670_out_r_mix, ARRAY_SIZE(rt5670_out_r_mix)),
1670 	/* Ouput Volume */
1671 	SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5670_PWR_VOL,
1672 			   RT5670_PWR_HV_L_BIT, 0,
1673 			   rt5670_hpvoll_mix, ARRAY_SIZE(rt5670_hpvoll_mix)),
1674 	SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5670_PWR_VOL,
1675 			   RT5670_PWR_HV_R_BIT, 0,
1676 			   rt5670_hpvolr_mix, ARRAY_SIZE(rt5670_hpvolr_mix)),
1677 	SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
1678 	SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM,	0, 0, NULL, 0),
1679 	SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
1680 
1681 	/* HPO/LOUT/Mono Mixer */
1682 	SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0,
1683 			   rt5670_hpo_mix, ARRAY_SIZE(rt5670_hpo_mix)),
1684 	SND_SOC_DAPM_MIXER("LOUT MIX", RT5670_PWR_ANLG1, RT5670_PWR_LM_BIT,
1685 			   0, rt5670_lout_mix, ARRAY_SIZE(rt5670_lout_mix)),
1686 	SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM, 0, 0,
1687 			      rt5670_hp_power_event, SND_SOC_DAPM_POST_PMU |
1688 			      SND_SOC_DAPM_PRE_PMD),
1689 	SND_SOC_DAPM_SUPPLY("HP L Amp", RT5670_PWR_ANLG1,
1690 			    RT5670_PWR_HP_L_BIT, 0, NULL, 0),
1691 	SND_SOC_DAPM_SUPPLY("HP R Amp", RT5670_PWR_ANLG1,
1692 			    RT5670_PWR_HP_R_BIT, 0, NULL, 0),
1693 	SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0,
1694 			   rt5670_hp_event, SND_SOC_DAPM_PRE_PMD |
1695 			   SND_SOC_DAPM_POST_PMU),
1696 	SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
1697 			    &lout_l_enable_control),
1698 	SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
1699 			    &lout_r_enable_control),
1700 	SND_SOC_DAPM_PGA("LOUT Amp", SND_SOC_NOPM, 0, 0, NULL, 0),
1701 
1702 	/* PDM */
1703 	SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5670_PWR_DIG2,
1704 		RT5670_PWR_PDM1_BIT, 0, NULL, 0),
1705 
1706 	SND_SOC_DAPM_MUX("PDM1 L Mux", RT5670_PDM_OUT_CTRL,
1707 			 RT5670_M_PDM1_L_SFT, 1, &rt5670_pdm1_l_mux),
1708 	SND_SOC_DAPM_MUX("PDM1 R Mux", RT5670_PDM_OUT_CTRL,
1709 			 RT5670_M_PDM1_R_SFT, 1, &rt5670_pdm1_r_mux),
1710 
1711 	/* Output Lines */
1712 	SND_SOC_DAPM_OUTPUT("HPOL"),
1713 	SND_SOC_DAPM_OUTPUT("HPOR"),
1714 	SND_SOC_DAPM_OUTPUT("LOUTL"),
1715 	SND_SOC_DAPM_OUTPUT("LOUTR"),
1716 };
1717 
1718 static const struct snd_soc_dapm_widget rt5670_specific_dapm_widgets[] = {
1719 	SND_SOC_DAPM_SUPPLY("PDM2 Power", RT5670_PWR_DIG2,
1720 		RT5670_PWR_PDM2_BIT, 0, NULL, 0),
1721 	SND_SOC_DAPM_MUX("PDM2 L Mux", RT5670_PDM_OUT_CTRL,
1722 			 RT5670_M_PDM2_L_SFT, 1, &rt5670_pdm2_l_mux),
1723 	SND_SOC_DAPM_MUX("PDM2 R Mux", RT5670_PDM_OUT_CTRL,
1724 			 RT5670_M_PDM2_R_SFT, 1, &rt5670_pdm2_r_mux),
1725 	SND_SOC_DAPM_OUTPUT("PDM1L"),
1726 	SND_SOC_DAPM_OUTPUT("PDM1R"),
1727 	SND_SOC_DAPM_OUTPUT("PDM2L"),
1728 	SND_SOC_DAPM_OUTPUT("PDM2R"),
1729 };
1730 
1731 static const struct snd_soc_dapm_widget rt5672_specific_dapm_widgets[] = {
1732 	SND_SOC_DAPM_PGA("SPO Amp", SND_SOC_NOPM, 0, 0, NULL, 0),
1733 	SND_SOC_DAPM_OUTPUT("SPOLP"),
1734 	SND_SOC_DAPM_OUTPUT("SPOLN"),
1735 	SND_SOC_DAPM_OUTPUT("SPORP"),
1736 	SND_SOC_DAPM_OUTPUT("SPORN"),
1737 };
1738 
1739 static const struct snd_soc_dapm_route rt5670_dapm_routes[] = {
1740 	{ "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc },
1741 	{ "ADC Stereo2 Filter", NULL, "ADC STO2 ASRC", is_using_asrc },
1742 	{ "ADC Mono Left Filter", NULL, "ADC MONO L ASRC", is_using_asrc },
1743 	{ "ADC Mono Right Filter", NULL, "ADC MONO R ASRC", is_using_asrc },
1744 	{ "DAC Mono Left Filter", NULL, "DAC MONO L ASRC", is_using_asrc },
1745 	{ "DAC Mono Right Filter", NULL, "DAC MONO R ASRC", is_using_asrc },
1746 	{ "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc },
1747 	{ "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC", can_use_asrc },
1748 	{ "Stereo2 DMIC Mux", NULL, "DMIC STO2 ASRC", can_use_asrc },
1749 	{ "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC", can_use_asrc },
1750 	{ "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC", can_use_asrc },
1751 
1752 	{ "I2S1", NULL, "I2S1 ASRC", can_use_asrc},
1753 	{ "I2S2", NULL, "I2S2 ASRC", can_use_asrc},
1754 
1755 	{ "DMIC1", NULL, "DMIC L1" },
1756 	{ "DMIC1", NULL, "DMIC R1" },
1757 	{ "DMIC2", NULL, "DMIC L2" },
1758 	{ "DMIC2", NULL, "DMIC R2" },
1759 	{ "DMIC3", NULL, "DMIC L3" },
1760 	{ "DMIC3", NULL, "DMIC R3" },
1761 
1762 	{ "BST1", NULL, "IN1P" },
1763 	{ "BST1", NULL, "IN1N" },
1764 	{ "BST1", NULL, "Mic Det Power" },
1765 	{ "BST2", NULL, "IN2P" },
1766 	{ "BST2", NULL, "IN2N" },
1767 
1768 	{ "INL VOL", NULL, "IN2P" },
1769 	{ "INR VOL", NULL, "IN2N" },
1770 
1771 	{ "RECMIXL", "INL Switch", "INL VOL" },
1772 	{ "RECMIXL", "BST2 Switch", "BST2" },
1773 	{ "RECMIXL", "BST1 Switch", "BST1" },
1774 
1775 	{ "RECMIXR", "INR Switch", "INR VOL" },
1776 	{ "RECMIXR", "BST2 Switch", "BST2" },
1777 	{ "RECMIXR", "BST1 Switch", "BST1" },
1778 
1779 	{ "ADC 1", NULL, "RECMIXL" },
1780 	{ "ADC 1", NULL, "ADC 1 power" },
1781 	{ "ADC 1", NULL, "ADC clock" },
1782 	{ "ADC 2", NULL, "RECMIXR" },
1783 	{ "ADC 2", NULL, "ADC 2 power" },
1784 	{ "ADC 2", NULL, "ADC clock" },
1785 
1786 	{ "DMIC L1", NULL, "DMIC CLK" },
1787 	{ "DMIC L1", NULL, "DMIC1 Power" },
1788 	{ "DMIC R1", NULL, "DMIC CLK" },
1789 	{ "DMIC R1", NULL, "DMIC1 Power" },
1790 	{ "DMIC L2", NULL, "DMIC CLK" },
1791 	{ "DMIC L2", NULL, "DMIC2 Power" },
1792 	{ "DMIC R2", NULL, "DMIC CLK" },
1793 	{ "DMIC R2", NULL, "DMIC2 Power" },
1794 	{ "DMIC L3", NULL, "DMIC CLK" },
1795 	{ "DMIC L3", NULL, "DMIC3 Power" },
1796 	{ "DMIC R3", NULL, "DMIC CLK" },
1797 	{ "DMIC R3", NULL, "DMIC3 Power" },
1798 
1799 	{ "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
1800 	{ "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
1801 	{ "Stereo1 DMIC Mux", "DMIC3", "DMIC3" },
1802 
1803 	{ "Stereo2 DMIC Mux", "DMIC1", "DMIC1" },
1804 	{ "Stereo2 DMIC Mux", "DMIC2", "DMIC2" },
1805 	{ "Stereo2 DMIC Mux", "DMIC3", "DMIC3" },
1806 
1807 	{ "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
1808 	{ "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
1809 	{ "Mono DMIC L Mux", "DMIC3", "DMIC L3" },
1810 
1811 	{ "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
1812 	{ "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
1813 	{ "Mono DMIC R Mux", "DMIC3", "DMIC R3" },
1814 
1815 	{ "ADC 1_2", NULL, "ADC 1" },
1816 	{ "ADC 1_2", NULL, "ADC 2" },
1817 
1818 	{ "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1819 	{ "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
1820 	{ "Stereo1 ADC L1 Mux", "ADC", "ADC 1_2" },
1821 	{ "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
1822 
1823 	{ "Stereo1 ADC R1 Mux", "ADC", "ADC 1_2" },
1824 	{ "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
1825 	{ "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1826 	{ "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
1827 
1828 	{ "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
1829 	{ "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1830 	{ "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1831 	{ "Mono ADC L1 Mux", "ADC1",  "ADC 1" },
1832 
1833 	{ "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1834 	{ "Mono ADC R1 Mux", "ADC2", "ADC 2" },
1835 	{ "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
1836 	{ "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1837 
1838 	{ "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
1839 	{ "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
1840 	{ "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
1841 	{ "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
1842 
1843 	{ "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
1844 	{ "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" },
1845 	{ "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
1846 
1847 	{ "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
1848 	{ "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" },
1849 	{ "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
1850 
1851 	{ "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
1852 	{ "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
1853 	{ "Mono ADC MIXL", NULL, "ADC Mono Left Filter" },
1854 	{ "ADC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll },
1855 
1856 	{ "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
1857 	{ "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
1858 	{ "Mono ADC MIXR", NULL, "ADC Mono Right Filter" },
1859 	{ "ADC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll },
1860 
1861 	{ "Stereo2 ADC L2 Mux", "DMIC", "Stereo2 DMIC Mux" },
1862 	{ "Stereo2 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
1863 	{ "Stereo2 ADC L1 Mux", "ADC", "ADC 1_2" },
1864 	{ "Stereo2 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
1865 
1866 	{ "Stereo2 ADC R1 Mux", "ADC", "ADC 1_2" },
1867 	{ "Stereo2 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
1868 	{ "Stereo2 ADC R2 Mux", "DMIC", "Stereo2 DMIC Mux" },
1869 	{ "Stereo2 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
1870 
1871 	{ "Sto2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux" },
1872 	{ "Sto2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux" },
1873 	{ "Sto2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux" },
1874 	{ "Sto2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux" },
1875 
1876 	{ "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXL" },
1877 	{ "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXR" },
1878 
1879 	{ "Stereo2 ADC LR Mux", "L", "Sto2 ADC MIXL" },
1880 	{ "Stereo2 ADC LR Mux", "LR", "Sto2 ADC LR MIX" },
1881 
1882 	{ "Stereo2 ADC MIXL", NULL, "Stereo2 ADC LR Mux" },
1883 	{ "Stereo2 ADC MIXL", NULL, "ADC Stereo2 Filter" },
1884 	{ "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll },
1885 
1886 	{ "Stereo2 ADC MIXR", NULL, "Sto2 ADC MIXR" },
1887 	{ "Stereo2 ADC MIXR", NULL, "ADC Stereo2 Filter" },
1888 	{ "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll },
1889 
1890 	{ "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
1891 	{ "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
1892 	{ "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
1893 	{ "VAD ADC Mux", "Sto2 ADC L", "Sto2 ADC MIXL" },
1894 
1895 	{ "VAD_ADC", NULL, "VAD ADC Mux" },
1896 
1897 	{ "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
1898 	{ "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
1899 	{ "IF_ADC2", NULL, "Mono ADC MIXL" },
1900 	{ "IF_ADC2", NULL, "Mono ADC MIXR" },
1901 	{ "IF_ADC3", NULL, "Stereo2 ADC MIXL" },
1902 	{ "IF_ADC3", NULL, "Stereo2 ADC MIXR" },
1903 
1904 	{ "IF1 ADC1 IN1 Mux", "IF_ADC1", "IF_ADC1" },
1905 	{ "IF1 ADC1 IN1 Mux", "IF1_ADC3", "IF1_ADC3" },
1906 
1907 	{ "IF1 ADC1 IN2 Mux", "IF1_ADC1_IN1", "IF1 ADC1 IN1 Mux" },
1908 	{ "IF1 ADC1 IN2 Mux", "IF1_ADC4", "IF1_ADC4" },
1909 
1910 	{ "IF1 ADC2 IN Mux", "IF_ADC2", "IF_ADC2" },
1911 	{ "IF1 ADC2 IN Mux", "VAD_ADC", "VAD_ADC" },
1912 
1913 	{ "IF1 ADC2 IN1 Mux", "IF1_ADC2_IN", "IF1 ADC2 IN Mux" },
1914 	{ "IF1 ADC2 IN1 Mux", "IF1_ADC4", "IF1_ADC4" },
1915 
1916 	{ "IF1_ADC1" , NULL, "IF1 ADC1 IN2 Mux" },
1917 	{ "IF1_ADC2" , NULL, "IF1 ADC2 IN1 Mux" },
1918 
1919 	{ "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL" },
1920 	{ "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR" },
1921 	{ "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXL" },
1922 	{ "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXR" },
1923 	{ "Mono ADC MIX", NULL, "Mono ADC MIXL" },
1924 	{ "Mono ADC MIX", NULL, "Mono ADC MIXR" },
1925 
1926 	{ "RxDP Mux", "IF2 DAC", "IF2 DAC" },
1927 	{ "RxDP Mux", "IF1 DAC", "IF1 DAC2" },
1928 	{ "RxDP Mux", "STO1 ADC Mixer", "Stereo1 ADC MIX" },
1929 	{ "RxDP Mux", "STO2 ADC Mixer", "Stereo2 ADC MIX" },
1930 	{ "RxDP Mux", "Mono ADC Mixer L", "Mono ADC MIXL" },
1931 	{ "RxDP Mux", "Mono ADC Mixer R", "Mono ADC MIXR" },
1932 	{ "RxDP Mux", "DAC1", "DAC MIX" },
1933 
1934 	{ "TDM Data Mux", "Slot 0-1", "Stereo1 ADC MIX" },
1935 	{ "TDM Data Mux", "Slot 2-3", "Mono ADC MIX" },
1936 	{ "TDM Data Mux", "Slot 4-5", "Stereo2 ADC MIX" },
1937 	{ "TDM Data Mux", "Slot 6-7", "IF2 DAC" },
1938 
1939 	{ "DSP UL Mux", "Bypass", "TDM Data Mux" },
1940 	{ "DSP UL Mux", NULL, "I2S DSP" },
1941 	{ "DSP DL Mux", "Bypass", "RxDP Mux" },
1942 	{ "DSP DL Mux", NULL, "I2S DSP" },
1943 
1944 	{ "TxDP_ADC_L", NULL, "DSP UL Mux" },
1945 	{ "TxDP_ADC_R", NULL, "DSP UL Mux" },
1946 	{ "TxDC_DAC", NULL, "DSP DL Mux" },
1947 
1948 	{ "TxDP_ADC", NULL, "TxDP_ADC_L" },
1949 	{ "TxDP_ADC", NULL, "TxDP_ADC_R" },
1950 
1951 	{ "IF1 ADC", NULL, "I2S1" },
1952 	{ "IF1 ADC", NULL, "IF1_ADC1" },
1953 	{ "IF1 ADC", NULL, "IF1_ADC2" },
1954 	{ "IF1 ADC", NULL, "IF_ADC3" },
1955 	{ "IF1 ADC", NULL, "TxDP_ADC" },
1956 
1957 	{ "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
1958 	{ "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
1959 	{ "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" },
1960 	{ "IF2 ADC Mux", "TxDC_DAC", "TxDC_DAC" },
1961 	{ "IF2 ADC Mux", "TxDP_ADC", "TxDP_ADC" },
1962 	{ "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
1963 
1964 	{ "IF2 ADC L", NULL, "IF2 ADC Mux" },
1965 	{ "IF2 ADC R", NULL, "IF2 ADC Mux" },
1966 
1967 	{ "IF2 ADC", NULL, "I2S2" },
1968 	{ "IF2 ADC", NULL, "IF2 ADC L" },
1969 	{ "IF2 ADC", NULL, "IF2 ADC R" },
1970 
1971 	{ "AIF1TX", NULL, "IF1 ADC" },
1972 	{ "AIF2TX", NULL, "IF2 ADC" },
1973 
1974 	{ "IF1 DAC1", NULL, "AIF1RX" },
1975 	{ "IF1 DAC2", NULL, "AIF1RX" },
1976 	{ "IF2 DAC", NULL, "AIF2RX" },
1977 
1978 	{ "IF1 DAC1", NULL, "I2S1" },
1979 	{ "IF1 DAC2", NULL, "I2S1" },
1980 	{ "IF2 DAC", NULL, "I2S2" },
1981 
1982 	{ "IF1 DAC2 L", NULL, "IF1 DAC2" },
1983 	{ "IF1 DAC2 R", NULL, "IF1 DAC2" },
1984 	{ "IF1 DAC1 L", NULL, "IF1 DAC1" },
1985 	{ "IF1 DAC1 R", NULL, "IF1 DAC1" },
1986 	{ "IF2 DAC L", NULL, "IF2 DAC" },
1987 	{ "IF2 DAC R", NULL, "IF2 DAC" },
1988 
1989 	{ "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" },
1990 	{ "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
1991 
1992 	{ "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" },
1993 	{ "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
1994 
1995 	{ "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
1996 	{ "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
1997 	{ "DAC1 MIXL", NULL, "DAC Stereo1 Filter" },
1998 	{ "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
1999 	{ "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
2000 	{ "DAC1 MIXR", NULL, "DAC Stereo1 Filter" },
2001 
2002 	{ "DAC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
2003 	{ "DAC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll },
2004 	{ "DAC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll },
2005 
2006 	{ "DAC MIX", NULL, "DAC1 MIXL" },
2007 	{ "DAC MIX", NULL, "DAC1 MIXR" },
2008 
2009 	{ "Audio DSP", NULL, "DAC1 MIXL" },
2010 	{ "Audio DSP", NULL, "DAC1 MIXR" },
2011 
2012 	{ "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" },
2013 	{ "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
2014 	{ "DAC L2 Mux", "TxDC DAC", "TxDC_DAC" },
2015 	{ "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
2016 	{ "DAC L2 Volume", NULL, "DAC L2 Mux" },
2017 	{ "DAC L2 Volume", NULL, "DAC Mono Left Filter" },
2018 
2019 	{ "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" },
2020 	{ "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
2021 	{ "DAC R2 Mux", "TxDC DAC", "TxDC_DAC" },
2022 	{ "DAC R2 Mux", "TxDP ADC", "TxDP_ADC" },
2023 	{ "DAC R2 Volume", NULL, "DAC R2 Mux" },
2024 	{ "DAC R2 Volume", NULL, "DAC Mono Right Filter" },
2025 
2026 	{ "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2027 	{ "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
2028 	{ "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2029 	{ "Stereo DAC MIXL", NULL, "DAC Stereo1 Filter" },
2030 	{ "Stereo DAC MIXL", NULL, "DAC L1 Power" },
2031 	{ "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2032 	{ "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
2033 	{ "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2034 	{ "Stereo DAC MIXR", NULL, "DAC Stereo1 Filter" },
2035 	{ "Stereo DAC MIXR", NULL, "DAC R1 Power" },
2036 
2037 	{ "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2038 	{ "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2039 	{ "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2040 	{ "Mono DAC MIXL", NULL, "DAC Mono Left Filter" },
2041 	{ "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2042 	{ "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2043 	{ "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2044 	{ "Mono DAC MIXR", NULL, "DAC Mono Right Filter" },
2045 
2046 	{ "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
2047 	{ "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2048 	{ "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2049 	{ "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
2050 	{ "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2051 	{ "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2052 
2053 	{ "DAC L1", NULL, "DAC L1 Power" },
2054 	{ "DAC L1", NULL, "Stereo DAC MIXL" },
2055 	{ "DAC R1", NULL, "DAC R1 Power" },
2056 	{ "DAC R1", NULL, "Stereo DAC MIXR" },
2057 	{ "DAC L2", NULL, "Mono DAC MIXL" },
2058 	{ "DAC R2", NULL, "Mono DAC MIXR" },
2059 
2060 	{ "OUT MIXL", "BST1 Switch", "BST1" },
2061 	{ "OUT MIXL", "INL Switch", "INL VOL" },
2062 	{ "OUT MIXL", "DAC L2 Switch", "DAC L2" },
2063 	{ "OUT MIXL", "DAC L1 Switch", "DAC L1" },
2064 
2065 	{ "OUT MIXR", "BST2 Switch", "BST2" },
2066 	{ "OUT MIXR", "INR Switch", "INR VOL" },
2067 	{ "OUT MIXR", "DAC R2 Switch", "DAC R2" },
2068 	{ "OUT MIXR", "DAC R1 Switch", "DAC R1" },
2069 
2070 	{ "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
2071 	{ "HPOVOL MIXL", "INL Switch", "INL VOL" },
2072 	{ "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
2073 	{ "HPOVOL MIXR", "INR Switch", "INR VOL" },
2074 
2075 	{ "DAC 2", NULL, "DAC L2" },
2076 	{ "DAC 2", NULL, "DAC R2" },
2077 	{ "DAC 1", NULL, "DAC L1" },
2078 	{ "DAC 1", NULL, "DAC R1" },
2079 	{ "HPOVOL", NULL, "HPOVOL MIXL" },
2080 	{ "HPOVOL", NULL, "HPOVOL MIXR" },
2081 	{ "HPO MIX", "DAC1 Switch", "DAC 1" },
2082 	{ "HPO MIX", "HPVOL Switch", "HPOVOL" },
2083 
2084 	{ "LOUT MIX", "DAC L1 Switch", "DAC L1" },
2085 	{ "LOUT MIX", "DAC R1 Switch", "DAC R1" },
2086 	{ "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
2087 	{ "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
2088 
2089 	{ "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2090 	{ "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
2091 	{ "PDM1 L Mux", NULL, "PDM1 Power" },
2092 	{ "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2093 	{ "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
2094 	{ "PDM1 R Mux", NULL, "PDM1 Power" },
2095 
2096 	{ "HP Amp", NULL, "HPO MIX" },
2097 	{ "HP Amp", NULL, "Mic Det Power" },
2098 	{ "HPOL", NULL, "HP Amp" },
2099 	{ "HPOL", NULL, "HP L Amp" },
2100 	{ "HPOL", NULL, "Improve HP Amp Drv" },
2101 	{ "HPOR", NULL, "HP Amp" },
2102 	{ "HPOR", NULL, "HP R Amp" },
2103 	{ "HPOR", NULL, "Improve HP Amp Drv" },
2104 
2105 	{ "LOUT Amp", NULL, "LOUT MIX" },
2106 	{ "LOUT L Playback", "Switch", "LOUT Amp" },
2107 	{ "LOUT R Playback", "Switch", "LOUT Amp" },
2108 	{ "LOUTL", NULL, "LOUT L Playback" },
2109 	{ "LOUTR", NULL, "LOUT R Playback" },
2110 	{ "LOUTL", NULL, "Improve HP Amp Drv" },
2111 	{ "LOUTR", NULL, "Improve HP Amp Drv" },
2112 };
2113 
2114 static const struct snd_soc_dapm_route rt5670_specific_dapm_routes[] = {
2115 	{ "PDM2 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2116 	{ "PDM2 L Mux", "Mono DAC", "Mono DAC MIXL" },
2117 	{ "PDM2 L Mux", NULL, "PDM2 Power" },
2118 	{ "PDM2 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2119 	{ "PDM2 R Mux", "Mono DAC", "Mono DAC MIXR" },
2120 	{ "PDM2 R Mux", NULL, "PDM2 Power" },
2121 	{ "PDM1L", NULL, "PDM1 L Mux" },
2122 	{ "PDM1R", NULL, "PDM1 R Mux" },
2123 	{ "PDM2L", NULL, "PDM2 L Mux" },
2124 	{ "PDM2R", NULL, "PDM2 R Mux" },
2125 };
2126 
2127 static const struct snd_soc_dapm_route rt5672_specific_dapm_routes[] = {
2128 	{ "SPO Amp", NULL, "PDM1 L Mux" },
2129 	{ "SPO Amp", NULL, "PDM1 R Mux" },
2130 	{ "SPOLP", NULL, "SPO Amp" },
2131 	{ "SPOLN", NULL, "SPO Amp" },
2132 	{ "SPORP", NULL, "SPO Amp" },
2133 	{ "SPORN", NULL, "SPO Amp" },
2134 };
2135 
2136 static int rt5670_hw_params(struct snd_pcm_substream *substream,
2137 	struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2138 {
2139 	struct snd_soc_codec *codec = dai->codec;
2140 	struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2141 	unsigned int val_len = 0, val_clk, mask_clk;
2142 	int pre_div, bclk_ms, frame_size;
2143 
2144 	rt5670->lrck[dai->id] = params_rate(params);
2145 	pre_div = rl6231_get_clk_info(rt5670->sysclk, rt5670->lrck[dai->id]);
2146 	if (pre_div < 0) {
2147 		dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n",
2148 			rt5670->lrck[dai->id], dai->id);
2149 		return -EINVAL;
2150 	}
2151 	frame_size = snd_soc_params_to_frame_size(params);
2152 	if (frame_size < 0) {
2153 		dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
2154 		return -EINVAL;
2155 	}
2156 	bclk_ms = frame_size > 32;
2157 	rt5670->bclk[dai->id] = rt5670->lrck[dai->id] * (32 << bclk_ms);
2158 
2159 	dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2160 		rt5670->bclk[dai->id], rt5670->lrck[dai->id]);
2161 	dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2162 				bclk_ms, pre_div, dai->id);
2163 
2164 	switch (params_width(params)) {
2165 	case 16:
2166 		break;
2167 	case 20:
2168 		val_len |= RT5670_I2S_DL_20;
2169 		break;
2170 	case 24:
2171 		val_len |= RT5670_I2S_DL_24;
2172 		break;
2173 	case 8:
2174 		val_len |= RT5670_I2S_DL_8;
2175 		break;
2176 	default:
2177 		return -EINVAL;
2178 	}
2179 
2180 	switch (dai->id) {
2181 	case RT5670_AIF1:
2182 		mask_clk = RT5670_I2S_BCLK_MS1_MASK | RT5670_I2S_PD1_MASK;
2183 		val_clk = bclk_ms << RT5670_I2S_BCLK_MS1_SFT |
2184 			pre_div << RT5670_I2S_PD1_SFT;
2185 		snd_soc_update_bits(codec, RT5670_I2S1_SDP,
2186 			RT5670_I2S_DL_MASK, val_len);
2187 		snd_soc_update_bits(codec, RT5670_ADDA_CLK1, mask_clk, val_clk);
2188 		break;
2189 	case RT5670_AIF2:
2190 		mask_clk = RT5670_I2S_BCLK_MS2_MASK | RT5670_I2S_PD2_MASK;
2191 		val_clk = bclk_ms << RT5670_I2S_BCLK_MS2_SFT |
2192 			pre_div << RT5670_I2S_PD2_SFT;
2193 		snd_soc_update_bits(codec, RT5670_I2S2_SDP,
2194 			RT5670_I2S_DL_MASK, val_len);
2195 		snd_soc_update_bits(codec, RT5670_ADDA_CLK1, mask_clk, val_clk);
2196 		break;
2197 	default:
2198 		dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2199 		return -EINVAL;
2200 	}
2201 
2202 	return 0;
2203 }
2204 
2205 static int rt5670_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2206 {
2207 	struct snd_soc_codec *codec = dai->codec;
2208 	struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2209 	unsigned int reg_val = 0;
2210 
2211 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2212 	case SND_SOC_DAIFMT_CBM_CFM:
2213 		rt5670->master[dai->id] = 1;
2214 		break;
2215 	case SND_SOC_DAIFMT_CBS_CFS:
2216 		reg_val |= RT5670_I2S_MS_S;
2217 		rt5670->master[dai->id] = 0;
2218 		break;
2219 	default:
2220 		return -EINVAL;
2221 	}
2222 
2223 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2224 	case SND_SOC_DAIFMT_NB_NF:
2225 		break;
2226 	case SND_SOC_DAIFMT_IB_NF:
2227 		reg_val |= RT5670_I2S_BP_INV;
2228 		break;
2229 	default:
2230 		return -EINVAL;
2231 	}
2232 
2233 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2234 	case SND_SOC_DAIFMT_I2S:
2235 		break;
2236 	case SND_SOC_DAIFMT_LEFT_J:
2237 		reg_val |= RT5670_I2S_DF_LEFT;
2238 		break;
2239 	case SND_SOC_DAIFMT_DSP_A:
2240 		reg_val |= RT5670_I2S_DF_PCM_A;
2241 		break;
2242 	case SND_SOC_DAIFMT_DSP_B:
2243 		reg_val |= RT5670_I2S_DF_PCM_B;
2244 		break;
2245 	default:
2246 		return -EINVAL;
2247 	}
2248 
2249 	switch (dai->id) {
2250 	case RT5670_AIF1:
2251 		snd_soc_update_bits(codec, RT5670_I2S1_SDP,
2252 			RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK |
2253 			RT5670_I2S_DF_MASK, reg_val);
2254 		break;
2255 	case RT5670_AIF2:
2256 		snd_soc_update_bits(codec, RT5670_I2S2_SDP,
2257 			RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK |
2258 			RT5670_I2S_DF_MASK, reg_val);
2259 		break;
2260 	default:
2261 		dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2262 		return -EINVAL;
2263 	}
2264 	return 0;
2265 }
2266 
2267 static int rt5670_set_dai_sysclk(struct snd_soc_dai *dai,
2268 		int clk_id, unsigned int freq, int dir)
2269 {
2270 	struct snd_soc_codec *codec = dai->codec;
2271 	struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2272 	unsigned int reg_val = 0;
2273 
2274 	if (freq == rt5670->sysclk && clk_id == rt5670->sysclk_src)
2275 		return 0;
2276 
2277 	if (rt5670->pdata.jd_mode) {
2278 		if (clk_id == RT5670_SCLK_S_PLL1)
2279 			snd_soc_dapm_force_enable_pin(&codec->dapm, "PLL1");
2280 		else
2281 			snd_soc_dapm_disable_pin(&codec->dapm, "PLL1");
2282 		snd_soc_dapm_sync(&codec->dapm);
2283 	}
2284 	switch (clk_id) {
2285 	case RT5670_SCLK_S_MCLK:
2286 		reg_val |= RT5670_SCLK_SRC_MCLK;
2287 		break;
2288 	case RT5670_SCLK_S_PLL1:
2289 		reg_val |= RT5670_SCLK_SRC_PLL1;
2290 		break;
2291 	case RT5670_SCLK_S_RCCLK:
2292 		reg_val |= RT5670_SCLK_SRC_RCCLK;
2293 		break;
2294 	default:
2295 		dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2296 		return -EINVAL;
2297 	}
2298 	snd_soc_update_bits(codec, RT5670_GLB_CLK,
2299 		RT5670_SCLK_SRC_MASK, reg_val);
2300 	rt5670->sysclk = freq;
2301 	rt5670->sysclk_src = clk_id;
2302 
2303 	dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2304 
2305 	return 0;
2306 }
2307 
2308 static int rt5670_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2309 			unsigned int freq_in, unsigned int freq_out)
2310 {
2311 	struct snd_soc_codec *codec = dai->codec;
2312 	struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2313 	struct rl6231_pll_code pll_code;
2314 	int ret;
2315 
2316 	if (source == rt5670->pll_src && freq_in == rt5670->pll_in &&
2317 	    freq_out == rt5670->pll_out)
2318 		return 0;
2319 
2320 	if (!freq_in || !freq_out) {
2321 		dev_dbg(codec->dev, "PLL disabled\n");
2322 
2323 		rt5670->pll_in = 0;
2324 		rt5670->pll_out = 0;
2325 		snd_soc_update_bits(codec, RT5670_GLB_CLK,
2326 			RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_MCLK);
2327 		return 0;
2328 	}
2329 
2330 	switch (source) {
2331 	case RT5670_PLL1_S_MCLK:
2332 		snd_soc_update_bits(codec, RT5670_GLB_CLK,
2333 			RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_MCLK);
2334 		break;
2335 	case RT5670_PLL1_S_BCLK1:
2336 	case RT5670_PLL1_S_BCLK2:
2337 	case RT5670_PLL1_S_BCLK3:
2338 	case RT5670_PLL1_S_BCLK4:
2339 		switch (dai->id) {
2340 		case RT5670_AIF1:
2341 			snd_soc_update_bits(codec, RT5670_GLB_CLK,
2342 				RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK1);
2343 			break;
2344 		case RT5670_AIF2:
2345 			snd_soc_update_bits(codec, RT5670_GLB_CLK,
2346 				RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK2);
2347 			break;
2348 		default:
2349 			dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2350 			return -EINVAL;
2351 		}
2352 		break;
2353 	default:
2354 		dev_err(codec->dev, "Unknown PLL source %d\n", source);
2355 		return -EINVAL;
2356 	}
2357 
2358 	ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2359 	if (ret < 0) {
2360 		dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2361 		return ret;
2362 	}
2363 
2364 	dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
2365 		pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2366 		pll_code.n_code, pll_code.k_code);
2367 
2368 	snd_soc_write(codec, RT5670_PLL_CTRL1,
2369 		pll_code.n_code << RT5670_PLL_N_SFT | pll_code.k_code);
2370 	snd_soc_write(codec, RT5670_PLL_CTRL2,
2371 		(pll_code.m_bp ? 0 : pll_code.m_code) << RT5670_PLL_M_SFT |
2372 		pll_code.m_bp << RT5670_PLL_M_BP_SFT);
2373 
2374 	rt5670->pll_in = freq_in;
2375 	rt5670->pll_out = freq_out;
2376 	rt5670->pll_src = source;
2377 
2378 	return 0;
2379 }
2380 
2381 static int rt5670_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2382 			unsigned int rx_mask, int slots, int slot_width)
2383 {
2384 	struct snd_soc_codec *codec = dai->codec;
2385 	unsigned int val = 0;
2386 
2387 	if (rx_mask || tx_mask)
2388 		val |= (1 << 14);
2389 
2390 	switch (slots) {
2391 	case 4:
2392 		val |= (1 << 12);
2393 		break;
2394 	case 6:
2395 		val |= (2 << 12);
2396 		break;
2397 	case 8:
2398 		val |= (3 << 12);
2399 		break;
2400 	case 2:
2401 		break;
2402 	default:
2403 		return -EINVAL;
2404 	}
2405 
2406 	switch (slot_width) {
2407 	case 20:
2408 		val |= (1 << 10);
2409 		break;
2410 	case 24:
2411 		val |= (2 << 10);
2412 		break;
2413 	case 32:
2414 		val |= (3 << 10);
2415 		break;
2416 	case 16:
2417 		break;
2418 	default:
2419 		return -EINVAL;
2420 	}
2421 
2422 	snd_soc_update_bits(codec, RT5670_TDM_CTRL_1, 0x7c00, val);
2423 
2424 	return 0;
2425 }
2426 
2427 static int rt5670_set_bias_level(struct snd_soc_codec *codec,
2428 			enum snd_soc_bias_level level)
2429 {
2430 	struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2431 
2432 	switch (level) {
2433 	case SND_SOC_BIAS_PREPARE:
2434 		if (SND_SOC_BIAS_STANDBY == codec->dapm.bias_level) {
2435 			snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2436 				RT5670_PWR_VREF1 | RT5670_PWR_MB |
2437 				RT5670_PWR_BG | RT5670_PWR_VREF2,
2438 				RT5670_PWR_VREF1 | RT5670_PWR_MB |
2439 				RT5670_PWR_BG | RT5670_PWR_VREF2);
2440 			mdelay(10);
2441 			snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2442 				RT5670_PWR_FV1 | RT5670_PWR_FV2,
2443 				RT5670_PWR_FV1 | RT5670_PWR_FV2);
2444 			snd_soc_update_bits(codec, RT5670_CHARGE_PUMP,
2445 				RT5670_OSW_L_MASK | RT5670_OSW_R_MASK,
2446 				RT5670_OSW_L_DIS | RT5670_OSW_R_DIS);
2447 			snd_soc_update_bits(codec, RT5670_DIG_MISC, 0x1, 0x1);
2448 			snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2449 				RT5670_LDO_SEL_MASK, 0x3);
2450 		}
2451 		break;
2452 	case SND_SOC_BIAS_STANDBY:
2453 		snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2454 				RT5670_PWR_VREF1 | RT5670_PWR_VREF2 |
2455 				RT5670_PWR_FV1 | RT5670_PWR_FV2, 0);
2456 		snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2457 				RT5670_LDO_SEL_MASK, 0x1);
2458 		break;
2459 	case SND_SOC_BIAS_OFF:
2460 		if (rt5670->pdata.jd_mode)
2461 			snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2462 				RT5670_PWR_VREF1 | RT5670_PWR_MB |
2463 				RT5670_PWR_BG | RT5670_PWR_VREF2 |
2464 				RT5670_PWR_FV1 | RT5670_PWR_FV2,
2465 				RT5670_PWR_MB | RT5670_PWR_BG);
2466 		else
2467 			snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2468 				RT5670_PWR_VREF1 | RT5670_PWR_MB |
2469 				RT5670_PWR_BG | RT5670_PWR_VREF2 |
2470 				RT5670_PWR_FV1 | RT5670_PWR_FV2, 0);
2471 
2472 		snd_soc_update_bits(codec, RT5670_DIG_MISC, 0x1, 0x0);
2473 		break;
2474 
2475 	default:
2476 		break;
2477 	}
2478 	codec->dapm.bias_level = level;
2479 
2480 	return 0;
2481 }
2482 
2483 static int rt5670_probe(struct snd_soc_codec *codec)
2484 {
2485 	struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2486 
2487 	switch (snd_soc_read(codec, RT5670_RESET) & RT5670_ID_MASK) {
2488 	case RT5670_ID_5670:
2489 	case RT5670_ID_5671:
2490 		snd_soc_dapm_new_controls(&codec->dapm,
2491 			rt5670_specific_dapm_widgets,
2492 			ARRAY_SIZE(rt5670_specific_dapm_widgets));
2493 		snd_soc_dapm_add_routes(&codec->dapm,
2494 			rt5670_specific_dapm_routes,
2495 			ARRAY_SIZE(rt5670_specific_dapm_routes));
2496 		break;
2497 	case RT5670_ID_5672:
2498 		snd_soc_dapm_new_controls(&codec->dapm,
2499 			rt5672_specific_dapm_widgets,
2500 			ARRAY_SIZE(rt5672_specific_dapm_widgets));
2501 		snd_soc_dapm_add_routes(&codec->dapm,
2502 			rt5672_specific_dapm_routes,
2503 			ARRAY_SIZE(rt5672_specific_dapm_routes));
2504 		break;
2505 	default:
2506 		dev_err(codec->dev,
2507 			"The driver is for RT5670 RT5671 or RT5672 only\n");
2508 		return -ENODEV;
2509 	}
2510 	rt5670->codec = codec;
2511 
2512 	return 0;
2513 }
2514 
2515 static int rt5670_remove(struct snd_soc_codec *codec)
2516 {
2517 	struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2518 
2519 	regmap_write(rt5670->regmap, RT5670_RESET, 0);
2520 	return 0;
2521 }
2522 
2523 #ifdef CONFIG_PM
2524 static int rt5670_suspend(struct snd_soc_codec *codec)
2525 {
2526 	struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2527 
2528 	regcache_cache_only(rt5670->regmap, true);
2529 	regcache_mark_dirty(rt5670->regmap);
2530 	return 0;
2531 }
2532 
2533 static int rt5670_resume(struct snd_soc_codec *codec)
2534 {
2535 	struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2536 
2537 	regcache_cache_only(rt5670->regmap, false);
2538 	regcache_sync(rt5670->regmap);
2539 
2540 	return 0;
2541 }
2542 #else
2543 #define rt5670_suspend NULL
2544 #define rt5670_resume NULL
2545 #endif
2546 
2547 #define RT5670_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2548 #define RT5670_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2549 			SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2550 
2551 static struct snd_soc_dai_ops rt5670_aif_dai_ops = {
2552 	.hw_params = rt5670_hw_params,
2553 	.set_fmt = rt5670_set_dai_fmt,
2554 	.set_sysclk = rt5670_set_dai_sysclk,
2555 	.set_tdm_slot = rt5670_set_tdm_slot,
2556 	.set_pll = rt5670_set_dai_pll,
2557 };
2558 
2559 static struct snd_soc_dai_driver rt5670_dai[] = {
2560 	{
2561 		.name = "rt5670-aif1",
2562 		.id = RT5670_AIF1,
2563 		.playback = {
2564 			.stream_name = "AIF1 Playback",
2565 			.channels_min = 1,
2566 			.channels_max = 2,
2567 			.rates = RT5670_STEREO_RATES,
2568 			.formats = RT5670_FORMATS,
2569 		},
2570 		.capture = {
2571 			.stream_name = "AIF1 Capture",
2572 			.channels_min = 1,
2573 			.channels_max = 2,
2574 			.rates = RT5670_STEREO_RATES,
2575 			.formats = RT5670_FORMATS,
2576 		},
2577 		.ops = &rt5670_aif_dai_ops,
2578 	},
2579 	{
2580 		.name = "rt5670-aif2",
2581 		.id = RT5670_AIF2,
2582 		.playback = {
2583 			.stream_name = "AIF2 Playback",
2584 			.channels_min = 1,
2585 			.channels_max = 2,
2586 			.rates = RT5670_STEREO_RATES,
2587 			.formats = RT5670_FORMATS,
2588 		},
2589 		.capture = {
2590 			.stream_name = "AIF2 Capture",
2591 			.channels_min = 1,
2592 			.channels_max = 2,
2593 			.rates = RT5670_STEREO_RATES,
2594 			.formats = RT5670_FORMATS,
2595 		},
2596 		.ops = &rt5670_aif_dai_ops,
2597 	},
2598 };
2599 
2600 static struct snd_soc_codec_driver soc_codec_dev_rt5670 = {
2601 	.probe = rt5670_probe,
2602 	.remove = rt5670_remove,
2603 	.suspend = rt5670_suspend,
2604 	.resume = rt5670_resume,
2605 	.set_bias_level = rt5670_set_bias_level,
2606 	.idle_bias_off = true,
2607 	.controls = rt5670_snd_controls,
2608 	.num_controls = ARRAY_SIZE(rt5670_snd_controls),
2609 	.dapm_widgets = rt5670_dapm_widgets,
2610 	.num_dapm_widgets = ARRAY_SIZE(rt5670_dapm_widgets),
2611 	.dapm_routes = rt5670_dapm_routes,
2612 	.num_dapm_routes = ARRAY_SIZE(rt5670_dapm_routes),
2613 };
2614 
2615 static const struct regmap_config rt5670_regmap = {
2616 	.reg_bits = 8,
2617 	.val_bits = 16,
2618 	.use_single_rw = true,
2619 	.max_register = RT5670_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5670_ranges) *
2620 					       RT5670_PR_SPACING),
2621 	.volatile_reg = rt5670_volatile_register,
2622 	.readable_reg = rt5670_readable_register,
2623 	.cache_type = REGCACHE_RBTREE,
2624 	.reg_defaults = rt5670_reg,
2625 	.num_reg_defaults = ARRAY_SIZE(rt5670_reg),
2626 	.ranges = rt5670_ranges,
2627 	.num_ranges = ARRAY_SIZE(rt5670_ranges),
2628 };
2629 
2630 static const struct i2c_device_id rt5670_i2c_id[] = {
2631 	{ "rt5670", 0 },
2632 	{ "rt5671", 0 },
2633 	{ "rt5672", 0 },
2634 	{ }
2635 };
2636 MODULE_DEVICE_TABLE(i2c, rt5670_i2c_id);
2637 
2638 #ifdef CONFIG_ACPI
2639 static struct acpi_device_id rt5670_acpi_match[] = {
2640 	{ "10EC5670", 0},
2641 	{ },
2642 };
2643 MODULE_DEVICE_TABLE(acpi, rt5670_acpi_match);
2644 #endif
2645 
2646 static const struct dmi_system_id dmi_platform_intel_braswell[] = {
2647 	{
2648 		.ident = "Intel Braswell",
2649 		.matches = {
2650 			DMI_MATCH(DMI_SYS_VENDOR, "Intel Corporation"),
2651 			DMI_MATCH(DMI_BOARD_NAME, "Braswell CRB"),
2652 		},
2653 	},
2654 	{}
2655 };
2656 
2657 static int rt5670_i2c_probe(struct i2c_client *i2c,
2658 		    const struct i2c_device_id *id)
2659 {
2660 	struct rt5670_platform_data *pdata = dev_get_platdata(&i2c->dev);
2661 	struct rt5670_priv *rt5670;
2662 	int ret;
2663 	unsigned int val;
2664 
2665 	rt5670 = devm_kzalloc(&i2c->dev,
2666 				sizeof(struct rt5670_priv),
2667 				GFP_KERNEL);
2668 	if (NULL == rt5670)
2669 		return -ENOMEM;
2670 
2671 	i2c_set_clientdata(i2c, rt5670);
2672 
2673 	if (pdata)
2674 		rt5670->pdata = *pdata;
2675 
2676 	if (dmi_check_system(dmi_platform_intel_braswell)) {
2677 		rt5670->pdata.dmic_en = true;
2678 		rt5670->pdata.dmic1_data_pin = RT5670_DMIC_DATA_IN2P;
2679 		rt5670->pdata.jd_mode = 1;
2680 	}
2681 
2682 	rt5670->regmap = devm_regmap_init_i2c(i2c, &rt5670_regmap);
2683 	if (IS_ERR(rt5670->regmap)) {
2684 		ret = PTR_ERR(rt5670->regmap);
2685 		dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2686 			ret);
2687 		return ret;
2688 	}
2689 
2690 	regmap_read(rt5670->regmap, RT5670_VENDOR_ID2, &val);
2691 	if (val != RT5670_DEVICE_ID) {
2692 		dev_err(&i2c->dev,
2693 			"Device with ID register %x is not rt5670/72\n", val);
2694 		return -ENODEV;
2695 	}
2696 
2697 	regmap_write(rt5670->regmap, RT5670_RESET, 0);
2698 	regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
2699 		RT5670_PWR_HP_L | RT5670_PWR_HP_R |
2700 		RT5670_PWR_VREF2, RT5670_PWR_VREF2);
2701 	msleep(100);
2702 
2703 	regmap_write(rt5670->regmap, RT5670_RESET, 0);
2704 
2705 	regmap_read(rt5670->regmap, RT5670_VENDOR_ID, &val);
2706 	if (val >= 4)
2707 		regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0980);
2708 	else
2709 		regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0d00);
2710 
2711 	ret = regmap_register_patch(rt5670->regmap, init_list,
2712 				    ARRAY_SIZE(init_list));
2713 	if (ret != 0)
2714 		dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2715 
2716 	if (rt5670->pdata.in2_diff)
2717 		regmap_update_bits(rt5670->regmap, RT5670_IN2,
2718 					RT5670_IN_DF2, RT5670_IN_DF2);
2719 
2720 	if (i2c->irq) {
2721 		regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2722 				   RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ);
2723 		regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
2724 				   RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT);
2725 
2726 	}
2727 
2728 	if (rt5670->pdata.jd_mode) {
2729 		regmap_update_bits(rt5670->regmap, RT5670_GLB_CLK,
2730 				   RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_RCCLK);
2731 		rt5670->sysclk = 0;
2732 		rt5670->sysclk_src = RT5670_SCLK_S_RCCLK;
2733 		regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
2734 				   RT5670_PWR_MB, RT5670_PWR_MB);
2735 		regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG2,
2736 				   RT5670_PWR_JD1, RT5670_PWR_JD1);
2737 		regmap_update_bits(rt5670->regmap, RT5670_IRQ_CTRL1,
2738 				   RT5670_JD1_1_EN_MASK, RT5670_JD1_1_EN);
2739 		regmap_update_bits(rt5670->regmap, RT5670_JD_CTRL3,
2740 				   RT5670_JD_TRI_CBJ_SEL_MASK |
2741 				   RT5670_JD_TRI_HPO_SEL_MASK,
2742 				   RT5670_JD_CBJ_JD1_1 | RT5670_JD_HPO_JD1_1);
2743 		switch (rt5670->pdata.jd_mode) {
2744 		case 1:
2745 			regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
2746 					   RT5670_JD1_MODE_MASK,
2747 					   RT5670_JD1_MODE_0);
2748 			break;
2749 		case 2:
2750 			regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
2751 					   RT5670_JD1_MODE_MASK,
2752 					   RT5670_JD1_MODE_1);
2753 			break;
2754 		case 3:
2755 			regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
2756 					   RT5670_JD1_MODE_MASK,
2757 					   RT5670_JD1_MODE_2);
2758 			break;
2759 		default:
2760 			break;
2761 		}
2762 	}
2763 
2764 	if (rt5670->pdata.dmic_en) {
2765 		regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2766 				   RT5670_GP2_PIN_MASK,
2767 				   RT5670_GP2_PIN_DMIC1_SCL);
2768 
2769 		switch (rt5670->pdata.dmic1_data_pin) {
2770 		case RT5670_DMIC_DATA_IN2P:
2771 			regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2772 					   RT5670_DMIC_1_DP_MASK,
2773 					   RT5670_DMIC_1_DP_IN2P);
2774 			break;
2775 
2776 		case RT5670_DMIC_DATA_GPIO6:
2777 			regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2778 					   RT5670_DMIC_1_DP_MASK,
2779 					   RT5670_DMIC_1_DP_GPIO6);
2780 			regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2781 					   RT5670_GP6_PIN_MASK,
2782 					   RT5670_GP6_PIN_DMIC1_SDA);
2783 			break;
2784 
2785 		case RT5670_DMIC_DATA_GPIO7:
2786 			regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2787 					   RT5670_DMIC_1_DP_MASK,
2788 					   RT5670_DMIC_1_DP_GPIO7);
2789 			regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2790 					   RT5670_GP7_PIN_MASK,
2791 					   RT5670_GP7_PIN_DMIC1_SDA);
2792 			break;
2793 
2794 		default:
2795 			break;
2796 		}
2797 
2798 		switch (rt5670->pdata.dmic2_data_pin) {
2799 		case RT5670_DMIC_DATA_IN3N:
2800 			regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2801 					   RT5670_DMIC_2_DP_MASK,
2802 					   RT5670_DMIC_2_DP_IN3N);
2803 			break;
2804 
2805 		case RT5670_DMIC_DATA_GPIO8:
2806 			regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2807 					   RT5670_DMIC_2_DP_MASK,
2808 					   RT5670_DMIC_2_DP_GPIO8);
2809 			regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2810 					   RT5670_GP8_PIN_MASK,
2811 					   RT5670_GP8_PIN_DMIC2_SDA);
2812 			break;
2813 
2814 		default:
2815 			break;
2816 		}
2817 
2818 		switch (rt5670->pdata.dmic3_data_pin) {
2819 		case RT5670_DMIC_DATA_GPIO5:
2820 			regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL2,
2821 					   RT5670_DMIC_3_DP_MASK,
2822 					   RT5670_DMIC_3_DP_GPIO5);
2823 			regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2824 					   RT5670_GP5_PIN_MASK,
2825 					   RT5670_GP5_PIN_DMIC3_SDA);
2826 			break;
2827 
2828 		case RT5670_DMIC_DATA_GPIO9:
2829 		case RT5670_DMIC_DATA_GPIO10:
2830 			dev_err(&i2c->dev,
2831 				"Always use GPIO5 as DMIC3 data pin\n");
2832 			break;
2833 
2834 		default:
2835 			break;
2836 		}
2837 
2838 	}
2839 
2840 	pm_runtime_enable(&i2c->dev);
2841 	pm_request_idle(&i2c->dev);
2842 
2843 	ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5670,
2844 			rt5670_dai, ARRAY_SIZE(rt5670_dai));
2845 	if (ret < 0)
2846 		goto err;
2847 
2848 	pm_runtime_put(&i2c->dev);
2849 
2850 	return 0;
2851 err:
2852 	pm_runtime_disable(&i2c->dev);
2853 
2854 	return ret;
2855 }
2856 
2857 static int rt5670_i2c_remove(struct i2c_client *i2c)
2858 {
2859 	pm_runtime_disable(&i2c->dev);
2860 	snd_soc_unregister_codec(&i2c->dev);
2861 
2862 	return 0;
2863 }
2864 
2865 static struct i2c_driver rt5670_i2c_driver = {
2866 	.driver = {
2867 		.name = "rt5670",
2868 		.owner = THIS_MODULE,
2869 		.acpi_match_table = ACPI_PTR(rt5670_acpi_match),
2870 	},
2871 	.probe = rt5670_i2c_probe,
2872 	.remove   = rt5670_i2c_remove,
2873 	.id_table = rt5670_i2c_id,
2874 };
2875 
2876 module_i2c_driver(rt5670_i2c_driver);
2877 
2878 MODULE_DESCRIPTION("ASoC RT5670 driver");
2879 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
2880 MODULE_LICENSE("GPL v2");
2881