1 /* 2 * rt5670.c -- RT5670 ALSA SoC audio codec driver 3 * 4 * Copyright 2014 Realtek Semiconductor Corp. 5 * Author: Bard Liao <bardliao@realtek.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 12 #include <linux/module.h> 13 #include <linux/moduleparam.h> 14 #include <linux/init.h> 15 #include <linux/delay.h> 16 #include <linux/pm.h> 17 #include <linux/pm_runtime.h> 18 #include <linux/i2c.h> 19 #include <linux/platform_device.h> 20 #include <linux/acpi.h> 21 #include <linux/spi/spi.h> 22 #include <linux/dmi.h> 23 #include <sound/core.h> 24 #include <sound/pcm.h> 25 #include <sound/pcm_params.h> 26 #include <sound/jack.h> 27 #include <sound/soc.h> 28 #include <sound/soc-dapm.h> 29 #include <sound/initval.h> 30 #include <sound/tlv.h> 31 #include <sound/rt5670.h> 32 33 #include "rl6231.h" 34 #include "rt5670.h" 35 #include "rt5670-dsp.h" 36 37 #define RT5670_DEVICE_ID 0x6271 38 39 #define RT5670_PR_RANGE_BASE (0xff + 1) 40 #define RT5670_PR_SPACING 0x100 41 42 #define RT5670_PR_BASE (RT5670_PR_RANGE_BASE + (0 * RT5670_PR_SPACING)) 43 44 static const struct regmap_range_cfg rt5670_ranges[] = { 45 { .name = "PR", .range_min = RT5670_PR_BASE, 46 .range_max = RT5670_PR_BASE + 0xf8, 47 .selector_reg = RT5670_PRIV_INDEX, 48 .selector_mask = 0xff, 49 .selector_shift = 0x0, 50 .window_start = RT5670_PRIV_DATA, 51 .window_len = 0x1, }, 52 }; 53 54 static const struct reg_sequence init_list[] = { 55 { RT5670_PR_BASE + 0x14, 0x9a8a }, 56 { RT5670_PR_BASE + 0x38, 0x3ba1 }, 57 { RT5670_PR_BASE + 0x3d, 0x3640 }, 58 { 0x8a, 0x0123 }, 59 }; 60 61 static const struct reg_default rt5670_reg[] = { 62 { 0x00, 0x0000 }, 63 { 0x02, 0x8888 }, 64 { 0x03, 0x8888 }, 65 { 0x0a, 0x0001 }, 66 { 0x0b, 0x0827 }, 67 { 0x0c, 0x0000 }, 68 { 0x0d, 0x0008 }, 69 { 0x0e, 0x0000 }, 70 { 0x0f, 0x0808 }, 71 { 0x19, 0xafaf }, 72 { 0x1a, 0xafaf }, 73 { 0x1b, 0x0011 }, 74 { 0x1c, 0x2f2f }, 75 { 0x1d, 0x2f2f }, 76 { 0x1e, 0x0000 }, 77 { 0x1f, 0x2f2f }, 78 { 0x20, 0x0000 }, 79 { 0x26, 0x7860 }, 80 { 0x27, 0x7860 }, 81 { 0x28, 0x7871 }, 82 { 0x29, 0x8080 }, 83 { 0x2a, 0x5656 }, 84 { 0x2b, 0x5454 }, 85 { 0x2c, 0xaaa0 }, 86 { 0x2d, 0x0000 }, 87 { 0x2e, 0x2f2f }, 88 { 0x2f, 0x1002 }, 89 { 0x30, 0x0000 }, 90 { 0x31, 0x5f00 }, 91 { 0x32, 0x0000 }, 92 { 0x33, 0x0000 }, 93 { 0x34, 0x0000 }, 94 { 0x35, 0x0000 }, 95 { 0x36, 0x0000 }, 96 { 0x37, 0x0000 }, 97 { 0x38, 0x0000 }, 98 { 0x3b, 0x0000 }, 99 { 0x3c, 0x007f }, 100 { 0x3d, 0x0000 }, 101 { 0x3e, 0x007f }, 102 { 0x45, 0xe00f }, 103 { 0x4c, 0x5380 }, 104 { 0x4f, 0x0073 }, 105 { 0x52, 0x00d3 }, 106 { 0x53, 0xf000 }, 107 { 0x61, 0x0000 }, 108 { 0x62, 0x0001 }, 109 { 0x63, 0x00c3 }, 110 { 0x64, 0x0000 }, 111 { 0x65, 0x0001 }, 112 { 0x66, 0x0000 }, 113 { 0x6f, 0x8000 }, 114 { 0x70, 0x8000 }, 115 { 0x71, 0x8000 }, 116 { 0x72, 0x8000 }, 117 { 0x73, 0x7770 }, 118 { 0x74, 0x0e00 }, 119 { 0x75, 0x1505 }, 120 { 0x76, 0x0015 }, 121 { 0x77, 0x0c00 }, 122 { 0x78, 0x4000 }, 123 { 0x79, 0x0123 }, 124 { 0x7f, 0x1100 }, 125 { 0x80, 0x0000 }, 126 { 0x81, 0x0000 }, 127 { 0x82, 0x0000 }, 128 { 0x83, 0x0000 }, 129 { 0x84, 0x0000 }, 130 { 0x85, 0x0000 }, 131 { 0x86, 0x0004 }, 132 { 0x87, 0x0000 }, 133 { 0x88, 0x0000 }, 134 { 0x89, 0x0000 }, 135 { 0x8a, 0x0123 }, 136 { 0x8b, 0x0000 }, 137 { 0x8c, 0x0003 }, 138 { 0x8d, 0x0000 }, 139 { 0x8e, 0x0004 }, 140 { 0x8f, 0x1100 }, 141 { 0x90, 0x0646 }, 142 { 0x91, 0x0c06 }, 143 { 0x93, 0x0000 }, 144 { 0x94, 0x1270 }, 145 { 0x95, 0x1000 }, 146 { 0x97, 0x0000 }, 147 { 0x98, 0x0000 }, 148 { 0x99, 0x0000 }, 149 { 0x9a, 0x2184 }, 150 { 0x9b, 0x010a }, 151 { 0x9c, 0x0aea }, 152 { 0x9d, 0x000c }, 153 { 0x9e, 0x0400 }, 154 { 0xae, 0x7000 }, 155 { 0xaf, 0x0000 }, 156 { 0xb0, 0x7000 }, 157 { 0xb1, 0x0000 }, 158 { 0xb2, 0x0000 }, 159 { 0xb3, 0x001f }, 160 { 0xb4, 0x220c }, 161 { 0xb5, 0x1f00 }, 162 { 0xb6, 0x0000 }, 163 { 0xb7, 0x0000 }, 164 { 0xbb, 0x0000 }, 165 { 0xbc, 0x0000 }, 166 { 0xbd, 0x0000 }, 167 { 0xbe, 0x0000 }, 168 { 0xbf, 0x0000 }, 169 { 0xc0, 0x0000 }, 170 { 0xc1, 0x0000 }, 171 { 0xc2, 0x0000 }, 172 { 0xcd, 0x0000 }, 173 { 0xce, 0x0000 }, 174 { 0xcf, 0x1813 }, 175 { 0xd0, 0x0690 }, 176 { 0xd1, 0x1c17 }, 177 { 0xd3, 0xa220 }, 178 { 0xd4, 0x0000 }, 179 { 0xd6, 0x0400 }, 180 { 0xd9, 0x0809 }, 181 { 0xda, 0x0000 }, 182 { 0xdb, 0x0001 }, 183 { 0xdc, 0x0049 }, 184 { 0xdd, 0x0024 }, 185 { 0xe6, 0x8000 }, 186 { 0xe7, 0x0000 }, 187 { 0xec, 0xa200 }, 188 { 0xed, 0x0000 }, 189 { 0xee, 0xa200 }, 190 { 0xef, 0x0000 }, 191 { 0xf8, 0x0000 }, 192 { 0xf9, 0x0000 }, 193 { 0xfa, 0x8010 }, 194 { 0xfb, 0x0033 }, 195 { 0xfc, 0x0100 }, 196 }; 197 198 static bool rt5670_volatile_register(struct device *dev, unsigned int reg) 199 { 200 int i; 201 202 for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) { 203 if ((reg >= rt5670_ranges[i].window_start && 204 reg <= rt5670_ranges[i].window_start + 205 rt5670_ranges[i].window_len) || 206 (reg >= rt5670_ranges[i].range_min && 207 reg <= rt5670_ranges[i].range_max)) { 208 return true; 209 } 210 } 211 212 switch (reg) { 213 case RT5670_RESET: 214 case RT5670_PDM_DATA_CTRL1: 215 case RT5670_PDM1_DATA_CTRL4: 216 case RT5670_PDM2_DATA_CTRL4: 217 case RT5670_PRIV_DATA: 218 case RT5670_ASRC_5: 219 case RT5670_CJ_CTRL1: 220 case RT5670_CJ_CTRL2: 221 case RT5670_CJ_CTRL3: 222 case RT5670_A_JD_CTRL1: 223 case RT5670_A_JD_CTRL2: 224 case RT5670_VAD_CTRL5: 225 case RT5670_ADC_EQ_CTRL1: 226 case RT5670_EQ_CTRL1: 227 case RT5670_ALC_CTRL_1: 228 case RT5670_IRQ_CTRL2: 229 case RT5670_INT_IRQ_ST: 230 case RT5670_IL_CMD: 231 case RT5670_DSP_CTRL1: 232 case RT5670_DSP_CTRL2: 233 case RT5670_DSP_CTRL3: 234 case RT5670_DSP_CTRL4: 235 case RT5670_DSP_CTRL5: 236 case RT5670_VENDOR_ID: 237 case RT5670_VENDOR_ID1: 238 case RT5670_VENDOR_ID2: 239 return true; 240 default: 241 return false; 242 } 243 } 244 245 static bool rt5670_readable_register(struct device *dev, unsigned int reg) 246 { 247 int i; 248 249 for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) { 250 if ((reg >= rt5670_ranges[i].window_start && 251 reg <= rt5670_ranges[i].window_start + 252 rt5670_ranges[i].window_len) || 253 (reg >= rt5670_ranges[i].range_min && 254 reg <= rt5670_ranges[i].range_max)) { 255 return true; 256 } 257 } 258 259 switch (reg) { 260 case RT5670_RESET: 261 case RT5670_HP_VOL: 262 case RT5670_LOUT1: 263 case RT5670_CJ_CTRL1: 264 case RT5670_CJ_CTRL2: 265 case RT5670_CJ_CTRL3: 266 case RT5670_IN2: 267 case RT5670_INL1_INR1_VOL: 268 case RT5670_DAC1_DIG_VOL: 269 case RT5670_DAC2_DIG_VOL: 270 case RT5670_DAC_CTRL: 271 case RT5670_STO1_ADC_DIG_VOL: 272 case RT5670_MONO_ADC_DIG_VOL: 273 case RT5670_STO2_ADC_DIG_VOL: 274 case RT5670_ADC_BST_VOL1: 275 case RT5670_ADC_BST_VOL2: 276 case RT5670_STO2_ADC_MIXER: 277 case RT5670_STO1_ADC_MIXER: 278 case RT5670_MONO_ADC_MIXER: 279 case RT5670_AD_DA_MIXER: 280 case RT5670_STO_DAC_MIXER: 281 case RT5670_DD_MIXER: 282 case RT5670_DIG_MIXER: 283 case RT5670_DSP_PATH1: 284 case RT5670_DSP_PATH2: 285 case RT5670_DIG_INF1_DATA: 286 case RT5670_DIG_INF2_DATA: 287 case RT5670_PDM_OUT_CTRL: 288 case RT5670_PDM_DATA_CTRL1: 289 case RT5670_PDM1_DATA_CTRL2: 290 case RT5670_PDM1_DATA_CTRL3: 291 case RT5670_PDM1_DATA_CTRL4: 292 case RT5670_PDM2_DATA_CTRL2: 293 case RT5670_PDM2_DATA_CTRL3: 294 case RT5670_PDM2_DATA_CTRL4: 295 case RT5670_REC_L1_MIXER: 296 case RT5670_REC_L2_MIXER: 297 case RT5670_REC_R1_MIXER: 298 case RT5670_REC_R2_MIXER: 299 case RT5670_HPO_MIXER: 300 case RT5670_MONO_MIXER: 301 case RT5670_OUT_L1_MIXER: 302 case RT5670_OUT_R1_MIXER: 303 case RT5670_LOUT_MIXER: 304 case RT5670_PWR_DIG1: 305 case RT5670_PWR_DIG2: 306 case RT5670_PWR_ANLG1: 307 case RT5670_PWR_ANLG2: 308 case RT5670_PWR_MIXER: 309 case RT5670_PWR_VOL: 310 case RT5670_PRIV_INDEX: 311 case RT5670_PRIV_DATA: 312 case RT5670_I2S4_SDP: 313 case RT5670_I2S1_SDP: 314 case RT5670_I2S2_SDP: 315 case RT5670_I2S3_SDP: 316 case RT5670_ADDA_CLK1: 317 case RT5670_ADDA_CLK2: 318 case RT5670_DMIC_CTRL1: 319 case RT5670_DMIC_CTRL2: 320 case RT5670_TDM_CTRL_1: 321 case RT5670_TDM_CTRL_2: 322 case RT5670_TDM_CTRL_3: 323 case RT5670_DSP_CLK: 324 case RT5670_GLB_CLK: 325 case RT5670_PLL_CTRL1: 326 case RT5670_PLL_CTRL2: 327 case RT5670_ASRC_1: 328 case RT5670_ASRC_2: 329 case RT5670_ASRC_3: 330 case RT5670_ASRC_4: 331 case RT5670_ASRC_5: 332 case RT5670_ASRC_7: 333 case RT5670_ASRC_8: 334 case RT5670_ASRC_9: 335 case RT5670_ASRC_10: 336 case RT5670_ASRC_11: 337 case RT5670_ASRC_12: 338 case RT5670_ASRC_13: 339 case RT5670_ASRC_14: 340 case RT5670_DEPOP_M1: 341 case RT5670_DEPOP_M2: 342 case RT5670_DEPOP_M3: 343 case RT5670_CHARGE_PUMP: 344 case RT5670_MICBIAS: 345 case RT5670_A_JD_CTRL1: 346 case RT5670_A_JD_CTRL2: 347 case RT5670_VAD_CTRL1: 348 case RT5670_VAD_CTRL2: 349 case RT5670_VAD_CTRL3: 350 case RT5670_VAD_CTRL4: 351 case RT5670_VAD_CTRL5: 352 case RT5670_ADC_EQ_CTRL1: 353 case RT5670_ADC_EQ_CTRL2: 354 case RT5670_EQ_CTRL1: 355 case RT5670_EQ_CTRL2: 356 case RT5670_ALC_DRC_CTRL1: 357 case RT5670_ALC_DRC_CTRL2: 358 case RT5670_ALC_CTRL_1: 359 case RT5670_ALC_CTRL_2: 360 case RT5670_ALC_CTRL_3: 361 case RT5670_JD_CTRL: 362 case RT5670_IRQ_CTRL1: 363 case RT5670_IRQ_CTRL2: 364 case RT5670_INT_IRQ_ST: 365 case RT5670_GPIO_CTRL1: 366 case RT5670_GPIO_CTRL2: 367 case RT5670_GPIO_CTRL3: 368 case RT5670_SCRABBLE_FUN: 369 case RT5670_SCRABBLE_CTRL: 370 case RT5670_BASE_BACK: 371 case RT5670_MP3_PLUS1: 372 case RT5670_MP3_PLUS2: 373 case RT5670_ADJ_HPF1: 374 case RT5670_ADJ_HPF2: 375 case RT5670_HP_CALIB_AMP_DET: 376 case RT5670_SV_ZCD1: 377 case RT5670_SV_ZCD2: 378 case RT5670_IL_CMD: 379 case RT5670_IL_CMD2: 380 case RT5670_IL_CMD3: 381 case RT5670_DRC_HL_CTRL1: 382 case RT5670_DRC_HL_CTRL2: 383 case RT5670_ADC_MONO_HP_CTRL1: 384 case RT5670_ADC_MONO_HP_CTRL2: 385 case RT5670_ADC_STO2_HP_CTRL1: 386 case RT5670_ADC_STO2_HP_CTRL2: 387 case RT5670_JD_CTRL3: 388 case RT5670_JD_CTRL4: 389 case RT5670_DIG_MISC: 390 case RT5670_DSP_CTRL1: 391 case RT5670_DSP_CTRL2: 392 case RT5670_DSP_CTRL3: 393 case RT5670_DSP_CTRL4: 394 case RT5670_DSP_CTRL5: 395 case RT5670_GEN_CTRL2: 396 case RT5670_GEN_CTRL3: 397 case RT5670_VENDOR_ID: 398 case RT5670_VENDOR_ID1: 399 case RT5670_VENDOR_ID2: 400 return true; 401 default: 402 return false; 403 } 404 } 405 406 /** 407 * rt5670_headset_detect - Detect headset. 408 * @codec: SoC audio codec device. 409 * @jack_insert: Jack insert or not. 410 * 411 * Detect whether is headset or not when jack inserted. 412 * 413 * Returns detect status. 414 */ 415 416 static int rt5670_headset_detect(struct snd_soc_codec *codec, int jack_insert) 417 { 418 int val; 419 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); 420 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 421 422 if (jack_insert) { 423 snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power"); 424 snd_soc_dapm_sync(dapm); 425 snd_soc_update_bits(codec, RT5670_GEN_CTRL3, 0x4, 0x0); 426 snd_soc_update_bits(codec, RT5670_CJ_CTRL2, 427 RT5670_CBJ_DET_MODE | RT5670_CBJ_MN_JD, 428 RT5670_CBJ_MN_JD); 429 snd_soc_write(codec, RT5670_GPIO_CTRL2, 0x0004); 430 snd_soc_update_bits(codec, RT5670_GPIO_CTRL1, 431 RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ); 432 snd_soc_update_bits(codec, RT5670_CJ_CTRL1, 433 RT5670_CBJ_BST1_EN, RT5670_CBJ_BST1_EN); 434 snd_soc_write(codec, RT5670_JD_CTRL3, 0x00f0); 435 snd_soc_update_bits(codec, RT5670_CJ_CTRL2, 436 RT5670_CBJ_MN_JD, RT5670_CBJ_MN_JD); 437 snd_soc_update_bits(codec, RT5670_CJ_CTRL2, 438 RT5670_CBJ_MN_JD, 0); 439 msleep(300); 440 val = snd_soc_read(codec, RT5670_CJ_CTRL3) & 0x7; 441 if (val == 0x1 || val == 0x2) { 442 rt5670->jack_type = SND_JACK_HEADSET; 443 /* for push button */ 444 snd_soc_update_bits(codec, RT5670_INT_IRQ_ST, 0x8, 0x8); 445 snd_soc_update_bits(codec, RT5670_IL_CMD, 0x40, 0x40); 446 snd_soc_read(codec, RT5670_IL_CMD); 447 } else { 448 snd_soc_update_bits(codec, RT5670_GEN_CTRL3, 0x4, 0x4); 449 rt5670->jack_type = SND_JACK_HEADPHONE; 450 snd_soc_dapm_disable_pin(dapm, "Mic Det Power"); 451 snd_soc_dapm_sync(dapm); 452 } 453 } else { 454 snd_soc_update_bits(codec, RT5670_INT_IRQ_ST, 0x8, 0x0); 455 snd_soc_update_bits(codec, RT5670_GEN_CTRL3, 0x4, 0x4); 456 rt5670->jack_type = 0; 457 snd_soc_dapm_disable_pin(dapm, "Mic Det Power"); 458 snd_soc_dapm_sync(dapm); 459 } 460 461 return rt5670->jack_type; 462 } 463 464 void rt5670_jack_suspend(struct snd_soc_codec *codec) 465 { 466 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 467 468 rt5670->jack_type_saved = rt5670->jack_type; 469 rt5670_headset_detect(codec, 0); 470 } 471 EXPORT_SYMBOL_GPL(rt5670_jack_suspend); 472 473 void rt5670_jack_resume(struct snd_soc_codec *codec) 474 { 475 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 476 477 if (rt5670->jack_type_saved) 478 rt5670_headset_detect(codec, 1); 479 } 480 EXPORT_SYMBOL_GPL(rt5670_jack_resume); 481 482 static int rt5670_button_detect(struct snd_soc_codec *codec) 483 { 484 int btn_type, val; 485 486 val = snd_soc_read(codec, RT5670_IL_CMD); 487 btn_type = val & 0xff80; 488 snd_soc_write(codec, RT5670_IL_CMD, val); 489 if (btn_type != 0) { 490 msleep(20); 491 val = snd_soc_read(codec, RT5670_IL_CMD); 492 snd_soc_write(codec, RT5670_IL_CMD, val); 493 } 494 495 return btn_type; 496 } 497 498 static int rt5670_irq_detection(void *data) 499 { 500 struct rt5670_priv *rt5670 = (struct rt5670_priv *)data; 501 struct snd_soc_jack_gpio *gpio = &rt5670->hp_gpio; 502 struct snd_soc_jack *jack = rt5670->jack; 503 int val, btn_type, report = jack->status; 504 505 if (rt5670->pdata.jd_mode == 1) /* 2 port */ 506 val = snd_soc_read(rt5670->codec, RT5670_A_JD_CTRL1) & 0x0070; 507 else 508 val = snd_soc_read(rt5670->codec, RT5670_A_JD_CTRL1) & 0x0020; 509 510 switch (val) { 511 /* jack in */ 512 case 0x30: /* 2 port */ 513 case 0x0: /* 1 port or 2 port */ 514 if (rt5670->jack_type == 0) { 515 report = rt5670_headset_detect(rt5670->codec, 1); 516 /* for push button and jack out */ 517 gpio->debounce_time = 25; 518 break; 519 } 520 btn_type = 0; 521 if (snd_soc_read(rt5670->codec, RT5670_INT_IRQ_ST) & 0x4) { 522 /* button pressed */ 523 report = SND_JACK_HEADSET; 524 btn_type = rt5670_button_detect(rt5670->codec); 525 switch (btn_type) { 526 case 0x2000: /* up */ 527 report |= SND_JACK_BTN_1; 528 break; 529 case 0x0400: /* center */ 530 report |= SND_JACK_BTN_0; 531 break; 532 case 0x0080: /* down */ 533 report |= SND_JACK_BTN_2; 534 break; 535 default: 536 dev_err(rt5670->codec->dev, 537 "Unexpected button code 0x%04x\n", 538 btn_type); 539 break; 540 } 541 } 542 if (btn_type == 0)/* button release */ 543 report = rt5670->jack_type; 544 545 break; 546 /* jack out */ 547 case 0x70: /* 2 port */ 548 case 0x10: /* 2 port */ 549 case 0x20: /* 1 port */ 550 report = 0; 551 snd_soc_update_bits(rt5670->codec, RT5670_INT_IRQ_ST, 0x1, 0x0); 552 rt5670_headset_detect(rt5670->codec, 0); 553 gpio->debounce_time = 150; /* for jack in */ 554 break; 555 default: 556 break; 557 } 558 559 return report; 560 } 561 562 int rt5670_set_jack_detect(struct snd_soc_codec *codec, 563 struct snd_soc_jack *jack) 564 { 565 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 566 int ret; 567 568 rt5670->jack = jack; 569 rt5670->hp_gpio.gpiod_dev = codec->dev; 570 rt5670->hp_gpio.name = "headphone detect"; 571 rt5670->hp_gpio.report = SND_JACK_HEADSET | 572 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2; 573 rt5670->hp_gpio.debounce_time = 150; 574 rt5670->hp_gpio.wake = true; 575 rt5670->hp_gpio.data = (struct rt5670_priv *)rt5670; 576 rt5670->hp_gpio.jack_status_check = rt5670_irq_detection; 577 578 ret = snd_soc_jack_add_gpios(rt5670->jack, 1, 579 &rt5670->hp_gpio); 580 if (ret) { 581 dev_err(codec->dev, "Adding jack GPIO failed\n"); 582 return ret; 583 } 584 585 return 0; 586 } 587 EXPORT_SYMBOL_GPL(rt5670_set_jack_detect); 588 589 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0); 590 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0); 591 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0); 592 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0); 593 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0); 594 595 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */ 596 static const DECLARE_TLV_DB_RANGE(bst_tlv, 597 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), 598 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0), 599 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0), 600 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0), 601 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0), 602 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0), 603 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0) 604 ); 605 606 /* Interface data select */ 607 static const char * const rt5670_data_select[] = { 608 "Normal", "Swap", "left copy to right", "right copy to left" 609 }; 610 611 static SOC_ENUM_SINGLE_DECL(rt5670_if2_dac_enum, RT5670_DIG_INF1_DATA, 612 RT5670_IF2_DAC_SEL_SFT, rt5670_data_select); 613 614 static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_enum, RT5670_DIG_INF1_DATA, 615 RT5670_IF2_ADC_SEL_SFT, rt5670_data_select); 616 617 static const struct snd_kcontrol_new rt5670_snd_controls[] = { 618 /* Headphone Output Volume */ 619 SOC_DOUBLE("HP Playback Switch", RT5670_HP_VOL, 620 RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1), 621 SOC_DOUBLE_TLV("HP Playback Volume", RT5670_HP_VOL, 622 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 623 39, 1, out_vol_tlv), 624 /* OUTPUT Control */ 625 SOC_DOUBLE("OUT Channel Switch", RT5670_LOUT1, 626 RT5670_VOL_L_SFT, RT5670_VOL_R_SFT, 1, 1), 627 SOC_DOUBLE_TLV("OUT Playback Volume", RT5670_LOUT1, 628 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 39, 1, out_vol_tlv), 629 /* DAC Digital Volume */ 630 SOC_DOUBLE("DAC2 Playback Switch", RT5670_DAC_CTRL, 631 RT5670_M_DAC_L2_VOL_SFT, RT5670_M_DAC_R2_VOL_SFT, 1, 1), 632 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5670_DAC1_DIG_VOL, 633 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 634 175, 0, dac_vol_tlv), 635 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5670_DAC2_DIG_VOL, 636 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 637 175, 0, dac_vol_tlv), 638 /* IN1/IN2 Control */ 639 SOC_SINGLE_TLV("IN1 Boost Volume", RT5670_CJ_CTRL1, 640 RT5670_BST_SFT1, 8, 0, bst_tlv), 641 SOC_SINGLE_TLV("IN2 Boost Volume", RT5670_IN2, 642 RT5670_BST_SFT1, 8, 0, bst_tlv), 643 /* INL/INR Volume Control */ 644 SOC_DOUBLE_TLV("IN Capture Volume", RT5670_INL1_INR1_VOL, 645 RT5670_INL_VOL_SFT, RT5670_INR_VOL_SFT, 646 31, 1, in_vol_tlv), 647 /* ADC Digital Volume Control */ 648 SOC_DOUBLE("ADC Capture Switch", RT5670_STO1_ADC_DIG_VOL, 649 RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1), 650 SOC_DOUBLE_TLV("ADC Capture Volume", RT5670_STO1_ADC_DIG_VOL, 651 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 652 127, 0, adc_vol_tlv), 653 654 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5670_MONO_ADC_DIG_VOL, 655 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 656 127, 0, adc_vol_tlv), 657 658 /* ADC Boost Volume Control */ 659 SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1, 660 RT5670_STO1_ADC_L_BST_SFT, RT5670_STO1_ADC_R_BST_SFT, 661 3, 0, adc_bst_tlv), 662 663 SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1, 664 RT5670_STO2_ADC_L_BST_SFT, RT5670_STO2_ADC_R_BST_SFT, 665 3, 0, adc_bst_tlv), 666 667 SOC_ENUM("ADC IF2 Data Switch", rt5670_if2_adc_enum), 668 SOC_ENUM("DAC IF2 Data Switch", rt5670_if2_dac_enum), 669 }; 670 671 /** 672 * set_dmic_clk - Set parameter of dmic. 673 * 674 * @w: DAPM widget. 675 * @kcontrol: The kcontrol of this widget. 676 * @event: Event id. 677 * 678 * Choose dmic clock between 1MHz and 3MHz. 679 * It is better for clock to approximate 3MHz. 680 */ 681 static int set_dmic_clk(struct snd_soc_dapm_widget *w, 682 struct snd_kcontrol *kcontrol, int event) 683 { 684 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 685 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 686 int idx, rate; 687 688 rate = rt5670->sysclk / rl6231_get_pre_div(rt5670->regmap, 689 RT5670_ADDA_CLK1, RT5670_I2S_PD1_SFT); 690 idx = rl6231_calc_dmic_clk(rate); 691 if (idx < 0) 692 dev_err(codec->dev, "Failed to set DMIC clock\n"); 693 else 694 snd_soc_update_bits(codec, RT5670_DMIC_CTRL1, 695 RT5670_DMIC_CLK_MASK, idx << RT5670_DMIC_CLK_SFT); 696 return idx; 697 } 698 699 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source, 700 struct snd_soc_dapm_widget *sink) 701 { 702 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm); 703 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 704 705 if (rt5670->sysclk_src == RT5670_SCLK_S_PLL1) 706 return 1; 707 else 708 return 0; 709 } 710 711 static int is_using_asrc(struct snd_soc_dapm_widget *source, 712 struct snd_soc_dapm_widget *sink) 713 { 714 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm); 715 unsigned int reg, shift, val; 716 717 switch (source->shift) { 718 case 0: 719 reg = RT5670_ASRC_3; 720 shift = 0; 721 break; 722 case 1: 723 reg = RT5670_ASRC_3; 724 shift = 4; 725 break; 726 case 2: 727 reg = RT5670_ASRC_5; 728 shift = 12; 729 break; 730 case 3: 731 reg = RT5670_ASRC_2; 732 shift = 0; 733 break; 734 case 8: 735 reg = RT5670_ASRC_2; 736 shift = 4; 737 break; 738 case 9: 739 reg = RT5670_ASRC_2; 740 shift = 8; 741 break; 742 case 10: 743 reg = RT5670_ASRC_2; 744 shift = 12; 745 break; 746 default: 747 return 0; 748 } 749 750 val = (snd_soc_read(codec, reg) >> shift) & 0xf; 751 switch (val) { 752 case 1: 753 case 2: 754 case 3: 755 case 4: 756 return 1; 757 default: 758 return 0; 759 } 760 761 } 762 763 static int can_use_asrc(struct snd_soc_dapm_widget *source, 764 struct snd_soc_dapm_widget *sink) 765 { 766 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm); 767 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 768 769 if (rt5670->sysclk > rt5670->lrck[RT5670_AIF1] * 384) 770 return 1; 771 772 return 0; 773 } 774 775 776 /** 777 * rt5670_sel_asrc_clk_src - select ASRC clock source for a set of filters 778 * @codec: SoC audio codec device. 779 * @filter_mask: mask of filters. 780 * @clk_src: clock source 781 * 782 * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5670 can 783 * only support standard 32fs or 64fs i2s format, ASRC should be enabled to 784 * support special i2s clock format such as Intel's 100fs(100 * sampling rate). 785 * ASRC function will track i2s clock and generate a corresponding system clock 786 * for codec. This function provides an API to select the clock source for a 787 * set of filters specified by the mask. And the codec driver will turn on ASRC 788 * for these filters if ASRC is selected as their clock source. 789 */ 790 int rt5670_sel_asrc_clk_src(struct snd_soc_codec *codec, 791 unsigned int filter_mask, unsigned int clk_src) 792 { 793 unsigned int asrc2_mask = 0, asrc2_value = 0; 794 unsigned int asrc3_mask = 0, asrc3_value = 0; 795 796 if (clk_src > RT5670_CLK_SEL_SYS3) 797 return -EINVAL; 798 799 if (filter_mask & RT5670_DA_STEREO_FILTER) { 800 asrc2_mask |= RT5670_DA_STO_CLK_SEL_MASK; 801 asrc2_value = (asrc2_value & ~RT5670_DA_STO_CLK_SEL_MASK) 802 | (clk_src << RT5670_DA_STO_CLK_SEL_SFT); 803 } 804 805 if (filter_mask & RT5670_DA_MONO_L_FILTER) { 806 asrc2_mask |= RT5670_DA_MONOL_CLK_SEL_MASK; 807 asrc2_value = (asrc2_value & ~RT5670_DA_MONOL_CLK_SEL_MASK) 808 | (clk_src << RT5670_DA_MONOL_CLK_SEL_SFT); 809 } 810 811 if (filter_mask & RT5670_DA_MONO_R_FILTER) { 812 asrc2_mask |= RT5670_DA_MONOR_CLK_SEL_MASK; 813 asrc2_value = (asrc2_value & ~RT5670_DA_MONOR_CLK_SEL_MASK) 814 | (clk_src << RT5670_DA_MONOR_CLK_SEL_SFT); 815 } 816 817 if (filter_mask & RT5670_AD_STEREO_FILTER) { 818 asrc2_mask |= RT5670_AD_STO1_CLK_SEL_MASK; 819 asrc2_value = (asrc2_value & ~RT5670_AD_STO1_CLK_SEL_MASK) 820 | (clk_src << RT5670_AD_STO1_CLK_SEL_SFT); 821 } 822 823 if (filter_mask & RT5670_AD_MONO_L_FILTER) { 824 asrc3_mask |= RT5670_AD_MONOL_CLK_SEL_MASK; 825 asrc3_value = (asrc3_value & ~RT5670_AD_MONOL_CLK_SEL_MASK) 826 | (clk_src << RT5670_AD_MONOL_CLK_SEL_SFT); 827 } 828 829 if (filter_mask & RT5670_AD_MONO_R_FILTER) { 830 asrc3_mask |= RT5670_AD_MONOR_CLK_SEL_MASK; 831 asrc3_value = (asrc3_value & ~RT5670_AD_MONOR_CLK_SEL_MASK) 832 | (clk_src << RT5670_AD_MONOR_CLK_SEL_SFT); 833 } 834 835 if (filter_mask & RT5670_UP_RATE_FILTER) { 836 asrc3_mask |= RT5670_UP_CLK_SEL_MASK; 837 asrc3_value = (asrc3_value & ~RT5670_UP_CLK_SEL_MASK) 838 | (clk_src << RT5670_UP_CLK_SEL_SFT); 839 } 840 841 if (filter_mask & RT5670_DOWN_RATE_FILTER) { 842 asrc3_mask |= RT5670_DOWN_CLK_SEL_MASK; 843 asrc3_value = (asrc3_value & ~RT5670_DOWN_CLK_SEL_MASK) 844 | (clk_src << RT5670_DOWN_CLK_SEL_SFT); 845 } 846 847 if (asrc2_mask) 848 snd_soc_update_bits(codec, RT5670_ASRC_2, 849 asrc2_mask, asrc2_value); 850 851 if (asrc3_mask) 852 snd_soc_update_bits(codec, RT5670_ASRC_3, 853 asrc3_mask, asrc3_value); 854 return 0; 855 } 856 EXPORT_SYMBOL_GPL(rt5670_sel_asrc_clk_src); 857 858 /* Digital Mixer */ 859 static const struct snd_kcontrol_new rt5670_sto1_adc_l_mix[] = { 860 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER, 861 RT5670_M_ADC_L1_SFT, 1, 1), 862 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER, 863 RT5670_M_ADC_L2_SFT, 1, 1), 864 }; 865 866 static const struct snd_kcontrol_new rt5670_sto1_adc_r_mix[] = { 867 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER, 868 RT5670_M_ADC_R1_SFT, 1, 1), 869 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER, 870 RT5670_M_ADC_R2_SFT, 1, 1), 871 }; 872 873 static const struct snd_kcontrol_new rt5670_sto2_adc_l_mix[] = { 874 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER, 875 RT5670_M_ADC_L1_SFT, 1, 1), 876 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER, 877 RT5670_M_ADC_L2_SFT, 1, 1), 878 }; 879 880 static const struct snd_kcontrol_new rt5670_sto2_adc_r_mix[] = { 881 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER, 882 RT5670_M_ADC_R1_SFT, 1, 1), 883 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER, 884 RT5670_M_ADC_R2_SFT, 1, 1), 885 }; 886 887 static const struct snd_kcontrol_new rt5670_mono_adc_l_mix[] = { 888 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER, 889 RT5670_M_MONO_ADC_L1_SFT, 1, 1), 890 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER, 891 RT5670_M_MONO_ADC_L2_SFT, 1, 1), 892 }; 893 894 static const struct snd_kcontrol_new rt5670_mono_adc_r_mix[] = { 895 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER, 896 RT5670_M_MONO_ADC_R1_SFT, 1, 1), 897 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER, 898 RT5670_M_MONO_ADC_R2_SFT, 1, 1), 899 }; 900 901 static const struct snd_kcontrol_new rt5670_dac_l_mix[] = { 902 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER, 903 RT5670_M_ADCMIX_L_SFT, 1, 1), 904 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER, 905 RT5670_M_DAC1_L_SFT, 1, 1), 906 }; 907 908 static const struct snd_kcontrol_new rt5670_dac_r_mix[] = { 909 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER, 910 RT5670_M_ADCMIX_R_SFT, 1, 1), 911 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER, 912 RT5670_M_DAC1_R_SFT, 1, 1), 913 }; 914 915 static const struct snd_kcontrol_new rt5670_sto_dac_l_mix[] = { 916 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER, 917 RT5670_M_DAC_L1_SFT, 1, 1), 918 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_STO_DAC_MIXER, 919 RT5670_M_DAC_L2_SFT, 1, 1), 920 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER, 921 RT5670_M_DAC_R1_STO_L_SFT, 1, 1), 922 }; 923 924 static const struct snd_kcontrol_new rt5670_sto_dac_r_mix[] = { 925 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER, 926 RT5670_M_DAC_R1_SFT, 1, 1), 927 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_STO_DAC_MIXER, 928 RT5670_M_DAC_R2_SFT, 1, 1), 929 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER, 930 RT5670_M_DAC_L1_STO_R_SFT, 1, 1), 931 }; 932 933 static const struct snd_kcontrol_new rt5670_mono_dac_l_mix[] = { 934 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_DD_MIXER, 935 RT5670_M_DAC_L1_MONO_L_SFT, 1, 1), 936 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER, 937 RT5670_M_DAC_L2_MONO_L_SFT, 1, 1), 938 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER, 939 RT5670_M_DAC_R2_MONO_L_SFT, 1, 1), 940 }; 941 942 static const struct snd_kcontrol_new rt5670_mono_dac_r_mix[] = { 943 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_DD_MIXER, 944 RT5670_M_DAC_R1_MONO_R_SFT, 1, 1), 945 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER, 946 RT5670_M_DAC_R2_MONO_R_SFT, 1, 1), 947 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER, 948 RT5670_M_DAC_L2_MONO_R_SFT, 1, 1), 949 }; 950 951 static const struct snd_kcontrol_new rt5670_dig_l_mix[] = { 952 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5670_DIG_MIXER, 953 RT5670_M_STO_L_DAC_L_SFT, 1, 1), 954 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER, 955 RT5670_M_DAC_L2_DAC_L_SFT, 1, 1), 956 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER, 957 RT5670_M_DAC_R2_DAC_L_SFT, 1, 1), 958 }; 959 960 static const struct snd_kcontrol_new rt5670_dig_r_mix[] = { 961 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5670_DIG_MIXER, 962 RT5670_M_STO_R_DAC_R_SFT, 1, 1), 963 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER, 964 RT5670_M_DAC_R2_DAC_R_SFT, 1, 1), 965 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER, 966 RT5670_M_DAC_L2_DAC_R_SFT, 1, 1), 967 }; 968 969 /* Analog Input Mixer */ 970 static const struct snd_kcontrol_new rt5670_rec_l_mix[] = { 971 SOC_DAPM_SINGLE("INL Switch", RT5670_REC_L2_MIXER, 972 RT5670_M_IN_L_RM_L_SFT, 1, 1), 973 SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_L2_MIXER, 974 RT5670_M_BST2_RM_L_SFT, 1, 1), 975 SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_L2_MIXER, 976 RT5670_M_BST1_RM_L_SFT, 1, 1), 977 }; 978 979 static const struct snd_kcontrol_new rt5670_rec_r_mix[] = { 980 SOC_DAPM_SINGLE("INR Switch", RT5670_REC_R2_MIXER, 981 RT5670_M_IN_R_RM_R_SFT, 1, 1), 982 SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_R2_MIXER, 983 RT5670_M_BST2_RM_R_SFT, 1, 1), 984 SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_R2_MIXER, 985 RT5670_M_BST1_RM_R_SFT, 1, 1), 986 }; 987 988 static const struct snd_kcontrol_new rt5670_out_l_mix[] = { 989 SOC_DAPM_SINGLE("BST1 Switch", RT5670_OUT_L1_MIXER, 990 RT5670_M_BST1_OM_L_SFT, 1, 1), 991 SOC_DAPM_SINGLE("INL Switch", RT5670_OUT_L1_MIXER, 992 RT5670_M_IN_L_OM_L_SFT, 1, 1), 993 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_OUT_L1_MIXER, 994 RT5670_M_DAC_L2_OM_L_SFT, 1, 1), 995 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_OUT_L1_MIXER, 996 RT5670_M_DAC_L1_OM_L_SFT, 1, 1), 997 }; 998 999 static const struct snd_kcontrol_new rt5670_out_r_mix[] = { 1000 SOC_DAPM_SINGLE("BST2 Switch", RT5670_OUT_R1_MIXER, 1001 RT5670_M_BST2_OM_R_SFT, 1, 1), 1002 SOC_DAPM_SINGLE("INR Switch", RT5670_OUT_R1_MIXER, 1003 RT5670_M_IN_R_OM_R_SFT, 1, 1), 1004 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_OUT_R1_MIXER, 1005 RT5670_M_DAC_R2_OM_R_SFT, 1, 1), 1006 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_OUT_R1_MIXER, 1007 RT5670_M_DAC_R1_OM_R_SFT, 1, 1), 1008 }; 1009 1010 static const struct snd_kcontrol_new rt5670_hpo_mix[] = { 1011 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER, 1012 RT5670_M_DAC1_HM_SFT, 1, 1), 1013 SOC_DAPM_SINGLE("HPVOL Switch", RT5670_HPO_MIXER, 1014 RT5670_M_HPVOL_HM_SFT, 1, 1), 1015 }; 1016 1017 static const struct snd_kcontrol_new rt5670_hpvoll_mix[] = { 1018 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER, 1019 RT5670_M_DACL1_HML_SFT, 1, 1), 1020 SOC_DAPM_SINGLE("INL Switch", RT5670_HPO_MIXER, 1021 RT5670_M_INL1_HML_SFT, 1, 1), 1022 }; 1023 1024 static const struct snd_kcontrol_new rt5670_hpvolr_mix[] = { 1025 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER, 1026 RT5670_M_DACR1_HMR_SFT, 1, 1), 1027 SOC_DAPM_SINGLE("INR Switch", RT5670_HPO_MIXER, 1028 RT5670_M_INR1_HMR_SFT, 1, 1), 1029 }; 1030 1031 static const struct snd_kcontrol_new rt5670_lout_mix[] = { 1032 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_LOUT_MIXER, 1033 RT5670_M_DAC_L1_LM_SFT, 1, 1), 1034 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_LOUT_MIXER, 1035 RT5670_M_DAC_R1_LM_SFT, 1, 1), 1036 SOC_DAPM_SINGLE("OUTMIX L Switch", RT5670_LOUT_MIXER, 1037 RT5670_M_OV_L_LM_SFT, 1, 1), 1038 SOC_DAPM_SINGLE("OUTMIX R Switch", RT5670_LOUT_MIXER, 1039 RT5670_M_OV_R_LM_SFT, 1, 1), 1040 }; 1041 1042 static const struct snd_kcontrol_new rt5670_hpl_mix[] = { 1043 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_HPO_MIXER, 1044 RT5670_M_DACL1_HML_SFT, 1, 1), 1045 SOC_DAPM_SINGLE("INL1 Switch", RT5670_HPO_MIXER, 1046 RT5670_M_INL1_HML_SFT, 1, 1), 1047 }; 1048 1049 static const struct snd_kcontrol_new rt5670_hpr_mix[] = { 1050 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_HPO_MIXER, 1051 RT5670_M_DACR1_HMR_SFT, 1, 1), 1052 SOC_DAPM_SINGLE("INR1 Switch", RT5670_HPO_MIXER, 1053 RT5670_M_INR1_HMR_SFT, 1, 1), 1054 }; 1055 1056 static const struct snd_kcontrol_new lout_l_enable_control = 1057 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1, 1058 RT5670_L_MUTE_SFT, 1, 1); 1059 1060 static const struct snd_kcontrol_new lout_r_enable_control = 1061 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1, 1062 RT5670_R_MUTE_SFT, 1, 1); 1063 1064 /* DAC1 L/R source */ /* MX-29 [9:8] [11:10] */ 1065 static const char * const rt5670_dac1_src[] = { 1066 "IF1 DAC", "IF2 DAC" 1067 }; 1068 1069 static SOC_ENUM_SINGLE_DECL(rt5670_dac1l_enum, RT5670_AD_DA_MIXER, 1070 RT5670_DAC1_L_SEL_SFT, rt5670_dac1_src); 1071 1072 static const struct snd_kcontrol_new rt5670_dac1l_mux = 1073 SOC_DAPM_ENUM("DAC1 L source", rt5670_dac1l_enum); 1074 1075 static SOC_ENUM_SINGLE_DECL(rt5670_dac1r_enum, RT5670_AD_DA_MIXER, 1076 RT5670_DAC1_R_SEL_SFT, rt5670_dac1_src); 1077 1078 static const struct snd_kcontrol_new rt5670_dac1r_mux = 1079 SOC_DAPM_ENUM("DAC1 R source", rt5670_dac1r_enum); 1080 1081 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */ 1082 /* TODO Use SOC_VALUE_ENUM_SINGLE_DECL */ 1083 static const char * const rt5670_dac12_src[] = { 1084 "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC", 1085 "Bass", "VAD_ADC", "IF4 DAC" 1086 }; 1087 1088 static SOC_ENUM_SINGLE_DECL(rt5670_dac2l_enum, RT5670_DAC_CTRL, 1089 RT5670_DAC2_L_SEL_SFT, rt5670_dac12_src); 1090 1091 static const struct snd_kcontrol_new rt5670_dac_l2_mux = 1092 SOC_DAPM_ENUM("DAC2 L source", rt5670_dac2l_enum); 1093 1094 static const char * const rt5670_dacr2_src[] = { 1095 "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC", "TxDP ADC", "IF4 DAC" 1096 }; 1097 1098 static SOC_ENUM_SINGLE_DECL(rt5670_dac2r_enum, RT5670_DAC_CTRL, 1099 RT5670_DAC2_R_SEL_SFT, rt5670_dacr2_src); 1100 1101 static const struct snd_kcontrol_new rt5670_dac_r2_mux = 1102 SOC_DAPM_ENUM("DAC2 R source", rt5670_dac2r_enum); 1103 1104 /*RxDP source*/ /* MX-2D [15:13] */ 1105 static const char * const rt5670_rxdp_src[] = { 1106 "IF2 DAC", "IF1 DAC", "STO1 ADC Mixer", "STO2 ADC Mixer", 1107 "Mono ADC Mixer L", "Mono ADC Mixer R", "DAC1" 1108 }; 1109 1110 static SOC_ENUM_SINGLE_DECL(rt5670_rxdp_enum, RT5670_DSP_PATH1, 1111 RT5670_RXDP_SEL_SFT, rt5670_rxdp_src); 1112 1113 static const struct snd_kcontrol_new rt5670_rxdp_mux = 1114 SOC_DAPM_ENUM("DAC2 L source", rt5670_rxdp_enum); 1115 1116 /* MX-2D [1] [0] */ 1117 static const char * const rt5670_dsp_bypass_src[] = { 1118 "DSP", "Bypass" 1119 }; 1120 1121 static SOC_ENUM_SINGLE_DECL(rt5670_dsp_ul_enum, RT5670_DSP_PATH1, 1122 RT5670_DSP_UL_SFT, rt5670_dsp_bypass_src); 1123 1124 static const struct snd_kcontrol_new rt5670_dsp_ul_mux = 1125 SOC_DAPM_ENUM("DSP UL source", rt5670_dsp_ul_enum); 1126 1127 static SOC_ENUM_SINGLE_DECL(rt5670_dsp_dl_enum, RT5670_DSP_PATH1, 1128 RT5670_DSP_DL_SFT, rt5670_dsp_bypass_src); 1129 1130 static const struct snd_kcontrol_new rt5670_dsp_dl_mux = 1131 SOC_DAPM_ENUM("DSP DL source", rt5670_dsp_dl_enum); 1132 1133 /* Stereo2 ADC source */ 1134 /* MX-26 [15] */ 1135 static const char * const rt5670_stereo2_adc_lr_src[] = { 1136 "L", "LR" 1137 }; 1138 1139 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_lr_enum, RT5670_STO2_ADC_MIXER, 1140 RT5670_STO2_ADC_SRC_SFT, rt5670_stereo2_adc_lr_src); 1141 1142 static const struct snd_kcontrol_new rt5670_sto2_adc_lr_mux = 1143 SOC_DAPM_ENUM("Stereo2 ADC LR source", rt5670_stereo2_adc_lr_enum); 1144 1145 /* Stereo1 ADC source */ 1146 /* MX-27 MX-26 [12] */ 1147 static const char * const rt5670_stereo_adc1_src[] = { 1148 "DAC MIX", "ADC" 1149 }; 1150 1151 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc1_enum, RT5670_STO1_ADC_MIXER, 1152 RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src); 1153 1154 static const struct snd_kcontrol_new rt5670_sto_adc_l1_mux = 1155 SOC_DAPM_ENUM("Stereo1 ADC L1 source", rt5670_stereo1_adc1_enum); 1156 1157 static const struct snd_kcontrol_new rt5670_sto_adc_r1_mux = 1158 SOC_DAPM_ENUM("Stereo1 ADC R1 source", rt5670_stereo1_adc1_enum); 1159 1160 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc1_enum, RT5670_STO2_ADC_MIXER, 1161 RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src); 1162 1163 static const struct snd_kcontrol_new rt5670_sto2_adc_l1_mux = 1164 SOC_DAPM_ENUM("Stereo2 ADC L1 source", rt5670_stereo2_adc1_enum); 1165 1166 static const struct snd_kcontrol_new rt5670_sto2_adc_r1_mux = 1167 SOC_DAPM_ENUM("Stereo2 ADC R1 source", rt5670_stereo2_adc1_enum); 1168 1169 /* MX-27 MX-26 [11] */ 1170 static const char * const rt5670_stereo_adc2_src[] = { 1171 "DAC MIX", "DMIC" 1172 }; 1173 1174 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc2_enum, RT5670_STO1_ADC_MIXER, 1175 RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src); 1176 1177 static const struct snd_kcontrol_new rt5670_sto_adc_l2_mux = 1178 SOC_DAPM_ENUM("Stereo1 ADC L2 source", rt5670_stereo1_adc2_enum); 1179 1180 static const struct snd_kcontrol_new rt5670_sto_adc_r2_mux = 1181 SOC_DAPM_ENUM("Stereo1 ADC R2 source", rt5670_stereo1_adc2_enum); 1182 1183 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc2_enum, RT5670_STO2_ADC_MIXER, 1184 RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src); 1185 1186 static const struct snd_kcontrol_new rt5670_sto2_adc_l2_mux = 1187 SOC_DAPM_ENUM("Stereo2 ADC L2 source", rt5670_stereo2_adc2_enum); 1188 1189 static const struct snd_kcontrol_new rt5670_sto2_adc_r2_mux = 1190 SOC_DAPM_ENUM("Stereo2 ADC R2 source", rt5670_stereo2_adc2_enum); 1191 1192 /* MX-27 MX26 [10] */ 1193 static const char * const rt5670_stereo_adc_src[] = { 1194 "ADC1L ADC2R", "ADC3" 1195 }; 1196 1197 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc_enum, RT5670_STO1_ADC_MIXER, 1198 RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src); 1199 1200 static const struct snd_kcontrol_new rt5670_sto_adc_mux = 1201 SOC_DAPM_ENUM("Stereo1 ADC source", rt5670_stereo1_adc_enum); 1202 1203 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_enum, RT5670_STO2_ADC_MIXER, 1204 RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src); 1205 1206 static const struct snd_kcontrol_new rt5670_sto2_adc_mux = 1207 SOC_DAPM_ENUM("Stereo2 ADC source", rt5670_stereo2_adc_enum); 1208 1209 /* MX-27 MX-26 [9:8] */ 1210 static const char * const rt5670_stereo_dmic_src[] = { 1211 "DMIC1", "DMIC2", "DMIC3" 1212 }; 1213 1214 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_dmic_enum, RT5670_STO1_ADC_MIXER, 1215 RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src); 1216 1217 static const struct snd_kcontrol_new rt5670_sto1_dmic_mux = 1218 SOC_DAPM_ENUM("Stereo1 DMIC source", rt5670_stereo1_dmic_enum); 1219 1220 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_dmic_enum, RT5670_STO2_ADC_MIXER, 1221 RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src); 1222 1223 static const struct snd_kcontrol_new rt5670_sto2_dmic_mux = 1224 SOC_DAPM_ENUM("Stereo2 DMIC source", rt5670_stereo2_dmic_enum); 1225 1226 /* MX-27 [0] */ 1227 static const char * const rt5670_stereo_dmic3_src[] = { 1228 "DMIC3", "PDM ADC" 1229 }; 1230 1231 static SOC_ENUM_SINGLE_DECL(rt5670_stereo_dmic3_enum, RT5670_STO1_ADC_MIXER, 1232 RT5670_DMIC3_SRC_SFT, rt5670_stereo_dmic3_src); 1233 1234 static const struct snd_kcontrol_new rt5670_sto_dmic3_mux = 1235 SOC_DAPM_ENUM("Stereo DMIC3 source", rt5670_stereo_dmic3_enum); 1236 1237 /* Mono ADC source */ 1238 /* MX-28 [12] */ 1239 static const char * const rt5670_mono_adc_l1_src[] = { 1240 "Mono DAC MIXL", "ADC1" 1241 }; 1242 1243 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l1_enum, RT5670_MONO_ADC_MIXER, 1244 RT5670_MONO_ADC_L1_SRC_SFT, rt5670_mono_adc_l1_src); 1245 1246 static const struct snd_kcontrol_new rt5670_mono_adc_l1_mux = 1247 SOC_DAPM_ENUM("Mono ADC1 left source", rt5670_mono_adc_l1_enum); 1248 /* MX-28 [11] */ 1249 static const char * const rt5670_mono_adc_l2_src[] = { 1250 "Mono DAC MIXL", "DMIC" 1251 }; 1252 1253 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l2_enum, RT5670_MONO_ADC_MIXER, 1254 RT5670_MONO_ADC_L2_SRC_SFT, rt5670_mono_adc_l2_src); 1255 1256 static const struct snd_kcontrol_new rt5670_mono_adc_l2_mux = 1257 SOC_DAPM_ENUM("Mono ADC2 left source", rt5670_mono_adc_l2_enum); 1258 1259 /* MX-28 [9:8] */ 1260 static const char * const rt5670_mono_dmic_src[] = { 1261 "DMIC1", "DMIC2", "DMIC3" 1262 }; 1263 1264 static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_l_enum, RT5670_MONO_ADC_MIXER, 1265 RT5670_MONO_DMIC_L_SRC_SFT, rt5670_mono_dmic_src); 1266 1267 static const struct snd_kcontrol_new rt5670_mono_dmic_l_mux = 1268 SOC_DAPM_ENUM("Mono DMIC left source", rt5670_mono_dmic_l_enum); 1269 /* MX-28 [1:0] */ 1270 static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_r_enum, RT5670_MONO_ADC_MIXER, 1271 RT5670_MONO_DMIC_R_SRC_SFT, rt5670_mono_dmic_src); 1272 1273 static const struct snd_kcontrol_new rt5670_mono_dmic_r_mux = 1274 SOC_DAPM_ENUM("Mono DMIC Right source", rt5670_mono_dmic_r_enum); 1275 /* MX-28 [4] */ 1276 static const char * const rt5670_mono_adc_r1_src[] = { 1277 "Mono DAC MIXR", "ADC2" 1278 }; 1279 1280 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r1_enum, RT5670_MONO_ADC_MIXER, 1281 RT5670_MONO_ADC_R1_SRC_SFT, rt5670_mono_adc_r1_src); 1282 1283 static const struct snd_kcontrol_new rt5670_mono_adc_r1_mux = 1284 SOC_DAPM_ENUM("Mono ADC1 right source", rt5670_mono_adc_r1_enum); 1285 /* MX-28 [3] */ 1286 static const char * const rt5670_mono_adc_r2_src[] = { 1287 "Mono DAC MIXR", "DMIC" 1288 }; 1289 1290 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r2_enum, RT5670_MONO_ADC_MIXER, 1291 RT5670_MONO_ADC_R2_SRC_SFT, rt5670_mono_adc_r2_src); 1292 1293 static const struct snd_kcontrol_new rt5670_mono_adc_r2_mux = 1294 SOC_DAPM_ENUM("Mono ADC2 right source", rt5670_mono_adc_r2_enum); 1295 1296 /* MX-2D [3:2] */ 1297 static const char * const rt5670_txdp_slot_src[] = { 1298 "Slot 0-1", "Slot 2-3", "Slot 4-5", "Slot 6-7" 1299 }; 1300 1301 static SOC_ENUM_SINGLE_DECL(rt5670_txdp_slot_enum, RT5670_DSP_PATH1, 1302 RT5670_TXDP_SLOT_SEL_SFT, rt5670_txdp_slot_src); 1303 1304 static const struct snd_kcontrol_new rt5670_txdp_slot_mux = 1305 SOC_DAPM_ENUM("TxDP Slot source", rt5670_txdp_slot_enum); 1306 1307 /* MX-2F [15] */ 1308 static const char * const rt5670_if1_adc2_in_src[] = { 1309 "IF_ADC2", "VAD_ADC" 1310 }; 1311 1312 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in_enum, RT5670_DIG_INF1_DATA, 1313 RT5670_IF1_ADC2_IN_SFT, rt5670_if1_adc2_in_src); 1314 1315 static const struct snd_kcontrol_new rt5670_if1_adc2_in_mux = 1316 SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5670_if1_adc2_in_enum); 1317 1318 /* MX-2F [14:12] */ 1319 static const char * const rt5670_if2_adc_in_src[] = { 1320 "IF_ADC1", "IF_ADC2", "IF_ADC3", "TxDC_DAC", "TxDP_ADC", "VAD_ADC" 1321 }; 1322 1323 static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_in_enum, RT5670_DIG_INF1_DATA, 1324 RT5670_IF2_ADC_IN_SFT, rt5670_if2_adc_in_src); 1325 1326 static const struct snd_kcontrol_new rt5670_if2_adc_in_mux = 1327 SOC_DAPM_ENUM("IF2 ADC IN source", rt5670_if2_adc_in_enum); 1328 1329 /* MX-30 [5:4] */ 1330 static const char * const rt5670_if4_adc_in_src[] = { 1331 "IF_ADC1", "IF_ADC2", "IF_ADC3" 1332 }; 1333 1334 static SOC_ENUM_SINGLE_DECL(rt5670_if4_adc_in_enum, RT5670_DIG_INF2_DATA, 1335 RT5670_IF4_ADC_IN_SFT, rt5670_if4_adc_in_src); 1336 1337 static const struct snd_kcontrol_new rt5670_if4_adc_in_mux = 1338 SOC_DAPM_ENUM("IF4 ADC IN source", rt5670_if4_adc_in_enum); 1339 1340 /* MX-31 [15] [13] [11] [9] */ 1341 static const char * const rt5670_pdm_src[] = { 1342 "Mono DAC", "Stereo DAC" 1343 }; 1344 1345 static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_l_enum, RT5670_PDM_OUT_CTRL, 1346 RT5670_PDM1_L_SFT, rt5670_pdm_src); 1347 1348 static const struct snd_kcontrol_new rt5670_pdm1_l_mux = 1349 SOC_DAPM_ENUM("PDM1 L source", rt5670_pdm1_l_enum); 1350 1351 static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_r_enum, RT5670_PDM_OUT_CTRL, 1352 RT5670_PDM1_R_SFT, rt5670_pdm_src); 1353 1354 static const struct snd_kcontrol_new rt5670_pdm1_r_mux = 1355 SOC_DAPM_ENUM("PDM1 R source", rt5670_pdm1_r_enum); 1356 1357 static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_l_enum, RT5670_PDM_OUT_CTRL, 1358 RT5670_PDM2_L_SFT, rt5670_pdm_src); 1359 1360 static const struct snd_kcontrol_new rt5670_pdm2_l_mux = 1361 SOC_DAPM_ENUM("PDM2 L source", rt5670_pdm2_l_enum); 1362 1363 static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_r_enum, RT5670_PDM_OUT_CTRL, 1364 RT5670_PDM2_R_SFT, rt5670_pdm_src); 1365 1366 static const struct snd_kcontrol_new rt5670_pdm2_r_mux = 1367 SOC_DAPM_ENUM("PDM2 R source", rt5670_pdm2_r_enum); 1368 1369 /* MX-FA [12] */ 1370 static const char * const rt5670_if1_adc1_in1_src[] = { 1371 "IF_ADC1", "IF1_ADC3" 1372 }; 1373 1374 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in1_enum, RT5670_DIG_MISC, 1375 RT5670_IF1_ADC1_IN1_SFT, rt5670_if1_adc1_in1_src); 1376 1377 static const struct snd_kcontrol_new rt5670_if1_adc1_in1_mux = 1378 SOC_DAPM_ENUM("IF1 ADC1 IN1 source", rt5670_if1_adc1_in1_enum); 1379 1380 /* MX-FA [11] */ 1381 static const char * const rt5670_if1_adc1_in2_src[] = { 1382 "IF1_ADC1_IN1", "IF1_ADC4" 1383 }; 1384 1385 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in2_enum, RT5670_DIG_MISC, 1386 RT5670_IF1_ADC1_IN2_SFT, rt5670_if1_adc1_in2_src); 1387 1388 static const struct snd_kcontrol_new rt5670_if1_adc1_in2_mux = 1389 SOC_DAPM_ENUM("IF1 ADC1 IN2 source", rt5670_if1_adc1_in2_enum); 1390 1391 /* MX-FA [10] */ 1392 static const char * const rt5670_if1_adc2_in1_src[] = { 1393 "IF1_ADC2_IN", "IF1_ADC4" 1394 }; 1395 1396 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in1_enum, RT5670_DIG_MISC, 1397 RT5670_IF1_ADC2_IN1_SFT, rt5670_if1_adc2_in1_src); 1398 1399 static const struct snd_kcontrol_new rt5670_if1_adc2_in1_mux = 1400 SOC_DAPM_ENUM("IF1 ADC2 IN1 source", rt5670_if1_adc2_in1_enum); 1401 1402 /* MX-9D [9:8] */ 1403 static const char * const rt5670_vad_adc_src[] = { 1404 "Sto1 ADC L", "Mono ADC L", "Mono ADC R", "Sto2 ADC L" 1405 }; 1406 1407 static SOC_ENUM_SINGLE_DECL(rt5670_vad_adc_enum, RT5670_VAD_CTRL4, 1408 RT5670_VAD_SEL_SFT, rt5670_vad_adc_src); 1409 1410 static const struct snd_kcontrol_new rt5670_vad_adc_mux = 1411 SOC_DAPM_ENUM("VAD ADC source", rt5670_vad_adc_enum); 1412 1413 static int rt5670_hp_power_event(struct snd_soc_dapm_widget *w, 1414 struct snd_kcontrol *kcontrol, int event) 1415 { 1416 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 1417 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 1418 1419 switch (event) { 1420 case SND_SOC_DAPM_POST_PMU: 1421 regmap_update_bits(rt5670->regmap, RT5670_CHARGE_PUMP, 1422 RT5670_PM_HP_MASK, RT5670_PM_HP_HV); 1423 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2, 1424 0x0400, 0x0400); 1425 /* headphone amp power on */ 1426 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1, 1427 RT5670_PWR_HA | RT5670_PWR_FV1 | 1428 RT5670_PWR_FV2, RT5670_PWR_HA | 1429 RT5670_PWR_FV1 | RT5670_PWR_FV2); 1430 /* depop parameters */ 1431 regmap_write(rt5670->regmap, RT5670_DEPOP_M2, 0x3100); 1432 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8009); 1433 regmap_write(rt5670->regmap, RT5670_PR_BASE + 1434 RT5670_HP_DCC_INT1, 0x9f00); 1435 mdelay(20); 1436 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019); 1437 break; 1438 case SND_SOC_DAPM_PRE_PMD: 1439 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x0004); 1440 msleep(30); 1441 break; 1442 default: 1443 return 0; 1444 } 1445 1446 return 0; 1447 } 1448 1449 static int rt5670_hp_event(struct snd_soc_dapm_widget *w, 1450 struct snd_kcontrol *kcontrol, int event) 1451 { 1452 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 1453 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 1454 1455 switch (event) { 1456 case SND_SOC_DAPM_POST_PMU: 1457 /* headphone unmute sequence */ 1458 regmap_write(rt5670->regmap, RT5670_PR_BASE + 1459 RT5670_MAMP_INT_REG2, 0xb400); 1460 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772); 1461 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x805d); 1462 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d); 1463 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2, 1464 0x0300, 0x0300); 1465 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL, 1466 RT5670_L_MUTE | RT5670_R_MUTE, 0); 1467 msleep(80); 1468 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019); 1469 break; 1470 1471 case SND_SOC_DAPM_PRE_PMD: 1472 /* headphone mute sequence */ 1473 regmap_write(rt5670->regmap, RT5670_PR_BASE + 1474 RT5670_MAMP_INT_REG2, 0xb400); 1475 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772); 1476 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x803d); 1477 mdelay(10); 1478 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d); 1479 mdelay(10); 1480 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL, 1481 RT5670_L_MUTE | RT5670_R_MUTE, 1482 RT5670_L_MUTE | RT5670_R_MUTE); 1483 msleep(20); 1484 regmap_update_bits(rt5670->regmap, 1485 RT5670_GEN_CTRL2, 0x0300, 0x0); 1486 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019); 1487 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0707); 1488 regmap_write(rt5670->regmap, RT5670_PR_BASE + 1489 RT5670_MAMP_INT_REG2, 0xfc00); 1490 break; 1491 1492 default: 1493 return 0; 1494 } 1495 1496 return 0; 1497 } 1498 1499 static int rt5670_bst1_event(struct snd_soc_dapm_widget *w, 1500 struct snd_kcontrol *kcontrol, int event) 1501 { 1502 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 1503 1504 switch (event) { 1505 case SND_SOC_DAPM_POST_PMU: 1506 snd_soc_update_bits(codec, RT5670_PWR_ANLG2, 1507 RT5670_PWR_BST1_P, RT5670_PWR_BST1_P); 1508 break; 1509 1510 case SND_SOC_DAPM_PRE_PMD: 1511 snd_soc_update_bits(codec, RT5670_PWR_ANLG2, 1512 RT5670_PWR_BST1_P, 0); 1513 break; 1514 1515 default: 1516 return 0; 1517 } 1518 1519 return 0; 1520 } 1521 1522 static int rt5670_bst2_event(struct snd_soc_dapm_widget *w, 1523 struct snd_kcontrol *kcontrol, int event) 1524 { 1525 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 1526 1527 switch (event) { 1528 case SND_SOC_DAPM_POST_PMU: 1529 snd_soc_update_bits(codec, RT5670_PWR_ANLG2, 1530 RT5670_PWR_BST2_P, RT5670_PWR_BST2_P); 1531 break; 1532 1533 case SND_SOC_DAPM_PRE_PMD: 1534 snd_soc_update_bits(codec, RT5670_PWR_ANLG2, 1535 RT5670_PWR_BST2_P, 0); 1536 break; 1537 1538 default: 1539 return 0; 1540 } 1541 1542 return 0; 1543 } 1544 1545 static const struct snd_soc_dapm_widget rt5670_dapm_widgets[] = { 1546 SND_SOC_DAPM_SUPPLY("PLL1", RT5670_PWR_ANLG2, 1547 RT5670_PWR_PLL_BIT, 0, NULL, 0), 1548 SND_SOC_DAPM_SUPPLY("I2S DSP", RT5670_PWR_DIG2, 1549 RT5670_PWR_I2S_DSP_BIT, 0, NULL, 0), 1550 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5670_PWR_VOL, 1551 RT5670_PWR_MIC_DET_BIT, 0, NULL, 0), 1552 1553 /* ASRC */ 1554 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5670_ASRC_1, 1555 11, 0, NULL, 0), 1556 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5670_ASRC_1, 1557 12, 0, NULL, 0), 1558 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5670_ASRC_1, 1559 10, 0, NULL, 0), 1560 SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5670_ASRC_1, 1561 9, 0, NULL, 0), 1562 SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5670_ASRC_1, 1563 8, 0, NULL, 0), 1564 SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5670_ASRC_1, 1565 7, 0, NULL, 0), 1566 SND_SOC_DAPM_SUPPLY_S("DMIC STO2 ASRC", 1, RT5670_ASRC_1, 1567 6, 0, NULL, 0), 1568 SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5670_ASRC_1, 1569 5, 0, NULL, 0), 1570 SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5670_ASRC_1, 1571 4, 0, NULL, 0), 1572 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5670_ASRC_1, 1573 3, 0, NULL, 0), 1574 SND_SOC_DAPM_SUPPLY_S("ADC STO2 ASRC", 1, RT5670_ASRC_1, 1575 2, 0, NULL, 0), 1576 SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5670_ASRC_1, 1577 1, 0, NULL, 0), 1578 SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5670_ASRC_1, 1579 0, 0, NULL, 0), 1580 1581 /* Input Side */ 1582 /* micbias */ 1583 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5670_PWR_ANLG2, 1584 RT5670_PWR_MB1_BIT, 0, NULL, 0), 1585 1586 /* Input Lines */ 1587 SND_SOC_DAPM_INPUT("DMIC L1"), 1588 SND_SOC_DAPM_INPUT("DMIC R1"), 1589 SND_SOC_DAPM_INPUT("DMIC L2"), 1590 SND_SOC_DAPM_INPUT("DMIC R2"), 1591 SND_SOC_DAPM_INPUT("DMIC L3"), 1592 SND_SOC_DAPM_INPUT("DMIC R3"), 1593 1594 SND_SOC_DAPM_INPUT("IN1P"), 1595 SND_SOC_DAPM_INPUT("IN1N"), 1596 SND_SOC_DAPM_INPUT("IN2P"), 1597 SND_SOC_DAPM_INPUT("IN2N"), 1598 1599 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1600 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1601 SND_SOC_DAPM_PGA("DMIC3", SND_SOC_NOPM, 0, 0, NULL, 0), 1602 1603 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0, 1604 set_dmic_clk, SND_SOC_DAPM_PRE_PMU), 1605 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5670_DMIC_CTRL1, 1606 RT5670_DMIC_1_EN_SFT, 0, NULL, 0), 1607 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5670_DMIC_CTRL1, 1608 RT5670_DMIC_2_EN_SFT, 0, NULL, 0), 1609 SND_SOC_DAPM_SUPPLY("DMIC3 Power", RT5670_DMIC_CTRL1, 1610 RT5670_DMIC_3_EN_SFT, 0, NULL, 0), 1611 /* Boost */ 1612 SND_SOC_DAPM_PGA_E("BST1", RT5670_PWR_ANLG2, RT5670_PWR_BST1_BIT, 1613 0, NULL, 0, rt5670_bst1_event, 1614 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 1615 SND_SOC_DAPM_PGA_E("BST2", RT5670_PWR_ANLG2, RT5670_PWR_BST2_BIT, 1616 0, NULL, 0, rt5670_bst2_event, 1617 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 1618 /* Input Volume */ 1619 SND_SOC_DAPM_PGA("INL VOL", RT5670_PWR_VOL, 1620 RT5670_PWR_IN_L_BIT, 0, NULL, 0), 1621 SND_SOC_DAPM_PGA("INR VOL", RT5670_PWR_VOL, 1622 RT5670_PWR_IN_R_BIT, 0, NULL, 0), 1623 1624 /* REC Mixer */ 1625 SND_SOC_DAPM_MIXER("RECMIXL", RT5670_PWR_MIXER, RT5670_PWR_RM_L_BIT, 0, 1626 rt5670_rec_l_mix, ARRAY_SIZE(rt5670_rec_l_mix)), 1627 SND_SOC_DAPM_MIXER("RECMIXR", RT5670_PWR_MIXER, RT5670_PWR_RM_R_BIT, 0, 1628 rt5670_rec_r_mix, ARRAY_SIZE(rt5670_rec_r_mix)), 1629 /* ADCs */ 1630 SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0), 1631 SND_SOC_DAPM_ADC("ADC 2", NULL, SND_SOC_NOPM, 0, 0), 1632 1633 SND_SOC_DAPM_PGA("ADC 1_2", SND_SOC_NOPM, 0, 0, NULL, 0), 1634 1635 SND_SOC_DAPM_SUPPLY("ADC 1 power", RT5670_PWR_DIG1, 1636 RT5670_PWR_ADC_L_BIT, 0, NULL, 0), 1637 SND_SOC_DAPM_SUPPLY("ADC 2 power", RT5670_PWR_DIG1, 1638 RT5670_PWR_ADC_R_BIT, 0, NULL, 0), 1639 SND_SOC_DAPM_SUPPLY("ADC clock", RT5670_PR_BASE + 1640 RT5670_CHOP_DAC_ADC, 12, 0, NULL, 0), 1641 /* ADC Mux */ 1642 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0, 1643 &rt5670_sto1_dmic_mux), 1644 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0, 1645 &rt5670_sto_adc_l2_mux), 1646 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0, 1647 &rt5670_sto_adc_r2_mux), 1648 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0, 1649 &rt5670_sto_adc_l1_mux), 1650 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0, 1651 &rt5670_sto_adc_r1_mux), 1652 SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0, 1653 &rt5670_sto2_dmic_mux), 1654 SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0, 1655 &rt5670_sto2_adc_l2_mux), 1656 SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0, 1657 &rt5670_sto2_adc_r2_mux), 1658 SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0, 1659 &rt5670_sto2_adc_l1_mux), 1660 SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0, 1661 &rt5670_sto2_adc_r1_mux), 1662 SND_SOC_DAPM_MUX("Stereo2 ADC LR Mux", SND_SOC_NOPM, 0, 0, 1663 &rt5670_sto2_adc_lr_mux), 1664 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0, 1665 &rt5670_mono_dmic_l_mux), 1666 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0, 1667 &rt5670_mono_dmic_r_mux), 1668 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0, 1669 &rt5670_mono_adc_l2_mux), 1670 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0, 1671 &rt5670_mono_adc_l1_mux), 1672 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0, 1673 &rt5670_mono_adc_r1_mux), 1674 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0, 1675 &rt5670_mono_adc_r2_mux), 1676 /* ADC Mixer */ 1677 SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5670_PWR_DIG2, 1678 RT5670_PWR_ADC_S1F_BIT, 0, NULL, 0), 1679 SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5670_PWR_DIG2, 1680 RT5670_PWR_ADC_S2F_BIT, 0, NULL, 0), 1681 SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", RT5670_STO1_ADC_DIG_VOL, 1682 RT5670_L_MUTE_SFT, 1, rt5670_sto1_adc_l_mix, 1683 ARRAY_SIZE(rt5670_sto1_adc_l_mix)), 1684 SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", RT5670_STO1_ADC_DIG_VOL, 1685 RT5670_R_MUTE_SFT, 1, rt5670_sto1_adc_r_mix, 1686 ARRAY_SIZE(rt5670_sto1_adc_r_mix)), 1687 SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0, 1688 rt5670_sto2_adc_l_mix, 1689 ARRAY_SIZE(rt5670_sto2_adc_l_mix)), 1690 SND_SOC_DAPM_MIXER("Sto2 ADC MIXR", SND_SOC_NOPM, 0, 0, 1691 rt5670_sto2_adc_r_mix, 1692 ARRAY_SIZE(rt5670_sto2_adc_r_mix)), 1693 SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5670_PWR_DIG2, 1694 RT5670_PWR_ADC_MF_L_BIT, 0, NULL, 0), 1695 SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5670_MONO_ADC_DIG_VOL, 1696 RT5670_L_MUTE_SFT, 1, rt5670_mono_adc_l_mix, 1697 ARRAY_SIZE(rt5670_mono_adc_l_mix)), 1698 SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5670_PWR_DIG2, 1699 RT5670_PWR_ADC_MF_R_BIT, 0, NULL, 0), 1700 SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5670_MONO_ADC_DIG_VOL, 1701 RT5670_R_MUTE_SFT, 1, rt5670_mono_adc_r_mix, 1702 ARRAY_SIZE(rt5670_mono_adc_r_mix)), 1703 1704 /* ADC PGA */ 1705 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0), 1706 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0), 1707 SND_SOC_DAPM_PGA("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0), 1708 SND_SOC_DAPM_PGA("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0), 1709 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1710 SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1711 SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1712 SND_SOC_DAPM_PGA("Mono ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1713 SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0), 1714 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1715 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1716 SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0), 1717 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1718 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1719 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0), 1720 1721 /* DSP */ 1722 SND_SOC_DAPM_PGA("TxDP_ADC", SND_SOC_NOPM, 0, 0, NULL, 0), 1723 SND_SOC_DAPM_PGA("TxDP_ADC_L", SND_SOC_NOPM, 0, 0, NULL, 0), 1724 SND_SOC_DAPM_PGA("TxDP_ADC_R", SND_SOC_NOPM, 0, 0, NULL, 0), 1725 SND_SOC_DAPM_PGA("TxDC_DAC", SND_SOC_NOPM, 0, 0, NULL, 0), 1726 1727 SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0, 1728 &rt5670_txdp_slot_mux), 1729 1730 SND_SOC_DAPM_MUX("DSP UL Mux", SND_SOC_NOPM, 0, 0, 1731 &rt5670_dsp_ul_mux), 1732 SND_SOC_DAPM_MUX("DSP DL Mux", SND_SOC_NOPM, 0, 0, 1733 &rt5670_dsp_dl_mux), 1734 1735 SND_SOC_DAPM_MUX("RxDP Mux", SND_SOC_NOPM, 0, 0, 1736 &rt5670_rxdp_mux), 1737 1738 /* IF2 Mux */ 1739 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0, 1740 &rt5670_if2_adc_in_mux), 1741 1742 /* Digital Interface */ 1743 SND_SOC_DAPM_SUPPLY("I2S1", RT5670_PWR_DIG1, 1744 RT5670_PWR_I2S1_BIT, 0, NULL, 0), 1745 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1746 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1747 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0), 1748 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0), 1749 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0), 1750 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0), 1751 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0), 1752 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0), 1753 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0), 1754 SND_SOC_DAPM_SUPPLY("I2S2", RT5670_PWR_DIG1, 1755 RT5670_PWR_I2S2_BIT, 0, NULL, 0), 1756 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0), 1757 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0), 1758 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0), 1759 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0), 1760 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0), 1761 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0), 1762 1763 /* Digital Interface Select */ 1764 SND_SOC_DAPM_MUX("IF1 ADC1 IN1 Mux", SND_SOC_NOPM, 0, 0, 1765 &rt5670_if1_adc1_in1_mux), 1766 SND_SOC_DAPM_MUX("IF1 ADC1 IN2 Mux", SND_SOC_NOPM, 0, 0, 1767 &rt5670_if1_adc1_in2_mux), 1768 SND_SOC_DAPM_MUX("IF1 ADC2 IN Mux", SND_SOC_NOPM, 0, 0, 1769 &rt5670_if1_adc2_in_mux), 1770 SND_SOC_DAPM_MUX("IF1 ADC2 IN1 Mux", SND_SOC_NOPM, 0, 0, 1771 &rt5670_if1_adc2_in1_mux), 1772 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM, 0, 0, 1773 &rt5670_vad_adc_mux), 1774 1775 /* Audio Interface */ 1776 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0), 1777 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0), 1778 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0), 1779 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, 1780 RT5670_GPIO_CTRL1, RT5670_I2S2_PIN_SFT, 1), 1781 1782 /* Audio DSP */ 1783 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0), 1784 1785 /* Output Side */ 1786 /* DAC mixer before sound effect */ 1787 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0, 1788 rt5670_dac_l_mix, ARRAY_SIZE(rt5670_dac_l_mix)), 1789 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0, 1790 rt5670_dac_r_mix, ARRAY_SIZE(rt5670_dac_r_mix)), 1791 SND_SOC_DAPM_PGA("DAC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1792 1793 /* DAC2 channel Mux */ 1794 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, 1795 &rt5670_dac_l2_mux), 1796 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, 1797 &rt5670_dac_r2_mux), 1798 SND_SOC_DAPM_PGA("DAC L2 Volume", RT5670_PWR_DIG1, 1799 RT5670_PWR_DAC_L2_BIT, 0, NULL, 0), 1800 SND_SOC_DAPM_PGA("DAC R2 Volume", RT5670_PWR_DIG1, 1801 RT5670_PWR_DAC_R2_BIT, 0, NULL, 0), 1802 1803 SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1l_mux), 1804 SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1r_mux), 1805 1806 /* DAC Mixer */ 1807 SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5670_PWR_DIG2, 1808 RT5670_PWR_DAC_S1F_BIT, 0, NULL, 0), 1809 SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5670_PWR_DIG2, 1810 RT5670_PWR_DAC_MF_L_BIT, 0, NULL, 0), 1811 SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5670_PWR_DIG2, 1812 RT5670_PWR_DAC_MF_R_BIT, 0, NULL, 0), 1813 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0, 1814 rt5670_sto_dac_l_mix, 1815 ARRAY_SIZE(rt5670_sto_dac_l_mix)), 1816 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0, 1817 rt5670_sto_dac_r_mix, 1818 ARRAY_SIZE(rt5670_sto_dac_r_mix)), 1819 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0, 1820 rt5670_mono_dac_l_mix, 1821 ARRAY_SIZE(rt5670_mono_dac_l_mix)), 1822 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0, 1823 rt5670_mono_dac_r_mix, 1824 ARRAY_SIZE(rt5670_mono_dac_r_mix)), 1825 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0, 1826 rt5670_dig_l_mix, 1827 ARRAY_SIZE(rt5670_dig_l_mix)), 1828 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0, 1829 rt5670_dig_r_mix, 1830 ARRAY_SIZE(rt5670_dig_r_mix)), 1831 1832 /* DACs */ 1833 SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5670_PWR_DIG1, 1834 RT5670_PWR_DAC_L1_BIT, 0, NULL, 0), 1835 SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5670_PWR_DIG1, 1836 RT5670_PWR_DAC_R1_BIT, 0, NULL, 0), 1837 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0), 1838 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0), 1839 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5670_PWR_DIG1, 1840 RT5670_PWR_DAC_L2_BIT, 0), 1841 1842 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5670_PWR_DIG1, 1843 RT5670_PWR_DAC_R2_BIT, 0), 1844 /* OUT Mixer */ 1845 1846 SND_SOC_DAPM_MIXER("OUT MIXL", RT5670_PWR_MIXER, RT5670_PWR_OM_L_BIT, 1847 0, rt5670_out_l_mix, ARRAY_SIZE(rt5670_out_l_mix)), 1848 SND_SOC_DAPM_MIXER("OUT MIXR", RT5670_PWR_MIXER, RT5670_PWR_OM_R_BIT, 1849 0, rt5670_out_r_mix, ARRAY_SIZE(rt5670_out_r_mix)), 1850 /* Ouput Volume */ 1851 SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5670_PWR_VOL, 1852 RT5670_PWR_HV_L_BIT, 0, 1853 rt5670_hpvoll_mix, ARRAY_SIZE(rt5670_hpvoll_mix)), 1854 SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5670_PWR_VOL, 1855 RT5670_PWR_HV_R_BIT, 0, 1856 rt5670_hpvolr_mix, ARRAY_SIZE(rt5670_hpvolr_mix)), 1857 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0), 1858 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0), 1859 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0), 1860 1861 /* HPO/LOUT/Mono Mixer */ 1862 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, 1863 rt5670_hpo_mix, ARRAY_SIZE(rt5670_hpo_mix)), 1864 SND_SOC_DAPM_MIXER("LOUT MIX", RT5670_PWR_ANLG1, RT5670_PWR_LM_BIT, 1865 0, rt5670_lout_mix, ARRAY_SIZE(rt5670_lout_mix)), 1866 SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM, 0, 0, 1867 rt5670_hp_power_event, SND_SOC_DAPM_POST_PMU | 1868 SND_SOC_DAPM_PRE_PMD), 1869 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5670_PWR_ANLG1, 1870 RT5670_PWR_HP_L_BIT, 0, NULL, 0), 1871 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5670_PWR_ANLG1, 1872 RT5670_PWR_HP_R_BIT, 0, NULL, 0), 1873 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, 1874 rt5670_hp_event, SND_SOC_DAPM_PRE_PMD | 1875 SND_SOC_DAPM_POST_PMU), 1876 SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0, 1877 &lout_l_enable_control), 1878 SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0, 1879 &lout_r_enable_control), 1880 SND_SOC_DAPM_PGA("LOUT Amp", SND_SOC_NOPM, 0, 0, NULL, 0), 1881 1882 /* PDM */ 1883 SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5670_PWR_DIG2, 1884 RT5670_PWR_PDM1_BIT, 0, NULL, 0), 1885 1886 SND_SOC_DAPM_MUX("PDM1 L Mux", RT5670_PDM_OUT_CTRL, 1887 RT5670_M_PDM1_L_SFT, 1, &rt5670_pdm1_l_mux), 1888 SND_SOC_DAPM_MUX("PDM1 R Mux", RT5670_PDM_OUT_CTRL, 1889 RT5670_M_PDM1_R_SFT, 1, &rt5670_pdm1_r_mux), 1890 1891 /* Output Lines */ 1892 SND_SOC_DAPM_OUTPUT("HPOL"), 1893 SND_SOC_DAPM_OUTPUT("HPOR"), 1894 SND_SOC_DAPM_OUTPUT("LOUTL"), 1895 SND_SOC_DAPM_OUTPUT("LOUTR"), 1896 }; 1897 1898 static const struct snd_soc_dapm_widget rt5670_specific_dapm_widgets[] = { 1899 SND_SOC_DAPM_SUPPLY("PDM2 Power", RT5670_PWR_DIG2, 1900 RT5670_PWR_PDM2_BIT, 0, NULL, 0), 1901 SND_SOC_DAPM_MUX("PDM2 L Mux", RT5670_PDM_OUT_CTRL, 1902 RT5670_M_PDM2_L_SFT, 1, &rt5670_pdm2_l_mux), 1903 SND_SOC_DAPM_MUX("PDM2 R Mux", RT5670_PDM_OUT_CTRL, 1904 RT5670_M_PDM2_R_SFT, 1, &rt5670_pdm2_r_mux), 1905 SND_SOC_DAPM_OUTPUT("PDM1L"), 1906 SND_SOC_DAPM_OUTPUT("PDM1R"), 1907 SND_SOC_DAPM_OUTPUT("PDM2L"), 1908 SND_SOC_DAPM_OUTPUT("PDM2R"), 1909 }; 1910 1911 static const struct snd_soc_dapm_widget rt5672_specific_dapm_widgets[] = { 1912 SND_SOC_DAPM_PGA("SPO Amp", SND_SOC_NOPM, 0, 0, NULL, 0), 1913 SND_SOC_DAPM_OUTPUT("SPOLP"), 1914 SND_SOC_DAPM_OUTPUT("SPOLN"), 1915 SND_SOC_DAPM_OUTPUT("SPORP"), 1916 SND_SOC_DAPM_OUTPUT("SPORN"), 1917 }; 1918 1919 static const struct snd_soc_dapm_route rt5670_dapm_routes[] = { 1920 { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc }, 1921 { "ADC Stereo2 Filter", NULL, "ADC STO2 ASRC", is_using_asrc }, 1922 { "ADC Mono Left Filter", NULL, "ADC MONO L ASRC", is_using_asrc }, 1923 { "ADC Mono Right Filter", NULL, "ADC MONO R ASRC", is_using_asrc }, 1924 { "DAC Mono Left Filter", NULL, "DAC MONO L ASRC", is_using_asrc }, 1925 { "DAC Mono Right Filter", NULL, "DAC MONO R ASRC", is_using_asrc }, 1926 { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc }, 1927 { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC", can_use_asrc }, 1928 { "Stereo2 DMIC Mux", NULL, "DMIC STO2 ASRC", can_use_asrc }, 1929 { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC", can_use_asrc }, 1930 { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC", can_use_asrc }, 1931 1932 { "I2S1", NULL, "I2S1 ASRC", can_use_asrc}, 1933 { "I2S2", NULL, "I2S2 ASRC", can_use_asrc}, 1934 1935 { "DMIC1", NULL, "DMIC L1" }, 1936 { "DMIC1", NULL, "DMIC R1" }, 1937 { "DMIC2", NULL, "DMIC L2" }, 1938 { "DMIC2", NULL, "DMIC R2" }, 1939 { "DMIC3", NULL, "DMIC L3" }, 1940 { "DMIC3", NULL, "DMIC R3" }, 1941 1942 { "BST1", NULL, "IN1P" }, 1943 { "BST1", NULL, "IN1N" }, 1944 { "BST1", NULL, "Mic Det Power" }, 1945 { "BST2", NULL, "IN2P" }, 1946 { "BST2", NULL, "IN2N" }, 1947 1948 { "INL VOL", NULL, "IN2P" }, 1949 { "INR VOL", NULL, "IN2N" }, 1950 1951 { "RECMIXL", "INL Switch", "INL VOL" }, 1952 { "RECMIXL", "BST2 Switch", "BST2" }, 1953 { "RECMIXL", "BST1 Switch", "BST1" }, 1954 1955 { "RECMIXR", "INR Switch", "INR VOL" }, 1956 { "RECMIXR", "BST2 Switch", "BST2" }, 1957 { "RECMIXR", "BST1 Switch", "BST1" }, 1958 1959 { "ADC 1", NULL, "RECMIXL" }, 1960 { "ADC 1", NULL, "ADC 1 power" }, 1961 { "ADC 1", NULL, "ADC clock" }, 1962 { "ADC 2", NULL, "RECMIXR" }, 1963 { "ADC 2", NULL, "ADC 2 power" }, 1964 { "ADC 2", NULL, "ADC clock" }, 1965 1966 { "DMIC L1", NULL, "DMIC CLK" }, 1967 { "DMIC L1", NULL, "DMIC1 Power" }, 1968 { "DMIC R1", NULL, "DMIC CLK" }, 1969 { "DMIC R1", NULL, "DMIC1 Power" }, 1970 { "DMIC L2", NULL, "DMIC CLK" }, 1971 { "DMIC L2", NULL, "DMIC2 Power" }, 1972 { "DMIC R2", NULL, "DMIC CLK" }, 1973 { "DMIC R2", NULL, "DMIC2 Power" }, 1974 { "DMIC L3", NULL, "DMIC CLK" }, 1975 { "DMIC L3", NULL, "DMIC3 Power" }, 1976 { "DMIC R3", NULL, "DMIC CLK" }, 1977 { "DMIC R3", NULL, "DMIC3 Power" }, 1978 1979 { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" }, 1980 { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" }, 1981 { "Stereo1 DMIC Mux", "DMIC3", "DMIC3" }, 1982 1983 { "Stereo2 DMIC Mux", "DMIC1", "DMIC1" }, 1984 { "Stereo2 DMIC Mux", "DMIC2", "DMIC2" }, 1985 { "Stereo2 DMIC Mux", "DMIC3", "DMIC3" }, 1986 1987 { "Mono DMIC L Mux", "DMIC1", "DMIC L1" }, 1988 { "Mono DMIC L Mux", "DMIC2", "DMIC L2" }, 1989 { "Mono DMIC L Mux", "DMIC3", "DMIC L3" }, 1990 1991 { "Mono DMIC R Mux", "DMIC1", "DMIC R1" }, 1992 { "Mono DMIC R Mux", "DMIC2", "DMIC R2" }, 1993 { "Mono DMIC R Mux", "DMIC3", "DMIC R3" }, 1994 1995 { "ADC 1_2", NULL, "ADC 1" }, 1996 { "ADC 1_2", NULL, "ADC 2" }, 1997 1998 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" }, 1999 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" }, 2000 { "Stereo1 ADC L1 Mux", "ADC", "ADC 1_2" }, 2001 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" }, 2002 2003 { "Stereo1 ADC R1 Mux", "ADC", "ADC 1_2" }, 2004 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" }, 2005 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" }, 2006 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" }, 2007 2008 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" }, 2009 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" }, 2010 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" }, 2011 { "Mono ADC L1 Mux", "ADC1", "ADC 1" }, 2012 2013 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" }, 2014 { "Mono ADC R1 Mux", "ADC2", "ADC 2" }, 2015 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" }, 2016 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" }, 2017 2018 { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" }, 2019 { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" }, 2020 { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" }, 2021 { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" }, 2022 2023 { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" }, 2024 { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" }, 2025 2026 { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" }, 2027 { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" }, 2028 { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2029 2030 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" }, 2031 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" }, 2032 { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" }, 2033 { "ADC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2034 2035 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" }, 2036 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" }, 2037 { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" }, 2038 { "ADC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2039 2040 { "Stereo2 ADC L2 Mux", "DMIC", "Stereo2 DMIC Mux" }, 2041 { "Stereo2 ADC L2 Mux", "DAC MIX", "DAC MIXL" }, 2042 { "Stereo2 ADC L1 Mux", "ADC", "ADC 1_2" }, 2043 { "Stereo2 ADC L1 Mux", "DAC MIX", "DAC MIXL" }, 2044 2045 { "Stereo2 ADC R1 Mux", "ADC", "ADC 1_2" }, 2046 { "Stereo2 ADC R1 Mux", "DAC MIX", "DAC MIXR" }, 2047 { "Stereo2 ADC R2 Mux", "DMIC", "Stereo2 DMIC Mux" }, 2048 { "Stereo2 ADC R2 Mux", "DAC MIX", "DAC MIXR" }, 2049 2050 { "Sto2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux" }, 2051 { "Sto2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux" }, 2052 { "Sto2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux" }, 2053 { "Sto2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux" }, 2054 2055 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXL" }, 2056 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXR" }, 2057 2058 { "Stereo2 ADC LR Mux", "L", "Sto2 ADC MIXL" }, 2059 { "Stereo2 ADC LR Mux", "LR", "Sto2 ADC LR MIX" }, 2060 2061 { "Stereo2 ADC MIXL", NULL, "Stereo2 ADC LR Mux" }, 2062 { "Stereo2 ADC MIXL", NULL, "ADC Stereo2 Filter" }, 2063 2064 { "Stereo2 ADC MIXR", NULL, "Sto2 ADC MIXR" }, 2065 { "Stereo2 ADC MIXR", NULL, "ADC Stereo2 Filter" }, 2066 { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2067 2068 { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" }, 2069 { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" }, 2070 { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" }, 2071 { "VAD ADC Mux", "Sto2 ADC L", "Sto2 ADC MIXL" }, 2072 2073 { "VAD_ADC", NULL, "VAD ADC Mux" }, 2074 2075 { "IF_ADC1", NULL, "Stereo1 ADC MIXL" }, 2076 { "IF_ADC1", NULL, "Stereo1 ADC MIXR" }, 2077 { "IF_ADC2", NULL, "Mono ADC MIXL" }, 2078 { "IF_ADC2", NULL, "Mono ADC MIXR" }, 2079 { "IF_ADC3", NULL, "Stereo2 ADC MIXL" }, 2080 { "IF_ADC3", NULL, "Stereo2 ADC MIXR" }, 2081 2082 { "IF1 ADC1 IN1 Mux", "IF_ADC1", "IF_ADC1" }, 2083 { "IF1 ADC1 IN1 Mux", "IF1_ADC3", "IF1_ADC3" }, 2084 2085 { "IF1 ADC1 IN2 Mux", "IF1_ADC1_IN1", "IF1 ADC1 IN1 Mux" }, 2086 { "IF1 ADC1 IN2 Mux", "IF1_ADC4", "TxDP_ADC" }, 2087 2088 { "IF1 ADC2 IN Mux", "IF_ADC2", "IF_ADC2" }, 2089 { "IF1 ADC2 IN Mux", "VAD_ADC", "VAD_ADC" }, 2090 2091 { "IF1 ADC2 IN1 Mux", "IF1_ADC2_IN", "IF1 ADC2 IN Mux" }, 2092 { "IF1 ADC2 IN1 Mux", "IF1_ADC4", "TxDP_ADC" }, 2093 2094 { "IF1_ADC1" , NULL, "IF1 ADC1 IN2 Mux" }, 2095 { "IF1_ADC2" , NULL, "IF1 ADC2 IN1 Mux" }, 2096 2097 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL" }, 2098 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR" }, 2099 { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXL" }, 2100 { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXR" }, 2101 { "Mono ADC MIX", NULL, "Mono ADC MIXL" }, 2102 { "Mono ADC MIX", NULL, "Mono ADC MIXR" }, 2103 2104 { "RxDP Mux", "IF2 DAC", "IF2 DAC" }, 2105 { "RxDP Mux", "IF1 DAC", "IF1 DAC2" }, 2106 { "RxDP Mux", "STO1 ADC Mixer", "Stereo1 ADC MIX" }, 2107 { "RxDP Mux", "STO2 ADC Mixer", "Stereo2 ADC MIX" }, 2108 { "RxDP Mux", "Mono ADC Mixer L", "Mono ADC MIXL" }, 2109 { "RxDP Mux", "Mono ADC Mixer R", "Mono ADC MIXR" }, 2110 { "RxDP Mux", "DAC1", "DAC MIX" }, 2111 2112 { "TDM Data Mux", "Slot 0-1", "Stereo1 ADC MIX" }, 2113 { "TDM Data Mux", "Slot 2-3", "Mono ADC MIX" }, 2114 { "TDM Data Mux", "Slot 4-5", "Stereo2 ADC MIX" }, 2115 { "TDM Data Mux", "Slot 6-7", "IF2 DAC" }, 2116 2117 { "DSP UL Mux", "Bypass", "TDM Data Mux" }, 2118 { "DSP UL Mux", NULL, "I2S DSP" }, 2119 { "DSP DL Mux", "Bypass", "RxDP Mux" }, 2120 { "DSP DL Mux", NULL, "I2S DSP" }, 2121 2122 { "TxDP_ADC_L", NULL, "DSP UL Mux" }, 2123 { "TxDP_ADC_R", NULL, "DSP UL Mux" }, 2124 { "TxDC_DAC", NULL, "DSP DL Mux" }, 2125 2126 { "TxDP_ADC", NULL, "TxDP_ADC_L" }, 2127 { "TxDP_ADC", NULL, "TxDP_ADC_R" }, 2128 2129 { "IF1 ADC", NULL, "I2S1" }, 2130 { "IF1 ADC", NULL, "IF1_ADC1" }, 2131 { "IF1 ADC", NULL, "IF1_ADC2" }, 2132 { "IF1 ADC", NULL, "IF_ADC3" }, 2133 { "IF1 ADC", NULL, "TxDP_ADC" }, 2134 2135 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" }, 2136 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" }, 2137 { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" }, 2138 { "IF2 ADC Mux", "TxDC_DAC", "TxDC_DAC" }, 2139 { "IF2 ADC Mux", "TxDP_ADC", "TxDP_ADC" }, 2140 { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" }, 2141 2142 { "IF2 ADC L", NULL, "IF2 ADC Mux" }, 2143 { "IF2 ADC R", NULL, "IF2 ADC Mux" }, 2144 2145 { "IF2 ADC", NULL, "I2S2" }, 2146 { "IF2 ADC", NULL, "IF2 ADC L" }, 2147 { "IF2 ADC", NULL, "IF2 ADC R" }, 2148 2149 { "AIF1TX", NULL, "IF1 ADC" }, 2150 { "AIF2TX", NULL, "IF2 ADC" }, 2151 2152 { "IF1 DAC1", NULL, "AIF1RX" }, 2153 { "IF1 DAC2", NULL, "AIF1RX" }, 2154 { "IF2 DAC", NULL, "AIF2RX" }, 2155 2156 { "IF1 DAC1", NULL, "I2S1" }, 2157 { "IF1 DAC2", NULL, "I2S1" }, 2158 { "IF2 DAC", NULL, "I2S2" }, 2159 2160 { "IF1 DAC2 L", NULL, "IF1 DAC2" }, 2161 { "IF1 DAC2 R", NULL, "IF1 DAC2" }, 2162 { "IF1 DAC1 L", NULL, "IF1 DAC1" }, 2163 { "IF1 DAC1 R", NULL, "IF1 DAC1" }, 2164 { "IF2 DAC L", NULL, "IF2 DAC" }, 2165 { "IF2 DAC R", NULL, "IF2 DAC" }, 2166 2167 { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" }, 2168 { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" }, 2169 2170 { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" }, 2171 { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" }, 2172 2173 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" }, 2174 { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" }, 2175 { "DAC1 MIXL", NULL, "DAC Stereo1 Filter" }, 2176 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" }, 2177 { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" }, 2178 { "DAC1 MIXR", NULL, "DAC Stereo1 Filter" }, 2179 2180 { "DAC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2181 { "DAC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2182 { "DAC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2183 2184 { "DAC MIX", NULL, "DAC1 MIXL" }, 2185 { "DAC MIX", NULL, "DAC1 MIXR" }, 2186 2187 { "Audio DSP", NULL, "DAC1 MIXL" }, 2188 { "Audio DSP", NULL, "DAC1 MIXR" }, 2189 2190 { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" }, 2191 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" }, 2192 { "DAC L2 Mux", "TxDC DAC", "TxDC_DAC" }, 2193 { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" }, 2194 { "DAC L2 Volume", NULL, "DAC L2 Mux" }, 2195 { "DAC L2 Volume", NULL, "DAC Mono Left Filter" }, 2196 2197 { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" }, 2198 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" }, 2199 { "DAC R2 Mux", "TxDC DAC", "TxDC_DAC" }, 2200 { "DAC R2 Mux", "TxDP ADC", "TxDP_ADC" }, 2201 { "DAC R2 Volume", NULL, "DAC R2 Mux" }, 2202 { "DAC R2 Volume", NULL, "DAC Mono Right Filter" }, 2203 2204 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" }, 2205 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" }, 2206 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, 2207 { "Stereo DAC MIXL", NULL, "DAC Stereo1 Filter" }, 2208 { "Stereo DAC MIXL", NULL, "DAC L1 Power" }, 2209 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" }, 2210 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" }, 2211 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, 2212 { "Stereo DAC MIXR", NULL, "DAC Stereo1 Filter" }, 2213 { "Stereo DAC MIXR", NULL, "DAC R1 Power" }, 2214 2215 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" }, 2216 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, 2217 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" }, 2218 { "Mono DAC MIXL", NULL, "DAC Mono Left Filter" }, 2219 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" }, 2220 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, 2221 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" }, 2222 { "Mono DAC MIXR", NULL, "DAC Mono Right Filter" }, 2223 2224 { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" }, 2225 { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, 2226 { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" }, 2227 { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" }, 2228 { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, 2229 { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" }, 2230 2231 { "DAC L1", NULL, "DAC L1 Power" }, 2232 { "DAC L1", NULL, "Stereo DAC MIXL" }, 2233 { "DAC R1", NULL, "DAC R1 Power" }, 2234 { "DAC R1", NULL, "Stereo DAC MIXR" }, 2235 { "DAC L2", NULL, "Mono DAC MIXL" }, 2236 { "DAC R2", NULL, "Mono DAC MIXR" }, 2237 2238 { "OUT MIXL", "BST1 Switch", "BST1" }, 2239 { "OUT MIXL", "INL Switch", "INL VOL" }, 2240 { "OUT MIXL", "DAC L2 Switch", "DAC L2" }, 2241 { "OUT MIXL", "DAC L1 Switch", "DAC L1" }, 2242 2243 { "OUT MIXR", "BST2 Switch", "BST2" }, 2244 { "OUT MIXR", "INR Switch", "INR VOL" }, 2245 { "OUT MIXR", "DAC R2 Switch", "DAC R2" }, 2246 { "OUT MIXR", "DAC R1 Switch", "DAC R1" }, 2247 2248 { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" }, 2249 { "HPOVOL MIXL", "INL Switch", "INL VOL" }, 2250 { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" }, 2251 { "HPOVOL MIXR", "INR Switch", "INR VOL" }, 2252 2253 { "DAC 2", NULL, "DAC L2" }, 2254 { "DAC 2", NULL, "DAC R2" }, 2255 { "DAC 1", NULL, "DAC L1" }, 2256 { "DAC 1", NULL, "DAC R1" }, 2257 { "HPOVOL", NULL, "HPOVOL MIXL" }, 2258 { "HPOVOL", NULL, "HPOVOL MIXR" }, 2259 { "HPO MIX", "DAC1 Switch", "DAC 1" }, 2260 { "HPO MIX", "HPVOL Switch", "HPOVOL" }, 2261 2262 { "LOUT MIX", "DAC L1 Switch", "DAC L1" }, 2263 { "LOUT MIX", "DAC R1 Switch", "DAC R1" }, 2264 { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" }, 2265 { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" }, 2266 2267 { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" }, 2268 { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" }, 2269 { "PDM1 L Mux", NULL, "PDM1 Power" }, 2270 { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" }, 2271 { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" }, 2272 { "PDM1 R Mux", NULL, "PDM1 Power" }, 2273 2274 { "HP Amp", NULL, "HPO MIX" }, 2275 { "HP Amp", NULL, "Mic Det Power" }, 2276 { "HPOL", NULL, "HP Amp" }, 2277 { "HPOL", NULL, "HP L Amp" }, 2278 { "HPOL", NULL, "Improve HP Amp Drv" }, 2279 { "HPOR", NULL, "HP Amp" }, 2280 { "HPOR", NULL, "HP R Amp" }, 2281 { "HPOR", NULL, "Improve HP Amp Drv" }, 2282 2283 { "LOUT Amp", NULL, "LOUT MIX" }, 2284 { "LOUT L Playback", "Switch", "LOUT Amp" }, 2285 { "LOUT R Playback", "Switch", "LOUT Amp" }, 2286 { "LOUTL", NULL, "LOUT L Playback" }, 2287 { "LOUTR", NULL, "LOUT R Playback" }, 2288 { "LOUTL", NULL, "Improve HP Amp Drv" }, 2289 { "LOUTR", NULL, "Improve HP Amp Drv" }, 2290 }; 2291 2292 static const struct snd_soc_dapm_route rt5670_specific_dapm_routes[] = { 2293 { "PDM2 L Mux", "Stereo DAC", "Stereo DAC MIXL" }, 2294 { "PDM2 L Mux", "Mono DAC", "Mono DAC MIXL" }, 2295 { "PDM2 L Mux", NULL, "PDM2 Power" }, 2296 { "PDM2 R Mux", "Stereo DAC", "Stereo DAC MIXR" }, 2297 { "PDM2 R Mux", "Mono DAC", "Mono DAC MIXR" }, 2298 { "PDM2 R Mux", NULL, "PDM2 Power" }, 2299 { "PDM1L", NULL, "PDM1 L Mux" }, 2300 { "PDM1R", NULL, "PDM1 R Mux" }, 2301 { "PDM2L", NULL, "PDM2 L Mux" }, 2302 { "PDM2R", NULL, "PDM2 R Mux" }, 2303 }; 2304 2305 static const struct snd_soc_dapm_route rt5672_specific_dapm_routes[] = { 2306 { "SPO Amp", NULL, "PDM1 L Mux" }, 2307 { "SPO Amp", NULL, "PDM1 R Mux" }, 2308 { "SPOLP", NULL, "SPO Amp" }, 2309 { "SPOLN", NULL, "SPO Amp" }, 2310 { "SPORP", NULL, "SPO Amp" }, 2311 { "SPORN", NULL, "SPO Amp" }, 2312 }; 2313 2314 static int rt5670_hw_params(struct snd_pcm_substream *substream, 2315 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 2316 { 2317 struct snd_soc_codec *codec = dai->codec; 2318 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 2319 unsigned int val_len = 0, val_clk, mask_clk; 2320 int pre_div, bclk_ms, frame_size; 2321 2322 rt5670->lrck[dai->id] = params_rate(params); 2323 pre_div = rl6231_get_clk_info(rt5670->sysclk, rt5670->lrck[dai->id]); 2324 if (pre_div < 0) { 2325 dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n", 2326 rt5670->lrck[dai->id], dai->id); 2327 return -EINVAL; 2328 } 2329 frame_size = snd_soc_params_to_frame_size(params); 2330 if (frame_size < 0) { 2331 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size); 2332 return -EINVAL; 2333 } 2334 bclk_ms = frame_size > 32; 2335 rt5670->bclk[dai->id] = rt5670->lrck[dai->id] * (32 << bclk_ms); 2336 2337 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n", 2338 rt5670->bclk[dai->id], rt5670->lrck[dai->id]); 2339 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", 2340 bclk_ms, pre_div, dai->id); 2341 2342 switch (params_width(params)) { 2343 case 16: 2344 break; 2345 case 20: 2346 val_len |= RT5670_I2S_DL_20; 2347 break; 2348 case 24: 2349 val_len |= RT5670_I2S_DL_24; 2350 break; 2351 case 8: 2352 val_len |= RT5670_I2S_DL_8; 2353 break; 2354 default: 2355 return -EINVAL; 2356 } 2357 2358 switch (dai->id) { 2359 case RT5670_AIF1: 2360 mask_clk = RT5670_I2S_BCLK_MS1_MASK | RT5670_I2S_PD1_MASK; 2361 val_clk = bclk_ms << RT5670_I2S_BCLK_MS1_SFT | 2362 pre_div << RT5670_I2S_PD1_SFT; 2363 snd_soc_update_bits(codec, RT5670_I2S1_SDP, 2364 RT5670_I2S_DL_MASK, val_len); 2365 snd_soc_update_bits(codec, RT5670_ADDA_CLK1, mask_clk, val_clk); 2366 break; 2367 case RT5670_AIF2: 2368 mask_clk = RT5670_I2S_BCLK_MS2_MASK | RT5670_I2S_PD2_MASK; 2369 val_clk = bclk_ms << RT5670_I2S_BCLK_MS2_SFT | 2370 pre_div << RT5670_I2S_PD2_SFT; 2371 snd_soc_update_bits(codec, RT5670_I2S2_SDP, 2372 RT5670_I2S_DL_MASK, val_len); 2373 snd_soc_update_bits(codec, RT5670_ADDA_CLK1, mask_clk, val_clk); 2374 break; 2375 default: 2376 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id); 2377 return -EINVAL; 2378 } 2379 2380 return 0; 2381 } 2382 2383 static int rt5670_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) 2384 { 2385 struct snd_soc_codec *codec = dai->codec; 2386 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 2387 unsigned int reg_val = 0; 2388 2389 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 2390 case SND_SOC_DAIFMT_CBM_CFM: 2391 rt5670->master[dai->id] = 1; 2392 break; 2393 case SND_SOC_DAIFMT_CBS_CFS: 2394 reg_val |= RT5670_I2S_MS_S; 2395 rt5670->master[dai->id] = 0; 2396 break; 2397 default: 2398 return -EINVAL; 2399 } 2400 2401 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 2402 case SND_SOC_DAIFMT_NB_NF: 2403 break; 2404 case SND_SOC_DAIFMT_IB_NF: 2405 reg_val |= RT5670_I2S_BP_INV; 2406 break; 2407 default: 2408 return -EINVAL; 2409 } 2410 2411 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 2412 case SND_SOC_DAIFMT_I2S: 2413 break; 2414 case SND_SOC_DAIFMT_LEFT_J: 2415 reg_val |= RT5670_I2S_DF_LEFT; 2416 break; 2417 case SND_SOC_DAIFMT_DSP_A: 2418 reg_val |= RT5670_I2S_DF_PCM_A; 2419 break; 2420 case SND_SOC_DAIFMT_DSP_B: 2421 reg_val |= RT5670_I2S_DF_PCM_B; 2422 break; 2423 default: 2424 return -EINVAL; 2425 } 2426 2427 switch (dai->id) { 2428 case RT5670_AIF1: 2429 snd_soc_update_bits(codec, RT5670_I2S1_SDP, 2430 RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK | 2431 RT5670_I2S_DF_MASK, reg_val); 2432 break; 2433 case RT5670_AIF2: 2434 snd_soc_update_bits(codec, RT5670_I2S2_SDP, 2435 RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK | 2436 RT5670_I2S_DF_MASK, reg_val); 2437 break; 2438 default: 2439 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id); 2440 return -EINVAL; 2441 } 2442 return 0; 2443 } 2444 2445 static int rt5670_set_codec_sysclk(struct snd_soc_codec *codec, int clk_id, 2446 int source, unsigned int freq, int dir) 2447 { 2448 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 2449 unsigned int reg_val = 0; 2450 2451 switch (clk_id) { 2452 case RT5670_SCLK_S_MCLK: 2453 reg_val |= RT5670_SCLK_SRC_MCLK; 2454 break; 2455 case RT5670_SCLK_S_PLL1: 2456 reg_val |= RT5670_SCLK_SRC_PLL1; 2457 break; 2458 case RT5670_SCLK_S_RCCLK: 2459 reg_val |= RT5670_SCLK_SRC_RCCLK; 2460 break; 2461 default: 2462 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id); 2463 return -EINVAL; 2464 } 2465 snd_soc_update_bits(codec, RT5670_GLB_CLK, 2466 RT5670_SCLK_SRC_MASK, reg_val); 2467 rt5670->sysclk = freq; 2468 if (clk_id != RT5670_SCLK_S_RCCLK) 2469 rt5670->sysclk_src = clk_id; 2470 2471 dev_dbg(codec->dev, "Sysclk : %dHz clock id : %d\n", freq, clk_id); 2472 2473 return 0; 2474 } 2475 2476 static int rt5670_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, 2477 unsigned int freq_in, unsigned int freq_out) 2478 { 2479 struct snd_soc_codec *codec = dai->codec; 2480 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 2481 struct rl6231_pll_code pll_code; 2482 int ret; 2483 2484 if (source == rt5670->pll_src && freq_in == rt5670->pll_in && 2485 freq_out == rt5670->pll_out) 2486 return 0; 2487 2488 if (!freq_in || !freq_out) { 2489 dev_dbg(codec->dev, "PLL disabled\n"); 2490 2491 rt5670->pll_in = 0; 2492 rt5670->pll_out = 0; 2493 snd_soc_update_bits(codec, RT5670_GLB_CLK, 2494 RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_MCLK); 2495 return 0; 2496 } 2497 2498 switch (source) { 2499 case RT5670_PLL1_S_MCLK: 2500 snd_soc_update_bits(codec, RT5670_GLB_CLK, 2501 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_MCLK); 2502 break; 2503 case RT5670_PLL1_S_BCLK1: 2504 case RT5670_PLL1_S_BCLK2: 2505 case RT5670_PLL1_S_BCLK3: 2506 case RT5670_PLL1_S_BCLK4: 2507 switch (dai->id) { 2508 case RT5670_AIF1: 2509 snd_soc_update_bits(codec, RT5670_GLB_CLK, 2510 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK1); 2511 break; 2512 case RT5670_AIF2: 2513 snd_soc_update_bits(codec, RT5670_GLB_CLK, 2514 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK2); 2515 break; 2516 default: 2517 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id); 2518 return -EINVAL; 2519 } 2520 break; 2521 default: 2522 dev_err(codec->dev, "Unknown PLL source %d\n", source); 2523 return -EINVAL; 2524 } 2525 2526 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); 2527 if (ret < 0) { 2528 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in); 2529 return ret; 2530 } 2531 2532 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n", 2533 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code), 2534 pll_code.n_code, pll_code.k_code); 2535 2536 snd_soc_write(codec, RT5670_PLL_CTRL1, 2537 pll_code.n_code << RT5670_PLL_N_SFT | pll_code.k_code); 2538 snd_soc_write(codec, RT5670_PLL_CTRL2, 2539 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5670_PLL_M_SFT | 2540 pll_code.m_bp << RT5670_PLL_M_BP_SFT); 2541 2542 rt5670->pll_in = freq_in; 2543 rt5670->pll_out = freq_out; 2544 rt5670->pll_src = source; 2545 2546 return 0; 2547 } 2548 2549 static int rt5670_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, 2550 unsigned int rx_mask, int slots, int slot_width) 2551 { 2552 struct snd_soc_codec *codec = dai->codec; 2553 unsigned int val = 0; 2554 2555 if (rx_mask || tx_mask) 2556 val |= (1 << 14); 2557 2558 switch (slots) { 2559 case 4: 2560 val |= (1 << 12); 2561 break; 2562 case 6: 2563 val |= (2 << 12); 2564 break; 2565 case 8: 2566 val |= (3 << 12); 2567 break; 2568 case 2: 2569 break; 2570 default: 2571 return -EINVAL; 2572 } 2573 2574 switch (slot_width) { 2575 case 20: 2576 val |= (1 << 10); 2577 break; 2578 case 24: 2579 val |= (2 << 10); 2580 break; 2581 case 32: 2582 val |= (3 << 10); 2583 break; 2584 case 16: 2585 break; 2586 default: 2587 return -EINVAL; 2588 } 2589 2590 snd_soc_update_bits(codec, RT5670_TDM_CTRL_1, 0x7c00, val); 2591 2592 return 0; 2593 } 2594 2595 static int rt5670_set_bias_level(struct snd_soc_codec *codec, 2596 enum snd_soc_bias_level level) 2597 { 2598 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 2599 2600 switch (level) { 2601 case SND_SOC_BIAS_PREPARE: 2602 if (SND_SOC_BIAS_STANDBY == snd_soc_codec_get_bias_level(codec)) { 2603 snd_soc_update_bits(codec, RT5670_PWR_ANLG1, 2604 RT5670_PWR_VREF1 | RT5670_PWR_MB | 2605 RT5670_PWR_BG | RT5670_PWR_VREF2, 2606 RT5670_PWR_VREF1 | RT5670_PWR_MB | 2607 RT5670_PWR_BG | RT5670_PWR_VREF2); 2608 mdelay(10); 2609 snd_soc_update_bits(codec, RT5670_PWR_ANLG1, 2610 RT5670_PWR_FV1 | RT5670_PWR_FV2, 2611 RT5670_PWR_FV1 | RT5670_PWR_FV2); 2612 snd_soc_update_bits(codec, RT5670_CHARGE_PUMP, 2613 RT5670_OSW_L_MASK | RT5670_OSW_R_MASK, 2614 RT5670_OSW_L_DIS | RT5670_OSW_R_DIS); 2615 snd_soc_update_bits(codec, RT5670_DIG_MISC, 0x1, 0x1); 2616 snd_soc_update_bits(codec, RT5670_PWR_ANLG1, 2617 RT5670_LDO_SEL_MASK, 0x5); 2618 } 2619 break; 2620 case SND_SOC_BIAS_STANDBY: 2621 snd_soc_update_bits(codec, RT5670_PWR_ANLG1, 2622 RT5670_PWR_VREF1 | RT5670_PWR_VREF2 | 2623 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0); 2624 snd_soc_update_bits(codec, RT5670_PWR_ANLG1, 2625 RT5670_LDO_SEL_MASK, 0x3); 2626 break; 2627 case SND_SOC_BIAS_OFF: 2628 if (rt5670->pdata.jd_mode) 2629 snd_soc_update_bits(codec, RT5670_PWR_ANLG1, 2630 RT5670_PWR_VREF1 | RT5670_PWR_MB | 2631 RT5670_PWR_BG | RT5670_PWR_VREF2 | 2632 RT5670_PWR_FV1 | RT5670_PWR_FV2, 2633 RT5670_PWR_MB | RT5670_PWR_BG); 2634 else 2635 snd_soc_update_bits(codec, RT5670_PWR_ANLG1, 2636 RT5670_PWR_VREF1 | RT5670_PWR_MB | 2637 RT5670_PWR_BG | RT5670_PWR_VREF2 | 2638 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0); 2639 2640 snd_soc_update_bits(codec, RT5670_DIG_MISC, 0x1, 0x0); 2641 break; 2642 2643 default: 2644 break; 2645 } 2646 2647 return 0; 2648 } 2649 2650 static int rt5670_probe(struct snd_soc_codec *codec) 2651 { 2652 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); 2653 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 2654 2655 switch (snd_soc_read(codec, RT5670_RESET) & RT5670_ID_MASK) { 2656 case RT5670_ID_5670: 2657 case RT5670_ID_5671: 2658 snd_soc_dapm_new_controls(dapm, 2659 rt5670_specific_dapm_widgets, 2660 ARRAY_SIZE(rt5670_specific_dapm_widgets)); 2661 snd_soc_dapm_add_routes(dapm, 2662 rt5670_specific_dapm_routes, 2663 ARRAY_SIZE(rt5670_specific_dapm_routes)); 2664 break; 2665 case RT5670_ID_5672: 2666 snd_soc_dapm_new_controls(dapm, 2667 rt5672_specific_dapm_widgets, 2668 ARRAY_SIZE(rt5672_specific_dapm_widgets)); 2669 snd_soc_dapm_add_routes(dapm, 2670 rt5672_specific_dapm_routes, 2671 ARRAY_SIZE(rt5672_specific_dapm_routes)); 2672 break; 2673 default: 2674 dev_err(codec->dev, 2675 "The driver is for RT5670 RT5671 or RT5672 only\n"); 2676 return -ENODEV; 2677 } 2678 rt5670->codec = codec; 2679 2680 return 0; 2681 } 2682 2683 static int rt5670_remove(struct snd_soc_codec *codec) 2684 { 2685 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 2686 2687 regmap_write(rt5670->regmap, RT5670_RESET, 0); 2688 snd_soc_jack_free_gpios(rt5670->jack, 1, &rt5670->hp_gpio); 2689 return 0; 2690 } 2691 2692 #ifdef CONFIG_PM 2693 static int rt5670_suspend(struct snd_soc_codec *codec) 2694 { 2695 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 2696 2697 regcache_cache_only(rt5670->regmap, true); 2698 regcache_mark_dirty(rt5670->regmap); 2699 return 0; 2700 } 2701 2702 static int rt5670_resume(struct snd_soc_codec *codec) 2703 { 2704 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 2705 2706 regcache_cache_only(rt5670->regmap, false); 2707 regcache_sync(rt5670->regmap); 2708 2709 return 0; 2710 } 2711 #else 2712 #define rt5670_suspend NULL 2713 #define rt5670_resume NULL 2714 #endif 2715 2716 #define RT5670_STEREO_RATES SNDRV_PCM_RATE_8000_96000 2717 #define RT5670_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ 2718 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) 2719 2720 static const struct snd_soc_dai_ops rt5670_aif_dai_ops = { 2721 .hw_params = rt5670_hw_params, 2722 .set_fmt = rt5670_set_dai_fmt, 2723 .set_tdm_slot = rt5670_set_tdm_slot, 2724 .set_pll = rt5670_set_dai_pll, 2725 }; 2726 2727 static struct snd_soc_dai_driver rt5670_dai[] = { 2728 { 2729 .name = "rt5670-aif1", 2730 .id = RT5670_AIF1, 2731 .playback = { 2732 .stream_name = "AIF1 Playback", 2733 .channels_min = 1, 2734 .channels_max = 2, 2735 .rates = RT5670_STEREO_RATES, 2736 .formats = RT5670_FORMATS, 2737 }, 2738 .capture = { 2739 .stream_name = "AIF1 Capture", 2740 .channels_min = 1, 2741 .channels_max = 2, 2742 .rates = RT5670_STEREO_RATES, 2743 .formats = RT5670_FORMATS, 2744 }, 2745 .ops = &rt5670_aif_dai_ops, 2746 }, 2747 { 2748 .name = "rt5670-aif2", 2749 .id = RT5670_AIF2, 2750 .playback = { 2751 .stream_name = "AIF2 Playback", 2752 .channels_min = 1, 2753 .channels_max = 2, 2754 .rates = RT5670_STEREO_RATES, 2755 .formats = RT5670_FORMATS, 2756 }, 2757 .capture = { 2758 .stream_name = "AIF2 Capture", 2759 .channels_min = 1, 2760 .channels_max = 2, 2761 .rates = RT5670_STEREO_RATES, 2762 .formats = RT5670_FORMATS, 2763 }, 2764 .ops = &rt5670_aif_dai_ops, 2765 }, 2766 }; 2767 2768 static struct snd_soc_codec_driver soc_codec_dev_rt5670 = { 2769 .probe = rt5670_probe, 2770 .remove = rt5670_remove, 2771 .suspend = rt5670_suspend, 2772 .resume = rt5670_resume, 2773 .set_bias_level = rt5670_set_bias_level, 2774 .idle_bias_off = true, 2775 .set_sysclk = rt5670_set_codec_sysclk, 2776 .component_driver = { 2777 .controls = rt5670_snd_controls, 2778 .num_controls = ARRAY_SIZE(rt5670_snd_controls), 2779 .dapm_widgets = rt5670_dapm_widgets, 2780 .num_dapm_widgets = ARRAY_SIZE(rt5670_dapm_widgets), 2781 .dapm_routes = rt5670_dapm_routes, 2782 .num_dapm_routes = ARRAY_SIZE(rt5670_dapm_routes), 2783 }, 2784 }; 2785 2786 static const struct regmap_config rt5670_regmap = { 2787 .reg_bits = 8, 2788 .val_bits = 16, 2789 .use_single_rw = true, 2790 .max_register = RT5670_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5670_ranges) * 2791 RT5670_PR_SPACING), 2792 .volatile_reg = rt5670_volatile_register, 2793 .readable_reg = rt5670_readable_register, 2794 .cache_type = REGCACHE_RBTREE, 2795 .reg_defaults = rt5670_reg, 2796 .num_reg_defaults = ARRAY_SIZE(rt5670_reg), 2797 .ranges = rt5670_ranges, 2798 .num_ranges = ARRAY_SIZE(rt5670_ranges), 2799 }; 2800 2801 static const struct i2c_device_id rt5670_i2c_id[] = { 2802 { "rt5670", 0 }, 2803 { "rt5671", 0 }, 2804 { "rt5672", 0 }, 2805 { } 2806 }; 2807 MODULE_DEVICE_TABLE(i2c, rt5670_i2c_id); 2808 2809 #ifdef CONFIG_ACPI 2810 static const struct acpi_device_id rt5670_acpi_match[] = { 2811 { "10EC5670", 0}, 2812 { "10EC5672", 0}, 2813 { "10EC5640", 0}, /* quirk */ 2814 { }, 2815 }; 2816 MODULE_DEVICE_TABLE(acpi, rt5670_acpi_match); 2817 #endif 2818 2819 static const struct dmi_system_id dmi_platform_intel_braswell[] = { 2820 { 2821 .ident = "Intel Braswell", 2822 .matches = { 2823 DMI_MATCH(DMI_SYS_VENDOR, "Intel Corporation"), 2824 DMI_MATCH(DMI_BOARD_NAME, "Braswell CRB"), 2825 }, 2826 }, 2827 { 2828 .ident = "Dell Wyse 3040", 2829 .matches = { 2830 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 2831 DMI_MATCH(DMI_PRODUCT_NAME, "Wyse 3040"), 2832 }, 2833 }, 2834 { 2835 .ident = "Lenovo Thinkpad Tablet 10", 2836 .matches = { 2837 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 2838 DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad 10"), 2839 }, 2840 }, 2841 { 2842 .ident = "Lenovo Thinkpad Tablet 10", 2843 .matches = { 2844 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 2845 DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad Tablet B"), 2846 }, 2847 }, 2848 {} 2849 }; 2850 2851 static const struct dmi_system_id dmi_platform_intel_bytcht_jdmode2[] = { 2852 { 2853 .ident = "Lenovo Thinkpad Tablet 10", 2854 .matches = { 2855 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 2856 DMI_MATCH(DMI_PRODUCT_VERSION, "Lenovo Miix 2 10"), 2857 }, 2858 }, 2859 {} 2860 }; 2861 2862 static int rt5670_i2c_probe(struct i2c_client *i2c, 2863 const struct i2c_device_id *id) 2864 { 2865 struct rt5670_platform_data *pdata = dev_get_platdata(&i2c->dev); 2866 struct rt5670_priv *rt5670; 2867 int ret; 2868 unsigned int val; 2869 2870 rt5670 = devm_kzalloc(&i2c->dev, 2871 sizeof(struct rt5670_priv), 2872 GFP_KERNEL); 2873 if (NULL == rt5670) 2874 return -ENOMEM; 2875 2876 i2c_set_clientdata(i2c, rt5670); 2877 2878 if (pdata) 2879 rt5670->pdata = *pdata; 2880 2881 if (dmi_check_system(dmi_platform_intel_braswell)) { 2882 rt5670->pdata.dmic_en = true; 2883 rt5670->pdata.dmic1_data_pin = RT5670_DMIC_DATA_IN2P; 2884 rt5670->pdata.dev_gpio = true; 2885 rt5670->pdata.jd_mode = 1; 2886 } else if (dmi_check_system(dmi_platform_intel_bytcht_jdmode2)) { 2887 rt5670->pdata.dmic_en = true; 2888 rt5670->pdata.dmic1_data_pin = RT5670_DMIC_DATA_IN2P; 2889 rt5670->pdata.dev_gpio = true; 2890 rt5670->pdata.jd_mode = 2; 2891 } 2892 2893 rt5670->regmap = devm_regmap_init_i2c(i2c, &rt5670_regmap); 2894 if (IS_ERR(rt5670->regmap)) { 2895 ret = PTR_ERR(rt5670->regmap); 2896 dev_err(&i2c->dev, "Failed to allocate register map: %d\n", 2897 ret); 2898 return ret; 2899 } 2900 2901 regmap_read(rt5670->regmap, RT5670_VENDOR_ID2, &val); 2902 if (val != RT5670_DEVICE_ID) { 2903 dev_err(&i2c->dev, 2904 "Device with ID register %#x is not rt5670/72\n", val); 2905 return -ENODEV; 2906 } 2907 2908 regmap_write(rt5670->regmap, RT5670_RESET, 0); 2909 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1, 2910 RT5670_PWR_HP_L | RT5670_PWR_HP_R | 2911 RT5670_PWR_VREF2, RT5670_PWR_VREF2); 2912 msleep(100); 2913 2914 regmap_write(rt5670->regmap, RT5670_RESET, 0); 2915 2916 regmap_read(rt5670->regmap, RT5670_VENDOR_ID, &val); 2917 if (val >= 4) 2918 regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0980); 2919 else 2920 regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0d00); 2921 2922 ret = regmap_register_patch(rt5670->regmap, init_list, 2923 ARRAY_SIZE(init_list)); 2924 if (ret != 0) 2925 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret); 2926 2927 regmap_update_bits(rt5670->regmap, RT5670_DIG_MISC, 2928 RT5670_MCLK_DET, RT5670_MCLK_DET); 2929 2930 if (rt5670->pdata.in2_diff) 2931 regmap_update_bits(rt5670->regmap, RT5670_IN2, 2932 RT5670_IN_DF2, RT5670_IN_DF2); 2933 2934 if (rt5670->pdata.dev_gpio) { 2935 /* for push button */ 2936 regmap_write(rt5670->regmap, RT5670_IL_CMD, 0x0000); 2937 regmap_write(rt5670->regmap, RT5670_IL_CMD2, 0x0010); 2938 regmap_write(rt5670->regmap, RT5670_IL_CMD3, 0x0014); 2939 /* for irq */ 2940 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 2941 RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ); 2942 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2, 2943 RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT); 2944 } 2945 2946 if (rt5670->pdata.jd_mode) { 2947 regmap_update_bits(rt5670->regmap, RT5670_GLB_CLK, 2948 RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_RCCLK); 2949 rt5670->sysclk = 0; 2950 rt5670->sysclk_src = RT5670_SCLK_S_RCCLK; 2951 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1, 2952 RT5670_PWR_MB, RT5670_PWR_MB); 2953 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG2, 2954 RT5670_PWR_JD1, RT5670_PWR_JD1); 2955 regmap_update_bits(rt5670->regmap, RT5670_IRQ_CTRL1, 2956 RT5670_JD1_1_EN_MASK, RT5670_JD1_1_EN); 2957 regmap_update_bits(rt5670->regmap, RT5670_JD_CTRL3, 2958 RT5670_JD_TRI_CBJ_SEL_MASK | 2959 RT5670_JD_TRI_HPO_SEL_MASK, 2960 RT5670_JD_CBJ_JD1_1 | RT5670_JD_HPO_JD1_1); 2961 switch (rt5670->pdata.jd_mode) { 2962 case 1: 2963 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1, 2964 RT5670_JD1_MODE_MASK, 2965 RT5670_JD1_MODE_0); 2966 break; 2967 case 2: 2968 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1, 2969 RT5670_JD1_MODE_MASK, 2970 RT5670_JD1_MODE_1); 2971 break; 2972 case 3: 2973 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1, 2974 RT5670_JD1_MODE_MASK, 2975 RT5670_JD1_MODE_2); 2976 break; 2977 default: 2978 break; 2979 } 2980 } 2981 2982 if (rt5670->pdata.dmic_en) { 2983 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 2984 RT5670_GP2_PIN_MASK, 2985 RT5670_GP2_PIN_DMIC1_SCL); 2986 2987 switch (rt5670->pdata.dmic1_data_pin) { 2988 case RT5670_DMIC_DATA_IN2P: 2989 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 2990 RT5670_DMIC_1_DP_MASK, 2991 RT5670_DMIC_1_DP_IN2P); 2992 break; 2993 2994 case RT5670_DMIC_DATA_GPIO6: 2995 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 2996 RT5670_DMIC_1_DP_MASK, 2997 RT5670_DMIC_1_DP_GPIO6); 2998 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 2999 RT5670_GP6_PIN_MASK, 3000 RT5670_GP6_PIN_DMIC1_SDA); 3001 break; 3002 3003 case RT5670_DMIC_DATA_GPIO7: 3004 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 3005 RT5670_DMIC_1_DP_MASK, 3006 RT5670_DMIC_1_DP_GPIO7); 3007 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 3008 RT5670_GP7_PIN_MASK, 3009 RT5670_GP7_PIN_DMIC1_SDA); 3010 break; 3011 3012 default: 3013 break; 3014 } 3015 3016 switch (rt5670->pdata.dmic2_data_pin) { 3017 case RT5670_DMIC_DATA_IN3N: 3018 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 3019 RT5670_DMIC_2_DP_MASK, 3020 RT5670_DMIC_2_DP_IN3N); 3021 break; 3022 3023 case RT5670_DMIC_DATA_GPIO8: 3024 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 3025 RT5670_DMIC_2_DP_MASK, 3026 RT5670_DMIC_2_DP_GPIO8); 3027 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 3028 RT5670_GP8_PIN_MASK, 3029 RT5670_GP8_PIN_DMIC2_SDA); 3030 break; 3031 3032 default: 3033 break; 3034 } 3035 3036 switch (rt5670->pdata.dmic3_data_pin) { 3037 case RT5670_DMIC_DATA_GPIO5: 3038 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL2, 3039 RT5670_DMIC_3_DP_MASK, 3040 RT5670_DMIC_3_DP_GPIO5); 3041 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 3042 RT5670_GP5_PIN_MASK, 3043 RT5670_GP5_PIN_DMIC3_SDA); 3044 break; 3045 3046 case RT5670_DMIC_DATA_GPIO9: 3047 case RT5670_DMIC_DATA_GPIO10: 3048 dev_err(&i2c->dev, 3049 "Always use GPIO5 as DMIC3 data pin\n"); 3050 break; 3051 3052 default: 3053 break; 3054 } 3055 3056 } 3057 3058 pm_runtime_enable(&i2c->dev); 3059 pm_request_idle(&i2c->dev); 3060 3061 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5670, 3062 rt5670_dai, ARRAY_SIZE(rt5670_dai)); 3063 if (ret < 0) 3064 goto err; 3065 3066 pm_runtime_put(&i2c->dev); 3067 3068 return 0; 3069 err: 3070 pm_runtime_disable(&i2c->dev); 3071 3072 return ret; 3073 } 3074 3075 static int rt5670_i2c_remove(struct i2c_client *i2c) 3076 { 3077 pm_runtime_disable(&i2c->dev); 3078 snd_soc_unregister_codec(&i2c->dev); 3079 3080 return 0; 3081 } 3082 3083 static struct i2c_driver rt5670_i2c_driver = { 3084 .driver = { 3085 .name = "rt5670", 3086 .acpi_match_table = ACPI_PTR(rt5670_acpi_match), 3087 }, 3088 .probe = rt5670_i2c_probe, 3089 .remove = rt5670_i2c_remove, 3090 .id_table = rt5670_i2c_id, 3091 }; 3092 3093 module_i2c_driver(rt5670_i2c_driver); 3094 3095 MODULE_DESCRIPTION("ASoC RT5670 driver"); 3096 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>"); 3097 MODULE_LICENSE("GPL v2"); 3098