1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 240bc18a2SBard Liao /* 340bc18a2SBard Liao * rt5651.c -- RT5651 ALSA SoC audio codec driver 440bc18a2SBard Liao * 540bc18a2SBard Liao * Copyright 2014 Realtek Semiconductor Corp. 640bc18a2SBard Liao * Author: Bard Liao <bardliao@realtek.com> 740bc18a2SBard Liao */ 840bc18a2SBard Liao 940bc18a2SBard Liao #include <linux/module.h> 1040bc18a2SBard Liao #include <linux/init.h> 1140bc18a2SBard Liao #include <linux/delay.h> 1240bc18a2SBard Liao #include <linux/pm.h> 13c2ec9d95SHans de Goede #include <linux/gpio/consumer.h> 1440bc18a2SBard Liao #include <linux/i2c.h> 1540bc18a2SBard Liao #include <linux/regmap.h> 1640bc18a2SBard Liao #include <linux/platform_device.h> 1740bc18a2SBard Liao #include <linux/spi/spi.h> 183ae08dc0SBard Liao #include <linux/acpi.h> 1940bc18a2SBard Liao #include <sound/core.h> 2040bc18a2SBard Liao #include <sound/pcm.h> 2140bc18a2SBard Liao #include <sound/pcm_params.h> 2240bc18a2SBard Liao #include <sound/soc.h> 2340bc18a2SBard Liao #include <sound/soc-dapm.h> 2440bc18a2SBard Liao #include <sound/initval.h> 2540bc18a2SBard Liao #include <sound/tlv.h> 2680bbe4a3SCarlo Caione #include <sound/jack.h> 2740bc18a2SBard Liao 2849ef7925SOder Chiou #include "rl6231.h" 2940bc18a2SBard Liao #include "rt5651.h" 3040bc18a2SBard Liao 3140bc18a2SBard Liao #define RT5651_DEVICE_ID_VALUE 0x6281 3240bc18a2SBard Liao 3340bc18a2SBard Liao #define RT5651_PR_RANGE_BASE (0xff + 1) 3440bc18a2SBard Liao #define RT5651_PR_SPACING 0x100 3540bc18a2SBard Liao 3640bc18a2SBard Liao #define RT5651_PR_BASE (RT5651_PR_RANGE_BASE + (0 * RT5651_PR_SPACING)) 3740bc18a2SBard Liao 3840bc18a2SBard Liao static const struct regmap_range_cfg rt5651_ranges[] = { 3940bc18a2SBard Liao { .name = "PR", .range_min = RT5651_PR_BASE, 4040bc18a2SBard Liao .range_max = RT5651_PR_BASE + 0xb4, 4140bc18a2SBard Liao .selector_reg = RT5651_PRIV_INDEX, 4240bc18a2SBard Liao .selector_mask = 0xff, 4340bc18a2SBard Liao .selector_shift = 0x0, 4440bc18a2SBard Liao .window_start = RT5651_PRIV_DATA, 4540bc18a2SBard Liao .window_len = 0x1, }, 4640bc18a2SBard Liao }; 4740bc18a2SBard Liao 4841a5fefeSMark Brown static const struct reg_sequence init_list[] = { 4940bc18a2SBard Liao {RT5651_PR_BASE + 0x3d, 0x3e00}, 5040bc18a2SBard Liao }; 5140bc18a2SBard Liao 5240bc18a2SBard Liao static const struct reg_default rt5651_reg[] = { 5340bc18a2SBard Liao { 0x00, 0x0000 }, 5440bc18a2SBard Liao { 0x02, 0xc8c8 }, 5540bc18a2SBard Liao { 0x03, 0xc8c8 }, 5640bc18a2SBard Liao { 0x05, 0x0000 }, 5740bc18a2SBard Liao { 0x0d, 0x0000 }, 5840bc18a2SBard Liao { 0x0e, 0x0000 }, 5940bc18a2SBard Liao { 0x0f, 0x0808 }, 6040bc18a2SBard Liao { 0x10, 0x0808 }, 6140bc18a2SBard Liao { 0x19, 0xafaf }, 6240bc18a2SBard Liao { 0x1a, 0xafaf }, 6340bc18a2SBard Liao { 0x1b, 0x0c00 }, 6440bc18a2SBard Liao { 0x1c, 0x2f2f }, 6540bc18a2SBard Liao { 0x1d, 0x2f2f }, 6640bc18a2SBard Liao { 0x1e, 0x0000 }, 6740bc18a2SBard Liao { 0x27, 0x7860 }, 6840bc18a2SBard Liao { 0x28, 0x7070 }, 6940bc18a2SBard Liao { 0x29, 0x8080 }, 7040bc18a2SBard Liao { 0x2a, 0x5252 }, 7140bc18a2SBard Liao { 0x2b, 0x5454 }, 7240bc18a2SBard Liao { 0x2f, 0x0000 }, 7340bc18a2SBard Liao { 0x30, 0x5000 }, 7440bc18a2SBard Liao { 0x3b, 0x0000 }, 7540bc18a2SBard Liao { 0x3c, 0x006f }, 7640bc18a2SBard Liao { 0x3d, 0x0000 }, 7740bc18a2SBard Liao { 0x3e, 0x006f }, 7840bc18a2SBard Liao { 0x45, 0x6000 }, 7940bc18a2SBard Liao { 0x4d, 0x0000 }, 8040bc18a2SBard Liao { 0x4e, 0x0000 }, 8140bc18a2SBard Liao { 0x4f, 0x0279 }, 8240bc18a2SBard Liao { 0x50, 0x0000 }, 8340bc18a2SBard Liao { 0x51, 0x0000 }, 8440bc18a2SBard Liao { 0x52, 0x0279 }, 8540bc18a2SBard Liao { 0x53, 0xf000 }, 8640bc18a2SBard Liao { 0x61, 0x0000 }, 8740bc18a2SBard Liao { 0x62, 0x0000 }, 8840bc18a2SBard Liao { 0x63, 0x00c0 }, 8940bc18a2SBard Liao { 0x64, 0x0000 }, 9040bc18a2SBard Liao { 0x65, 0x0000 }, 9140bc18a2SBard Liao { 0x66, 0x0000 }, 9240bc18a2SBard Liao { 0x70, 0x8000 }, 9340bc18a2SBard Liao { 0x71, 0x8000 }, 9440bc18a2SBard Liao { 0x73, 0x1104 }, 9540bc18a2SBard Liao { 0x74, 0x0c00 }, 9640bc18a2SBard Liao { 0x75, 0x1400 }, 9740bc18a2SBard Liao { 0x77, 0x0c00 }, 9840bc18a2SBard Liao { 0x78, 0x4000 }, 9940bc18a2SBard Liao { 0x79, 0x0123 }, 10040bc18a2SBard Liao { 0x80, 0x0000 }, 10140bc18a2SBard Liao { 0x81, 0x0000 }, 10240bc18a2SBard Liao { 0x82, 0x0000 }, 10340bc18a2SBard Liao { 0x83, 0x0800 }, 10440bc18a2SBard Liao { 0x84, 0x0000 }, 10540bc18a2SBard Liao { 0x85, 0x0008 }, 10640bc18a2SBard Liao { 0x89, 0x0000 }, 10740bc18a2SBard Liao { 0x8e, 0x0004 }, 10840bc18a2SBard Liao { 0x8f, 0x1100 }, 10940bc18a2SBard Liao { 0x90, 0x0000 }, 11040bc18a2SBard Liao { 0x93, 0x2000 }, 11140bc18a2SBard Liao { 0x94, 0x0200 }, 11240bc18a2SBard Liao { 0xb0, 0x2080 }, 11340bc18a2SBard Liao { 0xb1, 0x0000 }, 11440bc18a2SBard Liao { 0xb4, 0x2206 }, 11540bc18a2SBard Liao { 0xb5, 0x1f00 }, 11640bc18a2SBard Liao { 0xb6, 0x0000 }, 11740bc18a2SBard Liao { 0xbb, 0x0000 }, 11840bc18a2SBard Liao { 0xbc, 0x0000 }, 11940bc18a2SBard Liao { 0xbd, 0x0000 }, 12040bc18a2SBard Liao { 0xbe, 0x0000 }, 12140bc18a2SBard Liao { 0xbf, 0x0000 }, 12240bc18a2SBard Liao { 0xc0, 0x0400 }, 12340bc18a2SBard Liao { 0xc1, 0x0000 }, 12440bc18a2SBard Liao { 0xc2, 0x0000 }, 12540bc18a2SBard Liao { 0xcf, 0x0013 }, 12640bc18a2SBard Liao { 0xd0, 0x0680 }, 12740bc18a2SBard Liao { 0xd1, 0x1c17 }, 12840bc18a2SBard Liao { 0xd3, 0xb320 }, 12940bc18a2SBard Liao { 0xd9, 0x0809 }, 13040bc18a2SBard Liao { 0xfa, 0x0010 }, 13140bc18a2SBard Liao { 0xfe, 0x10ec }, 13240bc18a2SBard Liao { 0xff, 0x6281 }, 13340bc18a2SBard Liao }; 13440bc18a2SBard Liao 13540bc18a2SBard Liao static bool rt5651_volatile_register(struct device *dev, unsigned int reg) 13640bc18a2SBard Liao { 13740bc18a2SBard Liao int i; 13840bc18a2SBard Liao 13940bc18a2SBard Liao for (i = 0; i < ARRAY_SIZE(rt5651_ranges); i++) { 14040bc18a2SBard Liao if ((reg >= rt5651_ranges[i].window_start && 14140bc18a2SBard Liao reg <= rt5651_ranges[i].window_start + 14240bc18a2SBard Liao rt5651_ranges[i].window_len) || 14340bc18a2SBard Liao (reg >= rt5651_ranges[i].range_min && 14440bc18a2SBard Liao reg <= rt5651_ranges[i].range_max)) { 14540bc18a2SBard Liao return true; 14640bc18a2SBard Liao } 14740bc18a2SBard Liao } 14840bc18a2SBard Liao 14940bc18a2SBard Liao switch (reg) { 15040bc18a2SBard Liao case RT5651_RESET: 15140bc18a2SBard Liao case RT5651_PRIV_DATA: 15240bc18a2SBard Liao case RT5651_EQ_CTRL1: 15340bc18a2SBard Liao case RT5651_ALC_1: 15440bc18a2SBard Liao case RT5651_IRQ_CTRL2: 15540bc18a2SBard Liao case RT5651_INT_IRQ_ST: 15640bc18a2SBard Liao case RT5651_PGM_REG_ARR1: 15740bc18a2SBard Liao case RT5651_PGM_REG_ARR3: 15840bc18a2SBard Liao case RT5651_VENDOR_ID: 15940bc18a2SBard Liao case RT5651_DEVICE_ID: 16040bc18a2SBard Liao return true; 16140bc18a2SBard Liao default: 16240bc18a2SBard Liao return false; 16340bc18a2SBard Liao } 16440bc18a2SBard Liao } 16540bc18a2SBard Liao 16640bc18a2SBard Liao static bool rt5651_readable_register(struct device *dev, unsigned int reg) 16740bc18a2SBard Liao { 16840bc18a2SBard Liao int i; 16940bc18a2SBard Liao 17040bc18a2SBard Liao for (i = 0; i < ARRAY_SIZE(rt5651_ranges); i++) { 17140bc18a2SBard Liao if ((reg >= rt5651_ranges[i].window_start && 17240bc18a2SBard Liao reg <= rt5651_ranges[i].window_start + 17340bc18a2SBard Liao rt5651_ranges[i].window_len) || 17440bc18a2SBard Liao (reg >= rt5651_ranges[i].range_min && 17540bc18a2SBard Liao reg <= rt5651_ranges[i].range_max)) { 17640bc18a2SBard Liao return true; 17740bc18a2SBard Liao } 17840bc18a2SBard Liao } 17940bc18a2SBard Liao 18040bc18a2SBard Liao switch (reg) { 18140bc18a2SBard Liao case RT5651_RESET: 18240bc18a2SBard Liao case RT5651_VERSION_ID: 18340bc18a2SBard Liao case RT5651_VENDOR_ID: 18440bc18a2SBard Liao case RT5651_DEVICE_ID: 18540bc18a2SBard Liao case RT5651_HP_VOL: 18640bc18a2SBard Liao case RT5651_LOUT_CTRL1: 18740bc18a2SBard Liao case RT5651_LOUT_CTRL2: 18840bc18a2SBard Liao case RT5651_IN1_IN2: 18940bc18a2SBard Liao case RT5651_IN3: 19040bc18a2SBard Liao case RT5651_INL1_INR1_VOL: 19140bc18a2SBard Liao case RT5651_INL2_INR2_VOL: 19240bc18a2SBard Liao case RT5651_DAC1_DIG_VOL: 19340bc18a2SBard Liao case RT5651_DAC2_DIG_VOL: 19440bc18a2SBard Liao case RT5651_DAC2_CTRL: 19540bc18a2SBard Liao case RT5651_ADC_DIG_VOL: 19640bc18a2SBard Liao case RT5651_ADC_DATA: 19740bc18a2SBard Liao case RT5651_ADC_BST_VOL: 19840bc18a2SBard Liao case RT5651_STO1_ADC_MIXER: 19940bc18a2SBard Liao case RT5651_STO2_ADC_MIXER: 20040bc18a2SBard Liao case RT5651_AD_DA_MIXER: 20140bc18a2SBard Liao case RT5651_STO_DAC_MIXER: 20240bc18a2SBard Liao case RT5651_DD_MIXER: 20340bc18a2SBard Liao case RT5651_DIG_INF_DATA: 20440bc18a2SBard Liao case RT5651_PDM_CTL: 20540bc18a2SBard Liao case RT5651_REC_L1_MIXER: 20640bc18a2SBard Liao case RT5651_REC_L2_MIXER: 20740bc18a2SBard Liao case RT5651_REC_R1_MIXER: 20840bc18a2SBard Liao case RT5651_REC_R2_MIXER: 20940bc18a2SBard Liao case RT5651_HPO_MIXER: 21040bc18a2SBard Liao case RT5651_OUT_L1_MIXER: 21140bc18a2SBard Liao case RT5651_OUT_L2_MIXER: 21240bc18a2SBard Liao case RT5651_OUT_L3_MIXER: 21340bc18a2SBard Liao case RT5651_OUT_R1_MIXER: 21440bc18a2SBard Liao case RT5651_OUT_R2_MIXER: 21540bc18a2SBard Liao case RT5651_OUT_R3_MIXER: 21640bc18a2SBard Liao case RT5651_LOUT_MIXER: 21740bc18a2SBard Liao case RT5651_PWR_DIG1: 21840bc18a2SBard Liao case RT5651_PWR_DIG2: 21940bc18a2SBard Liao case RT5651_PWR_ANLG1: 22040bc18a2SBard Liao case RT5651_PWR_ANLG2: 22140bc18a2SBard Liao case RT5651_PWR_MIXER: 22240bc18a2SBard Liao case RT5651_PWR_VOL: 22340bc18a2SBard Liao case RT5651_PRIV_INDEX: 22440bc18a2SBard Liao case RT5651_PRIV_DATA: 22540bc18a2SBard Liao case RT5651_I2S1_SDP: 22640bc18a2SBard Liao case RT5651_I2S2_SDP: 22740bc18a2SBard Liao case RT5651_ADDA_CLK1: 22840bc18a2SBard Liao case RT5651_ADDA_CLK2: 22940bc18a2SBard Liao case RT5651_DMIC: 23040bc18a2SBard Liao case RT5651_TDM_CTL_1: 23140bc18a2SBard Liao case RT5651_TDM_CTL_2: 23240bc18a2SBard Liao case RT5651_TDM_CTL_3: 23340bc18a2SBard Liao case RT5651_GLB_CLK: 23440bc18a2SBard Liao case RT5651_PLL_CTRL1: 23540bc18a2SBard Liao case RT5651_PLL_CTRL2: 23640bc18a2SBard Liao case RT5651_PLL_MODE_1: 23740bc18a2SBard Liao case RT5651_PLL_MODE_2: 23840bc18a2SBard Liao case RT5651_PLL_MODE_3: 23940bc18a2SBard Liao case RT5651_PLL_MODE_4: 24040bc18a2SBard Liao case RT5651_PLL_MODE_5: 24140bc18a2SBard Liao case RT5651_PLL_MODE_6: 24240bc18a2SBard Liao case RT5651_PLL_MODE_7: 24340bc18a2SBard Liao case RT5651_DEPOP_M1: 24440bc18a2SBard Liao case RT5651_DEPOP_M2: 24540bc18a2SBard Liao case RT5651_DEPOP_M3: 24640bc18a2SBard Liao case RT5651_CHARGE_PUMP: 24740bc18a2SBard Liao case RT5651_MICBIAS: 24840bc18a2SBard Liao case RT5651_A_JD_CTL1: 24940bc18a2SBard Liao case RT5651_EQ_CTRL1: 25040bc18a2SBard Liao case RT5651_EQ_CTRL2: 25140bc18a2SBard Liao case RT5651_ALC_1: 25240bc18a2SBard Liao case RT5651_ALC_2: 25340bc18a2SBard Liao case RT5651_ALC_3: 25440bc18a2SBard Liao case RT5651_JD_CTRL1: 25540bc18a2SBard Liao case RT5651_JD_CTRL2: 25640bc18a2SBard Liao case RT5651_IRQ_CTRL1: 25740bc18a2SBard Liao case RT5651_IRQ_CTRL2: 25840bc18a2SBard Liao case RT5651_INT_IRQ_ST: 25940bc18a2SBard Liao case RT5651_GPIO_CTRL1: 26040bc18a2SBard Liao case RT5651_GPIO_CTRL2: 26140bc18a2SBard Liao case RT5651_GPIO_CTRL3: 26240bc18a2SBard Liao case RT5651_PGM_REG_ARR1: 26340bc18a2SBard Liao case RT5651_PGM_REG_ARR2: 26440bc18a2SBard Liao case RT5651_PGM_REG_ARR3: 26540bc18a2SBard Liao case RT5651_PGM_REG_ARR4: 26640bc18a2SBard Liao case RT5651_PGM_REG_ARR5: 26740bc18a2SBard Liao case RT5651_SCB_FUNC: 26840bc18a2SBard Liao case RT5651_SCB_CTRL: 26940bc18a2SBard Liao case RT5651_BASE_BACK: 27040bc18a2SBard Liao case RT5651_MP3_PLUS1: 27140bc18a2SBard Liao case RT5651_MP3_PLUS2: 27240bc18a2SBard Liao case RT5651_ADJ_HPF_CTRL1: 27340bc18a2SBard Liao case RT5651_ADJ_HPF_CTRL2: 27440bc18a2SBard Liao case RT5651_HP_CALIB_AMP_DET: 27540bc18a2SBard Liao case RT5651_HP_CALIB2: 27640bc18a2SBard Liao case RT5651_SV_ZCD1: 27740bc18a2SBard Liao case RT5651_SV_ZCD2: 27840bc18a2SBard Liao case RT5651_D_MISC: 27940bc18a2SBard Liao case RT5651_DUMMY2: 28040bc18a2SBard Liao case RT5651_DUMMY3: 28140bc18a2SBard Liao return true; 28240bc18a2SBard Liao default: 28340bc18a2SBard Liao return false; 28440bc18a2SBard Liao } 28540bc18a2SBard Liao } 28640bc18a2SBard Liao 28740bc18a2SBard Liao static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0); 288eee51df7SHans de Goede static const DECLARE_TLV_DB_MINMAX(dac_vol_tlv, -6562, 0); 28940bc18a2SBard Liao static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0); 290eee51df7SHans de Goede static const DECLARE_TLV_DB_MINMAX(adc_vol_tlv, -1762, 3000); 29140bc18a2SBard Liao static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0); 29240bc18a2SBard Liao 29340bc18a2SBard Liao /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */ 2948e3648e1SLars-Peter Clausen static const DECLARE_TLV_DB_RANGE(bst_tlv, 29540bc18a2SBard Liao 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), 29640bc18a2SBard Liao 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0), 29740bc18a2SBard Liao 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0), 29840bc18a2SBard Liao 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0), 29940bc18a2SBard Liao 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0), 30040bc18a2SBard Liao 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0), 3018e3648e1SLars-Peter Clausen 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0) 3028e3648e1SLars-Peter Clausen ); 30340bc18a2SBard Liao 30440bc18a2SBard Liao /* Interface data select */ 30540bc18a2SBard Liao static const char * const rt5651_data_select[] = { 30640bc18a2SBard Liao "Normal", "Swap", "left copy to right", "right copy to left"}; 30740bc18a2SBard Liao 30840bc18a2SBard Liao static SOC_ENUM_SINGLE_DECL(rt5651_if2_dac_enum, RT5651_DIG_INF_DATA, 30940bc18a2SBard Liao RT5651_IF2_DAC_SEL_SFT, rt5651_data_select); 31040bc18a2SBard Liao 31140bc18a2SBard Liao static SOC_ENUM_SINGLE_DECL(rt5651_if2_adc_enum, RT5651_DIG_INF_DATA, 31240bc18a2SBard Liao RT5651_IF2_ADC_SEL_SFT, rt5651_data_select); 31340bc18a2SBard Liao 31440bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_snd_controls[] = { 31540bc18a2SBard Liao /* Headphone Output Volume */ 31640bc18a2SBard Liao SOC_DOUBLE_TLV("HP Playback Volume", RT5651_HP_VOL, 31740bc18a2SBard Liao RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 39, 1, out_vol_tlv), 31840bc18a2SBard Liao /* OUTPUT Control */ 31940bc18a2SBard Liao SOC_DOUBLE_TLV("OUT Playback Volume", RT5651_LOUT_CTRL1, 32040bc18a2SBard Liao RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 39, 1, out_vol_tlv), 32140bc18a2SBard Liao 32240bc18a2SBard Liao /* DAC Digital Volume */ 32340bc18a2SBard Liao SOC_DOUBLE("DAC2 Playback Switch", RT5651_DAC2_CTRL, 32440bc18a2SBard Liao RT5651_M_DAC_L2_VOL_SFT, RT5651_M_DAC_R2_VOL_SFT, 1, 1), 32540bc18a2SBard Liao SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5651_DAC1_DIG_VOL, 32640bc18a2SBard Liao RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 32740bc18a2SBard Liao 175, 0, dac_vol_tlv), 32840bc18a2SBard Liao SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5651_DAC2_DIG_VOL, 32940bc18a2SBard Liao RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 33040bc18a2SBard Liao 175, 0, dac_vol_tlv), 331eea16625SHans de Goede /* IN1/IN2/IN3 Control */ 33240bc18a2SBard Liao SOC_SINGLE_TLV("IN1 Boost", RT5651_IN1_IN2, 33340bc18a2SBard Liao RT5651_BST_SFT1, 8, 0, bst_tlv), 33440bc18a2SBard Liao SOC_SINGLE_TLV("IN2 Boost", RT5651_IN1_IN2, 33540bc18a2SBard Liao RT5651_BST_SFT2, 8, 0, bst_tlv), 336eea16625SHans de Goede SOC_SINGLE_TLV("IN3 Boost", RT5651_IN3, 337eea16625SHans de Goede RT5651_BST_SFT1, 8, 0, bst_tlv), 33840bc18a2SBard Liao /* INL/INR Volume Control */ 33940bc18a2SBard Liao SOC_DOUBLE_TLV("IN Capture Volume", RT5651_INL1_INR1_VOL, 34040bc18a2SBard Liao RT5651_INL_VOL_SFT, RT5651_INR_VOL_SFT, 34140bc18a2SBard Liao 31, 1, in_vol_tlv), 34240bc18a2SBard Liao /* ADC Digital Volume Control */ 34340bc18a2SBard Liao SOC_DOUBLE("ADC Capture Switch", RT5651_ADC_DIG_VOL, 34440bc18a2SBard Liao RT5651_L_MUTE_SFT, RT5651_R_MUTE_SFT, 1, 1), 34540bc18a2SBard Liao SOC_DOUBLE_TLV("ADC Capture Volume", RT5651_ADC_DIG_VOL, 34640bc18a2SBard Liao RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 34740bc18a2SBard Liao 127, 0, adc_vol_tlv), 34840bc18a2SBard Liao SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5651_ADC_DATA, 34940bc18a2SBard Liao RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 35040bc18a2SBard Liao 127, 0, adc_vol_tlv), 35140bc18a2SBard Liao /* ADC Boost Volume Control */ 35240bc18a2SBard Liao SOC_DOUBLE_TLV("ADC Boost Gain", RT5651_ADC_BST_VOL, 35340bc18a2SBard Liao RT5651_ADC_L_BST_SFT, RT5651_ADC_R_BST_SFT, 35440bc18a2SBard Liao 3, 0, adc_bst_tlv), 35540bc18a2SBard Liao 35640bc18a2SBard Liao /* ASRC */ 35740bc18a2SBard Liao SOC_SINGLE("IF1 ASRC Switch", RT5651_PLL_MODE_1, 35840bc18a2SBard Liao RT5651_STO1_T_SFT, 1, 0), 35940bc18a2SBard Liao SOC_SINGLE("IF2 ASRC Switch", RT5651_PLL_MODE_1, 36040bc18a2SBard Liao RT5651_STO2_T_SFT, 1, 0), 36140bc18a2SBard Liao SOC_SINGLE("DMIC ASRC Switch", RT5651_PLL_MODE_1, 36240bc18a2SBard Liao RT5651_DMIC_1_M_SFT, 1, 0), 36340bc18a2SBard Liao 36440bc18a2SBard Liao SOC_ENUM("ADC IF2 Data Switch", rt5651_if2_adc_enum), 36540bc18a2SBard Liao SOC_ENUM("DAC IF2 Data Switch", rt5651_if2_dac_enum), 36640bc18a2SBard Liao }; 36740bc18a2SBard Liao 36840bc18a2SBard Liao /** 36940bc18a2SBard Liao * set_dmic_clk - Set parameter of dmic. 37040bc18a2SBard Liao * 37140bc18a2SBard Liao * @w: DAPM widget. 37240bc18a2SBard Liao * @kcontrol: The kcontrol of this widget. 37340bc18a2SBard Liao * @event: Event id. 37440bc18a2SBard Liao * 37540bc18a2SBard Liao */ 37640bc18a2SBard Liao static int set_dmic_clk(struct snd_soc_dapm_widget *w, 37740bc18a2SBard Liao struct snd_kcontrol *kcontrol, int event) 37840bc18a2SBard Liao { 37917b52010SKuninori Morimoto struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 38017b52010SKuninori Morimoto struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component); 38100a6d6e5SOder Chiou int idx, rate; 38240bc18a2SBard Liao 38300a6d6e5SOder Chiou rate = rt5651->sysclk / rl6231_get_pre_div(rt5651->regmap, 38400a6d6e5SOder Chiou RT5651_ADDA_CLK1, RT5651_I2S_PD1_SFT); 38500a6d6e5SOder Chiou idx = rl6231_calc_dmic_clk(rate); 38640bc18a2SBard Liao if (idx < 0) 38717b52010SKuninori Morimoto dev_err(component->dev, "Failed to set DMIC clock\n"); 38840bc18a2SBard Liao else 38917b52010SKuninori Morimoto snd_soc_component_update_bits(component, RT5651_DMIC, RT5651_DMIC_CLK_MASK, 39040bc18a2SBard Liao idx << RT5651_DMIC_CLK_SFT); 39140bc18a2SBard Liao 39240bc18a2SBard Liao return idx; 39340bc18a2SBard Liao } 39440bc18a2SBard Liao 39540bc18a2SBard Liao /* Digital Mixer */ 39640bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_sto1_adc_l_mix[] = { 39740bc18a2SBard Liao SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO1_ADC_MIXER, 39840bc18a2SBard Liao RT5651_M_STO1_ADC_L1_SFT, 1, 1), 39940bc18a2SBard Liao SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO1_ADC_MIXER, 40040bc18a2SBard Liao RT5651_M_STO1_ADC_L2_SFT, 1, 1), 40140bc18a2SBard Liao }; 40240bc18a2SBard Liao 40340bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_sto1_adc_r_mix[] = { 40440bc18a2SBard Liao SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO1_ADC_MIXER, 40540bc18a2SBard Liao RT5651_M_STO1_ADC_R1_SFT, 1, 1), 40640bc18a2SBard Liao SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO1_ADC_MIXER, 40740bc18a2SBard Liao RT5651_M_STO1_ADC_R2_SFT, 1, 1), 40840bc18a2SBard Liao }; 40940bc18a2SBard Liao 41040bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_sto2_adc_l_mix[] = { 41140bc18a2SBard Liao SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO2_ADC_MIXER, 41240bc18a2SBard Liao RT5651_M_STO2_ADC_L1_SFT, 1, 1), 41340bc18a2SBard Liao SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO2_ADC_MIXER, 41440bc18a2SBard Liao RT5651_M_STO2_ADC_L2_SFT, 1, 1), 41540bc18a2SBard Liao }; 41640bc18a2SBard Liao 41740bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_sto2_adc_r_mix[] = { 41840bc18a2SBard Liao SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO2_ADC_MIXER, 41940bc18a2SBard Liao RT5651_M_STO2_ADC_R1_SFT, 1, 1), 42040bc18a2SBard Liao SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO2_ADC_MIXER, 42140bc18a2SBard Liao RT5651_M_STO2_ADC_R2_SFT, 1, 1), 42240bc18a2SBard Liao }; 42340bc18a2SBard Liao 42440bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_dac_l_mix[] = { 42540bc18a2SBard Liao SOC_DAPM_SINGLE("Stereo ADC Switch", RT5651_AD_DA_MIXER, 42640bc18a2SBard Liao RT5651_M_ADCMIX_L_SFT, 1, 1), 42740bc18a2SBard Liao SOC_DAPM_SINGLE("INF1 Switch", RT5651_AD_DA_MIXER, 42840bc18a2SBard Liao RT5651_M_IF1_DAC_L_SFT, 1, 1), 42940bc18a2SBard Liao }; 43040bc18a2SBard Liao 43140bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_dac_r_mix[] = { 43240bc18a2SBard Liao SOC_DAPM_SINGLE("Stereo ADC Switch", RT5651_AD_DA_MIXER, 43340bc18a2SBard Liao RT5651_M_ADCMIX_R_SFT, 1, 1), 43440bc18a2SBard Liao SOC_DAPM_SINGLE("INF1 Switch", RT5651_AD_DA_MIXER, 43540bc18a2SBard Liao RT5651_M_IF1_DAC_R_SFT, 1, 1), 43640bc18a2SBard Liao }; 43740bc18a2SBard Liao 43840bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_sto_dac_l_mix[] = { 43940bc18a2SBard Liao SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_STO_DAC_MIXER, 44040bc18a2SBard Liao RT5651_M_DAC_L1_MIXL_SFT, 1, 1), 44140bc18a2SBard Liao SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_STO_DAC_MIXER, 44240bc18a2SBard Liao RT5651_M_DAC_L2_MIXL_SFT, 1, 1), 44340bc18a2SBard Liao SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_STO_DAC_MIXER, 44440bc18a2SBard Liao RT5651_M_DAC_R1_MIXL_SFT, 1, 1), 44540bc18a2SBard Liao }; 44640bc18a2SBard Liao 44740bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_sto_dac_r_mix[] = { 44840bc18a2SBard Liao SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_STO_DAC_MIXER, 44940bc18a2SBard Liao RT5651_M_DAC_R1_MIXR_SFT, 1, 1), 45040bc18a2SBard Liao SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_STO_DAC_MIXER, 45140bc18a2SBard Liao RT5651_M_DAC_R2_MIXR_SFT, 1, 1), 45240bc18a2SBard Liao SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_STO_DAC_MIXER, 45340bc18a2SBard Liao RT5651_M_DAC_L1_MIXR_SFT, 1, 1), 45440bc18a2SBard Liao }; 45540bc18a2SBard Liao 45640bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_dd_dac_l_mix[] = { 45740bc18a2SBard Liao SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_DD_MIXER, 45840bc18a2SBard Liao RT5651_M_STO_DD_L1_SFT, 1, 1), 45940bc18a2SBard Liao SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_DD_MIXER, 46040bc18a2SBard Liao RT5651_M_STO_DD_L2_SFT, 1, 1), 46140bc18a2SBard Liao SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_DD_MIXER, 46240bc18a2SBard Liao RT5651_M_STO_DD_R2_L_SFT, 1, 1), 46340bc18a2SBard Liao }; 46440bc18a2SBard Liao 46540bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_dd_dac_r_mix[] = { 46640bc18a2SBard Liao SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_DD_MIXER, 46740bc18a2SBard Liao RT5651_M_STO_DD_R1_SFT, 1, 1), 46840bc18a2SBard Liao SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_DD_MIXER, 46940bc18a2SBard Liao RT5651_M_STO_DD_R2_SFT, 1, 1), 47040bc18a2SBard Liao SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_DD_MIXER, 47140bc18a2SBard Liao RT5651_M_STO_DD_L2_R_SFT, 1, 1), 47240bc18a2SBard Liao }; 47340bc18a2SBard Liao 47440bc18a2SBard Liao /* Analog Input Mixer */ 47540bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_rec_l_mix[] = { 47640bc18a2SBard Liao SOC_DAPM_SINGLE("INL1 Switch", RT5651_REC_L2_MIXER, 47740bc18a2SBard Liao RT5651_M_IN1_L_RM_L_SFT, 1, 1), 47840bc18a2SBard Liao SOC_DAPM_SINGLE("BST3 Switch", RT5651_REC_L2_MIXER, 47940bc18a2SBard Liao RT5651_M_BST3_RM_L_SFT, 1, 1), 48040bc18a2SBard Liao SOC_DAPM_SINGLE("BST2 Switch", RT5651_REC_L2_MIXER, 48140bc18a2SBard Liao RT5651_M_BST2_RM_L_SFT, 1, 1), 48240bc18a2SBard Liao SOC_DAPM_SINGLE("BST1 Switch", RT5651_REC_L2_MIXER, 48340bc18a2SBard Liao RT5651_M_BST1_RM_L_SFT, 1, 1), 48440bc18a2SBard Liao }; 48540bc18a2SBard Liao 48640bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_rec_r_mix[] = { 48740bc18a2SBard Liao SOC_DAPM_SINGLE("INR1 Switch", RT5651_REC_R2_MIXER, 48840bc18a2SBard Liao RT5651_M_IN1_R_RM_R_SFT, 1, 1), 48940bc18a2SBard Liao SOC_DAPM_SINGLE("BST3 Switch", RT5651_REC_R2_MIXER, 49040bc18a2SBard Liao RT5651_M_BST3_RM_R_SFT, 1, 1), 49140bc18a2SBard Liao SOC_DAPM_SINGLE("BST2 Switch", RT5651_REC_R2_MIXER, 49240bc18a2SBard Liao RT5651_M_BST2_RM_R_SFT, 1, 1), 49340bc18a2SBard Liao SOC_DAPM_SINGLE("BST1 Switch", RT5651_REC_R2_MIXER, 49440bc18a2SBard Liao RT5651_M_BST1_RM_R_SFT, 1, 1), 49540bc18a2SBard Liao }; 49640bc18a2SBard Liao 49740bc18a2SBard Liao /* Analog Output Mixer */ 49840bc18a2SBard Liao 49940bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_out_l_mix[] = { 50040bc18a2SBard Liao SOC_DAPM_SINGLE("BST1 Switch", RT5651_OUT_L3_MIXER, 50140bc18a2SBard Liao RT5651_M_BST1_OM_L_SFT, 1, 1), 50240bc18a2SBard Liao SOC_DAPM_SINGLE("BST2 Switch", RT5651_OUT_L3_MIXER, 50340bc18a2SBard Liao RT5651_M_BST2_OM_L_SFT, 1, 1), 50440bc18a2SBard Liao SOC_DAPM_SINGLE("INL1 Switch", RT5651_OUT_L3_MIXER, 50540bc18a2SBard Liao RT5651_M_IN1_L_OM_L_SFT, 1, 1), 50640bc18a2SBard Liao SOC_DAPM_SINGLE("REC MIXL Switch", RT5651_OUT_L3_MIXER, 50740bc18a2SBard Liao RT5651_M_RM_L_OM_L_SFT, 1, 1), 50840bc18a2SBard Liao SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_OUT_L3_MIXER, 50940bc18a2SBard Liao RT5651_M_DAC_L1_OM_L_SFT, 1, 1), 51040bc18a2SBard Liao }; 51140bc18a2SBard Liao 51240bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_out_r_mix[] = { 51340bc18a2SBard Liao SOC_DAPM_SINGLE("BST2 Switch", RT5651_OUT_R3_MIXER, 51440bc18a2SBard Liao RT5651_M_BST2_OM_R_SFT, 1, 1), 51540bc18a2SBard Liao SOC_DAPM_SINGLE("BST1 Switch", RT5651_OUT_R3_MIXER, 51640bc18a2SBard Liao RT5651_M_BST1_OM_R_SFT, 1, 1), 51740bc18a2SBard Liao SOC_DAPM_SINGLE("INR1 Switch", RT5651_OUT_R3_MIXER, 51840bc18a2SBard Liao RT5651_M_IN1_R_OM_R_SFT, 1, 1), 51940bc18a2SBard Liao SOC_DAPM_SINGLE("REC MIXR Switch", RT5651_OUT_R3_MIXER, 52040bc18a2SBard Liao RT5651_M_RM_R_OM_R_SFT, 1, 1), 52140bc18a2SBard Liao SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_OUT_R3_MIXER, 52240bc18a2SBard Liao RT5651_M_DAC_R1_OM_R_SFT, 1, 1), 52340bc18a2SBard Liao }; 52440bc18a2SBard Liao 52540bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_hpo_mix[] = { 52640bc18a2SBard Liao SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5651_HPO_MIXER, 52740bc18a2SBard Liao RT5651_M_DAC1_HM_SFT, 1, 1), 52840bc18a2SBard Liao SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5651_HPO_MIXER, 52940bc18a2SBard Liao RT5651_M_HPVOL_HM_SFT, 1, 1), 53040bc18a2SBard Liao }; 53140bc18a2SBard Liao 53240bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_lout_mix[] = { 53340bc18a2SBard Liao SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_LOUT_MIXER, 53440bc18a2SBard Liao RT5651_M_DAC_L1_LM_SFT, 1, 1), 53540bc18a2SBard Liao SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_LOUT_MIXER, 53640bc18a2SBard Liao RT5651_M_DAC_R1_LM_SFT, 1, 1), 53740bc18a2SBard Liao SOC_DAPM_SINGLE("OUTVOL L Switch", RT5651_LOUT_MIXER, 53840bc18a2SBard Liao RT5651_M_OV_L_LM_SFT, 1, 1), 53940bc18a2SBard Liao SOC_DAPM_SINGLE("OUTVOL R Switch", RT5651_LOUT_MIXER, 54040bc18a2SBard Liao RT5651_M_OV_R_LM_SFT, 1, 1), 54140bc18a2SBard Liao }; 54240bc18a2SBard Liao 54340bc18a2SBard Liao static const struct snd_kcontrol_new outvol_l_control = 54440bc18a2SBard Liao SOC_DAPM_SINGLE("Switch", RT5651_LOUT_CTRL1, 54540bc18a2SBard Liao RT5651_VOL_L_SFT, 1, 1); 54640bc18a2SBard Liao 54740bc18a2SBard Liao static const struct snd_kcontrol_new outvol_r_control = 54840bc18a2SBard Liao SOC_DAPM_SINGLE("Switch", RT5651_LOUT_CTRL1, 54940bc18a2SBard Liao RT5651_VOL_R_SFT, 1, 1); 55040bc18a2SBard Liao 55140bc18a2SBard Liao static const struct snd_kcontrol_new lout_l_mute_control = 55240bc18a2SBard Liao SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_LOUT_CTRL1, 55340bc18a2SBard Liao RT5651_L_MUTE_SFT, 1, 1); 55440bc18a2SBard Liao 55540bc18a2SBard Liao static const struct snd_kcontrol_new lout_r_mute_control = 55640bc18a2SBard Liao SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_LOUT_CTRL1, 55740bc18a2SBard Liao RT5651_R_MUTE_SFT, 1, 1); 55840bc18a2SBard Liao 55940bc18a2SBard Liao static const struct snd_kcontrol_new hpovol_l_control = 56040bc18a2SBard Liao SOC_DAPM_SINGLE("Switch", RT5651_HP_VOL, 56140bc18a2SBard Liao RT5651_VOL_L_SFT, 1, 1); 56240bc18a2SBard Liao 56340bc18a2SBard Liao static const struct snd_kcontrol_new hpovol_r_control = 56440bc18a2SBard Liao SOC_DAPM_SINGLE("Switch", RT5651_HP_VOL, 56540bc18a2SBard Liao RT5651_VOL_R_SFT, 1, 1); 56640bc18a2SBard Liao 56740bc18a2SBard Liao static const struct snd_kcontrol_new hpo_l_mute_control = 56840bc18a2SBard Liao SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_HP_VOL, 56940bc18a2SBard Liao RT5651_L_MUTE_SFT, 1, 1); 57040bc18a2SBard Liao 57140bc18a2SBard Liao static const struct snd_kcontrol_new hpo_r_mute_control = 57240bc18a2SBard Liao SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_HP_VOL, 57340bc18a2SBard Liao RT5651_R_MUTE_SFT, 1, 1); 57440bc18a2SBard Liao 57540bc18a2SBard Liao /* Stereo ADC source */ 57640bc18a2SBard Liao static const char * const rt5651_stereo1_adc1_src[] = {"DD MIX", "ADC"}; 57740bc18a2SBard Liao 57840bc18a2SBard Liao static SOC_ENUM_SINGLE_DECL( 57940bc18a2SBard Liao rt5651_stereo1_adc1_enum, RT5651_STO1_ADC_MIXER, 58040bc18a2SBard Liao RT5651_STO1_ADC_1_SRC_SFT, rt5651_stereo1_adc1_src); 58140bc18a2SBard Liao 58240bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_sto1_adc_l1_mux = 58340bc18a2SBard Liao SOC_DAPM_ENUM("Stereo1 ADC L1 source", rt5651_stereo1_adc1_enum); 58440bc18a2SBard Liao 58540bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_sto1_adc_r1_mux = 58640bc18a2SBard Liao SOC_DAPM_ENUM("Stereo1 ADC R1 source", rt5651_stereo1_adc1_enum); 58740bc18a2SBard Liao 58840bc18a2SBard Liao static const char * const rt5651_stereo1_adc2_src[] = {"DMIC", "DD MIX"}; 58940bc18a2SBard Liao 59040bc18a2SBard Liao static SOC_ENUM_SINGLE_DECL( 59140bc18a2SBard Liao rt5651_stereo1_adc2_enum, RT5651_STO1_ADC_MIXER, 59240bc18a2SBard Liao RT5651_STO1_ADC_2_SRC_SFT, rt5651_stereo1_adc2_src); 59340bc18a2SBard Liao 59440bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_sto1_adc_l2_mux = 59540bc18a2SBard Liao SOC_DAPM_ENUM("Stereo1 ADC L2 source", rt5651_stereo1_adc2_enum); 59640bc18a2SBard Liao 59740bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_sto1_adc_r2_mux = 59840bc18a2SBard Liao SOC_DAPM_ENUM("Stereo1 ADC R2 source", rt5651_stereo1_adc2_enum); 59940bc18a2SBard Liao 60040bc18a2SBard Liao /* Mono ADC source */ 60140bc18a2SBard Liao static const char * const rt5651_sto2_adc_l1_src[] = {"DD MIXL", "ADCL"}; 60240bc18a2SBard Liao 60340bc18a2SBard Liao static SOC_ENUM_SINGLE_DECL( 60440bc18a2SBard Liao rt5651_sto2_adc_l1_enum, RT5651_STO1_ADC_MIXER, 60540bc18a2SBard Liao RT5651_STO2_ADC_L1_SRC_SFT, rt5651_sto2_adc_l1_src); 60640bc18a2SBard Liao 60740bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_sto2_adc_l1_mux = 60840bc18a2SBard Liao SOC_DAPM_ENUM("Stereo2 ADC1 left source", rt5651_sto2_adc_l1_enum); 60940bc18a2SBard Liao 61040bc18a2SBard Liao static const char * const rt5651_sto2_adc_l2_src[] = {"DMIC L", "DD MIXL"}; 61140bc18a2SBard Liao 61240bc18a2SBard Liao static SOC_ENUM_SINGLE_DECL( 61340bc18a2SBard Liao rt5651_sto2_adc_l2_enum, RT5651_STO1_ADC_MIXER, 61440bc18a2SBard Liao RT5651_STO2_ADC_L2_SRC_SFT, rt5651_sto2_adc_l2_src); 61540bc18a2SBard Liao 61640bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_sto2_adc_l2_mux = 61740bc18a2SBard Liao SOC_DAPM_ENUM("Stereo2 ADC2 left source", rt5651_sto2_adc_l2_enum); 61840bc18a2SBard Liao 61940bc18a2SBard Liao static const char * const rt5651_sto2_adc_r1_src[] = {"DD MIXR", "ADCR"}; 62040bc18a2SBard Liao 62140bc18a2SBard Liao static SOC_ENUM_SINGLE_DECL( 62240bc18a2SBard Liao rt5651_sto2_adc_r1_enum, RT5651_STO1_ADC_MIXER, 62340bc18a2SBard Liao RT5651_STO2_ADC_R1_SRC_SFT, rt5651_sto2_adc_r1_src); 62440bc18a2SBard Liao 62540bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_sto2_adc_r1_mux = 62640bc18a2SBard Liao SOC_DAPM_ENUM("Stereo2 ADC1 right source", rt5651_sto2_adc_r1_enum); 62740bc18a2SBard Liao 62840bc18a2SBard Liao static const char * const rt5651_sto2_adc_r2_src[] = {"DMIC R", "DD MIXR"}; 62940bc18a2SBard Liao 63040bc18a2SBard Liao static SOC_ENUM_SINGLE_DECL( 63140bc18a2SBard Liao rt5651_sto2_adc_r2_enum, RT5651_STO1_ADC_MIXER, 63240bc18a2SBard Liao RT5651_STO2_ADC_R2_SRC_SFT, rt5651_sto2_adc_r2_src); 63340bc18a2SBard Liao 63440bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_sto2_adc_r2_mux = 63540bc18a2SBard Liao SOC_DAPM_ENUM("Stereo2 ADC2 right source", rt5651_sto2_adc_r2_enum); 63640bc18a2SBard Liao 63740bc18a2SBard Liao /* DAC2 channel source */ 63840bc18a2SBard Liao 63940bc18a2SBard Liao static const char * const rt5651_dac_src[] = {"IF1", "IF2"}; 64040bc18a2SBard Liao 64140bc18a2SBard Liao static SOC_ENUM_SINGLE_DECL(rt5651_dac_l2_enum, RT5651_DAC2_CTRL, 64240bc18a2SBard Liao RT5651_SEL_DAC_L2_SFT, rt5651_dac_src); 64340bc18a2SBard Liao 64440bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_dac_l2_mux = 64540bc18a2SBard Liao SOC_DAPM_ENUM("DAC2 left channel source", rt5651_dac_l2_enum); 64640bc18a2SBard Liao 64740bc18a2SBard Liao static SOC_ENUM_SINGLE_DECL( 64840bc18a2SBard Liao rt5651_dac_r2_enum, RT5651_DAC2_CTRL, 64940bc18a2SBard Liao RT5651_SEL_DAC_R2_SFT, rt5651_dac_src); 65040bc18a2SBard Liao 65140bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_dac_r2_mux = 65240bc18a2SBard Liao SOC_DAPM_ENUM("DAC2 right channel source", rt5651_dac_r2_enum); 65340bc18a2SBard Liao 65440bc18a2SBard Liao /* IF2_ADC channel source */ 65540bc18a2SBard Liao 65640bc18a2SBard Liao static const char * const rt5651_adc_src[] = {"IF1 ADC1", "IF1 ADC2"}; 65740bc18a2SBard Liao 65840bc18a2SBard Liao static SOC_ENUM_SINGLE_DECL(rt5651_if2_adc_src_enum, RT5651_DIG_INF_DATA, 65940bc18a2SBard Liao RT5651_IF2_ADC_SRC_SFT, rt5651_adc_src); 66040bc18a2SBard Liao 66140bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_if2_adc_src_mux = 66240bc18a2SBard Liao SOC_DAPM_ENUM("IF2 ADC channel source", rt5651_if2_adc_src_enum); 66340bc18a2SBard Liao 66440bc18a2SBard Liao /* PDM select */ 66540bc18a2SBard Liao static const char * const rt5651_pdm_sel[] = {"DD MIX", "Stereo DAC MIX"}; 66640bc18a2SBard Liao 66740bc18a2SBard Liao static SOC_ENUM_SINGLE_DECL( 66840bc18a2SBard Liao rt5651_pdm_l_sel_enum, RT5651_PDM_CTL, 66940bc18a2SBard Liao RT5651_PDM_L_SEL_SFT, rt5651_pdm_sel); 67040bc18a2SBard Liao 67140bc18a2SBard Liao static SOC_ENUM_SINGLE_DECL( 67240bc18a2SBard Liao rt5651_pdm_r_sel_enum, RT5651_PDM_CTL, 67340bc18a2SBard Liao RT5651_PDM_R_SEL_SFT, rt5651_pdm_sel); 67440bc18a2SBard Liao 67540bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_pdm_l_mux = 67640bc18a2SBard Liao SOC_DAPM_ENUM("PDM L select", rt5651_pdm_l_sel_enum); 67740bc18a2SBard Liao 67840bc18a2SBard Liao static const struct snd_kcontrol_new rt5651_pdm_r_mux = 67940bc18a2SBard Liao SOC_DAPM_ENUM("PDM R select", rt5651_pdm_r_sel_enum); 68040bc18a2SBard Liao 68140bc18a2SBard Liao static int rt5651_amp_power_event(struct snd_soc_dapm_widget *w, 68240bc18a2SBard Liao struct snd_kcontrol *kcontrol, int event) 68340bc18a2SBard Liao { 68417b52010SKuninori Morimoto struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 68517b52010SKuninori Morimoto struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component); 68640bc18a2SBard Liao 68740bc18a2SBard Liao switch (event) { 68840bc18a2SBard Liao case SND_SOC_DAPM_POST_PMU: 68940bc18a2SBard Liao /* depop parameters */ 69040bc18a2SBard Liao regmap_update_bits(rt5651->regmap, RT5651_PR_BASE + 69140bc18a2SBard Liao RT5651_CHPUMP_INT_REG1, 0x0700, 0x0200); 69240bc18a2SBard Liao regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M2, 69340bc18a2SBard Liao RT5651_DEPOP_MASK, RT5651_DEPOP_MAN); 69440bc18a2SBard Liao regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M1, 69540bc18a2SBard Liao RT5651_HP_CP_MASK | RT5651_HP_SG_MASK | 69640bc18a2SBard Liao RT5651_HP_CB_MASK, RT5651_HP_CP_PU | 69740bc18a2SBard Liao RT5651_HP_SG_DIS | RT5651_HP_CB_PU); 69840bc18a2SBard Liao regmap_write(rt5651->regmap, RT5651_PR_BASE + 69940bc18a2SBard Liao RT5651_HP_DCC_INT1, 0x9f00); 70040bc18a2SBard Liao /* headphone amp power on */ 70140bc18a2SBard Liao regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1, 70240bc18a2SBard Liao RT5651_PWR_FV1 | RT5651_PWR_FV2, 0); 70340bc18a2SBard Liao regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1, 70440bc18a2SBard Liao RT5651_PWR_HA, 70540bc18a2SBard Liao RT5651_PWR_HA); 70640bc18a2SBard Liao usleep_range(10000, 15000); 70740bc18a2SBard Liao regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1, 70840bc18a2SBard Liao RT5651_PWR_FV1 | RT5651_PWR_FV2 , 70940bc18a2SBard Liao RT5651_PWR_FV1 | RT5651_PWR_FV2); 71040bc18a2SBard Liao break; 71140bc18a2SBard Liao 71240bc18a2SBard Liao default: 71340bc18a2SBard Liao return 0; 71440bc18a2SBard Liao } 71540bc18a2SBard Liao 71640bc18a2SBard Liao return 0; 71740bc18a2SBard Liao } 71840bc18a2SBard Liao 71940bc18a2SBard Liao static int rt5651_hp_event(struct snd_soc_dapm_widget *w, 72040bc18a2SBard Liao struct snd_kcontrol *kcontrol, int event) 72140bc18a2SBard Liao { 72217b52010SKuninori Morimoto struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 72317b52010SKuninori Morimoto struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component); 72440bc18a2SBard Liao 72540bc18a2SBard Liao switch (event) { 72640bc18a2SBard Liao case SND_SOC_DAPM_POST_PMU: 72740bc18a2SBard Liao /* headphone unmute sequence */ 72840bc18a2SBard Liao regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M2, 72940bc18a2SBard Liao RT5651_DEPOP_MASK | RT5651_DIG_DP_MASK, 73040bc18a2SBard Liao RT5651_DEPOP_AUTO | RT5651_DIG_DP_EN); 73140bc18a2SBard Liao regmap_update_bits(rt5651->regmap, RT5651_CHARGE_PUMP, 73240bc18a2SBard Liao RT5651_PM_HP_MASK, RT5651_PM_HP_HV); 73340bc18a2SBard Liao 73440bc18a2SBard Liao regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M3, 73540bc18a2SBard Liao RT5651_CP_FQ1_MASK | RT5651_CP_FQ2_MASK | 73640bc18a2SBard Liao RT5651_CP_FQ3_MASK, 73740bc18a2SBard Liao (RT5651_CP_FQ_192_KHZ << RT5651_CP_FQ1_SFT) | 73840bc18a2SBard Liao (RT5651_CP_FQ_12_KHZ << RT5651_CP_FQ2_SFT) | 73940bc18a2SBard Liao (RT5651_CP_FQ_192_KHZ << RT5651_CP_FQ3_SFT)); 74040bc18a2SBard Liao 74140bc18a2SBard Liao regmap_write(rt5651->regmap, RT5651_PR_BASE + 74240bc18a2SBard Liao RT5651_MAMP_INT_REG2, 0x1c00); 74340bc18a2SBard Liao regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M1, 74440bc18a2SBard Liao RT5651_HP_CP_MASK | RT5651_HP_SG_MASK, 74540bc18a2SBard Liao RT5651_HP_CP_PD | RT5651_HP_SG_EN); 74640bc18a2SBard Liao regmap_update_bits(rt5651->regmap, RT5651_PR_BASE + 74740bc18a2SBard Liao RT5651_CHPUMP_INT_REG1, 0x0700, 0x0400); 748577dc32fSPierre-Louis Bossart rt5651->hp_mute = false; 74940bc18a2SBard Liao break; 75040bc18a2SBard Liao 75140bc18a2SBard Liao case SND_SOC_DAPM_PRE_PMD: 752577dc32fSPierre-Louis Bossart rt5651->hp_mute = true; 75340bc18a2SBard Liao usleep_range(70000, 75000); 75440bc18a2SBard Liao break; 75540bc18a2SBard Liao 75640bc18a2SBard Liao default: 75740bc18a2SBard Liao return 0; 75840bc18a2SBard Liao } 75940bc18a2SBard Liao 76040bc18a2SBard Liao return 0; 76140bc18a2SBard Liao } 76240bc18a2SBard Liao 76340bc18a2SBard Liao static int rt5651_hp_post_event(struct snd_soc_dapm_widget *w, 76440bc18a2SBard Liao struct snd_kcontrol *kcontrol, int event) 76540bc18a2SBard Liao { 76630c173edSLars-Peter Clausen 76717b52010SKuninori Morimoto struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 76817b52010SKuninori Morimoto struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component); 76940bc18a2SBard Liao 77040bc18a2SBard Liao switch (event) { 77140bc18a2SBard Liao case SND_SOC_DAPM_POST_PMU: 77240bc18a2SBard Liao if (!rt5651->hp_mute) 77340bc18a2SBard Liao usleep_range(80000, 85000); 77440bc18a2SBard Liao 77540bc18a2SBard Liao break; 77640bc18a2SBard Liao 77740bc18a2SBard Liao default: 77840bc18a2SBard Liao return 0; 77940bc18a2SBard Liao } 78040bc18a2SBard Liao 78140bc18a2SBard Liao return 0; 78240bc18a2SBard Liao } 78340bc18a2SBard Liao 78440bc18a2SBard Liao static int rt5651_bst1_event(struct snd_soc_dapm_widget *w, 78540bc18a2SBard Liao struct snd_kcontrol *kcontrol, int event) 78640bc18a2SBard Liao { 78717b52010SKuninori Morimoto struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 78840bc18a2SBard Liao 78940bc18a2SBard Liao switch (event) { 79040bc18a2SBard Liao case SND_SOC_DAPM_POST_PMU: 79117b52010SKuninori Morimoto snd_soc_component_update_bits(component, RT5651_PWR_ANLG2, 79240bc18a2SBard Liao RT5651_PWR_BST1_OP2, RT5651_PWR_BST1_OP2); 79340bc18a2SBard Liao break; 79440bc18a2SBard Liao 79540bc18a2SBard Liao case SND_SOC_DAPM_PRE_PMD: 79617b52010SKuninori Morimoto snd_soc_component_update_bits(component, RT5651_PWR_ANLG2, 79740bc18a2SBard Liao RT5651_PWR_BST1_OP2, 0); 79840bc18a2SBard Liao break; 79940bc18a2SBard Liao 80040bc18a2SBard Liao default: 80140bc18a2SBard Liao return 0; 80240bc18a2SBard Liao } 80340bc18a2SBard Liao 80440bc18a2SBard Liao return 0; 80540bc18a2SBard Liao } 80640bc18a2SBard Liao 80740bc18a2SBard Liao static int rt5651_bst2_event(struct snd_soc_dapm_widget *w, 80840bc18a2SBard Liao struct snd_kcontrol *kcontrol, int event) 80940bc18a2SBard Liao { 81017b52010SKuninori Morimoto struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 81140bc18a2SBard Liao 81240bc18a2SBard Liao switch (event) { 81340bc18a2SBard Liao case SND_SOC_DAPM_POST_PMU: 81417b52010SKuninori Morimoto snd_soc_component_update_bits(component, RT5651_PWR_ANLG2, 81540bc18a2SBard Liao RT5651_PWR_BST2_OP2, RT5651_PWR_BST2_OP2); 81640bc18a2SBard Liao break; 81740bc18a2SBard Liao 81840bc18a2SBard Liao case SND_SOC_DAPM_PRE_PMD: 81917b52010SKuninori Morimoto snd_soc_component_update_bits(component, RT5651_PWR_ANLG2, 82040bc18a2SBard Liao RT5651_PWR_BST2_OP2, 0); 82140bc18a2SBard Liao break; 82240bc18a2SBard Liao 82340bc18a2SBard Liao default: 82440bc18a2SBard Liao return 0; 82540bc18a2SBard Liao } 82640bc18a2SBard Liao 82740bc18a2SBard Liao return 0; 82840bc18a2SBard Liao } 82940bc18a2SBard Liao 83040bc18a2SBard Liao static int rt5651_bst3_event(struct snd_soc_dapm_widget *w, 83140bc18a2SBard Liao struct snd_kcontrol *kcontrol, int event) 83240bc18a2SBard Liao { 83317b52010SKuninori Morimoto struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 83440bc18a2SBard Liao 83540bc18a2SBard Liao switch (event) { 83640bc18a2SBard Liao case SND_SOC_DAPM_POST_PMU: 83717b52010SKuninori Morimoto snd_soc_component_update_bits(component, RT5651_PWR_ANLG2, 83840bc18a2SBard Liao RT5651_PWR_BST3_OP2, RT5651_PWR_BST3_OP2); 83940bc18a2SBard Liao break; 84040bc18a2SBard Liao 84140bc18a2SBard Liao case SND_SOC_DAPM_PRE_PMD: 84217b52010SKuninori Morimoto snd_soc_component_update_bits(component, RT5651_PWR_ANLG2, 84340bc18a2SBard Liao RT5651_PWR_BST3_OP2, 0); 84440bc18a2SBard Liao break; 84540bc18a2SBard Liao 84640bc18a2SBard Liao default: 84740bc18a2SBard Liao return 0; 84840bc18a2SBard Liao } 84940bc18a2SBard Liao 85040bc18a2SBard Liao return 0; 85140bc18a2SBard Liao } 85240bc18a2SBard Liao 85340bc18a2SBard Liao static const struct snd_soc_dapm_widget rt5651_dapm_widgets[] = { 85440bc18a2SBard Liao /* ASRC */ 85540bc18a2SBard Liao SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5651_PLL_MODE_2, 85640bc18a2SBard Liao 15, 0, NULL, 0), 85740bc18a2SBard Liao SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5651_PLL_MODE_2, 85840bc18a2SBard Liao 14, 0, NULL, 0), 85940bc18a2SBard Liao SND_SOC_DAPM_SUPPLY_S("STO1 DAC ASRC", 1, RT5651_PLL_MODE_2, 86040bc18a2SBard Liao 13, 0, NULL, 0), 86140bc18a2SBard Liao SND_SOC_DAPM_SUPPLY_S("STO2 DAC ASRC", 1, RT5651_PLL_MODE_2, 86240bc18a2SBard Liao 12, 0, NULL, 0), 86340bc18a2SBard Liao SND_SOC_DAPM_SUPPLY_S("ADC ASRC", 1, RT5651_PLL_MODE_2, 86440bc18a2SBard Liao 11, 0, NULL, 0), 86540bc18a2SBard Liao 86640bc18a2SBard Liao /* micbias */ 86740bc18a2SBard Liao SND_SOC_DAPM_SUPPLY("LDO", RT5651_PWR_ANLG1, 86840bc18a2SBard Liao RT5651_PWR_LDO_BIT, 0, NULL, 0), 869be96fc54SCarlo Caione SND_SOC_DAPM_SUPPLY("micbias1", RT5651_PWR_ANLG2, 870be96fc54SCarlo Caione RT5651_PWR_MB1_BIT, 0, NULL, 0), 87140bc18a2SBard Liao /* Input Lines */ 87240bc18a2SBard Liao SND_SOC_DAPM_INPUT("MIC1"), 87340bc18a2SBard Liao SND_SOC_DAPM_INPUT("MIC2"), 87440bc18a2SBard Liao SND_SOC_DAPM_INPUT("MIC3"), 87540bc18a2SBard Liao 87640bc18a2SBard Liao SND_SOC_DAPM_INPUT("IN1P"), 87740bc18a2SBard Liao SND_SOC_DAPM_INPUT("IN2P"), 87840bc18a2SBard Liao SND_SOC_DAPM_INPUT("IN2N"), 87940bc18a2SBard Liao SND_SOC_DAPM_INPUT("IN3P"), 88040bc18a2SBard Liao SND_SOC_DAPM_INPUT("DMIC L1"), 88140bc18a2SBard Liao SND_SOC_DAPM_INPUT("DMIC R1"), 88240bc18a2SBard Liao SND_SOC_DAPM_SUPPLY("DMIC CLK", RT5651_DMIC, RT5651_DMIC_1_EN_SFT, 88340bc18a2SBard Liao 0, set_dmic_clk, SND_SOC_DAPM_PRE_PMU), 88440bc18a2SBard Liao /* Boost */ 88540bc18a2SBard Liao SND_SOC_DAPM_PGA_E("BST1", RT5651_PWR_ANLG2, 88640bc18a2SBard Liao RT5651_PWR_BST1_BIT, 0, NULL, 0, rt5651_bst1_event, 88740bc18a2SBard Liao SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 88840bc18a2SBard Liao SND_SOC_DAPM_PGA_E("BST2", RT5651_PWR_ANLG2, 88940bc18a2SBard Liao RT5651_PWR_BST2_BIT, 0, NULL, 0, rt5651_bst2_event, 89040bc18a2SBard Liao SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 89140bc18a2SBard Liao SND_SOC_DAPM_PGA_E("BST3", RT5651_PWR_ANLG2, 89240bc18a2SBard Liao RT5651_PWR_BST3_BIT, 0, NULL, 0, rt5651_bst3_event, 89340bc18a2SBard Liao SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 89440bc18a2SBard Liao /* Input Volume */ 89540bc18a2SBard Liao SND_SOC_DAPM_PGA("INL1 VOL", RT5651_PWR_VOL, 89640bc18a2SBard Liao RT5651_PWR_IN1_L_BIT, 0, NULL, 0), 89740bc18a2SBard Liao SND_SOC_DAPM_PGA("INR1 VOL", RT5651_PWR_VOL, 89840bc18a2SBard Liao RT5651_PWR_IN1_R_BIT, 0, NULL, 0), 89940bc18a2SBard Liao SND_SOC_DAPM_PGA("INL2 VOL", RT5651_PWR_VOL, 90040bc18a2SBard Liao RT5651_PWR_IN2_L_BIT, 0, NULL, 0), 90140bc18a2SBard Liao SND_SOC_DAPM_PGA("INR2 VOL", RT5651_PWR_VOL, 90240bc18a2SBard Liao RT5651_PWR_IN2_R_BIT, 0, NULL, 0), 9035800b697SBard Liao 90440bc18a2SBard Liao /* REC Mixer */ 90540bc18a2SBard Liao SND_SOC_DAPM_MIXER("RECMIXL", RT5651_PWR_MIXER, RT5651_PWR_RM_L_BIT, 0, 90640bc18a2SBard Liao rt5651_rec_l_mix, ARRAY_SIZE(rt5651_rec_l_mix)), 90740bc18a2SBard Liao SND_SOC_DAPM_MIXER("RECMIXR", RT5651_PWR_MIXER, RT5651_PWR_RM_R_BIT, 0, 90840bc18a2SBard Liao rt5651_rec_r_mix, ARRAY_SIZE(rt5651_rec_r_mix)), 90940bc18a2SBard Liao /* ADCs */ 91040bc18a2SBard Liao SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0), 91140bc18a2SBard Liao SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0), 91240bc18a2SBard Liao SND_SOC_DAPM_SUPPLY("ADC L Power", RT5651_PWR_DIG1, 91340bc18a2SBard Liao RT5651_PWR_ADC_L_BIT, 0, NULL, 0), 91440bc18a2SBard Liao SND_SOC_DAPM_SUPPLY("ADC R Power", RT5651_PWR_DIG1, 91540bc18a2SBard Liao RT5651_PWR_ADC_R_BIT, 0, NULL, 0), 91640bc18a2SBard Liao /* ADC Mux */ 91740bc18a2SBard Liao SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0, 91840bc18a2SBard Liao &rt5651_sto1_adc_l2_mux), 91940bc18a2SBard Liao SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0, 92040bc18a2SBard Liao &rt5651_sto1_adc_r2_mux), 92140bc18a2SBard Liao SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0, 92240bc18a2SBard Liao &rt5651_sto1_adc_l1_mux), 92340bc18a2SBard Liao SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0, 92440bc18a2SBard Liao &rt5651_sto1_adc_r1_mux), 92540bc18a2SBard Liao SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0, 92640bc18a2SBard Liao &rt5651_sto2_adc_l2_mux), 92740bc18a2SBard Liao SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0, 92840bc18a2SBard Liao &rt5651_sto2_adc_l1_mux), 92940bc18a2SBard Liao SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0, 93040bc18a2SBard Liao &rt5651_sto2_adc_r1_mux), 93140bc18a2SBard Liao SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0, 93240bc18a2SBard Liao &rt5651_sto2_adc_r2_mux), 93340bc18a2SBard Liao /* ADC Mixer */ 93440bc18a2SBard Liao SND_SOC_DAPM_SUPPLY("Stereo1 Filter", RT5651_PWR_DIG2, 93540bc18a2SBard Liao RT5651_PWR_ADC_STO1_F_BIT, 0, NULL, 0), 93640bc18a2SBard Liao SND_SOC_DAPM_SUPPLY("Stereo2 Filter", RT5651_PWR_DIG2, 93740bc18a2SBard Liao RT5651_PWR_ADC_STO2_F_BIT, 0, NULL, 0), 93840bc18a2SBard Liao SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, 93940bc18a2SBard Liao rt5651_sto1_adc_l_mix, 94040bc18a2SBard Liao ARRAY_SIZE(rt5651_sto1_adc_l_mix)), 94140bc18a2SBard Liao SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, 94240bc18a2SBard Liao rt5651_sto1_adc_r_mix, 94340bc18a2SBard Liao ARRAY_SIZE(rt5651_sto1_adc_r_mix)), 94440bc18a2SBard Liao SND_SOC_DAPM_MIXER("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, 94540bc18a2SBard Liao rt5651_sto2_adc_l_mix, 94640bc18a2SBard Liao ARRAY_SIZE(rt5651_sto2_adc_l_mix)), 94740bc18a2SBard Liao SND_SOC_DAPM_MIXER("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, 94840bc18a2SBard Liao rt5651_sto2_adc_r_mix, 94940bc18a2SBard Liao ARRAY_SIZE(rt5651_sto2_adc_r_mix)), 95040bc18a2SBard Liao 95140bc18a2SBard Liao /* Digital Interface */ 95240bc18a2SBard Liao SND_SOC_DAPM_SUPPLY("I2S1", RT5651_PWR_DIG1, 95340bc18a2SBard Liao RT5651_PWR_I2S1_BIT, 0, NULL, 0), 95440bc18a2SBard Liao SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0), 95540bc18a2SBard Liao SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0), 95640bc18a2SBard Liao SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0), 95740bc18a2SBard Liao SND_SOC_DAPM_PGA("IF1 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), 95840bc18a2SBard Liao SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0), 95940bc18a2SBard Liao SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0), 96040bc18a2SBard Liao SND_SOC_DAPM_PGA("IF1 ADC2", SND_SOC_NOPM, 0, 0, NULL, 0), 96140bc18a2SBard Liao SND_SOC_DAPM_SUPPLY("I2S2", RT5651_PWR_DIG1, 96240bc18a2SBard Liao RT5651_PWR_I2S2_BIT, 0, NULL, 0), 96340bc18a2SBard Liao SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0), 96440bc18a2SBard Liao SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0), 96540bc18a2SBard Liao SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0), 96640bc18a2SBard Liao SND_SOC_DAPM_MUX("IF2 ADC", SND_SOC_NOPM, 0, 0, 96740bc18a2SBard Liao &rt5651_if2_adc_src_mux), 96840bc18a2SBard Liao 96940bc18a2SBard Liao /* Digital Interface Select */ 97040bc18a2SBard Liao 97140bc18a2SBard Liao SND_SOC_DAPM_MUX("PDM L Mux", RT5651_PDM_CTL, 97240bc18a2SBard Liao RT5651_M_PDM_L_SFT, 1, &rt5651_pdm_l_mux), 97340bc18a2SBard Liao SND_SOC_DAPM_MUX("PDM R Mux", RT5651_PDM_CTL, 97440bc18a2SBard Liao RT5651_M_PDM_R_SFT, 1, &rt5651_pdm_r_mux), 97540bc18a2SBard Liao /* Audio Interface */ 97640bc18a2SBard Liao SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0), 97740bc18a2SBard Liao SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0), 97840bc18a2SBard Liao SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0), 97940bc18a2SBard Liao SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0), 98040bc18a2SBard Liao 98140bc18a2SBard Liao /* Audio DSP */ 98240bc18a2SBard Liao SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0), 98340bc18a2SBard Liao 98440bc18a2SBard Liao /* Output Side */ 98540bc18a2SBard Liao /* DAC mixer before sound effect */ 98640bc18a2SBard Liao SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0, 98740bc18a2SBard Liao rt5651_dac_l_mix, ARRAY_SIZE(rt5651_dac_l_mix)), 98840bc18a2SBard Liao SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0, 98940bc18a2SBard Liao rt5651_dac_r_mix, ARRAY_SIZE(rt5651_dac_r_mix)), 99040bc18a2SBard Liao 99140bc18a2SBard Liao /* DAC2 channel Mux */ 99240bc18a2SBard Liao SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_dac_l2_mux), 99340bc18a2SBard Liao SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_dac_r2_mux), 99440bc18a2SBard Liao SND_SOC_DAPM_PGA("DAC L2 Volume", SND_SOC_NOPM, 0, 0, NULL, 0), 99540bc18a2SBard Liao SND_SOC_DAPM_PGA("DAC R2 Volume", SND_SOC_NOPM, 0, 0, NULL, 0), 99640bc18a2SBard Liao 99740bc18a2SBard Liao SND_SOC_DAPM_SUPPLY("Stero1 DAC Power", RT5651_PWR_DIG2, 99840bc18a2SBard Liao RT5651_PWR_DAC_STO1_F_BIT, 0, NULL, 0), 99940bc18a2SBard Liao SND_SOC_DAPM_SUPPLY("Stero2 DAC Power", RT5651_PWR_DIG2, 100040bc18a2SBard Liao RT5651_PWR_DAC_STO2_F_BIT, 0, NULL, 0), 100140bc18a2SBard Liao /* DAC Mixer */ 100240bc18a2SBard Liao SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0, 100340bc18a2SBard Liao rt5651_sto_dac_l_mix, 100440bc18a2SBard Liao ARRAY_SIZE(rt5651_sto_dac_l_mix)), 100540bc18a2SBard Liao SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0, 100640bc18a2SBard Liao rt5651_sto_dac_r_mix, 100740bc18a2SBard Liao ARRAY_SIZE(rt5651_sto_dac_r_mix)), 100840bc18a2SBard Liao SND_SOC_DAPM_MIXER("DD MIXL", SND_SOC_NOPM, 0, 0, 100940bc18a2SBard Liao rt5651_dd_dac_l_mix, 101040bc18a2SBard Liao ARRAY_SIZE(rt5651_dd_dac_l_mix)), 101140bc18a2SBard Liao SND_SOC_DAPM_MIXER("DD MIXR", SND_SOC_NOPM, 0, 0, 101240bc18a2SBard Liao rt5651_dd_dac_r_mix, 101340bc18a2SBard Liao ARRAY_SIZE(rt5651_dd_dac_r_mix)), 101440bc18a2SBard Liao 101540bc18a2SBard Liao /* DACs */ 101640bc18a2SBard Liao SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0), 101740bc18a2SBard Liao SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0), 101840bc18a2SBard Liao SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5651_PWR_DIG1, 101940bc18a2SBard Liao RT5651_PWR_DAC_L1_BIT, 0, NULL, 0), 102040bc18a2SBard Liao SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5651_PWR_DIG1, 102140bc18a2SBard Liao RT5651_PWR_DAC_R1_BIT, 0, NULL, 0), 102240bc18a2SBard Liao /* OUT Mixer */ 102340bc18a2SBard Liao SND_SOC_DAPM_MIXER("OUT MIXL", RT5651_PWR_MIXER, RT5651_PWR_OM_L_BIT, 102440bc18a2SBard Liao 0, rt5651_out_l_mix, ARRAY_SIZE(rt5651_out_l_mix)), 102540bc18a2SBard Liao SND_SOC_DAPM_MIXER("OUT MIXR", RT5651_PWR_MIXER, RT5651_PWR_OM_R_BIT, 102640bc18a2SBard Liao 0, rt5651_out_r_mix, ARRAY_SIZE(rt5651_out_r_mix)), 102740bc18a2SBard Liao /* Ouput Volume */ 102840bc18a2SBard Liao SND_SOC_DAPM_SWITCH("OUTVOL L", RT5651_PWR_VOL, 102940bc18a2SBard Liao RT5651_PWR_OV_L_BIT, 0, &outvol_l_control), 103040bc18a2SBard Liao SND_SOC_DAPM_SWITCH("OUTVOL R", RT5651_PWR_VOL, 103140bc18a2SBard Liao RT5651_PWR_OV_R_BIT, 0, &outvol_r_control), 103240bc18a2SBard Liao SND_SOC_DAPM_SWITCH("HPOVOL L", RT5651_PWR_VOL, 103340bc18a2SBard Liao RT5651_PWR_HV_L_BIT, 0, &hpovol_l_control), 103440bc18a2SBard Liao SND_SOC_DAPM_SWITCH("HPOVOL R", RT5651_PWR_VOL, 103540bc18a2SBard Liao RT5651_PWR_HV_R_BIT, 0, &hpovol_r_control), 103640bc18a2SBard Liao SND_SOC_DAPM_PGA("INL1", RT5651_PWR_VOL, 103740bc18a2SBard Liao RT5651_PWR_IN1_L_BIT, 0, NULL, 0), 103840bc18a2SBard Liao SND_SOC_DAPM_PGA("INR1", RT5651_PWR_VOL, 103940bc18a2SBard Liao RT5651_PWR_IN1_R_BIT, 0, NULL, 0), 104040bc18a2SBard Liao SND_SOC_DAPM_PGA("INL2", RT5651_PWR_VOL, 104140bc18a2SBard Liao RT5651_PWR_IN2_L_BIT, 0, NULL, 0), 104240bc18a2SBard Liao SND_SOC_DAPM_PGA("INR2", RT5651_PWR_VOL, 104340bc18a2SBard Liao RT5651_PWR_IN2_R_BIT, 0, NULL, 0), 104440bc18a2SBard Liao /* HPO/LOUT/Mono Mixer */ 104540bc18a2SBard Liao SND_SOC_DAPM_MIXER("HPOL MIX", SND_SOC_NOPM, 0, 0, 104640bc18a2SBard Liao rt5651_hpo_mix, ARRAY_SIZE(rt5651_hpo_mix)), 104740bc18a2SBard Liao SND_SOC_DAPM_MIXER("HPOR MIX", SND_SOC_NOPM, 0, 0, 104840bc18a2SBard Liao rt5651_hpo_mix, ARRAY_SIZE(rt5651_hpo_mix)), 104940bc18a2SBard Liao SND_SOC_DAPM_SUPPLY("HP L Amp", RT5651_PWR_ANLG1, 105040bc18a2SBard Liao RT5651_PWR_HP_L_BIT, 0, NULL, 0), 105140bc18a2SBard Liao SND_SOC_DAPM_SUPPLY("HP R Amp", RT5651_PWR_ANLG1, 105240bc18a2SBard Liao RT5651_PWR_HP_R_BIT, 0, NULL, 0), 105340bc18a2SBard Liao SND_SOC_DAPM_MIXER("LOUT MIX", RT5651_PWR_ANLG1, RT5651_PWR_LM_BIT, 0, 105440bc18a2SBard Liao rt5651_lout_mix, ARRAY_SIZE(rt5651_lout_mix)), 105540bc18a2SBard Liao 105640bc18a2SBard Liao SND_SOC_DAPM_SUPPLY("Amp Power", RT5651_PWR_ANLG1, 105740bc18a2SBard Liao RT5651_PWR_HA_BIT, 0, rt5651_amp_power_event, 105840bc18a2SBard Liao SND_SOC_DAPM_POST_PMU), 105940bc18a2SBard Liao SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, rt5651_hp_event, 106040bc18a2SBard Liao SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 106140bc18a2SBard Liao SND_SOC_DAPM_SWITCH("HPO L Playback", SND_SOC_NOPM, 0, 0, 106240bc18a2SBard Liao &hpo_l_mute_control), 106340bc18a2SBard Liao SND_SOC_DAPM_SWITCH("HPO R Playback", SND_SOC_NOPM, 0, 0, 106440bc18a2SBard Liao &hpo_r_mute_control), 106540bc18a2SBard Liao SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0, 106640bc18a2SBard Liao &lout_l_mute_control), 106740bc18a2SBard Liao SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0, 106840bc18a2SBard Liao &lout_r_mute_control), 106940bc18a2SBard Liao SND_SOC_DAPM_POST("HP Post", rt5651_hp_post_event), 107040bc18a2SBard Liao 107140bc18a2SBard Liao /* Output Lines */ 107240bc18a2SBard Liao SND_SOC_DAPM_OUTPUT("HPOL"), 107340bc18a2SBard Liao SND_SOC_DAPM_OUTPUT("HPOR"), 107440bc18a2SBard Liao SND_SOC_DAPM_OUTPUT("LOUTL"), 107540bc18a2SBard Liao SND_SOC_DAPM_OUTPUT("LOUTR"), 107640bc18a2SBard Liao SND_SOC_DAPM_OUTPUT("PDML"), 107740bc18a2SBard Liao SND_SOC_DAPM_OUTPUT("PDMR"), 107840bc18a2SBard Liao }; 107940bc18a2SBard Liao 108040bc18a2SBard Liao static const struct snd_soc_dapm_route rt5651_dapm_routes[] = { 108140bc18a2SBard Liao {"Stero1 DAC Power", NULL, "STO1 DAC ASRC"}, 108240bc18a2SBard Liao {"Stero2 DAC Power", NULL, "STO2 DAC ASRC"}, 108340bc18a2SBard Liao {"I2S1", NULL, "I2S1 ASRC"}, 108440bc18a2SBard Liao {"I2S2", NULL, "I2S2 ASRC"}, 108540bc18a2SBard Liao 108640bc18a2SBard Liao {"IN1P", NULL, "LDO"}, 108740bc18a2SBard Liao {"IN2P", NULL, "LDO"}, 108840bc18a2SBard Liao {"IN3P", NULL, "LDO"}, 108940bc18a2SBard Liao 109040bc18a2SBard Liao {"IN1P", NULL, "MIC1"}, 109140bc18a2SBard Liao {"IN2P", NULL, "MIC2"}, 109240bc18a2SBard Liao {"IN2N", NULL, "MIC2"}, 109340bc18a2SBard Liao {"IN3P", NULL, "MIC3"}, 109440bc18a2SBard Liao 109540bc18a2SBard Liao {"BST1", NULL, "IN1P"}, 109640bc18a2SBard Liao {"BST2", NULL, "IN2P"}, 109740bc18a2SBard Liao {"BST2", NULL, "IN2N"}, 109840bc18a2SBard Liao {"BST3", NULL, "IN3P"}, 109940bc18a2SBard Liao 110040bc18a2SBard Liao {"INL1 VOL", NULL, "IN2P"}, 110140bc18a2SBard Liao {"INR1 VOL", NULL, "IN2N"}, 110240bc18a2SBard Liao 110340bc18a2SBard Liao {"RECMIXL", "INL1 Switch", "INL1 VOL"}, 110440bc18a2SBard Liao {"RECMIXL", "BST3 Switch", "BST3"}, 110540bc18a2SBard Liao {"RECMIXL", "BST2 Switch", "BST2"}, 110640bc18a2SBard Liao {"RECMIXL", "BST1 Switch", "BST1"}, 110740bc18a2SBard Liao 110840bc18a2SBard Liao {"RECMIXR", "INR1 Switch", "INR1 VOL"}, 110940bc18a2SBard Liao {"RECMIXR", "BST3 Switch", "BST3"}, 111040bc18a2SBard Liao {"RECMIXR", "BST2 Switch", "BST2"}, 111140bc18a2SBard Liao {"RECMIXR", "BST1 Switch", "BST1"}, 111240bc18a2SBard Liao 111340bc18a2SBard Liao {"ADC L", NULL, "RECMIXL"}, 111440bc18a2SBard Liao {"ADC L", NULL, "ADC L Power"}, 111540bc18a2SBard Liao {"ADC R", NULL, "RECMIXR"}, 111640bc18a2SBard Liao {"ADC R", NULL, "ADC R Power"}, 111740bc18a2SBard Liao 111840bc18a2SBard Liao {"DMIC L1", NULL, "DMIC CLK"}, 111940bc18a2SBard Liao {"DMIC R1", NULL, "DMIC CLK"}, 112040bc18a2SBard Liao 112140bc18a2SBard Liao {"Stereo1 ADC L2 Mux", "DMIC", "DMIC L1"}, 112240bc18a2SBard Liao {"Stereo1 ADC L2 Mux", "DD MIX", "DD MIXL"}, 112340bc18a2SBard Liao {"Stereo1 ADC L1 Mux", "ADC", "ADC L"}, 112440bc18a2SBard Liao {"Stereo1 ADC L1 Mux", "DD MIX", "DD MIXL"}, 112540bc18a2SBard Liao 112640bc18a2SBard Liao {"Stereo1 ADC R1 Mux", "ADC", "ADC R"}, 112740bc18a2SBard Liao {"Stereo1 ADC R1 Mux", "DD MIX", "DD MIXR"}, 112840bc18a2SBard Liao {"Stereo1 ADC R2 Mux", "DMIC", "DMIC R1"}, 112940bc18a2SBard Liao {"Stereo1 ADC R2 Mux", "DD MIX", "DD MIXR"}, 113040bc18a2SBard Liao 113140bc18a2SBard Liao {"Stereo2 ADC L2 Mux", "DMIC L", "DMIC L1"}, 113240bc18a2SBard Liao {"Stereo2 ADC L2 Mux", "DD MIXL", "DD MIXL"}, 113340bc18a2SBard Liao {"Stereo2 ADC L1 Mux", "DD MIXL", "DD MIXL"}, 113440bc18a2SBard Liao {"Stereo2 ADC L1 Mux", "ADCL", "ADC L"}, 113540bc18a2SBard Liao 113640bc18a2SBard Liao {"Stereo2 ADC R1 Mux", "DD MIXR", "DD MIXR"}, 113740bc18a2SBard Liao {"Stereo2 ADC R1 Mux", "ADCR", "ADC R"}, 113840bc18a2SBard Liao {"Stereo2 ADC R2 Mux", "DMIC R", "DMIC R1"}, 113940bc18a2SBard Liao {"Stereo2 ADC R2 Mux", "DD MIXR", "DD MIXR"}, 114040bc18a2SBard Liao 114140bc18a2SBard Liao {"Stereo1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux"}, 114240bc18a2SBard Liao {"Stereo1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux"}, 114340bc18a2SBard Liao {"Stereo1 ADC MIXL", NULL, "Stereo1 Filter"}, 114440bc18a2SBard Liao {"Stereo1 Filter", NULL, "ADC ASRC"}, 114540bc18a2SBard Liao 114640bc18a2SBard Liao {"Stereo1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux"}, 114740bc18a2SBard Liao {"Stereo1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux"}, 114840bc18a2SBard Liao {"Stereo1 ADC MIXR", NULL, "Stereo1 Filter"}, 114940bc18a2SBard Liao 115040bc18a2SBard Liao {"Stereo2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux"}, 115140bc18a2SBard Liao {"Stereo2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux"}, 115240bc18a2SBard Liao {"Stereo2 ADC MIXL", NULL, "Stereo2 Filter"}, 115340bc18a2SBard Liao {"Stereo2 Filter", NULL, "ADC ASRC"}, 115440bc18a2SBard Liao 115540bc18a2SBard Liao {"Stereo2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux"}, 115640bc18a2SBard Liao {"Stereo2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux"}, 115740bc18a2SBard Liao {"Stereo2 ADC MIXR", NULL, "Stereo2 Filter"}, 115840bc18a2SBard Liao 115940bc18a2SBard Liao {"IF1 ADC2", NULL, "Stereo2 ADC MIXL"}, 116040bc18a2SBard Liao {"IF1 ADC2", NULL, "Stereo2 ADC MIXR"}, 116140bc18a2SBard Liao {"IF1 ADC1", NULL, "Stereo1 ADC MIXL"}, 116240bc18a2SBard Liao {"IF1 ADC1", NULL, "Stereo1 ADC MIXR"}, 116340bc18a2SBard Liao 116440bc18a2SBard Liao {"IF1 ADC1", NULL, "I2S1"}, 116540bc18a2SBard Liao 116640bc18a2SBard Liao {"IF2 ADC", "IF1 ADC1", "IF1 ADC1"}, 116740bc18a2SBard Liao {"IF2 ADC", "IF1 ADC2", "IF1 ADC2"}, 116840bc18a2SBard Liao {"IF2 ADC", NULL, "I2S2"}, 116940bc18a2SBard Liao 117040bc18a2SBard Liao {"AIF1TX", NULL, "IF1 ADC1"}, 117140bc18a2SBard Liao {"AIF1TX", NULL, "IF1 ADC2"}, 117240bc18a2SBard Liao {"AIF2TX", NULL, "IF2 ADC"}, 117340bc18a2SBard Liao 117440bc18a2SBard Liao {"IF1 DAC", NULL, "AIF1RX"}, 117540bc18a2SBard Liao {"IF1 DAC", NULL, "I2S1"}, 117640bc18a2SBard Liao {"IF2 DAC", NULL, "AIF2RX"}, 117740bc18a2SBard Liao {"IF2 DAC", NULL, "I2S2"}, 117840bc18a2SBard Liao 117940bc18a2SBard Liao {"IF1 DAC1 L", NULL, "IF1 DAC"}, 118040bc18a2SBard Liao {"IF1 DAC1 R", NULL, "IF1 DAC"}, 118140bc18a2SBard Liao {"IF1 DAC2 L", NULL, "IF1 DAC"}, 118240bc18a2SBard Liao {"IF1 DAC2 R", NULL, "IF1 DAC"}, 118340bc18a2SBard Liao {"IF2 DAC L", NULL, "IF2 DAC"}, 118440bc18a2SBard Liao {"IF2 DAC R", NULL, "IF2 DAC"}, 118540bc18a2SBard Liao 118640bc18a2SBard Liao {"DAC MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL"}, 118740bc18a2SBard Liao {"DAC MIXL", "INF1 Switch", "IF1 DAC1 L"}, 118840bc18a2SBard Liao {"DAC MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR"}, 118940bc18a2SBard Liao {"DAC MIXR", "INF1 Switch", "IF1 DAC1 R"}, 119040bc18a2SBard Liao 119140bc18a2SBard Liao {"Audio DSP", NULL, "DAC MIXL"}, 119240bc18a2SBard Liao {"Audio DSP", NULL, "DAC MIXR"}, 119340bc18a2SBard Liao 119440bc18a2SBard Liao {"DAC L2 Mux", "IF1", "IF1 DAC2 L"}, 119540bc18a2SBard Liao {"DAC L2 Mux", "IF2", "IF2 DAC L"}, 119640bc18a2SBard Liao {"DAC L2 Volume", NULL, "DAC L2 Mux"}, 119740bc18a2SBard Liao 119840bc18a2SBard Liao {"DAC R2 Mux", "IF1", "IF1 DAC2 R"}, 119940bc18a2SBard Liao {"DAC R2 Mux", "IF2", "IF2 DAC R"}, 120040bc18a2SBard Liao {"DAC R2 Volume", NULL, "DAC R2 Mux"}, 120140bc18a2SBard Liao 120240bc18a2SBard Liao {"Stereo DAC MIXL", "DAC L1 Switch", "Audio DSP"}, 120340bc18a2SBard Liao {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume"}, 120440bc18a2SBard Liao {"Stereo DAC MIXL", "DAC R1 Switch", "DAC MIXR"}, 120540bc18a2SBard Liao {"Stereo DAC MIXL", NULL, "Stero1 DAC Power"}, 120640bc18a2SBard Liao {"Stereo DAC MIXL", NULL, "Stero2 DAC Power"}, 120740bc18a2SBard Liao {"Stereo DAC MIXR", "DAC R1 Switch", "Audio DSP"}, 120840bc18a2SBard Liao {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume"}, 120940bc18a2SBard Liao {"Stereo DAC MIXR", "DAC L1 Switch", "DAC MIXL"}, 121040bc18a2SBard Liao {"Stereo DAC MIXR", NULL, "Stero1 DAC Power"}, 121140bc18a2SBard Liao {"Stereo DAC MIXR", NULL, "Stero2 DAC Power"}, 121240bc18a2SBard Liao 121340bc18a2SBard Liao {"PDM L Mux", "Stereo DAC MIX", "Stereo DAC MIXL"}, 121440bc18a2SBard Liao {"PDM L Mux", "DD MIX", "DAC MIXL"}, 121540bc18a2SBard Liao {"PDM R Mux", "Stereo DAC MIX", "Stereo DAC MIXR"}, 121640bc18a2SBard Liao {"PDM R Mux", "DD MIX", "DAC MIXR"}, 121740bc18a2SBard Liao 121840bc18a2SBard Liao {"DAC L1", NULL, "Stereo DAC MIXL"}, 121940bc18a2SBard Liao {"DAC L1", NULL, "DAC L1 Power"}, 122040bc18a2SBard Liao {"DAC R1", NULL, "Stereo DAC MIXR"}, 122140bc18a2SBard Liao {"DAC R1", NULL, "DAC R1 Power"}, 122240bc18a2SBard Liao 122340bc18a2SBard Liao {"DD MIXL", "DAC L1 Switch", "DAC MIXL"}, 122440bc18a2SBard Liao {"DD MIXL", "DAC L2 Switch", "DAC L2 Volume"}, 122540bc18a2SBard Liao {"DD MIXL", "DAC R2 Switch", "DAC R2 Volume"}, 122640bc18a2SBard Liao {"DD MIXL", NULL, "Stero2 DAC Power"}, 122740bc18a2SBard Liao 122840bc18a2SBard Liao {"DD MIXR", "DAC R1 Switch", "DAC MIXR"}, 122940bc18a2SBard Liao {"DD MIXR", "DAC R2 Switch", "DAC R2 Volume"}, 123040bc18a2SBard Liao {"DD MIXR", "DAC L2 Switch", "DAC L2 Volume"}, 123140bc18a2SBard Liao {"DD MIXR", NULL, "Stero2 DAC Power"}, 123240bc18a2SBard Liao 123340bc18a2SBard Liao {"OUT MIXL", "BST1 Switch", "BST1"}, 123440bc18a2SBard Liao {"OUT MIXL", "BST2 Switch", "BST2"}, 123540bc18a2SBard Liao {"OUT MIXL", "INL1 Switch", "INL1 VOL"}, 123640bc18a2SBard Liao {"OUT MIXL", "REC MIXL Switch", "RECMIXL"}, 123740bc18a2SBard Liao {"OUT MIXL", "DAC L1 Switch", "DAC L1"}, 123840bc18a2SBard Liao 123940bc18a2SBard Liao {"OUT MIXR", "BST2 Switch", "BST2"}, 124040bc18a2SBard Liao {"OUT MIXR", "BST1 Switch", "BST1"}, 124140bc18a2SBard Liao {"OUT MIXR", "INR1 Switch", "INR1 VOL"}, 124240bc18a2SBard Liao {"OUT MIXR", "REC MIXR Switch", "RECMIXR"}, 124340bc18a2SBard Liao {"OUT MIXR", "DAC R1 Switch", "DAC R1"}, 124440bc18a2SBard Liao 124540bc18a2SBard Liao {"HPOVOL L", "Switch", "OUT MIXL"}, 124640bc18a2SBard Liao {"HPOVOL R", "Switch", "OUT MIXR"}, 124740bc18a2SBard Liao {"OUTVOL L", "Switch", "OUT MIXL"}, 124840bc18a2SBard Liao {"OUTVOL R", "Switch", "OUT MIXR"}, 124940bc18a2SBard Liao 125040bc18a2SBard Liao {"HPOL MIX", "HPO MIX DAC1 Switch", "DAC L1"}, 125140bc18a2SBard Liao {"HPOL MIX", "HPO MIX HPVOL Switch", "HPOVOL L"}, 125240bc18a2SBard Liao {"HPOL MIX", NULL, "HP L Amp"}, 125340bc18a2SBard Liao {"HPOR MIX", "HPO MIX DAC1 Switch", "DAC R1"}, 125440bc18a2SBard Liao {"HPOR MIX", "HPO MIX HPVOL Switch", "HPOVOL R"}, 125540bc18a2SBard Liao {"HPOR MIX", NULL, "HP R Amp"}, 125640bc18a2SBard Liao 125740bc18a2SBard Liao {"LOUT MIX", "DAC L1 Switch", "DAC L1"}, 125840bc18a2SBard Liao {"LOUT MIX", "DAC R1 Switch", "DAC R1"}, 125940bc18a2SBard Liao {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"}, 126040bc18a2SBard Liao {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"}, 126140bc18a2SBard Liao 126240bc18a2SBard Liao {"HP Amp", NULL, "HPOL MIX"}, 126340bc18a2SBard Liao {"HP Amp", NULL, "HPOR MIX"}, 126440bc18a2SBard Liao {"HP Amp", NULL, "Amp Power"}, 126540bc18a2SBard Liao {"HPO L Playback", "Switch", "HP Amp"}, 126640bc18a2SBard Liao {"HPO R Playback", "Switch", "HP Amp"}, 126740bc18a2SBard Liao {"HPOL", NULL, "HPO L Playback"}, 126840bc18a2SBard Liao {"HPOR", NULL, "HPO R Playback"}, 126940bc18a2SBard Liao 127040bc18a2SBard Liao {"LOUT L Playback", "Switch", "LOUT MIX"}, 127140bc18a2SBard Liao {"LOUT R Playback", "Switch", "LOUT MIX"}, 127240bc18a2SBard Liao {"LOUTL", NULL, "LOUT L Playback"}, 127340bc18a2SBard Liao {"LOUTL", NULL, "Amp Power"}, 127440bc18a2SBard Liao {"LOUTR", NULL, "LOUT R Playback"}, 127540bc18a2SBard Liao {"LOUTR", NULL, "Amp Power"}, 127640bc18a2SBard Liao 127740bc18a2SBard Liao {"PDML", NULL, "PDM L Mux"}, 127840bc18a2SBard Liao {"PDMR", NULL, "PDM R Mux"}, 127940bc18a2SBard Liao }; 128040bc18a2SBard Liao 128140bc18a2SBard Liao static int rt5651_hw_params(struct snd_pcm_substream *substream, 128240bc18a2SBard Liao struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 128340bc18a2SBard Liao { 128417b52010SKuninori Morimoto struct snd_soc_component *component = dai->component; 128517b52010SKuninori Morimoto struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component); 128640bc18a2SBard Liao unsigned int val_len = 0, val_clk, mask_clk; 128740bc18a2SBard Liao int pre_div, bclk_ms, frame_size; 128840bc18a2SBard Liao 128940bc18a2SBard Liao rt5651->lrck[dai->id] = params_rate(params); 1290d92950e7SOder Chiou pre_div = rl6231_get_clk_info(rt5651->sysclk, rt5651->lrck[dai->id]); 129140bc18a2SBard Liao 129240bc18a2SBard Liao if (pre_div < 0) { 129317b52010SKuninori Morimoto dev_err(component->dev, "Unsupported clock setting\n"); 129440bc18a2SBard Liao return -EINVAL; 129540bc18a2SBard Liao } 129640bc18a2SBard Liao frame_size = snd_soc_params_to_frame_size(params); 129740bc18a2SBard Liao if (frame_size < 0) { 129817b52010SKuninori Morimoto dev_err(component->dev, "Unsupported frame size: %d\n", frame_size); 129940bc18a2SBard Liao return -EINVAL; 130040bc18a2SBard Liao } 130140bc18a2SBard Liao bclk_ms = frame_size > 32 ? 1 : 0; 130240bc18a2SBard Liao rt5651->bclk[dai->id] = rt5651->lrck[dai->id] * (32 << bclk_ms); 130340bc18a2SBard Liao 130440bc18a2SBard Liao dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n", 130540bc18a2SBard Liao rt5651->bclk[dai->id], rt5651->lrck[dai->id]); 130640bc18a2SBard Liao dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", 130740bc18a2SBard Liao bclk_ms, pre_div, dai->id); 130840bc18a2SBard Liao 1309794f33d2SMark Brown switch (params_width(params)) { 1310794f33d2SMark Brown case 16: 131140bc18a2SBard Liao break; 1312794f33d2SMark Brown case 20: 131340bc18a2SBard Liao val_len |= RT5651_I2S_DL_20; 131440bc18a2SBard Liao break; 1315794f33d2SMark Brown case 24: 131640bc18a2SBard Liao val_len |= RT5651_I2S_DL_24; 131740bc18a2SBard Liao break; 1318794f33d2SMark Brown case 8: 131940bc18a2SBard Liao val_len |= RT5651_I2S_DL_8; 132040bc18a2SBard Liao break; 132140bc18a2SBard Liao default: 132240bc18a2SBard Liao return -EINVAL; 132340bc18a2SBard Liao } 132440bc18a2SBard Liao 132540bc18a2SBard Liao switch (dai->id) { 132640bc18a2SBard Liao case RT5651_AIF1: 132740bc18a2SBard Liao mask_clk = RT5651_I2S_PD1_MASK; 132840bc18a2SBard Liao val_clk = pre_div << RT5651_I2S_PD1_SFT; 132917b52010SKuninori Morimoto snd_soc_component_update_bits(component, RT5651_I2S1_SDP, 133040bc18a2SBard Liao RT5651_I2S_DL_MASK, val_len); 133117b52010SKuninori Morimoto snd_soc_component_update_bits(component, RT5651_ADDA_CLK1, mask_clk, val_clk); 133240bc18a2SBard Liao break; 133340bc18a2SBard Liao case RT5651_AIF2: 133440bc18a2SBard Liao mask_clk = RT5651_I2S_BCLK_MS2_MASK | RT5651_I2S_PD2_MASK; 133540bc18a2SBard Liao val_clk = pre_div << RT5651_I2S_PD2_SFT; 133617b52010SKuninori Morimoto snd_soc_component_update_bits(component, RT5651_I2S2_SDP, 133740bc18a2SBard Liao RT5651_I2S_DL_MASK, val_len); 133817b52010SKuninori Morimoto snd_soc_component_update_bits(component, RT5651_ADDA_CLK1, mask_clk, val_clk); 133940bc18a2SBard Liao break; 134040bc18a2SBard Liao default: 134117b52010SKuninori Morimoto dev_err(component->dev, "Wrong dai->id: %d\n", dai->id); 134240bc18a2SBard Liao return -EINVAL; 134340bc18a2SBard Liao } 134440bc18a2SBard Liao 134540bc18a2SBard Liao return 0; 134640bc18a2SBard Liao } 134740bc18a2SBard Liao 134840bc18a2SBard Liao static int rt5651_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) 134940bc18a2SBard Liao { 135017b52010SKuninori Morimoto struct snd_soc_component *component = dai->component; 135117b52010SKuninori Morimoto struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component); 135240bc18a2SBard Liao unsigned int reg_val = 0; 135340bc18a2SBard Liao 135440bc18a2SBard Liao switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 135540bc18a2SBard Liao case SND_SOC_DAIFMT_CBM_CFM: 135640bc18a2SBard Liao rt5651->master[dai->id] = 1; 135740bc18a2SBard Liao break; 135840bc18a2SBard Liao case SND_SOC_DAIFMT_CBS_CFS: 135940bc18a2SBard Liao reg_val |= RT5651_I2S_MS_S; 136040bc18a2SBard Liao rt5651->master[dai->id] = 0; 136140bc18a2SBard Liao break; 136240bc18a2SBard Liao default: 136340bc18a2SBard Liao return -EINVAL; 136440bc18a2SBard Liao } 136540bc18a2SBard Liao 136640bc18a2SBard Liao switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 136740bc18a2SBard Liao case SND_SOC_DAIFMT_NB_NF: 136840bc18a2SBard Liao break; 136940bc18a2SBard Liao case SND_SOC_DAIFMT_IB_NF: 137040bc18a2SBard Liao reg_val |= RT5651_I2S_BP_INV; 137140bc18a2SBard Liao break; 137240bc18a2SBard Liao default: 137340bc18a2SBard Liao return -EINVAL; 137440bc18a2SBard Liao } 137540bc18a2SBard Liao 137640bc18a2SBard Liao switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 137740bc18a2SBard Liao case SND_SOC_DAIFMT_I2S: 137840bc18a2SBard Liao break; 137940bc18a2SBard Liao case SND_SOC_DAIFMT_LEFT_J: 138040bc18a2SBard Liao reg_val |= RT5651_I2S_DF_LEFT; 138140bc18a2SBard Liao break; 138240bc18a2SBard Liao case SND_SOC_DAIFMT_DSP_A: 138340bc18a2SBard Liao reg_val |= RT5651_I2S_DF_PCM_A; 138440bc18a2SBard Liao break; 138540bc18a2SBard Liao case SND_SOC_DAIFMT_DSP_B: 138640bc18a2SBard Liao reg_val |= RT5651_I2S_DF_PCM_B; 138740bc18a2SBard Liao break; 138840bc18a2SBard Liao default: 138940bc18a2SBard Liao return -EINVAL; 139040bc18a2SBard Liao } 139140bc18a2SBard Liao 139240bc18a2SBard Liao switch (dai->id) { 139340bc18a2SBard Liao case RT5651_AIF1: 139417b52010SKuninori Morimoto snd_soc_component_update_bits(component, RT5651_I2S1_SDP, 139540bc18a2SBard Liao RT5651_I2S_MS_MASK | RT5651_I2S_BP_MASK | 139640bc18a2SBard Liao RT5651_I2S_DF_MASK, reg_val); 139740bc18a2SBard Liao break; 139840bc18a2SBard Liao case RT5651_AIF2: 139917b52010SKuninori Morimoto snd_soc_component_update_bits(component, RT5651_I2S2_SDP, 140040bc18a2SBard Liao RT5651_I2S_MS_MASK | RT5651_I2S_BP_MASK | 140140bc18a2SBard Liao RT5651_I2S_DF_MASK, reg_val); 140240bc18a2SBard Liao break; 140340bc18a2SBard Liao default: 140417b52010SKuninori Morimoto dev_err(component->dev, "Wrong dai->id: %d\n", dai->id); 140540bc18a2SBard Liao return -EINVAL; 140640bc18a2SBard Liao } 140740bc18a2SBard Liao return 0; 140840bc18a2SBard Liao } 140940bc18a2SBard Liao 141040bc18a2SBard Liao static int rt5651_set_dai_sysclk(struct snd_soc_dai *dai, 141140bc18a2SBard Liao int clk_id, unsigned int freq, int dir) 141240bc18a2SBard Liao { 141317b52010SKuninori Morimoto struct snd_soc_component *component = dai->component; 141417b52010SKuninori Morimoto struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component); 141540bc18a2SBard Liao unsigned int reg_val = 0; 1416d082174cSHans de Goede unsigned int pll_bit = 0; 141740bc18a2SBard Liao 141840bc18a2SBard Liao if (freq == rt5651->sysclk && clk_id == rt5651->sysclk_src) 141940bc18a2SBard Liao return 0; 142040bc18a2SBard Liao 142140bc18a2SBard Liao switch (clk_id) { 142240bc18a2SBard Liao case RT5651_SCLK_S_MCLK: 142340bc18a2SBard Liao reg_val |= RT5651_SCLK_SRC_MCLK; 142440bc18a2SBard Liao break; 142540bc18a2SBard Liao case RT5651_SCLK_S_PLL1: 142640bc18a2SBard Liao reg_val |= RT5651_SCLK_SRC_PLL1; 1427d082174cSHans de Goede pll_bit |= RT5651_PWR_PLL; 142840bc18a2SBard Liao break; 142940bc18a2SBard Liao case RT5651_SCLK_S_RCCLK: 143040bc18a2SBard Liao reg_val |= RT5651_SCLK_SRC_RCCLK; 143140bc18a2SBard Liao break; 143240bc18a2SBard Liao default: 143317b52010SKuninori Morimoto dev_err(component->dev, "Invalid clock id (%d)\n", clk_id); 143440bc18a2SBard Liao return -EINVAL; 143540bc18a2SBard Liao } 1436d082174cSHans de Goede snd_soc_component_update_bits(component, RT5651_PWR_ANLG2, 1437d082174cSHans de Goede RT5651_PWR_PLL, pll_bit); 143817b52010SKuninori Morimoto snd_soc_component_update_bits(component, RT5651_GLB_CLK, 143940bc18a2SBard Liao RT5651_SCLK_SRC_MASK, reg_val); 144040bc18a2SBard Liao rt5651->sysclk = freq; 144140bc18a2SBard Liao rt5651->sysclk_src = clk_id; 144240bc18a2SBard Liao 144340bc18a2SBard Liao dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id); 144440bc18a2SBard Liao 144540bc18a2SBard Liao return 0; 144640bc18a2SBard Liao } 144740bc18a2SBard Liao 144840bc18a2SBard Liao static int rt5651_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, 144940bc18a2SBard Liao unsigned int freq_in, unsigned int freq_out) 145040bc18a2SBard Liao { 145117b52010SKuninori Morimoto struct snd_soc_component *component = dai->component; 145217b52010SKuninori Morimoto struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component); 145371c7a2d6SOder Chiou struct rl6231_pll_code pll_code; 145440bc18a2SBard Liao int ret; 145540bc18a2SBard Liao 145640bc18a2SBard Liao if (source == rt5651->pll_src && freq_in == rt5651->pll_in && 145740bc18a2SBard Liao freq_out == rt5651->pll_out) 145840bc18a2SBard Liao return 0; 145940bc18a2SBard Liao 146040bc18a2SBard Liao if (!freq_in || !freq_out) { 146117b52010SKuninori Morimoto dev_dbg(component->dev, "PLL disabled\n"); 146240bc18a2SBard Liao 146340bc18a2SBard Liao rt5651->pll_in = 0; 146440bc18a2SBard Liao rt5651->pll_out = 0; 146517b52010SKuninori Morimoto snd_soc_component_update_bits(component, RT5651_GLB_CLK, 146640bc18a2SBard Liao RT5651_SCLK_SRC_MASK, RT5651_SCLK_SRC_MCLK); 146740bc18a2SBard Liao return 0; 146840bc18a2SBard Liao } 146940bc18a2SBard Liao 147040bc18a2SBard Liao switch (source) { 147140bc18a2SBard Liao case RT5651_PLL1_S_MCLK: 147217b52010SKuninori Morimoto snd_soc_component_update_bits(component, RT5651_GLB_CLK, 147340bc18a2SBard Liao RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_MCLK); 147440bc18a2SBard Liao break; 147540bc18a2SBard Liao case RT5651_PLL1_S_BCLK1: 147617b52010SKuninori Morimoto snd_soc_component_update_bits(component, RT5651_GLB_CLK, 147740bc18a2SBard Liao RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_BCLK1); 147840bc18a2SBard Liao break; 147940bc18a2SBard Liao case RT5651_PLL1_S_BCLK2: 148017b52010SKuninori Morimoto snd_soc_component_update_bits(component, RT5651_GLB_CLK, 148140bc18a2SBard Liao RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_BCLK2); 148240bc18a2SBard Liao break; 148340bc18a2SBard Liao default: 148417b52010SKuninori Morimoto dev_err(component->dev, "Unknown PLL source %d\n", source); 148540bc18a2SBard Liao return -EINVAL; 148640bc18a2SBard Liao } 148740bc18a2SBard Liao 148871c7a2d6SOder Chiou ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); 148940bc18a2SBard Liao if (ret < 0) { 1490a4db95b2SColin Ian King dev_err(component->dev, "Unsupported input clock %d\n", freq_in); 149140bc18a2SBard Liao return ret; 149240bc18a2SBard Liao } 149340bc18a2SBard Liao 149417b52010SKuninori Morimoto dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n", 149571c7a2d6SOder Chiou pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code), 149671c7a2d6SOder Chiou pll_code.n_code, pll_code.k_code); 149740bc18a2SBard Liao 149817b52010SKuninori Morimoto snd_soc_component_write(component, RT5651_PLL_CTRL1, 149971c7a2d6SOder Chiou pll_code.n_code << RT5651_PLL_N_SFT | pll_code.k_code); 150017b52010SKuninori Morimoto snd_soc_component_write(component, RT5651_PLL_CTRL2, 150133eaffe3SPierre-Louis Bossart ((pll_code.m_bp ? 0 : pll_code.m_code) << RT5651_PLL_M_SFT) | 150233eaffe3SPierre-Louis Bossart (pll_code.m_bp << RT5651_PLL_M_BP_SFT)); 150340bc18a2SBard Liao 150440bc18a2SBard Liao rt5651->pll_in = freq_in; 150540bc18a2SBard Liao rt5651->pll_out = freq_out; 150640bc18a2SBard Liao rt5651->pll_src = source; 150740bc18a2SBard Liao 150840bc18a2SBard Liao return 0; 150940bc18a2SBard Liao } 151040bc18a2SBard Liao 151117b52010SKuninori Morimoto static int rt5651_set_bias_level(struct snd_soc_component *component, 151240bc18a2SBard Liao enum snd_soc_bias_level level) 151340bc18a2SBard Liao { 151440bc18a2SBard Liao switch (level) { 151540bc18a2SBard Liao case SND_SOC_BIAS_PREPARE: 151617b52010SKuninori Morimoto if (SND_SOC_BIAS_STANDBY == snd_soc_component_get_bias_level(component)) { 1517467a2553SKuninori Morimoto if (snd_soc_component_read(component, RT5651_PLL_MODE_1) & 0x9200) 1518984c803fSHans de Goede snd_soc_component_update_bits(component, RT5651_D_MISC, 1519984c803fSHans de Goede 0xc00, 0xc00); 1520984c803fSHans de Goede } 1521984c803fSHans de Goede break; 1522984c803fSHans de Goede case SND_SOC_BIAS_STANDBY: 1523984c803fSHans de Goede if (SND_SOC_BIAS_OFF == snd_soc_component_get_bias_level(component)) { 152417b52010SKuninori Morimoto snd_soc_component_update_bits(component, RT5651_PWR_ANLG1, 152540bc18a2SBard Liao RT5651_PWR_VREF1 | RT5651_PWR_MB | 152640bc18a2SBard Liao RT5651_PWR_BG | RT5651_PWR_VREF2, 152740bc18a2SBard Liao RT5651_PWR_VREF1 | RT5651_PWR_MB | 152840bc18a2SBard Liao RT5651_PWR_BG | RT5651_PWR_VREF2); 152940bc18a2SBard Liao usleep_range(10000, 15000); 153017b52010SKuninori Morimoto snd_soc_component_update_bits(component, RT5651_PWR_ANLG1, 153140bc18a2SBard Liao RT5651_PWR_FV1 | RT5651_PWR_FV2, 153240bc18a2SBard Liao RT5651_PWR_FV1 | RT5651_PWR_FV2); 153317b52010SKuninori Morimoto snd_soc_component_update_bits(component, RT5651_D_MISC, 0x1, 0x1); 153440bc18a2SBard Liao } 153540bc18a2SBard Liao break; 153640bc18a2SBard Liao 1537984c803fSHans de Goede case SND_SOC_BIAS_OFF: 153817b52010SKuninori Morimoto snd_soc_component_write(component, RT5651_D_MISC, 0x0010); 153917b52010SKuninori Morimoto snd_soc_component_write(component, RT5651_PWR_DIG1, 0x0000); 154017b52010SKuninori Morimoto snd_soc_component_write(component, RT5651_PWR_DIG2, 0x0000); 154117b52010SKuninori Morimoto snd_soc_component_write(component, RT5651_PWR_VOL, 0x0000); 154217b52010SKuninori Morimoto snd_soc_component_write(component, RT5651_PWR_MIXER, 0x0000); 1543bba4e685SHans de Goede /* Do not touch the LDO voltage select bits on bias-off */ 1544bba4e685SHans de Goede snd_soc_component_update_bits(component, RT5651_PWR_ANLG1, 1545bba4e685SHans de Goede ~RT5651_PWR_LDO_DVO_MASK, 0); 1546887fcc6fSHans de Goede /* Leave PLL1 and jack-detect power as is, all others off */ 1547887fcc6fSHans de Goede snd_soc_component_update_bits(component, RT5651_PWR_ANLG2, 1548887fcc6fSHans de Goede ~(RT5651_PWR_PLL | RT5651_PWR_JD_M), 0); 154940bc18a2SBard Liao break; 155040bc18a2SBard Liao 155140bc18a2SBard Liao default: 155240bc18a2SBard Liao break; 155340bc18a2SBard Liao } 155440bc18a2SBard Liao 155540bc18a2SBard Liao return 0; 155640bc18a2SBard Liao } 155740bc18a2SBard Liao 15581310e737SHans de Goede static void rt5651_enable_micbias1_for_ovcd(struct snd_soc_component *component) 155940bc18a2SBard Liao { 15601310e737SHans de Goede struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 156140bc18a2SBard Liao 15621310e737SHans de Goede snd_soc_dapm_mutex_lock(dapm); 15631310e737SHans de Goede snd_soc_dapm_force_enable_pin_unlocked(dapm, "LDO"); 15641310e737SHans de Goede snd_soc_dapm_force_enable_pin_unlocked(dapm, "micbias1"); 15654b4a373cSHans de Goede /* OVCD is unreliable when used with RCCLK as sysclk-source */ 15664b4a373cSHans de Goede snd_soc_dapm_force_enable_pin_unlocked(dapm, "Platform Clock"); 15671310e737SHans de Goede snd_soc_dapm_sync_unlocked(dapm); 15681310e737SHans de Goede snd_soc_dapm_mutex_unlock(dapm); 156980bbe4a3SCarlo Caione } 157080bbe4a3SCarlo Caione 15711310e737SHans de Goede static void rt5651_disable_micbias1_for_ovcd(struct snd_soc_component *component) 15721310e737SHans de Goede { 15731310e737SHans de Goede struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 15741310e737SHans de Goede 15751310e737SHans de Goede snd_soc_dapm_mutex_lock(dapm); 15764b4a373cSHans de Goede snd_soc_dapm_disable_pin_unlocked(dapm, "Platform Clock"); 15771310e737SHans de Goede snd_soc_dapm_disable_pin_unlocked(dapm, "micbias1"); 15781310e737SHans de Goede snd_soc_dapm_disable_pin_unlocked(dapm, "LDO"); 15791310e737SHans de Goede snd_soc_dapm_sync_unlocked(dapm); 15801310e737SHans de Goede snd_soc_dapm_mutex_unlock(dapm); 15811310e737SHans de Goede } 15821310e737SHans de Goede 1583df1569f2SHans de Goede static void rt5651_enable_micbias1_ovcd_irq(struct snd_soc_component *component) 1584df1569f2SHans de Goede { 1585df1569f2SHans de Goede struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component); 1586df1569f2SHans de Goede 1587df1569f2SHans de Goede snd_soc_component_update_bits(component, RT5651_IRQ_CTRL2, 1588df1569f2SHans de Goede RT5651_IRQ_MB1_OC_MASK, RT5651_IRQ_MB1_OC_NOR); 1589df1569f2SHans de Goede rt5651->ovcd_irq_enabled = true; 1590df1569f2SHans de Goede } 1591df1569f2SHans de Goede 1592df1569f2SHans de Goede static void rt5651_disable_micbias1_ovcd_irq(struct snd_soc_component *component) 1593df1569f2SHans de Goede { 1594df1569f2SHans de Goede struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component); 1595df1569f2SHans de Goede 1596df1569f2SHans de Goede snd_soc_component_update_bits(component, RT5651_IRQ_CTRL2, 1597df1569f2SHans de Goede RT5651_IRQ_MB1_OC_MASK, RT5651_IRQ_MB1_OC_BP); 1598df1569f2SHans de Goede rt5651->ovcd_irq_enabled = false; 1599df1569f2SHans de Goede } 1600df1569f2SHans de Goede 16011b1ad835SHans de Goede static void rt5651_clear_micbias1_ovcd(struct snd_soc_component *component) 16021b1ad835SHans de Goede { 16031b1ad835SHans de Goede snd_soc_component_update_bits(component, RT5651_IRQ_CTRL2, 16041b1ad835SHans de Goede RT5651_MB1_OC_CLR, 0); 16051b1ad835SHans de Goede } 16061b1ad835SHans de Goede 16071b1ad835SHans de Goede static bool rt5651_micbias1_ovcd(struct snd_soc_component *component) 16081b1ad835SHans de Goede { 16091b1ad835SHans de Goede int val; 16101b1ad835SHans de Goede 1611467a2553SKuninori Morimoto val = snd_soc_component_read(component, RT5651_IRQ_CTRL2); 16121b1ad835SHans de Goede dev_dbg(component->dev, "irq ctrl2 %#04x\n", val); 16131b1ad835SHans de Goede 16141b1ad835SHans de Goede return (val & RT5651_MB1_OC_CLR); 16151b1ad835SHans de Goede } 16161b1ad835SHans de Goede 16170fe94745SHans de Goede static bool rt5651_jack_inserted(struct snd_soc_component *component) 16180fe94745SHans de Goede { 16190fe94745SHans de Goede struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component); 16200fe94745SHans de Goede int val; 16210fe94745SHans de Goede 1622c2ec9d95SHans de Goede if (rt5651->gpiod_hp_det) { 1623c2ec9d95SHans de Goede val = gpiod_get_value_cansleep(rt5651->gpiod_hp_det); 1624c2ec9d95SHans de Goede dev_dbg(component->dev, "jack-detect gpio %d\n", val); 1625c2ec9d95SHans de Goede return val; 1626c2ec9d95SHans de Goede } 1627c2ec9d95SHans de Goede 1628467a2553SKuninori Morimoto val = snd_soc_component_read(component, RT5651_INT_IRQ_ST); 16290fe94745SHans de Goede dev_dbg(component->dev, "irq status %#04x\n", val); 16300fe94745SHans de Goede 16310fe94745SHans de Goede switch (rt5651->jd_src) { 16320fe94745SHans de Goede case RT5651_JD1_1: 16330fe94745SHans de Goede val &= 0x1000; 16340fe94745SHans de Goede break; 16350fe94745SHans de Goede case RT5651_JD1_2: 16360fe94745SHans de Goede val &= 0x2000; 16370fe94745SHans de Goede break; 16380fe94745SHans de Goede case RT5651_JD2: 16390fe94745SHans de Goede val &= 0x4000; 16400fe94745SHans de Goede break; 16410fe94745SHans de Goede default: 16420fe94745SHans de Goede break; 16430fe94745SHans de Goede } 16440fe94745SHans de Goede 16458a68a509SHans de Goede if (rt5651->jd_active_high) 16468a68a509SHans de Goede return val != 0; 16478a68a509SHans de Goede else 16480fe94745SHans de Goede return val == 0; 16490fe94745SHans de Goede } 16500fe94745SHans de Goede 1651df1569f2SHans de Goede /* Jack detect and button-press timings */ 1652ee680968SHans de Goede #define JACK_SETTLE_TIME 100 /* milli seconds */ 1653ee680968SHans de Goede #define JACK_DETECT_COUNT 5 1654ee680968SHans de Goede #define JACK_DETECT_MAXCOUNT 20 /* Aprox. 2 seconds worth of tries */ 1655df1569f2SHans de Goede #define JACK_UNPLUG_TIME 80 /* milli seconds */ 1656df1569f2SHans de Goede #define BP_POLL_TIME 10 /* milli seconds */ 1657df1569f2SHans de Goede #define BP_POLL_MAXCOUNT 200 /* assume something is wrong after this */ 1658df1569f2SHans de Goede #define BP_THRESHOLD 3 1659df1569f2SHans de Goede 1660df1569f2SHans de Goede static void rt5651_start_button_press_work(struct snd_soc_component *component) 1661df1569f2SHans de Goede { 1662df1569f2SHans de Goede struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component); 1663df1569f2SHans de Goede 1664df1569f2SHans de Goede rt5651->poll_count = 0; 1665df1569f2SHans de Goede rt5651->press_count = 0; 1666df1569f2SHans de Goede rt5651->release_count = 0; 1667df1569f2SHans de Goede rt5651->pressed = false; 1668df1569f2SHans de Goede rt5651->press_reported = false; 1669df1569f2SHans de Goede rt5651_clear_micbias1_ovcd(component); 1670df1569f2SHans de Goede schedule_delayed_work(&rt5651->bp_work, msecs_to_jiffies(BP_POLL_TIME)); 1671df1569f2SHans de Goede } 1672df1569f2SHans de Goede 1673df1569f2SHans de Goede static void rt5651_button_press_work(struct work_struct *work) 1674df1569f2SHans de Goede { 1675df1569f2SHans de Goede struct rt5651_priv *rt5651 = 1676df1569f2SHans de Goede container_of(work, struct rt5651_priv, bp_work.work); 1677df1569f2SHans de Goede struct snd_soc_component *component = rt5651->component; 1678df1569f2SHans de Goede 1679df1569f2SHans de Goede /* Check the jack was not removed underneath us */ 1680df1569f2SHans de Goede if (!rt5651_jack_inserted(component)) 1681df1569f2SHans de Goede return; 1682df1569f2SHans de Goede 1683df1569f2SHans de Goede if (rt5651_micbias1_ovcd(component)) { 1684df1569f2SHans de Goede rt5651->release_count = 0; 1685df1569f2SHans de Goede rt5651->press_count++; 1686df1569f2SHans de Goede /* Remember till after JACK_UNPLUG_TIME wait */ 1687df1569f2SHans de Goede if (rt5651->press_count >= BP_THRESHOLD) 1688df1569f2SHans de Goede rt5651->pressed = true; 1689df1569f2SHans de Goede rt5651_clear_micbias1_ovcd(component); 1690df1569f2SHans de Goede } else { 1691df1569f2SHans de Goede rt5651->press_count = 0; 1692df1569f2SHans de Goede rt5651->release_count++; 1693df1569f2SHans de Goede } 1694df1569f2SHans de Goede 1695df1569f2SHans de Goede /* 1696df1569f2SHans de Goede * The pins get temporarily shorted on jack unplug, so we poll for 1697df1569f2SHans de Goede * at least JACK_UNPLUG_TIME milli-seconds before reporting a press. 1698df1569f2SHans de Goede */ 1699df1569f2SHans de Goede rt5651->poll_count++; 1700df1569f2SHans de Goede if (rt5651->poll_count < (JACK_UNPLUG_TIME / BP_POLL_TIME)) { 1701df1569f2SHans de Goede schedule_delayed_work(&rt5651->bp_work, 1702df1569f2SHans de Goede msecs_to_jiffies(BP_POLL_TIME)); 1703df1569f2SHans de Goede return; 1704df1569f2SHans de Goede } 1705df1569f2SHans de Goede 1706df1569f2SHans de Goede if (rt5651->pressed && !rt5651->press_reported) { 1707df1569f2SHans de Goede dev_dbg(component->dev, "headset button press\n"); 1708df1569f2SHans de Goede snd_soc_jack_report(rt5651->hp_jack, SND_JACK_BTN_0, 1709df1569f2SHans de Goede SND_JACK_BTN_0); 1710df1569f2SHans de Goede rt5651->press_reported = true; 1711df1569f2SHans de Goede } 1712df1569f2SHans de Goede 1713df1569f2SHans de Goede if (rt5651->release_count >= BP_THRESHOLD) { 1714df1569f2SHans de Goede if (rt5651->press_reported) { 1715df1569f2SHans de Goede dev_dbg(component->dev, "headset button release\n"); 1716df1569f2SHans de Goede snd_soc_jack_report(rt5651->hp_jack, 0, SND_JACK_BTN_0); 1717df1569f2SHans de Goede } 1718df1569f2SHans de Goede /* Re-enable OVCD IRQ to detect next press */ 1719df1569f2SHans de Goede rt5651_enable_micbias1_ovcd_irq(component); 1720df1569f2SHans de Goede return; /* Stop polling */ 1721df1569f2SHans de Goede } 1722df1569f2SHans de Goede 1723df1569f2SHans de Goede schedule_delayed_work(&rt5651->bp_work, msecs_to_jiffies(BP_POLL_TIME)); 1724df1569f2SHans de Goede } 1725ee680968SHans de Goede 1726ee680968SHans de Goede static int rt5651_detect_headset(struct snd_soc_component *component) 1727ee680968SHans de Goede { 1728ee680968SHans de Goede int i, headset_count = 0, headphone_count = 0; 1729ee680968SHans de Goede 1730ee680968SHans de Goede /* 1731ee680968SHans de Goede * We get the insertion event before the jack is fully inserted at which 1732ee680968SHans de Goede * point the second ring on a TRRS connector may short the 2nd ring and 1733ee680968SHans de Goede * sleeve contacts, also the overcurrent detection is not entirely 1734ee680968SHans de Goede * reliable. So we try several times with a wait in between until we 1735ee680968SHans de Goede * detect the same type JACK_DETECT_COUNT times in a row. 1736ee680968SHans de Goede */ 1737ee680968SHans de Goede for (i = 0; i < JACK_DETECT_MAXCOUNT; i++) { 1738ee680968SHans de Goede /* Clear any previous over-current status flag */ 1739ee680968SHans de Goede rt5651_clear_micbias1_ovcd(component); 1740ee680968SHans de Goede 1741ee680968SHans de Goede msleep(JACK_SETTLE_TIME); 1742ee680968SHans de Goede 1743ee680968SHans de Goede /* Check the jack is still connected before checking ovcd */ 1744ee680968SHans de Goede if (!rt5651_jack_inserted(component)) 1745ee680968SHans de Goede return 0; 1746ee680968SHans de Goede 1747ee680968SHans de Goede if (rt5651_micbias1_ovcd(component)) { 1748ee680968SHans de Goede /* 1749ee680968SHans de Goede * Over current detected, there is a short between the 1750ee680968SHans de Goede * 2nd ring contact and the ground, so a TRS connector 1751ee680968SHans de Goede * without a mic contact and thus plain headphones. 1752ee680968SHans de Goede */ 1753ee680968SHans de Goede dev_dbg(component->dev, "mic-gnd shorted\n"); 1754ee680968SHans de Goede headset_count = 0; 1755ee680968SHans de Goede headphone_count++; 1756ee680968SHans de Goede if (headphone_count == JACK_DETECT_COUNT) 1757ee680968SHans de Goede return SND_JACK_HEADPHONE; 1758ee680968SHans de Goede } else { 1759ee680968SHans de Goede dev_dbg(component->dev, "mic-gnd open\n"); 1760ee680968SHans de Goede headphone_count = 0; 1761ee680968SHans de Goede headset_count++; 1762ee680968SHans de Goede if (headset_count == JACK_DETECT_COUNT) 1763ee680968SHans de Goede return SND_JACK_HEADSET; 1764ee680968SHans de Goede } 1765ee680968SHans de Goede } 1766ee680968SHans de Goede 1767ee680968SHans de Goede dev_err(component->dev, "Error detecting headset vs headphones, bad contact?, assuming headphones\n"); 1768ee680968SHans de Goede return SND_JACK_HEADPHONE; 1769ee680968SHans de Goede } 1770ee680968SHans de Goede 1771c2ec9d95SHans de Goede static bool rt5651_support_button_press(struct rt5651_priv *rt5651) 1772c2ec9d95SHans de Goede { 17732bdf194eSJaska Uimonen if (!rt5651->hp_jack) 17742bdf194eSJaska Uimonen return false; 17752bdf194eSJaska Uimonen 1776c2ec9d95SHans de Goede /* Button press support only works with internal jack-detection */ 1777c2ec9d95SHans de Goede return (rt5651->hp_jack->status & SND_JACK_MICROPHONE) && 1778c2ec9d95SHans de Goede rt5651->gpiod_hp_det == NULL; 1779c2ec9d95SHans de Goede } 1780c2ec9d95SHans de Goede 1781ee680968SHans de Goede static void rt5651_jack_detect_work(struct work_struct *work) 1782ee680968SHans de Goede { 1783ee680968SHans de Goede struct rt5651_priv *rt5651 = 1784ee680968SHans de Goede container_of(work, struct rt5651_priv, jack_detect_work); 1785df1569f2SHans de Goede struct snd_soc_component *component = rt5651->component; 17869b9adc5bSPierre-Louis Bossart int report; 1787ee680968SHans de Goede 1788df1569f2SHans de Goede if (!rt5651_jack_inserted(component)) { 1789df1569f2SHans de Goede /* Jack removed, or spurious IRQ? */ 1790df1569f2SHans de Goede if (rt5651->hp_jack->status & SND_JACK_HEADPHONE) { 1791df1569f2SHans de Goede if (rt5651->hp_jack->status & SND_JACK_MICROPHONE) { 1792df1569f2SHans de Goede cancel_delayed_work_sync(&rt5651->bp_work); 1793df1569f2SHans de Goede rt5651_disable_micbias1_ovcd_irq(component); 1794df1569f2SHans de Goede rt5651_disable_micbias1_for_ovcd(component); 1795ee680968SHans de Goede } 1796df1569f2SHans de Goede snd_soc_jack_report(rt5651->hp_jack, 0, 1797df1569f2SHans de Goede SND_JACK_HEADSET | SND_JACK_BTN_0); 1798df1569f2SHans de Goede dev_dbg(component->dev, "jack unplugged\n"); 1799df1569f2SHans de Goede } 1800df1569f2SHans de Goede } else if (!(rt5651->hp_jack->status & SND_JACK_HEADPHONE)) { 1801df1569f2SHans de Goede /* Jack inserted */ 1802df1569f2SHans de Goede WARN_ON(rt5651->ovcd_irq_enabled); 1803df1569f2SHans de Goede rt5651_enable_micbias1_for_ovcd(component); 1804df1569f2SHans de Goede report = rt5651_detect_headset(component); 1805c2ec9d95SHans de Goede dev_dbg(component->dev, "detect report %#02x\n", report); 1806c2ec9d95SHans de Goede snd_soc_jack_report(rt5651->hp_jack, report, SND_JACK_HEADSET); 1807c2ec9d95SHans de Goede if (rt5651_support_button_press(rt5651)) { 1808df1569f2SHans de Goede /* Enable ovcd IRQ for button press detect. */ 1809df1569f2SHans de Goede rt5651_enable_micbias1_ovcd_irq(component); 1810df1569f2SHans de Goede } else { 1811df1569f2SHans de Goede /* No more need for overcurrent detect. */ 1812df1569f2SHans de Goede rt5651_disable_micbias1_for_ovcd(component); 1813df1569f2SHans de Goede } 1814df1569f2SHans de Goede } else if (rt5651->ovcd_irq_enabled && rt5651_micbias1_ovcd(component)) { 1815df1569f2SHans de Goede dev_dbg(component->dev, "OVCD IRQ\n"); 1816df1569f2SHans de Goede 1817df1569f2SHans de Goede /* 1818df1569f2SHans de Goede * The ovcd IRQ keeps firing while the button is pressed, so 1819df1569f2SHans de Goede * we disable it and start polling the button until released. 1820df1569f2SHans de Goede * 1821df1569f2SHans de Goede * The disable will make the IRQ pin 0 again and since we get 1822df1569f2SHans de Goede * IRQs on both edges (so as to detect both jack plugin and 1823df1569f2SHans de Goede * unplug) this means we will immediately get another IRQ. 1824df1569f2SHans de Goede * The ovcd_irq_enabled check above makes the 2ND IRQ a NOP. 1825df1569f2SHans de Goede */ 1826df1569f2SHans de Goede rt5651_disable_micbias1_ovcd_irq(component); 1827df1569f2SHans de Goede rt5651_start_button_press_work(component); 1828df1569f2SHans de Goede 1829df1569f2SHans de Goede /* 1830df1569f2SHans de Goede * If the jack-detect IRQ flag goes high (unplug) after our 1831df1569f2SHans de Goede * above rt5651_jack_inserted() check and before we have 1832df1569f2SHans de Goede * disabled the OVCD IRQ, the IRQ pin will stay high and as 1833df1569f2SHans de Goede * we react to edges, we miss the unplug event -> recheck. 1834df1569f2SHans de Goede */ 1835df1569f2SHans de Goede queue_work(system_long_wq, &rt5651->jack_detect_work); 1836df1569f2SHans de Goede } 1837ee680968SHans de Goede } 1838ee680968SHans de Goede 1839d8b8c878SHans de Goede static irqreturn_t rt5651_irq(int irq, void *data) 1840d8b8c878SHans de Goede { 1841d8b8c878SHans de Goede struct rt5651_priv *rt5651 = data; 1842d8b8c878SHans de Goede 1843ee680968SHans de Goede queue_work(system_power_efficient_wq, &rt5651->jack_detect_work); 1844d8b8c878SHans de Goede 1845d8b8c878SHans de Goede return IRQ_HANDLED; 1846d8b8c878SHans de Goede } 1847d8b8c878SHans de Goede 18488d2d7bcdSHans de Goede static void rt5651_cancel_work(void *data) 18498d2d7bcdSHans de Goede { 18508d2d7bcdSHans de Goede struct rt5651_priv *rt5651 = data; 18518d2d7bcdSHans de Goede 18528d2d7bcdSHans de Goede cancel_work_sync(&rt5651->jack_detect_work); 1853df1569f2SHans de Goede cancel_delayed_work_sync(&rt5651->bp_work); 18548d2d7bcdSHans de Goede } 18558d2d7bcdSHans de Goede 185634c906ddSHans de Goede static void rt5651_enable_jack_detect(struct snd_soc_component *component, 1857c2ec9d95SHans de Goede struct snd_soc_jack *hp_jack, 1858c2ec9d95SHans de Goede struct gpio_desc *gpiod_hp_det) 1859d8b8c878SHans de Goede { 1860d8b8c878SHans de Goede struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component); 1861c2ec9d95SHans de Goede bool using_internal_jack_detect = true; 1862d8b8c878SHans de Goede 1863d8b8c878SHans de Goede /* Select jack detect source */ 1864d8b8c878SHans de Goede switch (rt5651->jd_src) { 1865c2ec9d95SHans de Goede case RT5651_JD_NULL: 1866c2ec9d95SHans de Goede rt5651->gpiod_hp_det = gpiod_hp_det; 1867c2ec9d95SHans de Goede if (!rt5651->gpiod_hp_det) 1868c2ec9d95SHans de Goede return; /* No jack detect */ 1869c2ec9d95SHans de Goede using_internal_jack_detect = false; 1870c2ec9d95SHans de Goede break; 1871d8b8c878SHans de Goede case RT5651_JD1_1: 1872d8b8c878SHans de Goede snd_soc_component_update_bits(component, RT5651_JD_CTRL2, 1873d8b8c878SHans de Goede RT5651_JD_TRG_SEL_MASK, RT5651_JD_TRG_SEL_JD1_1); 18748a68a509SHans de Goede /* active-low is normal, set inv flag for active-high */ 18758a68a509SHans de Goede if (rt5651->jd_active_high) 18768a68a509SHans de Goede snd_soc_component_update_bits(component, 18778a68a509SHans de Goede RT5651_IRQ_CTRL1, 18788a68a509SHans de Goede RT5651_JD1_1_IRQ_EN | RT5651_JD1_1_INV, 18798a68a509SHans de Goede RT5651_JD1_1_IRQ_EN | RT5651_JD1_1_INV); 18808a68a509SHans de Goede else 18818a68a509SHans de Goede snd_soc_component_update_bits(component, 18828a68a509SHans de Goede RT5651_IRQ_CTRL1, 18838a68a509SHans de Goede RT5651_JD1_1_IRQ_EN | RT5651_JD1_1_INV, 18848a68a509SHans de Goede RT5651_JD1_1_IRQ_EN); 1885d8b8c878SHans de Goede break; 1886d8b8c878SHans de Goede case RT5651_JD1_2: 1887d8b8c878SHans de Goede snd_soc_component_update_bits(component, RT5651_JD_CTRL2, 1888d8b8c878SHans de Goede RT5651_JD_TRG_SEL_MASK, RT5651_JD_TRG_SEL_JD1_2); 18898a68a509SHans de Goede /* active-low is normal, set inv flag for active-high */ 18908a68a509SHans de Goede if (rt5651->jd_active_high) 18918a68a509SHans de Goede snd_soc_component_update_bits(component, 18928a68a509SHans de Goede RT5651_IRQ_CTRL1, 18938a68a509SHans de Goede RT5651_JD1_2_IRQ_EN | RT5651_JD1_2_INV, 18948a68a509SHans de Goede RT5651_JD1_2_IRQ_EN | RT5651_JD1_2_INV); 18958a68a509SHans de Goede else 18968a68a509SHans de Goede snd_soc_component_update_bits(component, 18978a68a509SHans de Goede RT5651_IRQ_CTRL1, 18988a68a509SHans de Goede RT5651_JD1_2_IRQ_EN | RT5651_JD1_2_INV, 18998a68a509SHans de Goede RT5651_JD1_2_IRQ_EN); 1900d8b8c878SHans de Goede break; 1901d8b8c878SHans de Goede case RT5651_JD2: 1902d8b8c878SHans de Goede snd_soc_component_update_bits(component, RT5651_JD_CTRL2, 1903d8b8c878SHans de Goede RT5651_JD_TRG_SEL_MASK, RT5651_JD_TRG_SEL_JD2); 19048a68a509SHans de Goede /* active-low is normal, set inv flag for active-high */ 19058a68a509SHans de Goede if (rt5651->jd_active_high) 19068a68a509SHans de Goede snd_soc_component_update_bits(component, 19078a68a509SHans de Goede RT5651_IRQ_CTRL1, 19088a68a509SHans de Goede RT5651_JD2_IRQ_EN | RT5651_JD2_INV, 19098a68a509SHans de Goede RT5651_JD2_IRQ_EN | RT5651_JD2_INV); 19108a68a509SHans de Goede else 19118a68a509SHans de Goede snd_soc_component_update_bits(component, 19128a68a509SHans de Goede RT5651_IRQ_CTRL1, 19138a68a509SHans de Goede RT5651_JD2_IRQ_EN | RT5651_JD2_INV, 19148a68a509SHans de Goede RT5651_JD2_IRQ_EN); 1915d8b8c878SHans de Goede break; 1916d8b8c878SHans de Goede default: 1917d8b8c878SHans de Goede dev_err(component->dev, "Currently only JD1_1 / JD1_2 / JD2 are supported\n"); 191834c906ddSHans de Goede return; 1919d8b8c878SHans de Goede } 1920d8b8c878SHans de Goede 1921c2ec9d95SHans de Goede if (using_internal_jack_detect) { 1922c2ec9d95SHans de Goede /* IRQ output on GPIO1 */ 1923c2ec9d95SHans de Goede snd_soc_component_update_bits(component, RT5651_GPIO_CTRL1, 1924c2ec9d95SHans de Goede RT5651_GP1_PIN_MASK, RT5651_GP1_PIN_IRQ); 1925c2ec9d95SHans de Goede 192657d9d7c3SHans de Goede /* Enable jack detect power */ 192757d9d7c3SHans de Goede snd_soc_component_update_bits(component, RT5651_PWR_ANLG2, 192857d9d7c3SHans de Goede RT5651_PWR_JD_M, RT5651_PWR_JD_M); 1929c2ec9d95SHans de Goede } 193057d9d7c3SHans de Goede 1931e6eb0207SHans de Goede /* Set OVCD threshold current and scale-factor */ 1932e6eb0207SHans de Goede snd_soc_component_write(component, RT5651_PR_BASE + RT5651_BIAS_CUR4, 1933e6eb0207SHans de Goede 0xa800 | rt5651->ovcd_sf); 1934e6eb0207SHans de Goede 19359e179592SHans de Goede snd_soc_component_update_bits(component, RT5651_MICBIAS, 19369e179592SHans de Goede RT5651_MIC1_OVCD_MASK | 19379e179592SHans de Goede RT5651_MIC1_OVTH_MASK | 19389e179592SHans de Goede RT5651_PWR_CLK12M_MASK | 19399e179592SHans de Goede RT5651_PWR_MB_MASK, 1940f1088d4bSHans de Goede RT5651_MIC1_OVCD_EN | 1941583a9debSHans de Goede rt5651->ovcd_th | 19429e179592SHans de Goede RT5651_PWR_MB_PU | 19439e179592SHans de Goede RT5651_PWR_CLK12M_PU); 1944d8b8c878SHans de Goede 19451b1ad835SHans de Goede /* 19461b1ad835SHans de Goede * The over-current-detect is only reliable in detecting the absence 19471b1ad835SHans de Goede * of over-current, when the mic-contact in the jack is short-circuited, 19481b1ad835SHans de Goede * the hardware periodically retries if it can apply the bias-current 19491b1ad835SHans de Goede * leading to the ovcd status flip-flopping 1-0-1 with it being 0 about 19501b1ad835SHans de Goede * 10% of the time, as we poll the ovcd status bit we might hit that 19511b1ad835SHans de Goede * 10%, so we enable sticky mode and when checking OVCD we clear the 19521b1ad835SHans de Goede * status, msleep() a bit and then check to get a reliable reading. 19531b1ad835SHans de Goede */ 19541b1ad835SHans de Goede snd_soc_component_update_bits(component, RT5651_IRQ_CTRL2, 19551b1ad835SHans de Goede RT5651_MB1_OC_STKY_MASK, RT5651_MB1_OC_STKY_EN); 19561b1ad835SHans de Goede 1957d8b8c878SHans de Goede rt5651->hp_jack = hp_jack; 1958c2ec9d95SHans de Goede if (rt5651_support_button_press(rt5651)) { 1959df1569f2SHans de Goede rt5651_enable_micbias1_for_ovcd(component); 1960df1569f2SHans de Goede rt5651_enable_micbias1_ovcd_irq(component); 1961df1569f2SHans de Goede } 1962df1569f2SHans de Goede 196334c906ddSHans de Goede enable_irq(rt5651->irq); 1964d8b8c878SHans de Goede /* sync initial jack state */ 1965ee680968SHans de Goede queue_work(system_power_efficient_wq, &rt5651->jack_detect_work); 196634c906ddSHans de Goede } 196734c906ddSHans de Goede 196834c906ddSHans de Goede static void rt5651_disable_jack_detect(struct snd_soc_component *component) 196934c906ddSHans de Goede { 197034c906ddSHans de Goede struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component); 197134c906ddSHans de Goede 197234c906ddSHans de Goede disable_irq(rt5651->irq); 197334c906ddSHans de Goede rt5651_cancel_work(rt5651); 197434c906ddSHans de Goede 1975c2ec9d95SHans de Goede if (rt5651_support_button_press(rt5651)) { 1976df1569f2SHans de Goede rt5651_disable_micbias1_ovcd_irq(component); 1977df1569f2SHans de Goede rt5651_disable_micbias1_for_ovcd(component); 1978df1569f2SHans de Goede snd_soc_jack_report(rt5651->hp_jack, 0, SND_JACK_BTN_0); 1979df1569f2SHans de Goede } 1980df1569f2SHans de Goede 198134c906ddSHans de Goede rt5651->hp_jack = NULL; 198234c906ddSHans de Goede } 198334c906ddSHans de Goede 198434c906ddSHans de Goede static int rt5651_set_jack(struct snd_soc_component *component, 198534c906ddSHans de Goede struct snd_soc_jack *jack, void *data) 198634c906ddSHans de Goede { 198734c906ddSHans de Goede if (jack) 1988c2ec9d95SHans de Goede rt5651_enable_jack_detect(component, jack, data); 198934c906ddSHans de Goede else 199034c906ddSHans de Goede rt5651_disable_jack_detect(component); 1991d8b8c878SHans de Goede 1992d8b8c878SHans de Goede return 0; 1993d8b8c878SHans de Goede } 1994d8b8c878SHans de Goede 19951cf5b504SHans de Goede /* 19961cf5b504SHans de Goede * Note on some platforms the platform code may need to add device-properties, 19971cf5b504SHans de Goede * rather then relying only on properties set by the firmware. Therefor the 19981cf5b504SHans de Goede * property parsing MUST be done from the component driver's probe function, 19991cf5b504SHans de Goede * rather then from the i2c driver's probe function, so that the platform-code 20001cf5b504SHans de Goede * can attach extra properties before calling snd_soc_register_card(). 20011cf5b504SHans de Goede */ 20021cf5b504SHans de Goede static void rt5651_apply_properties(struct snd_soc_component *component) 20035f293d43SHans de Goede { 2004f0c2a330SHans de Goede struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component); 2005f0c2a330SHans de Goede u32 val; 2006f0c2a330SHans de Goede 20075f293d43SHans de Goede if (device_property_read_bool(component->dev, "realtek,in2-differential")) 20085f293d43SHans de Goede snd_soc_component_update_bits(component, RT5651_IN1_IN2, 20095f293d43SHans de Goede RT5651_IN_DF2, RT5651_IN_DF2); 20105f293d43SHans de Goede 20115f293d43SHans de Goede if (device_property_read_bool(component->dev, "realtek,dmic-en")) 20125f293d43SHans de Goede snd_soc_component_update_bits(component, RT5651_GPIO_CTRL1, 20135f293d43SHans de Goede RT5651_GP2_PIN_MASK, RT5651_GP2_PIN_DMIC1_SCL); 2014f0c2a330SHans de Goede 2015f0c2a330SHans de Goede if (device_property_read_u32(component->dev, 2016f0c2a330SHans de Goede "realtek,jack-detect-source", &val) == 0) 2017f0c2a330SHans de Goede rt5651->jd_src = val; 2018583a9debSHans de Goede 20198a68a509SHans de Goede if (device_property_read_bool(component->dev, "realtek,jack-detect-not-inverted")) 20208a68a509SHans de Goede rt5651->jd_active_high = true; 20218a68a509SHans de Goede 2022e6eb0207SHans de Goede /* 2023e6eb0207SHans de Goede * Testing on various boards has shown that good defaults for the OVCD 2024e6eb0207SHans de Goede * threshold and scale-factor are 2000µA and 0.75. For an effective 2025e6eb0207SHans de Goede * limit of 1500µA, this seems to be more reliable then 1500µA and 1.0. 2026e6eb0207SHans de Goede */ 2027583a9debSHans de Goede rt5651->ovcd_th = RT5651_MIC1_OVTH_2000UA; 2028e6eb0207SHans de Goede rt5651->ovcd_sf = RT5651_MIC_OVCD_SF_0P75; 2029583a9debSHans de Goede 2030583a9debSHans de Goede if (device_property_read_u32(component->dev, 2031583a9debSHans de Goede "realtek,over-current-threshold-microamp", &val) == 0) { 2032583a9debSHans de Goede switch (val) { 2033583a9debSHans de Goede case 600: 2034583a9debSHans de Goede rt5651->ovcd_th = RT5651_MIC1_OVTH_600UA; 2035583a9debSHans de Goede break; 2036583a9debSHans de Goede case 1500: 2037583a9debSHans de Goede rt5651->ovcd_th = RT5651_MIC1_OVTH_1500UA; 2038583a9debSHans de Goede break; 2039583a9debSHans de Goede case 2000: 2040583a9debSHans de Goede rt5651->ovcd_th = RT5651_MIC1_OVTH_2000UA; 2041583a9debSHans de Goede break; 2042583a9debSHans de Goede default: 2043583a9debSHans de Goede dev_warn(component->dev, "Warning: Invalid over-current-threshold-microamp value: %d, defaulting to 2000uA\n", 2044583a9debSHans de Goede val); 2045583a9debSHans de Goede } 2046583a9debSHans de Goede } 2047e6eb0207SHans de Goede 2048e6eb0207SHans de Goede if (device_property_read_u32(component->dev, 2049e6eb0207SHans de Goede "realtek,over-current-scale-factor", &val) == 0) { 2050e6eb0207SHans de Goede if (val <= RT5651_OVCD_SF_1P5) 2051e6eb0207SHans de Goede rt5651->ovcd_sf = val << RT5651_MIC_OVCD_SF_SFT; 2052e6eb0207SHans de Goede else 2053e6eb0207SHans de Goede dev_warn(component->dev, "Warning: Invalid over-current-scale-factor value: %d, defaulting to 0.75\n", 2054e6eb0207SHans de Goede val); 2055e6eb0207SHans de Goede } 20565f293d43SHans de Goede } 20575f293d43SHans de Goede 205817b52010SKuninori Morimoto static int rt5651_probe(struct snd_soc_component *component) 205940bc18a2SBard Liao { 206017b52010SKuninori Morimoto struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component); 206140bc18a2SBard Liao 206217b52010SKuninori Morimoto rt5651->component = component; 206340bc18a2SBard Liao 20643d7719d3SHans de Goede snd_soc_component_update_bits(component, RT5651_PWR_ANLG1, 20653d7719d3SHans de Goede RT5651_PWR_LDO_DVO_MASK, RT5651_PWR_LDO_DVO_1_2V); 20663d7719d3SHans de Goede 206717b52010SKuninori Morimoto snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF); 206840bc18a2SBard Liao 20695f293d43SHans de Goede rt5651_apply_properties(component); 20705f293d43SHans de Goede 207140bc18a2SBard Liao return 0; 207240bc18a2SBard Liao } 207340bc18a2SBard Liao 207440bc18a2SBard Liao #ifdef CONFIG_PM 207517b52010SKuninori Morimoto static int rt5651_suspend(struct snd_soc_component *component) 207640bc18a2SBard Liao { 207717b52010SKuninori Morimoto struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component); 207840bc18a2SBard Liao 207940bc18a2SBard Liao regcache_cache_only(rt5651->regmap, true); 208040bc18a2SBard Liao regcache_mark_dirty(rt5651->regmap); 208140bc18a2SBard Liao return 0; 208240bc18a2SBard Liao } 208340bc18a2SBard Liao 208417b52010SKuninori Morimoto static int rt5651_resume(struct snd_soc_component *component) 208540bc18a2SBard Liao { 208617b52010SKuninori Morimoto struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component); 208740bc18a2SBard Liao 208840bc18a2SBard Liao regcache_cache_only(rt5651->regmap, false); 208917b52010SKuninori Morimoto snd_soc_component_cache_sync(component); 209040bc18a2SBard Liao 209140bc18a2SBard Liao return 0; 209240bc18a2SBard Liao } 209340bc18a2SBard Liao #else 209440bc18a2SBard Liao #define rt5651_suspend NULL 209540bc18a2SBard Liao #define rt5651_resume NULL 209640bc18a2SBard Liao #endif 209740bc18a2SBard Liao 209840bc18a2SBard Liao #define RT5651_STEREO_RATES SNDRV_PCM_RATE_8000_96000 209940bc18a2SBard Liao #define RT5651_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ 210040bc18a2SBard Liao SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) 210140bc18a2SBard Liao 2102871c131dSMark Brown static const struct snd_soc_dai_ops rt5651_aif_dai_ops = { 210340bc18a2SBard Liao .hw_params = rt5651_hw_params, 210440bc18a2SBard Liao .set_fmt = rt5651_set_dai_fmt, 210540bc18a2SBard Liao .set_sysclk = rt5651_set_dai_sysclk, 210640bc18a2SBard Liao .set_pll = rt5651_set_dai_pll, 210740bc18a2SBard Liao }; 210840bc18a2SBard Liao 2109871c131dSMark Brown static struct snd_soc_dai_driver rt5651_dai[] = { 211040bc18a2SBard Liao { 211140bc18a2SBard Liao .name = "rt5651-aif1", 211240bc18a2SBard Liao .id = RT5651_AIF1, 211340bc18a2SBard Liao .playback = { 211440bc18a2SBard Liao .stream_name = "AIF1 Playback", 211540bc18a2SBard Liao .channels_min = 1, 211640bc18a2SBard Liao .channels_max = 2, 211740bc18a2SBard Liao .rates = RT5651_STEREO_RATES, 211840bc18a2SBard Liao .formats = RT5651_FORMATS, 211940bc18a2SBard Liao }, 212040bc18a2SBard Liao .capture = { 212140bc18a2SBard Liao .stream_name = "AIF1 Capture", 212240bc18a2SBard Liao .channels_min = 1, 212340bc18a2SBard Liao .channels_max = 2, 212440bc18a2SBard Liao .rates = RT5651_STEREO_RATES, 212540bc18a2SBard Liao .formats = RT5651_FORMATS, 212640bc18a2SBard Liao }, 212740bc18a2SBard Liao .ops = &rt5651_aif_dai_ops, 212840bc18a2SBard Liao }, 212940bc18a2SBard Liao { 213040bc18a2SBard Liao .name = "rt5651-aif2", 213140bc18a2SBard Liao .id = RT5651_AIF2, 213240bc18a2SBard Liao .playback = { 213340bc18a2SBard Liao .stream_name = "AIF2 Playback", 213440bc18a2SBard Liao .channels_min = 1, 213540bc18a2SBard Liao .channels_max = 2, 213640bc18a2SBard Liao .rates = RT5651_STEREO_RATES, 213740bc18a2SBard Liao .formats = RT5651_FORMATS, 213840bc18a2SBard Liao }, 213940bc18a2SBard Liao .capture = { 214040bc18a2SBard Liao .stream_name = "AIF2 Capture", 214140bc18a2SBard Liao .channels_min = 1, 214240bc18a2SBard Liao .channels_max = 2, 214340bc18a2SBard Liao .rates = RT5651_STEREO_RATES, 214440bc18a2SBard Liao .formats = RT5651_FORMATS, 214540bc18a2SBard Liao }, 214640bc18a2SBard Liao .ops = &rt5651_aif_dai_ops, 214740bc18a2SBard Liao }, 214840bc18a2SBard Liao }; 214940bc18a2SBard Liao 215017b52010SKuninori Morimoto static const struct snd_soc_component_driver soc_component_dev_rt5651 = { 215140bc18a2SBard Liao .probe = rt5651_probe, 215240bc18a2SBard Liao .suspend = rt5651_suspend, 215340bc18a2SBard Liao .resume = rt5651_resume, 215440bc18a2SBard Liao .set_bias_level = rt5651_set_bias_level, 21556f0b819aSHans de Goede .set_jack = rt5651_set_jack, 215640bc18a2SBard Liao .controls = rt5651_snd_controls, 215740bc18a2SBard Liao .num_controls = ARRAY_SIZE(rt5651_snd_controls), 215840bc18a2SBard Liao .dapm_widgets = rt5651_dapm_widgets, 215940bc18a2SBard Liao .num_dapm_widgets = ARRAY_SIZE(rt5651_dapm_widgets), 216040bc18a2SBard Liao .dapm_routes = rt5651_dapm_routes, 216140bc18a2SBard Liao .num_dapm_routes = ARRAY_SIZE(rt5651_dapm_routes), 216217b52010SKuninori Morimoto .use_pmdown_time = 1, 216317b52010SKuninori Morimoto .endianness = 1, 216440bc18a2SBard Liao }; 216540bc18a2SBard Liao 216640bc18a2SBard Liao static const struct regmap_config rt5651_regmap = { 216740bc18a2SBard Liao .reg_bits = 8, 216840bc18a2SBard Liao .val_bits = 16, 216940bc18a2SBard Liao 217040bc18a2SBard Liao .max_register = RT5651_DEVICE_ID + 1 + (ARRAY_SIZE(rt5651_ranges) * 217140bc18a2SBard Liao RT5651_PR_SPACING), 217240bc18a2SBard Liao .volatile_reg = rt5651_volatile_register, 217340bc18a2SBard Liao .readable_reg = rt5651_readable_register, 217440bc18a2SBard Liao 217540bc18a2SBard Liao .cache_type = REGCACHE_RBTREE, 217640bc18a2SBard Liao .reg_defaults = rt5651_reg, 217740bc18a2SBard Liao .num_reg_defaults = ARRAY_SIZE(rt5651_reg), 217840bc18a2SBard Liao .ranges = rt5651_ranges, 217940bc18a2SBard Liao .num_ranges = ARRAY_SIZE(rt5651_ranges), 21801c96a2f6SDavid Frey .use_single_read = true, 21811c96a2f6SDavid Frey .use_single_write = true, 218240bc18a2SBard Liao }; 218340bc18a2SBard Liao 21843ae08dc0SBard Liao #if defined(CONFIG_OF) 21853ae08dc0SBard Liao static const struct of_device_id rt5651_of_match[] = { 21863ae08dc0SBard Liao { .compatible = "realtek,rt5651", }, 21873ae08dc0SBard Liao {}, 21883ae08dc0SBard Liao }; 21893ae08dc0SBard Liao MODULE_DEVICE_TABLE(of, rt5651_of_match); 21903ae08dc0SBard Liao #endif 21913ae08dc0SBard Liao 21923ae08dc0SBard Liao #ifdef CONFIG_ACPI 21933ae08dc0SBard Liao static const struct acpi_device_id rt5651_acpi_match[] = { 21943ae08dc0SBard Liao { "10EC5651", 0 }, 2195d3068735SHans de Goede { "10EC5640", 0 }, 21963ae08dc0SBard Liao { }, 21973ae08dc0SBard Liao }; 21983ae08dc0SBard Liao MODULE_DEVICE_TABLE(acpi, rt5651_acpi_match); 21993ae08dc0SBard Liao #endif 22003ae08dc0SBard Liao 220140bc18a2SBard Liao static const struct i2c_device_id rt5651_i2c_id[] = { 220240bc18a2SBard Liao { "rt5651", 0 }, 220340bc18a2SBard Liao { } 220440bc18a2SBard Liao }; 220540bc18a2SBard Liao MODULE_DEVICE_TABLE(i2c, rt5651_i2c_id); 220640bc18a2SBard Liao 22071cf5b504SHans de Goede /* 22081cf5b504SHans de Goede * Note this function MUST not look at device-properties, see the comment 22091cf5b504SHans de Goede * above rt5651_apply_properties(). 22101cf5b504SHans de Goede */ 221135b88858SStephen Kitt static int rt5651_i2c_probe(struct i2c_client *i2c) 221240bc18a2SBard Liao { 221340bc18a2SBard Liao struct rt5651_priv *rt5651; 221440bc18a2SBard Liao int ret; 2215e20bfeb0SYizhuo int err; 221640bc18a2SBard Liao 221740bc18a2SBard Liao rt5651 = devm_kzalloc(&i2c->dev, sizeof(*rt5651), 221840bc18a2SBard Liao GFP_KERNEL); 221940bc18a2SBard Liao if (NULL == rt5651) 222040bc18a2SBard Liao return -ENOMEM; 222140bc18a2SBard Liao 222240bc18a2SBard Liao i2c_set_clientdata(i2c, rt5651); 222340bc18a2SBard Liao 222440bc18a2SBard Liao rt5651->regmap = devm_regmap_init_i2c(i2c, &rt5651_regmap); 222540bc18a2SBard Liao if (IS_ERR(rt5651->regmap)) { 222640bc18a2SBard Liao ret = PTR_ERR(rt5651->regmap); 222740bc18a2SBard Liao dev_err(&i2c->dev, "Failed to allocate register map: %d\n", 222840bc18a2SBard Liao ret); 222940bc18a2SBard Liao return ret; 223040bc18a2SBard Liao } 223140bc18a2SBard Liao 2232e20bfeb0SYizhuo err = regmap_read(rt5651->regmap, RT5651_DEVICE_ID, &ret); 2233e20bfeb0SYizhuo if (err) 2234e20bfeb0SYizhuo return err; 2235e20bfeb0SYizhuo 223640bc18a2SBard Liao if (ret != RT5651_DEVICE_ID_VALUE) { 223740bc18a2SBard Liao dev_err(&i2c->dev, 2238469444fbSJarkko Nikula "Device with ID register %#x is not rt5651\n", ret); 223940bc18a2SBard Liao return -ENODEV; 224040bc18a2SBard Liao } 224140bc18a2SBard Liao 224240bc18a2SBard Liao regmap_write(rt5651->regmap, RT5651_RESET, 0); 224340bc18a2SBard Liao 224440bc18a2SBard Liao ret = regmap_register_patch(rt5651->regmap, init_list, 224540bc18a2SBard Liao ARRAY_SIZE(init_list)); 224640bc18a2SBard Liao if (ret != 0) 224740bc18a2SBard Liao dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret); 224840bc18a2SBard Liao 2249f06da4fdSHans de Goede rt5651->irq = i2c->irq; 2250577dc32fSPierre-Louis Bossart rt5651->hp_mute = true; 225140bc18a2SBard Liao 2252df1569f2SHans de Goede INIT_DELAYED_WORK(&rt5651->bp_work, rt5651_button_press_work); 2253ee680968SHans de Goede INIT_WORK(&rt5651->jack_detect_work, rt5651_jack_detect_work); 225480bbe4a3SCarlo Caione 22558d2d7bcdSHans de Goede /* Make sure work is stopped on probe-error / remove */ 22568d2d7bcdSHans de Goede ret = devm_add_action_or_reset(&i2c->dev, rt5651_cancel_work, rt5651); 22578d2d7bcdSHans de Goede if (ret) 22588d2d7bcdSHans de Goede return ret; 22598d2d7bcdSHans de Goede 226034c906ddSHans de Goede ret = devm_request_irq(&i2c->dev, rt5651->irq, rt5651_irq, 226134c906ddSHans de Goede IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING 22626e037b72SHans de Goede | IRQF_ONESHOT | IRQF_NO_AUTOEN, "rt5651", rt5651); 22636e037b72SHans de Goede if (ret) { 226434c906ddSHans de Goede dev_warn(&i2c->dev, "Failed to reguest IRQ %d: %d\n", 226534c906ddSHans de Goede rt5651->irq, ret); 226634c906ddSHans de Goede rt5651->irq = -ENXIO; 226734c906ddSHans de Goede } 226834c906ddSHans de Goede 226917b52010SKuninori Morimoto ret = devm_snd_soc_register_component(&i2c->dev, 227017b52010SKuninori Morimoto &soc_component_dev_rt5651, 227140bc18a2SBard Liao rt5651_dai, ARRAY_SIZE(rt5651_dai)); 227240bc18a2SBard Liao 227340bc18a2SBard Liao return ret; 227440bc18a2SBard Liao } 227540bc18a2SBard Liao 2276871c131dSMark Brown static struct i2c_driver rt5651_i2c_driver = { 227740bc18a2SBard Liao .driver = { 227840bc18a2SBard Liao .name = "rt5651", 22793ae08dc0SBard Liao .acpi_match_table = ACPI_PTR(rt5651_acpi_match), 22803ae08dc0SBard Liao .of_match_table = of_match_ptr(rt5651_of_match), 228140bc18a2SBard Liao }, 2282*9abcd240SUwe Kleine-König .probe = rt5651_i2c_probe, 228340bc18a2SBard Liao .id_table = rt5651_i2c_id, 228440bc18a2SBard Liao }; 228540bc18a2SBard Liao module_i2c_driver(rt5651_i2c_driver); 228640bc18a2SBard Liao 228740bc18a2SBard Liao MODULE_DESCRIPTION("ASoC RT5651 driver"); 228840bc18a2SBard Liao MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>"); 228940bc18a2SBard Liao MODULE_LICENSE("GPL v2"); 2290