xref: /linux/sound/soc/codecs/rt5640.c (revision 00a6d7b6762c27d441e9ac8faff36384bc0fc180)
1 /*
2  * rt5640.c  --  RT5640/RT5639 ALSA SoC audio codec driver
3  *
4  * Copyright 2011 Realtek Semiconductor Corp.
5  * Author: Johnny Hsu <johnnyhsu@realtek.com>
6  * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/pm.h>
18 #include <linux/gpio.h>
19 #include <linux/i2c.h>
20 #include <linux/regmap.h>
21 #include <linux/of.h>
22 #include <linux/of_gpio.h>
23 #include <linux/platform_device.h>
24 #include <linux/spi/spi.h>
25 #include <linux/acpi.h>
26 #include <sound/core.h>
27 #include <sound/pcm.h>
28 #include <sound/pcm_params.h>
29 #include <sound/soc.h>
30 #include <sound/soc-dapm.h>
31 #include <sound/initval.h>
32 #include <sound/tlv.h>
33 
34 #include "rt5640.h"
35 
36 #define RT5640_DEVICE_ID 0x6231
37 
38 #define RT5640_PR_RANGE_BASE (0xff + 1)
39 #define RT5640_PR_SPACING 0x100
40 
41 #define RT5640_PR_BASE (RT5640_PR_RANGE_BASE + (0 * RT5640_PR_SPACING))
42 
43 static const struct regmap_range_cfg rt5640_ranges[] = {
44 	{ .name = "PR", .range_min = RT5640_PR_BASE,
45 	  .range_max = RT5640_PR_BASE + 0xb4,
46 	  .selector_reg = RT5640_PRIV_INDEX,
47 	  .selector_mask = 0xff,
48 	  .selector_shift = 0x0,
49 	  .window_start = RT5640_PRIV_DATA,
50 	  .window_len = 0x1, },
51 };
52 
53 static struct reg_default init_list[] = {
54 	{RT5640_PR_BASE + 0x3d,	0x3600},
55 	{RT5640_PR_BASE + 0x12,	0x0aa8},
56 	{RT5640_PR_BASE + 0x14,	0x0aaa},
57 	{RT5640_PR_BASE + 0x20,	0x6110},
58 	{RT5640_PR_BASE + 0x21,	0xe0e0},
59 	{RT5640_PR_BASE + 0x23,	0x1804},
60 };
61 #define RT5640_INIT_REG_LEN ARRAY_SIZE(init_list)
62 
63 static const struct reg_default rt5640_reg[] = {
64 	{ 0x00, 0x000e },
65 	{ 0x01, 0xc8c8 },
66 	{ 0x02, 0xc8c8 },
67 	{ 0x03, 0xc8c8 },
68 	{ 0x04, 0x8000 },
69 	{ 0x0d, 0x0000 },
70 	{ 0x0e, 0x0000 },
71 	{ 0x0f, 0x0808 },
72 	{ 0x19, 0xafaf },
73 	{ 0x1a, 0xafaf },
74 	{ 0x1b, 0x0000 },
75 	{ 0x1c, 0x2f2f },
76 	{ 0x1d, 0x2f2f },
77 	{ 0x1e, 0x0000 },
78 	{ 0x27, 0x7060 },
79 	{ 0x28, 0x7070 },
80 	{ 0x29, 0x8080 },
81 	{ 0x2a, 0x5454 },
82 	{ 0x2b, 0x5454 },
83 	{ 0x2c, 0xaa00 },
84 	{ 0x2d, 0x0000 },
85 	{ 0x2e, 0xa000 },
86 	{ 0x2f, 0x0000 },
87 	{ 0x3b, 0x0000 },
88 	{ 0x3c, 0x007f },
89 	{ 0x3d, 0x0000 },
90 	{ 0x3e, 0x007f },
91 	{ 0x45, 0xe000 },
92 	{ 0x46, 0x003e },
93 	{ 0x47, 0x003e },
94 	{ 0x48, 0xf800 },
95 	{ 0x49, 0x3800 },
96 	{ 0x4a, 0x0004 },
97 	{ 0x4c, 0xfc00 },
98 	{ 0x4d, 0x0000 },
99 	{ 0x4f, 0x01ff },
100 	{ 0x50, 0x0000 },
101 	{ 0x51, 0x0000 },
102 	{ 0x52, 0x01ff },
103 	{ 0x53, 0xf000 },
104 	{ 0x61, 0x0000 },
105 	{ 0x62, 0x0000 },
106 	{ 0x63, 0x00c0 },
107 	{ 0x64, 0x0000 },
108 	{ 0x65, 0x0000 },
109 	{ 0x66, 0x0000 },
110 	{ 0x6a, 0x0000 },
111 	{ 0x6c, 0x0000 },
112 	{ 0x70, 0x8000 },
113 	{ 0x71, 0x8000 },
114 	{ 0x72, 0x8000 },
115 	{ 0x73, 0x1114 },
116 	{ 0x74, 0x0c00 },
117 	{ 0x75, 0x1d00 },
118 	{ 0x80, 0x0000 },
119 	{ 0x81, 0x0000 },
120 	{ 0x82, 0x0000 },
121 	{ 0x83, 0x0000 },
122 	{ 0x84, 0x0000 },
123 	{ 0x85, 0x0008 },
124 	{ 0x89, 0x0000 },
125 	{ 0x8a, 0x0000 },
126 	{ 0x8b, 0x0600 },
127 	{ 0x8c, 0x0228 },
128 	{ 0x8d, 0xa000 },
129 	{ 0x8e, 0x0004 },
130 	{ 0x8f, 0x1100 },
131 	{ 0x90, 0x0646 },
132 	{ 0x91, 0x0c00 },
133 	{ 0x92, 0x0000 },
134 	{ 0x93, 0x3000 },
135 	{ 0xb0, 0x2080 },
136 	{ 0xb1, 0x0000 },
137 	{ 0xb4, 0x2206 },
138 	{ 0xb5, 0x1f00 },
139 	{ 0xb6, 0x0000 },
140 	{ 0xb8, 0x034b },
141 	{ 0xb9, 0x0066 },
142 	{ 0xba, 0x000b },
143 	{ 0xbb, 0x0000 },
144 	{ 0xbc, 0x0000 },
145 	{ 0xbd, 0x0000 },
146 	{ 0xbe, 0x0000 },
147 	{ 0xbf, 0x0000 },
148 	{ 0xc0, 0x0400 },
149 	{ 0xc2, 0x0000 },
150 	{ 0xc4, 0x0000 },
151 	{ 0xc5, 0x0000 },
152 	{ 0xc6, 0x2000 },
153 	{ 0xc8, 0x0000 },
154 	{ 0xc9, 0x0000 },
155 	{ 0xca, 0x0000 },
156 	{ 0xcb, 0x0000 },
157 	{ 0xcc, 0x0000 },
158 	{ 0xcf, 0x0013 },
159 	{ 0xd0, 0x0680 },
160 	{ 0xd1, 0x1c17 },
161 	{ 0xd2, 0x8c00 },
162 	{ 0xd3, 0xaa20 },
163 	{ 0xd6, 0x0400 },
164 	{ 0xd9, 0x0809 },
165 	{ 0xfe, 0x10ec },
166 	{ 0xff, 0x6231 },
167 };
168 
169 static int rt5640_reset(struct snd_soc_codec *codec)
170 {
171 	return snd_soc_write(codec, RT5640_RESET, 0);
172 }
173 
174 static bool rt5640_volatile_register(struct device *dev, unsigned int reg)
175 {
176 	int i;
177 
178 	for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
179 		if ((reg >= rt5640_ranges[i].window_start &&
180 		     reg <= rt5640_ranges[i].window_start +
181 		     rt5640_ranges[i].window_len) ||
182 		    (reg >= rt5640_ranges[i].range_min &&
183 		     reg <= rt5640_ranges[i].range_max))
184 			return true;
185 
186 	switch (reg) {
187 	case RT5640_RESET:
188 	case RT5640_ASRC_5:
189 	case RT5640_EQ_CTRL1:
190 	case RT5640_DRC_AGC_1:
191 	case RT5640_ANC_CTRL1:
192 	case RT5640_IRQ_CTRL2:
193 	case RT5640_INT_IRQ_ST:
194 	case RT5640_DSP_CTRL2:
195 	case RT5640_DSP_CTRL3:
196 	case RT5640_PRIV_INDEX:
197 	case RT5640_PRIV_DATA:
198 	case RT5640_PGM_REG_ARR1:
199 	case RT5640_PGM_REG_ARR3:
200 	case RT5640_VENDOR_ID:
201 	case RT5640_VENDOR_ID1:
202 	case RT5640_VENDOR_ID2:
203 		return true;
204 	default:
205 		return false;
206 	}
207 }
208 
209 static bool rt5640_readable_register(struct device *dev, unsigned int reg)
210 {
211 	int i;
212 
213 	for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
214 		if ((reg >= rt5640_ranges[i].window_start &&
215 		     reg <= rt5640_ranges[i].window_start +
216 		     rt5640_ranges[i].window_len) ||
217 		    (reg >= rt5640_ranges[i].range_min &&
218 		     reg <= rt5640_ranges[i].range_max))
219 			return true;
220 
221 	switch (reg) {
222 	case RT5640_RESET:
223 	case RT5640_SPK_VOL:
224 	case RT5640_HP_VOL:
225 	case RT5640_OUTPUT:
226 	case RT5640_MONO_OUT:
227 	case RT5640_IN1_IN2:
228 	case RT5640_IN3_IN4:
229 	case RT5640_INL_INR_VOL:
230 	case RT5640_DAC1_DIG_VOL:
231 	case RT5640_DAC2_DIG_VOL:
232 	case RT5640_DAC2_CTRL:
233 	case RT5640_ADC_DIG_VOL:
234 	case RT5640_ADC_DATA:
235 	case RT5640_ADC_BST_VOL:
236 	case RT5640_STO_ADC_MIXER:
237 	case RT5640_MONO_ADC_MIXER:
238 	case RT5640_AD_DA_MIXER:
239 	case RT5640_STO_DAC_MIXER:
240 	case RT5640_MONO_DAC_MIXER:
241 	case RT5640_DIG_MIXER:
242 	case RT5640_DSP_PATH1:
243 	case RT5640_DSP_PATH2:
244 	case RT5640_DIG_INF_DATA:
245 	case RT5640_REC_L1_MIXER:
246 	case RT5640_REC_L2_MIXER:
247 	case RT5640_REC_R1_MIXER:
248 	case RT5640_REC_R2_MIXER:
249 	case RT5640_HPO_MIXER:
250 	case RT5640_SPK_L_MIXER:
251 	case RT5640_SPK_R_MIXER:
252 	case RT5640_SPO_L_MIXER:
253 	case RT5640_SPO_R_MIXER:
254 	case RT5640_SPO_CLSD_RATIO:
255 	case RT5640_MONO_MIXER:
256 	case RT5640_OUT_L1_MIXER:
257 	case RT5640_OUT_L2_MIXER:
258 	case RT5640_OUT_L3_MIXER:
259 	case RT5640_OUT_R1_MIXER:
260 	case RT5640_OUT_R2_MIXER:
261 	case RT5640_OUT_R3_MIXER:
262 	case RT5640_LOUT_MIXER:
263 	case RT5640_PWR_DIG1:
264 	case RT5640_PWR_DIG2:
265 	case RT5640_PWR_ANLG1:
266 	case RT5640_PWR_ANLG2:
267 	case RT5640_PWR_MIXER:
268 	case RT5640_PWR_VOL:
269 	case RT5640_PRIV_INDEX:
270 	case RT5640_PRIV_DATA:
271 	case RT5640_I2S1_SDP:
272 	case RT5640_I2S2_SDP:
273 	case RT5640_ADDA_CLK1:
274 	case RT5640_ADDA_CLK2:
275 	case RT5640_DMIC:
276 	case RT5640_GLB_CLK:
277 	case RT5640_PLL_CTRL1:
278 	case RT5640_PLL_CTRL2:
279 	case RT5640_ASRC_1:
280 	case RT5640_ASRC_2:
281 	case RT5640_ASRC_3:
282 	case RT5640_ASRC_4:
283 	case RT5640_ASRC_5:
284 	case RT5640_HP_OVCD:
285 	case RT5640_CLS_D_OVCD:
286 	case RT5640_CLS_D_OUT:
287 	case RT5640_DEPOP_M1:
288 	case RT5640_DEPOP_M2:
289 	case RT5640_DEPOP_M3:
290 	case RT5640_CHARGE_PUMP:
291 	case RT5640_PV_DET_SPK_G:
292 	case RT5640_MICBIAS:
293 	case RT5640_EQ_CTRL1:
294 	case RT5640_EQ_CTRL2:
295 	case RT5640_WIND_FILTER:
296 	case RT5640_DRC_AGC_1:
297 	case RT5640_DRC_AGC_2:
298 	case RT5640_DRC_AGC_3:
299 	case RT5640_SVOL_ZC:
300 	case RT5640_ANC_CTRL1:
301 	case RT5640_ANC_CTRL2:
302 	case RT5640_ANC_CTRL3:
303 	case RT5640_JD_CTRL:
304 	case RT5640_ANC_JD:
305 	case RT5640_IRQ_CTRL1:
306 	case RT5640_IRQ_CTRL2:
307 	case RT5640_INT_IRQ_ST:
308 	case RT5640_GPIO_CTRL1:
309 	case RT5640_GPIO_CTRL2:
310 	case RT5640_GPIO_CTRL3:
311 	case RT5640_DSP_CTRL1:
312 	case RT5640_DSP_CTRL2:
313 	case RT5640_DSP_CTRL3:
314 	case RT5640_DSP_CTRL4:
315 	case RT5640_PGM_REG_ARR1:
316 	case RT5640_PGM_REG_ARR2:
317 	case RT5640_PGM_REG_ARR3:
318 	case RT5640_PGM_REG_ARR4:
319 	case RT5640_PGM_REG_ARR5:
320 	case RT5640_SCB_FUNC:
321 	case RT5640_SCB_CTRL:
322 	case RT5640_BASE_BACK:
323 	case RT5640_MP3_PLUS1:
324 	case RT5640_MP3_PLUS2:
325 	case RT5640_3D_HP:
326 	case RT5640_ADJ_HPF:
327 	case RT5640_HP_CALIB_AMP_DET:
328 	case RT5640_HP_CALIB2:
329 	case RT5640_SV_ZCD1:
330 	case RT5640_SV_ZCD2:
331 	case RT5640_DUMMY1:
332 	case RT5640_DUMMY2:
333 	case RT5640_DUMMY3:
334 	case RT5640_VENDOR_ID:
335 	case RT5640_VENDOR_ID1:
336 	case RT5640_VENDOR_ID2:
337 		return true;
338 	default:
339 		return false;
340 	}
341 }
342 
343 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
344 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
345 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
346 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
347 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
348 
349 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
350 static unsigned int bst_tlv[] = {
351 	TLV_DB_RANGE_HEAD(7),
352 	0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
353 	1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
354 	2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
355 	3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
356 	6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
357 	7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
358 	8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
359 };
360 
361 /* Interface data select */
362 static const char * const rt5640_data_select[] = {
363 	"Normal", "left copy to right", "right copy to left", "Swap"};
364 
365 static SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
366 			    RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);
367 
368 static SOC_ENUM_SINGLE_DECL(rt5640_if1_adc_enum, RT5640_DIG_INF_DATA,
369 			    RT5640_IF1_ADC_SEL_SFT, rt5640_data_select);
370 
371 static SOC_ENUM_SINGLE_DECL(rt5640_if2_dac_enum, RT5640_DIG_INF_DATA,
372 			    RT5640_IF2_DAC_SEL_SFT, rt5640_data_select);
373 
374 static SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_enum, RT5640_DIG_INF_DATA,
375 			    RT5640_IF2_ADC_SEL_SFT, rt5640_data_select);
376 
377 /* Class D speaker gain ratio */
378 static const char * const rt5640_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x",
379 	"2x", "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};
380 
381 static SOC_ENUM_SINGLE_DECL(rt5640_clsd_spk_ratio_enum, RT5640_CLS_D_OUT,
382 			    RT5640_CLSD_RATIO_SFT, rt5640_clsd_spk_ratio);
383 
384 static const struct snd_kcontrol_new rt5640_snd_controls[] = {
385 	/* Speaker Output Volume */
386 	SOC_DOUBLE("Speaker Channel Switch", RT5640_SPK_VOL,
387 		RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
388 	SOC_DOUBLE_TLV("Speaker Playback Volume", RT5640_SPK_VOL,
389 		RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
390 	/* Headphone Output Volume */
391 	SOC_DOUBLE("HP Channel Switch", RT5640_HP_VOL,
392 		RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
393 	SOC_DOUBLE_TLV("HP Playback Volume", RT5640_HP_VOL,
394 		RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
395 	/* OUTPUT Control */
396 	SOC_DOUBLE("OUT Playback Switch", RT5640_OUTPUT,
397 		RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
398 	SOC_DOUBLE("OUT Channel Switch", RT5640_OUTPUT,
399 		RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
400 	SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,
401 		RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
402 
403 	/* DAC Digital Volume */
404 	SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,
405 		RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),
406 	SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,
407 			RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
408 			175, 0, dac_vol_tlv),
409 	/* IN1/IN2 Control */
410 	SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,
411 		RT5640_BST_SFT1, 8, 0, bst_tlv),
412 	SOC_SINGLE_TLV("IN2 Boost", RT5640_IN3_IN4,
413 		RT5640_BST_SFT2, 8, 0, bst_tlv),
414 	/* INL/INR Volume Control */
415 	SOC_DOUBLE_TLV("IN Capture Volume", RT5640_INL_INR_VOL,
416 			RT5640_INL_VOL_SFT, RT5640_INR_VOL_SFT,
417 			31, 1, in_vol_tlv),
418 	/* ADC Digital Volume Control */
419 	SOC_DOUBLE("ADC Capture Switch", RT5640_ADC_DIG_VOL,
420 		RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
421 	SOC_DOUBLE_TLV("ADC Capture Volume", RT5640_ADC_DIG_VOL,
422 			RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
423 			127, 0, adc_vol_tlv),
424 	SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5640_ADC_DATA,
425 			RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
426 			127, 0, adc_vol_tlv),
427 	/* ADC Boost Volume Control */
428 	SOC_DOUBLE_TLV("ADC Boost Gain", RT5640_ADC_BST_VOL,
429 			RT5640_ADC_L_BST_SFT, RT5640_ADC_R_BST_SFT,
430 			3, 0, adc_bst_tlv),
431 	/* Class D speaker gain ratio */
432 	SOC_ENUM("Class D SPK Ratio Control", rt5640_clsd_spk_ratio_enum),
433 
434 	SOC_ENUM("ADC IF1 Data Switch", rt5640_if1_adc_enum),
435 	SOC_ENUM("DAC IF1 Data Switch", rt5640_if1_dac_enum),
436 	SOC_ENUM("ADC IF2 Data Switch", rt5640_if2_adc_enum),
437 	SOC_ENUM("DAC IF2 Data Switch", rt5640_if2_dac_enum),
438 };
439 
440 static const struct snd_kcontrol_new rt5640_specific_snd_controls[] = {
441 	/* MONO Output Control */
442 	SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT, RT5640_L_MUTE_SFT,
443 		1, 1),
444 
445 	SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
446 		RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 175, 0, dac_vol_tlv),
447 };
448 
449 /**
450  * set_dmic_clk - Set parameter of dmic.
451  *
452  * @w: DAPM widget.
453  * @kcontrol: The kcontrol of this widget.
454  * @event: Event id.
455  *
456  * Choose dmic clock between 1MHz and 3MHz.
457  * It is better for clock to approximate 3MHz.
458  */
459 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
460 	struct snd_kcontrol *kcontrol, int event)
461 {
462 	struct snd_soc_codec *codec = w->codec;
463 	struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
464 	int div[] = {2, 3, 4, 6, 8, 12};
465 	int idx = -EINVAL, i;
466 	int rate, red, bound, temp;
467 
468 	rate = rt5640->sysclk;
469 	red = 3000000 * 12;
470 	for (i = 0; i < ARRAY_SIZE(div); i++) {
471 		bound = div[i] * 3000000;
472 		if (rate > bound)
473 			continue;
474 		temp = bound - rate;
475 		if (temp < red) {
476 			red = temp;
477 			idx = i;
478 		}
479 	}
480 	if (idx < 0)
481 		dev_err(codec->dev, "Failed to set DMIC clock\n");
482 	else
483 		snd_soc_update_bits(codec, RT5640_DMIC, RT5640_DMIC_CLK_MASK,
484 					idx << RT5640_DMIC_CLK_SFT);
485 	return idx;
486 }
487 
488 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
489 			 struct snd_soc_dapm_widget *sink)
490 {
491 	unsigned int val;
492 
493 	val = snd_soc_read(source->codec, RT5640_GLB_CLK);
494 	val &= RT5640_SCLK_SRC_MASK;
495 	if (val == RT5640_SCLK_SRC_PLL1)
496 		return 1;
497 	else
498 		return 0;
499 }
500 
501 /* Digital Mixer */
502 static const struct snd_kcontrol_new rt5640_sto_adc_l_mix[] = {
503 	SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
504 			RT5640_M_ADC_L1_SFT, 1, 1),
505 	SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
506 			RT5640_M_ADC_L2_SFT, 1, 1),
507 };
508 
509 static const struct snd_kcontrol_new rt5640_sto_adc_r_mix[] = {
510 	SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
511 			RT5640_M_ADC_R1_SFT, 1, 1),
512 	SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
513 			RT5640_M_ADC_R2_SFT, 1, 1),
514 };
515 
516 static const struct snd_kcontrol_new rt5640_mono_adc_l_mix[] = {
517 	SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
518 			RT5640_M_MONO_ADC_L1_SFT, 1, 1),
519 	SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
520 			RT5640_M_MONO_ADC_L2_SFT, 1, 1),
521 };
522 
523 static const struct snd_kcontrol_new rt5640_mono_adc_r_mix[] = {
524 	SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
525 			RT5640_M_MONO_ADC_R1_SFT, 1, 1),
526 	SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
527 			RT5640_M_MONO_ADC_R2_SFT, 1, 1),
528 };
529 
530 static const struct snd_kcontrol_new rt5640_dac_l_mix[] = {
531 	SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
532 			RT5640_M_ADCMIX_L_SFT, 1, 1),
533 	SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
534 			RT5640_M_IF1_DAC_L_SFT, 1, 1),
535 };
536 
537 static const struct snd_kcontrol_new rt5640_dac_r_mix[] = {
538 	SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
539 			RT5640_M_ADCMIX_R_SFT, 1, 1),
540 	SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
541 			RT5640_M_IF1_DAC_R_SFT, 1, 1),
542 };
543 
544 static const struct snd_kcontrol_new rt5640_sto_dac_l_mix[] = {
545 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
546 			RT5640_M_DAC_L1_SFT, 1, 1),
547 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
548 			RT5640_M_DAC_L2_SFT, 1, 1),
549 	SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
550 			RT5640_M_ANC_DAC_L_SFT, 1, 1),
551 };
552 
553 static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {
554 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
555 			RT5640_M_DAC_R1_SFT, 1, 1),
556 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
557 			RT5640_M_DAC_R2_SFT, 1, 1),
558 	SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
559 			RT5640_M_ANC_DAC_R_SFT, 1, 1),
560 };
561 
562 static const struct snd_kcontrol_new rt5639_sto_dac_l_mix[] = {
563 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
564 			RT5640_M_DAC_L1_SFT, 1, 1),
565 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
566 			RT5640_M_DAC_L2_SFT, 1, 1),
567 };
568 
569 static const struct snd_kcontrol_new rt5639_sto_dac_r_mix[] = {
570 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
571 			RT5640_M_DAC_R1_SFT, 1, 1),
572 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
573 			RT5640_M_DAC_R2_SFT, 1, 1),
574 };
575 
576 static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {
577 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,
578 			RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),
579 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
580 			RT5640_M_DAC_L2_MONO_L_SFT, 1, 1),
581 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
582 			RT5640_M_DAC_R2_MONO_L_SFT, 1, 1),
583 };
584 
585 static const struct snd_kcontrol_new rt5640_mono_dac_r_mix[] = {
586 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_MONO_DAC_MIXER,
587 			RT5640_M_DAC_R1_MONO_R_SFT, 1, 1),
588 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
589 			RT5640_M_DAC_R2_MONO_R_SFT, 1, 1),
590 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
591 			RT5640_M_DAC_L2_MONO_R_SFT, 1, 1),
592 };
593 
594 static const struct snd_kcontrol_new rt5640_dig_l_mix[] = {
595 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_DIG_MIXER,
596 			RT5640_M_STO_L_DAC_L_SFT, 1, 1),
597 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_DIG_MIXER,
598 			RT5640_M_DAC_L2_DAC_L_SFT, 1, 1),
599 };
600 
601 static const struct snd_kcontrol_new rt5640_dig_r_mix[] = {
602 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_DIG_MIXER,
603 			RT5640_M_STO_R_DAC_R_SFT, 1, 1),
604 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_DIG_MIXER,
605 			RT5640_M_DAC_R2_DAC_R_SFT, 1, 1),
606 };
607 
608 /* Analog Input Mixer */
609 static const struct snd_kcontrol_new rt5640_rec_l_mix[] = {
610 	SOC_DAPM_SINGLE("HPOL Switch", RT5640_REC_L2_MIXER,
611 			RT5640_M_HP_L_RM_L_SFT, 1, 1),
612 	SOC_DAPM_SINGLE("INL Switch", RT5640_REC_L2_MIXER,
613 			RT5640_M_IN_L_RM_L_SFT, 1, 1),
614 	SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,
615 			RT5640_M_BST4_RM_L_SFT, 1, 1),
616 	SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_L2_MIXER,
617 			RT5640_M_BST1_RM_L_SFT, 1, 1),
618 	SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_REC_L2_MIXER,
619 			RT5640_M_OM_L_RM_L_SFT, 1, 1),
620 };
621 
622 static const struct snd_kcontrol_new rt5640_rec_r_mix[] = {
623 	SOC_DAPM_SINGLE("HPOR Switch", RT5640_REC_R2_MIXER,
624 			RT5640_M_HP_R_RM_R_SFT, 1, 1),
625 	SOC_DAPM_SINGLE("INR Switch", RT5640_REC_R2_MIXER,
626 			RT5640_M_IN_R_RM_R_SFT, 1, 1),
627 	SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,
628 			RT5640_M_BST4_RM_R_SFT, 1, 1),
629 	SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_R2_MIXER,
630 			RT5640_M_BST1_RM_R_SFT, 1, 1),
631 	SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_REC_R2_MIXER,
632 			RT5640_M_OM_R_RM_R_SFT, 1, 1),
633 };
634 
635 /* Analog Output Mixer */
636 static const struct snd_kcontrol_new rt5640_spk_l_mix[] = {
637 	SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_SPK_L_MIXER,
638 			RT5640_M_RM_L_SM_L_SFT, 1, 1),
639 	SOC_DAPM_SINGLE("INL Switch", RT5640_SPK_L_MIXER,
640 			RT5640_M_IN_L_SM_L_SFT, 1, 1),
641 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPK_L_MIXER,
642 			RT5640_M_DAC_L1_SM_L_SFT, 1, 1),
643 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_SPK_L_MIXER,
644 			RT5640_M_DAC_L2_SM_L_SFT, 1, 1),
645 	SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_SPK_L_MIXER,
646 			RT5640_M_OM_L_SM_L_SFT, 1, 1),
647 };
648 
649 static const struct snd_kcontrol_new rt5640_spk_r_mix[] = {
650 	SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_SPK_R_MIXER,
651 			RT5640_M_RM_R_SM_R_SFT, 1, 1),
652 	SOC_DAPM_SINGLE("INR Switch", RT5640_SPK_R_MIXER,
653 			RT5640_M_IN_R_SM_R_SFT, 1, 1),
654 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPK_R_MIXER,
655 			RT5640_M_DAC_R1_SM_R_SFT, 1, 1),
656 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_SPK_R_MIXER,
657 			RT5640_M_DAC_R2_SM_R_SFT, 1, 1),
658 	SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_SPK_R_MIXER,
659 			RT5640_M_OM_R_SM_R_SFT, 1, 1),
660 };
661 
662 static const struct snd_kcontrol_new rt5640_out_l_mix[] = {
663 	SOC_DAPM_SINGLE("SPK MIXL Switch", RT5640_OUT_L3_MIXER,
664 			RT5640_M_SM_L_OM_L_SFT, 1, 1),
665 	SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
666 			RT5640_M_BST1_OM_L_SFT, 1, 1),
667 	SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
668 			RT5640_M_IN_L_OM_L_SFT, 1, 1),
669 	SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
670 			RT5640_M_RM_L_OM_L_SFT, 1, 1),
671 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_L3_MIXER,
672 			RT5640_M_DAC_R2_OM_L_SFT, 1, 1),
673 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_L3_MIXER,
674 			RT5640_M_DAC_L2_OM_L_SFT, 1, 1),
675 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
676 			RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
677 };
678 
679 static const struct snd_kcontrol_new rt5640_out_r_mix[] = {
680 	SOC_DAPM_SINGLE("SPK MIXR Switch", RT5640_OUT_R3_MIXER,
681 			RT5640_M_SM_L_OM_R_SFT, 1, 1),
682 	SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
683 			RT5640_M_BST4_OM_R_SFT, 1, 1),
684 	SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
685 			RT5640_M_BST1_OM_R_SFT, 1, 1),
686 	SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
687 			RT5640_M_IN_R_OM_R_SFT, 1, 1),
688 	SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
689 			RT5640_M_RM_R_OM_R_SFT, 1, 1),
690 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_R3_MIXER,
691 			RT5640_M_DAC_L2_OM_R_SFT, 1, 1),
692 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_R3_MIXER,
693 			RT5640_M_DAC_R2_OM_R_SFT, 1, 1),
694 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
695 			RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
696 };
697 
698 static const struct snd_kcontrol_new rt5639_out_l_mix[] = {
699 	SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
700 			RT5640_M_BST1_OM_L_SFT, 1, 1),
701 	SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
702 			RT5640_M_IN_L_OM_L_SFT, 1, 1),
703 	SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
704 			RT5640_M_RM_L_OM_L_SFT, 1, 1),
705 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
706 			RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
707 };
708 
709 static const struct snd_kcontrol_new rt5639_out_r_mix[] = {
710 	SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
711 			RT5640_M_BST4_OM_R_SFT, 1, 1),
712 	SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
713 			RT5640_M_BST1_OM_R_SFT, 1, 1),
714 	SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
715 			RT5640_M_IN_R_OM_R_SFT, 1, 1),
716 	SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
717 			RT5640_M_RM_R_OM_R_SFT, 1, 1),
718 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
719 			RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
720 };
721 
722 static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {
723 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,
724 			RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),
725 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPO_L_MIXER,
726 			RT5640_M_DAC_L1_SPM_L_SFT, 1, 1),
727 	SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_L_MIXER,
728 			RT5640_M_SV_R_SPM_L_SFT, 1, 1),
729 	SOC_DAPM_SINGLE("SPKVOL L Switch", RT5640_SPO_L_MIXER,
730 			RT5640_M_SV_L_SPM_L_SFT, 1, 1),
731 	SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_L_MIXER,
732 			RT5640_M_BST1_SPM_L_SFT, 1, 1),
733 };
734 
735 static const struct snd_kcontrol_new rt5640_spo_r_mix[] = {
736 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_R_MIXER,
737 			RT5640_M_DAC_R1_SPM_R_SFT, 1, 1),
738 	SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_R_MIXER,
739 			RT5640_M_SV_R_SPM_R_SFT, 1, 1),
740 	SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_R_MIXER,
741 			RT5640_M_BST1_SPM_R_SFT, 1, 1),
742 };
743 
744 static const struct snd_kcontrol_new rt5640_hpo_mix[] = {
745 	SOC_DAPM_SINGLE("HPO MIX DAC2 Switch", RT5640_HPO_MIXER,
746 			RT5640_M_DAC2_HM_SFT, 1, 1),
747 	SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5640_HPO_MIXER,
748 			RT5640_M_DAC1_HM_SFT, 1, 1),
749 	SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5640_HPO_MIXER,
750 			RT5640_M_HPVOL_HM_SFT, 1, 1),
751 };
752 
753 static const struct snd_kcontrol_new rt5639_hpo_mix[] = {
754 	SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5640_HPO_MIXER,
755 			RT5640_M_DAC1_HM_SFT, 1, 1),
756 	SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5640_HPO_MIXER,
757 			RT5640_M_HPVOL_HM_SFT, 1, 1),
758 };
759 
760 static const struct snd_kcontrol_new rt5640_lout_mix[] = {
761 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,
762 			RT5640_M_DAC_L1_LM_SFT, 1, 1),
763 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_LOUT_MIXER,
764 			RT5640_M_DAC_R1_LM_SFT, 1, 1),
765 	SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_LOUT_MIXER,
766 			RT5640_M_OV_L_LM_SFT, 1, 1),
767 	SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_LOUT_MIXER,
768 			RT5640_M_OV_R_LM_SFT, 1, 1),
769 };
770 
771 static const struct snd_kcontrol_new rt5640_mono_mix[] = {
772 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_MIXER,
773 			RT5640_M_DAC_R2_MM_SFT, 1, 1),
774 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_MIXER,
775 			RT5640_M_DAC_L2_MM_SFT, 1, 1),
776 	SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_MONO_MIXER,
777 			RT5640_M_OV_R_MM_SFT, 1, 1),
778 	SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_MONO_MIXER,
779 			RT5640_M_OV_L_MM_SFT, 1, 1),
780 	SOC_DAPM_SINGLE("BST1 Switch", RT5640_MONO_MIXER,
781 			RT5640_M_BST1_MM_SFT, 1, 1),
782 };
783 
784 static const struct snd_kcontrol_new spk_l_enable_control =
785 	SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_SPK_VOL,
786 		RT5640_L_MUTE_SFT, 1, 1);
787 
788 static const struct snd_kcontrol_new spk_r_enable_control =
789 	SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_SPK_VOL,
790 		RT5640_R_MUTE_SFT, 1, 1);
791 
792 static const struct snd_kcontrol_new hp_l_enable_control =
793 	SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_HP_VOL,
794 		RT5640_L_MUTE_SFT, 1, 1);
795 
796 static const struct snd_kcontrol_new hp_r_enable_control =
797 	SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_HP_VOL,
798 		RT5640_R_MUTE_SFT, 1, 1);
799 
800 /* Stereo ADC source */
801 static const char * const rt5640_stereo_adc1_src[] = {
802 	"DIG MIX", "ADC"
803 };
804 
805 static SOC_ENUM_SINGLE_DECL(rt5640_stereo_adc1_enum, RT5640_STO_ADC_MIXER,
806 			    RT5640_ADC_1_SRC_SFT, rt5640_stereo_adc1_src);
807 
808 static const struct snd_kcontrol_new rt5640_sto_adc_1_mux =
809 	SOC_DAPM_ENUM("Stereo ADC1 Mux", rt5640_stereo_adc1_enum);
810 
811 static const char * const rt5640_stereo_adc2_src[] = {
812 	"DMIC1", "DMIC2", "DIG MIX"
813 };
814 
815 static SOC_ENUM_SINGLE_DECL(rt5640_stereo_adc2_enum, RT5640_STO_ADC_MIXER,
816 			    RT5640_ADC_2_SRC_SFT, rt5640_stereo_adc2_src);
817 
818 static const struct snd_kcontrol_new rt5640_sto_adc_2_mux =
819 	SOC_DAPM_ENUM("Stereo ADC2 Mux", rt5640_stereo_adc2_enum);
820 
821 /* Mono ADC source */
822 static const char * const rt5640_mono_adc_l1_src[] = {
823 	"Mono DAC MIXL", "ADCL"
824 };
825 
826 static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_l1_enum, RT5640_MONO_ADC_MIXER,
827 			    RT5640_MONO_ADC_L1_SRC_SFT, rt5640_mono_adc_l1_src);
828 
829 static const struct snd_kcontrol_new rt5640_mono_adc_l1_mux =
830 	SOC_DAPM_ENUM("Mono ADC1 left source", rt5640_mono_adc_l1_enum);
831 
832 static const char * const rt5640_mono_adc_l2_src[] = {
833 	"DMIC L1", "DMIC L2", "Mono DAC MIXL"
834 };
835 
836 static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_l2_enum, RT5640_MONO_ADC_MIXER,
837 			    RT5640_MONO_ADC_L2_SRC_SFT, rt5640_mono_adc_l2_src);
838 
839 static const struct snd_kcontrol_new rt5640_mono_adc_l2_mux =
840 	SOC_DAPM_ENUM("Mono ADC2 left source", rt5640_mono_adc_l2_enum);
841 
842 static const char * const rt5640_mono_adc_r1_src[] = {
843 	"Mono DAC MIXR", "ADCR"
844 };
845 
846 static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_r1_enum, RT5640_MONO_ADC_MIXER,
847 			    RT5640_MONO_ADC_R1_SRC_SFT, rt5640_mono_adc_r1_src);
848 
849 static const struct snd_kcontrol_new rt5640_mono_adc_r1_mux =
850 	SOC_DAPM_ENUM("Mono ADC1 right source", rt5640_mono_adc_r1_enum);
851 
852 static const char * const rt5640_mono_adc_r2_src[] = {
853 	"DMIC R1", "DMIC R2", "Mono DAC MIXR"
854 };
855 
856 static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_r2_enum, RT5640_MONO_ADC_MIXER,
857 			    RT5640_MONO_ADC_R2_SRC_SFT, rt5640_mono_adc_r2_src);
858 
859 static const struct snd_kcontrol_new rt5640_mono_adc_r2_mux =
860 	SOC_DAPM_ENUM("Mono ADC2 right source", rt5640_mono_adc_r2_enum);
861 
862 /* DAC2 channel source */
863 static const char * const rt5640_dac_l2_src[] = {
864 	"IF2", "Base L/R"
865 };
866 
867 static int rt5640_dac_l2_values[] = {
868 	0,
869 	3,
870 };
871 
872 static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dac_l2_enum,
873 				  RT5640_DSP_PATH2, RT5640_DAC_L2_SEL_SFT,
874 				  0x3, rt5640_dac_l2_src, rt5640_dac_l2_values);
875 
876 static const struct snd_kcontrol_new rt5640_dac_l2_mux =
877 	SOC_DAPM_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);
878 
879 static const char * const rt5640_dac_r2_src[] = {
880 	"IF2",
881 };
882 
883 static int rt5640_dac_r2_values[] = {
884 	0,
885 };
886 
887 static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dac_r2_enum,
888 				  RT5640_DSP_PATH2, RT5640_DAC_R2_SEL_SFT,
889 				  0x3, rt5640_dac_r2_src, rt5640_dac_r2_values);
890 
891 static const struct snd_kcontrol_new rt5640_dac_r2_mux =
892 	SOC_DAPM_ENUM("DAC2 right channel source", rt5640_dac_r2_enum);
893 
894 /* digital interface and iis interface map */
895 static const char * const rt5640_dai_iis_map[] = {
896 	"1:1|2:2", "1:2|2:1", "1:1|2:1", "1:2|2:2"
897 };
898 
899 static int rt5640_dai_iis_map_values[] = {
900 	0,
901 	5,
902 	6,
903 	7,
904 };
905 
906 static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dai_iis_map_enum,
907 				  RT5640_I2S1_SDP, RT5640_I2S_IF_SFT,
908 				  0x7, rt5640_dai_iis_map,
909 				  rt5640_dai_iis_map_values);
910 
911 static const struct snd_kcontrol_new rt5640_dai_mux =
912 	SOC_DAPM_ENUM("DAI select", rt5640_dai_iis_map_enum);
913 
914 /* SDI select */
915 static const char * const rt5640_sdi_sel[] = {
916 	"IF1", "IF2"
917 };
918 
919 static SOC_ENUM_SINGLE_DECL(rt5640_sdi_sel_enum, RT5640_I2S2_SDP,
920 			    RT5640_I2S2_SDI_SFT, rt5640_sdi_sel);
921 
922 static const struct snd_kcontrol_new rt5640_sdi_mux =
923 	SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);
924 
925 static void hp_amp_power_on(struct snd_soc_codec *codec)
926 {
927 	struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
928 
929 	/* depop parameters */
930 	regmap_update_bits(rt5640->regmap, RT5640_PR_BASE +
931 		RT5640_CHPUMP_INT_REG1, 0x0700, 0x0200);
932 	regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M2,
933 		RT5640_DEPOP_MASK, RT5640_DEPOP_MAN);
934 	regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M1,
935 		RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
936 		RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CB_PU);
937 	regmap_write(rt5640->regmap, RT5640_PR_BASE + RT5640_HP_DCC_INT1,
938 			   0x9f00);
939 	/* headphone amp power on */
940 	regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
941 		RT5640_PWR_FV1 | RT5640_PWR_FV2, 0);
942 	regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
943 		RT5640_PWR_HA,
944 		RT5640_PWR_HA);
945 	usleep_range(10000, 15000);
946 	regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
947 		RT5640_PWR_FV1 | RT5640_PWR_FV2 ,
948 		RT5640_PWR_FV1 | RT5640_PWR_FV2);
949 }
950 
951 static void rt5640_pmu_depop(struct snd_soc_codec *codec)
952 {
953 	struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
954 
955 	regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M2,
956 		RT5640_DEPOP_MASK | RT5640_DIG_DP_MASK,
957 		RT5640_DEPOP_AUTO | RT5640_DIG_DP_EN);
958 	regmap_update_bits(rt5640->regmap, RT5640_CHARGE_PUMP,
959 		RT5640_PM_HP_MASK, RT5640_PM_HP_HV);
960 
961 	regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M3,
962 		RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
963 		(RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ1_SFT) |
964 		(RT5640_CP_FQ_12_KHZ << RT5640_CP_FQ2_SFT) |
965 		(RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ3_SFT));
966 
967 	regmap_write(rt5640->regmap, RT5640_PR_BASE +
968 		RT5640_MAMP_INT_REG2, 0x1c00);
969 	regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M1,
970 		RT5640_HP_CP_MASK | RT5640_HP_SG_MASK,
971 		RT5640_HP_CP_PD | RT5640_HP_SG_EN);
972 	regmap_update_bits(rt5640->regmap, RT5640_PR_BASE +
973 		RT5640_CHPUMP_INT_REG1, 0x0700, 0x0400);
974 }
975 
976 static int rt5640_hp_event(struct snd_soc_dapm_widget *w,
977 			   struct snd_kcontrol *kcontrol, int event)
978 {
979 	struct snd_soc_codec *codec = w->codec;
980 	struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
981 
982 	switch (event) {
983 	case SND_SOC_DAPM_POST_PMU:
984 		rt5640_pmu_depop(codec);
985 		rt5640->hp_mute = 0;
986 		break;
987 
988 	case SND_SOC_DAPM_PRE_PMD:
989 		rt5640->hp_mute = 1;
990 		usleep_range(70000, 75000);
991 		break;
992 
993 	default:
994 		return 0;
995 	}
996 
997 	return 0;
998 }
999 
1000 static int rt5640_hp_power_event(struct snd_soc_dapm_widget *w,
1001 			   struct snd_kcontrol *kcontrol, int event)
1002 {
1003 	struct snd_soc_codec *codec = w->codec;
1004 
1005 	switch (event) {
1006 	case SND_SOC_DAPM_POST_PMU:
1007 		hp_amp_power_on(codec);
1008 		break;
1009 	default:
1010 		return 0;
1011 	}
1012 
1013 	return 0;
1014 }
1015 
1016 static int rt5640_hp_post_event(struct snd_soc_dapm_widget *w,
1017 			   struct snd_kcontrol *kcontrol, int event)
1018 {
1019 	struct snd_soc_codec *codec = w->codec;
1020 	struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1021 
1022 	switch (event) {
1023 	case SND_SOC_DAPM_POST_PMU:
1024 		if (!rt5640->hp_mute)
1025 			usleep_range(80000, 85000);
1026 
1027 		break;
1028 
1029 	default:
1030 		return 0;
1031 	}
1032 
1033 	return 0;
1034 }
1035 
1036 static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1037 	SND_SOC_DAPM_SUPPLY("PLL1", RT5640_PWR_ANLG2,
1038 			RT5640_PWR_PLL_BIT, 0, NULL, 0),
1039 	/* Input Side */
1040 	/* micbias */
1041 	SND_SOC_DAPM_SUPPLY("LDO2", RT5640_PWR_ANLG1,
1042 			RT5640_PWR_LDO2_BIT, 0, NULL, 0),
1043 	SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5640_PWR_ANLG2,
1044 			RT5640_PWR_MB1_BIT, 0, NULL, 0),
1045 	/* Input Lines */
1046 	SND_SOC_DAPM_INPUT("DMIC1"),
1047 	SND_SOC_DAPM_INPUT("DMIC2"),
1048 	SND_SOC_DAPM_INPUT("IN1P"),
1049 	SND_SOC_DAPM_INPUT("IN1N"),
1050 	SND_SOC_DAPM_INPUT("IN2P"),
1051 	SND_SOC_DAPM_INPUT("IN2N"),
1052 	SND_SOC_DAPM_PGA("DMIC L1", SND_SOC_NOPM, 0, 0, NULL, 0),
1053 	SND_SOC_DAPM_PGA("DMIC R1", SND_SOC_NOPM, 0, 0, NULL, 0),
1054 	SND_SOC_DAPM_PGA("DMIC L2", SND_SOC_NOPM, 0, 0, NULL, 0),
1055 	SND_SOC_DAPM_PGA("DMIC R2", SND_SOC_NOPM, 0, 0, NULL, 0),
1056 
1057 	SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1058 		set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1059 	SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5640_DMIC, RT5640_DMIC_1_EN_SFT, 0,
1060 		NULL, 0),
1061 	SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5640_DMIC, RT5640_DMIC_2_EN_SFT, 0,
1062 		NULL, 0),
1063 	/* Boost */
1064 	SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,
1065 		RT5640_PWR_BST1_BIT, 0, NULL, 0),
1066 	SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,
1067 		RT5640_PWR_BST4_BIT, 0, NULL, 0),
1068 	/* Input Volume */
1069 	SND_SOC_DAPM_PGA("INL VOL", RT5640_PWR_VOL,
1070 		RT5640_PWR_IN_L_BIT, 0, NULL, 0),
1071 	SND_SOC_DAPM_PGA("INR VOL", RT5640_PWR_VOL,
1072 		RT5640_PWR_IN_R_BIT, 0, NULL, 0),
1073 	/* REC Mixer */
1074 	SND_SOC_DAPM_MIXER("RECMIXL", RT5640_PWR_MIXER, RT5640_PWR_RM_L_BIT, 0,
1075 			rt5640_rec_l_mix, ARRAY_SIZE(rt5640_rec_l_mix)),
1076 	SND_SOC_DAPM_MIXER("RECMIXR", RT5640_PWR_MIXER, RT5640_PWR_RM_R_BIT, 0,
1077 			rt5640_rec_r_mix, ARRAY_SIZE(rt5640_rec_r_mix)),
1078 	/* ADCs */
1079 	SND_SOC_DAPM_ADC("ADC L", NULL, RT5640_PWR_DIG1,
1080 			RT5640_PWR_ADC_L_BIT, 0),
1081 	SND_SOC_DAPM_ADC("ADC R", NULL, RT5640_PWR_DIG1,
1082 			RT5640_PWR_ADC_R_BIT, 0),
1083 	/* ADC Mux */
1084 	SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1085 				&rt5640_sto_adc_2_mux),
1086 	SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1087 				&rt5640_sto_adc_2_mux),
1088 	SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1089 				&rt5640_sto_adc_1_mux),
1090 	SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1091 				&rt5640_sto_adc_1_mux),
1092 	SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1093 				&rt5640_mono_adc_l2_mux),
1094 	SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1095 				&rt5640_mono_adc_l1_mux),
1096 	SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1097 				&rt5640_mono_adc_r1_mux),
1098 	SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1099 				&rt5640_mono_adc_r2_mux),
1100 	/* ADC Mixer */
1101 	SND_SOC_DAPM_SUPPLY("Stereo Filter", RT5640_PWR_DIG2,
1102 		RT5640_PWR_ADC_SF_BIT, 0, NULL, 0),
1103 	SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,
1104 		rt5640_sto_adc_l_mix, ARRAY_SIZE(rt5640_sto_adc_l_mix)),
1105 	SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,
1106 		rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),
1107 	SND_SOC_DAPM_SUPPLY("Mono Left Filter", RT5640_PWR_DIG2,
1108 		RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1109 	SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1110 		rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix)),
1111 	SND_SOC_DAPM_SUPPLY("Mono Right Filter", RT5640_PWR_DIG2,
1112 		RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1113 	SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1114 		rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix)),
1115 
1116 	/* Digital Interface */
1117 	SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,
1118 		RT5640_PWR_I2S1_BIT, 0, NULL, 0),
1119 	SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1120 	SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1121 	SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1122 	SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1123 	SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1124 	SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1125 	SND_SOC_DAPM_SUPPLY("I2S2", RT5640_PWR_DIG1,
1126 		RT5640_PWR_I2S2_BIT, 0, NULL, 0),
1127 	SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1128 	SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1129 	SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1130 	SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1131 	SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1132 	SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1133 	/* Digital Interface Select */
1134 	SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1135 	SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1136 	SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1137 	SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1138 	SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1139 	SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1140 	SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1141 	SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1142 	SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1143 	SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1144 	/* Audio Interface */
1145 	SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1146 	SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1147 	SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1148 	SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1149 
1150 	/* Output Side */
1151 	/* DAC mixer before sound effect  */
1152 	SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1153 		rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),
1154 	SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1155 		rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),
1156 
1157 	/* DAC Mixer */
1158 	SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1159 		rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),
1160 	SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1161 		rt5640_mono_dac_r_mix, ARRAY_SIZE(rt5640_mono_dac_r_mix)),
1162 	SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,
1163 		rt5640_dig_l_mix, ARRAY_SIZE(rt5640_dig_l_mix)),
1164 	SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,
1165 		rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)),
1166 	/* DACs */
1167 	SND_SOC_DAPM_DAC("DAC L1", NULL, RT5640_PWR_DIG1,
1168 			RT5640_PWR_DAC_L1_BIT, 0),
1169 	SND_SOC_DAPM_DAC("DAC R1", NULL, RT5640_PWR_DIG1,
1170 			RT5640_PWR_DAC_R1_BIT, 0),
1171 
1172 	/* SPK/OUT Mixer */
1173 	SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,
1174 		0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),
1175 	SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,
1176 		0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),
1177 	/* Ouput Volume */
1178 	SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,
1179 		RT5640_PWR_SV_L_BIT, 0, NULL, 0),
1180 	SND_SOC_DAPM_PGA("SPKVOL R", RT5640_PWR_VOL,
1181 		RT5640_PWR_SV_R_BIT, 0, NULL, 0),
1182 	SND_SOC_DAPM_PGA("OUTVOL L", RT5640_PWR_VOL,
1183 		RT5640_PWR_OV_L_BIT, 0, NULL, 0),
1184 	SND_SOC_DAPM_PGA("OUTVOL R", RT5640_PWR_VOL,
1185 		RT5640_PWR_OV_R_BIT, 0, NULL, 0),
1186 	SND_SOC_DAPM_PGA("HPOVOL L", RT5640_PWR_VOL,
1187 		RT5640_PWR_HV_L_BIT, 0, NULL, 0),
1188 	SND_SOC_DAPM_PGA("HPOVOL R", RT5640_PWR_VOL,
1189 		RT5640_PWR_HV_R_BIT, 0, NULL, 0),
1190 	/* SPO/HPO/LOUT/Mono Mixer */
1191 	SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,
1192 		0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),
1193 	SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
1194 		0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),
1195 	SND_SOC_DAPM_MIXER("LOUT MIX", RT5640_PWR_ANLG1, RT5640_PWR_LM_BIT, 0,
1196 		rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),
1197 	SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM,
1198 		0, 0, rt5640_hp_power_event, SND_SOC_DAPM_POST_PMU),
1199 	SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0,
1200 		rt5640_hp_event,
1201 		SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1202 	SND_SOC_DAPM_SUPPLY("HP L Amp", RT5640_PWR_ANLG1,
1203 		RT5640_PWR_HP_L_BIT, 0, NULL, 0),
1204 	SND_SOC_DAPM_SUPPLY("HP R Amp", RT5640_PWR_ANLG1,
1205 		RT5640_PWR_HP_R_BIT, 0, NULL, 0),
1206 	SND_SOC_DAPM_SUPPLY("Improve SPK Amp Drv", RT5640_PWR_DIG1,
1207 		RT5640_PWR_CLS_D_BIT, 0, NULL, 0),
1208 
1209 	/* Output Switch */
1210 	SND_SOC_DAPM_SWITCH("Speaker L Playback", SND_SOC_NOPM, 0, 0,
1211 			&spk_l_enable_control),
1212 	SND_SOC_DAPM_SWITCH("Speaker R Playback", SND_SOC_NOPM, 0, 0,
1213 			&spk_r_enable_control),
1214 	SND_SOC_DAPM_SWITCH("HP L Playback", SND_SOC_NOPM, 0, 0,
1215 			&hp_l_enable_control),
1216 	SND_SOC_DAPM_SWITCH("HP R Playback", SND_SOC_NOPM, 0, 0,
1217 			&hp_r_enable_control),
1218 	SND_SOC_DAPM_POST("HP Post", rt5640_hp_post_event),
1219 	/* Output Lines */
1220 	SND_SOC_DAPM_OUTPUT("SPOLP"),
1221 	SND_SOC_DAPM_OUTPUT("SPOLN"),
1222 	SND_SOC_DAPM_OUTPUT("SPORP"),
1223 	SND_SOC_DAPM_OUTPUT("SPORN"),
1224 	SND_SOC_DAPM_OUTPUT("HPOL"),
1225 	SND_SOC_DAPM_OUTPUT("HPOR"),
1226 	SND_SOC_DAPM_OUTPUT("LOUTL"),
1227 	SND_SOC_DAPM_OUTPUT("LOUTR"),
1228 };
1229 
1230 static const struct snd_soc_dapm_widget rt5640_specific_dapm_widgets[] = {
1231 	/* Audio DSP */
1232 	SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1233 	/* ANC */
1234 	SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
1235 
1236 	/* DAC2 channel Mux */
1237 	SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dac_l2_mux),
1238 	SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dac_r2_mux),
1239 
1240 	SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1241 		rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
1242 	SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1243 		rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
1244 
1245 	SND_SOC_DAPM_DAC("DAC R2", NULL, RT5640_PWR_DIG1, RT5640_PWR_DAC_R2_BIT,
1246 		0),
1247 	SND_SOC_DAPM_DAC("DAC L2", NULL, RT5640_PWR_DIG1, RT5640_PWR_DAC_L2_BIT,
1248 		0),
1249 
1250 	SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1251 		0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
1252 	SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1253 		0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
1254 
1255 	SND_SOC_DAPM_MIXER("HPO MIX L", SND_SOC_NOPM, 0, 0,
1256 		rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1257 	SND_SOC_DAPM_MIXER("HPO MIX R", SND_SOC_NOPM, 0, 0,
1258 		rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1259 
1260 	SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
1261 		rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
1262 	SND_SOC_DAPM_SUPPLY("Improve MONO Amp Drv", RT5640_PWR_ANLG1,
1263 		RT5640_PWR_MA_BIT, 0, NULL, 0),
1264 
1265 	SND_SOC_DAPM_OUTPUT("MONOP"),
1266 	SND_SOC_DAPM_OUTPUT("MONON"),
1267 };
1268 
1269 static const struct snd_soc_dapm_widget rt5639_specific_dapm_widgets[] = {
1270 	SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1271 		rt5639_sto_dac_l_mix, ARRAY_SIZE(rt5639_sto_dac_l_mix)),
1272 	SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1273 		rt5639_sto_dac_r_mix, ARRAY_SIZE(rt5639_sto_dac_r_mix)),
1274 
1275 	SND_SOC_DAPM_SUPPLY("DAC L2 Filter", RT5640_PWR_DIG1,
1276 		RT5640_PWR_DAC_L2_BIT, 0, NULL, 0),
1277 	SND_SOC_DAPM_SUPPLY("DAC R2 Filter", RT5640_PWR_DIG1,
1278 		RT5640_PWR_DAC_R2_BIT, 0, NULL, 0),
1279 
1280 	SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1281 		0, rt5639_out_l_mix, ARRAY_SIZE(rt5639_out_l_mix)),
1282 	SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1283 		0, rt5639_out_r_mix, ARRAY_SIZE(rt5639_out_r_mix)),
1284 
1285 	SND_SOC_DAPM_MIXER("HPO MIX L", SND_SOC_NOPM, 0, 0,
1286 		rt5639_hpo_mix, ARRAY_SIZE(rt5639_hpo_mix)),
1287 	SND_SOC_DAPM_MIXER("HPO MIX R", SND_SOC_NOPM, 0, 0,
1288 		rt5639_hpo_mix, ARRAY_SIZE(rt5639_hpo_mix)),
1289 };
1290 
1291 static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1292 	{"IN1P", NULL, "LDO2"},
1293 	{"IN2P", NULL, "LDO2"},
1294 
1295 	{"DMIC L1", NULL, "DMIC1"},
1296 	{"DMIC R1", NULL, "DMIC1"},
1297 	{"DMIC L2", NULL, "DMIC2"},
1298 	{"DMIC R2", NULL, "DMIC2"},
1299 
1300 	{"BST1", NULL, "IN1P"},
1301 	{"BST1", NULL, "IN1N"},
1302 	{"BST2", NULL, "IN2P"},
1303 	{"BST2", NULL, "IN2N"},
1304 
1305 	{"INL VOL", NULL, "IN2P"},
1306 	{"INR VOL", NULL, "IN2N"},
1307 
1308 	{"RECMIXL", "HPOL Switch", "HPOL"},
1309 	{"RECMIXL", "INL Switch", "INL VOL"},
1310 	{"RECMIXL", "BST2 Switch", "BST2"},
1311 	{"RECMIXL", "BST1 Switch", "BST1"},
1312 	{"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},
1313 
1314 	{"RECMIXR", "HPOR Switch", "HPOR"},
1315 	{"RECMIXR", "INR Switch", "INR VOL"},
1316 	{"RECMIXR", "BST2 Switch", "BST2"},
1317 	{"RECMIXR", "BST1 Switch", "BST1"},
1318 	{"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},
1319 
1320 	{"ADC L", NULL, "RECMIXL"},
1321 	{"ADC R", NULL, "RECMIXR"},
1322 
1323 	{"DMIC L1", NULL, "DMIC CLK"},
1324 	{"DMIC L1", NULL, "DMIC1 Power"},
1325 	{"DMIC R1", NULL, "DMIC CLK"},
1326 	{"DMIC R1", NULL, "DMIC1 Power"},
1327 	{"DMIC L2", NULL, "DMIC CLK"},
1328 	{"DMIC L2", NULL, "DMIC2 Power"},
1329 	{"DMIC R2", NULL, "DMIC CLK"},
1330 	{"DMIC R2", NULL, "DMIC2 Power"},
1331 
1332 	{"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},
1333 	{"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},
1334 	{"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},
1335 	{"Stereo ADC L1 Mux", "ADC", "ADC L"},
1336 	{"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},
1337 
1338 	{"Stereo ADC R1 Mux", "ADC", "ADC R"},
1339 	{"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},
1340 	{"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},
1341 	{"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},
1342 	{"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},
1343 
1344 	{"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},
1345 	{"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},
1346 	{"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1347 	{"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1348 	{"Mono ADC L1 Mux", "ADCL", "ADC L"},
1349 
1350 	{"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1351 	{"Mono ADC R1 Mux", "ADCR", "ADC R"},
1352 	{"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},
1353 	{"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},
1354 	{"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1355 
1356 	{"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
1357 	{"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
1358 	{"Stereo ADC MIXL", NULL, "Stereo Filter"},
1359 	{"Stereo Filter", NULL, "PLL1", is_sys_clk_from_pll},
1360 
1361 	{"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
1362 	{"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
1363 	{"Stereo ADC MIXR", NULL, "Stereo Filter"},
1364 	{"Stereo Filter", NULL, "PLL1", is_sys_clk_from_pll},
1365 
1366 	{"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
1367 	{"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
1368 	{"Mono ADC MIXL", NULL, "Mono Left Filter"},
1369 	{"Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll},
1370 
1371 	{"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
1372 	{"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
1373 	{"Mono ADC MIXR", NULL, "Mono Right Filter"},
1374 	{"Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll},
1375 
1376 	{"IF2 ADC L", NULL, "Mono ADC MIXL"},
1377 	{"IF2 ADC R", NULL, "Mono ADC MIXR"},
1378 	{"IF1 ADC L", NULL, "Stereo ADC MIXL"},
1379 	{"IF1 ADC R", NULL, "Stereo ADC MIXR"},
1380 
1381 	{"IF1 ADC", NULL, "I2S1"},
1382 	{"IF1 ADC", NULL, "IF1 ADC L"},
1383 	{"IF1 ADC", NULL, "IF1 ADC R"},
1384 	{"IF2 ADC", NULL, "I2S2"},
1385 	{"IF2 ADC", NULL, "IF2 ADC L"},
1386 	{"IF2 ADC", NULL, "IF2 ADC R"},
1387 
1388 	{"DAI1 TX Mux", "1:1|2:2", "IF1 ADC"},
1389 	{"DAI1 TX Mux", "1:2|2:1", "IF2 ADC"},
1390 	{"DAI1 IF1 Mux", "1:1|2:1", "IF1 ADC"},
1391 	{"DAI1 IF2 Mux", "1:1|2:1", "IF2 ADC"},
1392 	{"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},
1393 	{"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},
1394 
1395 	{"DAI2 TX Mux", "1:2|2:1", "IF1 ADC"},
1396 	{"DAI2 TX Mux", "1:1|2:2", "IF2 ADC"},
1397 	{"DAI2 IF1 Mux", "1:2|2:2", "IF1 ADC"},
1398 	{"DAI2 IF2 Mux", "1:2|2:2", "IF2 ADC"},
1399 	{"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},
1400 	{"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},
1401 
1402 	{"AIF1TX", NULL, "DAI1 TX Mux"},
1403 	{"AIF1TX", NULL, "SDI1 TX Mux"},
1404 	{"AIF2TX", NULL, "DAI2 TX Mux"},
1405 	{"AIF2TX", NULL, "SDI2 TX Mux"},
1406 
1407 	{"DAI1 RX Mux", "1:1|2:2", "AIF1RX"},
1408 	{"DAI1 RX Mux", "1:1|2:1", "AIF1RX"},
1409 	{"DAI1 RX Mux", "1:2|2:1", "AIF2RX"},
1410 	{"DAI1 RX Mux", "1:2|2:2", "AIF2RX"},
1411 
1412 	{"DAI2 RX Mux", "1:2|2:1", "AIF1RX"},
1413 	{"DAI2 RX Mux", "1:1|2:1", "AIF1RX"},
1414 	{"DAI2 RX Mux", "1:1|2:2", "AIF2RX"},
1415 	{"DAI2 RX Mux", "1:2|2:2", "AIF2RX"},
1416 
1417 	{"IF1 DAC", NULL, "I2S1"},
1418 	{"IF1 DAC", NULL, "DAI1 RX Mux"},
1419 	{"IF2 DAC", NULL, "I2S2"},
1420 	{"IF2 DAC", NULL, "DAI2 RX Mux"},
1421 
1422 	{"IF1 DAC L", NULL, "IF1 DAC"},
1423 	{"IF1 DAC R", NULL, "IF1 DAC"},
1424 	{"IF2 DAC L", NULL, "IF2 DAC"},
1425 	{"IF2 DAC R", NULL, "IF2 DAC"},
1426 
1427 	{"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},
1428 	{"DAC MIXL", "INF1 Switch", "IF1 DAC L"},
1429 	{"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
1430 	{"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
1431 
1432 	{"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1433 	{"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1434 
1435 	{"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1436 	{"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1437 
1438 	{"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
1439 	{"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
1440 
1441 	{"DAC L1", NULL, "Stereo DAC MIXL"},
1442 	{"DAC L1", NULL, "PLL1", is_sys_clk_from_pll},
1443 	{"DAC R1", NULL, "Stereo DAC MIXR"},
1444 	{"DAC R1", NULL, "PLL1", is_sys_clk_from_pll},
1445 
1446 	{"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
1447 	{"SPK MIXL", "INL Switch", "INL VOL"},
1448 	{"SPK MIXL", "DAC L1 Switch", "DAC L1"},
1449 	{"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
1450 	{"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
1451 	{"SPK MIXR", "INR Switch", "INR VOL"},
1452 	{"SPK MIXR", "DAC R1 Switch", "DAC R1"},
1453 	{"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
1454 
1455 	{"OUT MIXL", "BST1 Switch", "BST1"},
1456 	{"OUT MIXL", "INL Switch", "INL VOL"},
1457 	{"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
1458 	{"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1459 
1460 	{"OUT MIXR", "BST2 Switch", "BST2"},
1461 	{"OUT MIXR", "BST1 Switch", "BST1"},
1462 	{"OUT MIXR", "INR Switch", "INR VOL"},
1463 	{"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
1464 	{"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1465 
1466 	{"SPKVOL L", NULL, "SPK MIXL"},
1467 	{"SPKVOL R", NULL, "SPK MIXR"},
1468 	{"HPOVOL L", NULL, "OUT MIXL"},
1469 	{"HPOVOL R", NULL, "OUT MIXR"},
1470 	{"OUTVOL L", NULL, "OUT MIXL"},
1471 	{"OUTVOL R", NULL, "OUT MIXR"},
1472 
1473 	{"SPOL MIX", "DAC R1 Switch", "DAC R1"},
1474 	{"SPOL MIX", "DAC L1 Switch", "DAC L1"},
1475 	{"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},
1476 	{"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},
1477 	{"SPOL MIX", "BST1 Switch", "BST1"},
1478 	{"SPOR MIX", "DAC R1 Switch", "DAC R1"},
1479 	{"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
1480 	{"SPOR MIX", "BST1 Switch", "BST1"},
1481 
1482 	{"HPO MIX L", "HPO MIX DAC1 Switch", "DAC L1"},
1483 	{"HPO MIX L", "HPO MIX HPVOL Switch", "HPOVOL L"},
1484 	{"HPO MIX L", NULL, "HP L Amp"},
1485 	{"HPO MIX R", "HPO MIX DAC1 Switch", "DAC R1"},
1486 	{"HPO MIX R", "HPO MIX HPVOL Switch", "HPOVOL R"},
1487 	{"HPO MIX R", NULL, "HP R Amp"},
1488 
1489 	{"LOUT MIX", "DAC L1 Switch", "DAC L1"},
1490 	{"LOUT MIX", "DAC R1 Switch", "DAC R1"},
1491 	{"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1492 	{"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1493 
1494 	{"HP Amp", NULL, "HPO MIX L"},
1495 	{"HP Amp", NULL, "HPO MIX R"},
1496 
1497 	{"Speaker L Playback", "Switch", "SPOL MIX"},
1498 	{"Speaker R Playback", "Switch", "SPOR MIX"},
1499 	{"SPOLP", NULL, "Speaker L Playback"},
1500 	{"SPOLN", NULL, "Speaker L Playback"},
1501 	{"SPORP", NULL, "Speaker R Playback"},
1502 	{"SPORN", NULL, "Speaker R Playback"},
1503 
1504 	{"SPOLP", NULL, "Improve SPK Amp Drv"},
1505 	{"SPOLN", NULL, "Improve SPK Amp Drv"},
1506 	{"SPORP", NULL, "Improve SPK Amp Drv"},
1507 	{"SPORN", NULL, "Improve SPK Amp Drv"},
1508 
1509 	{"HPOL", NULL, "Improve HP Amp Drv"},
1510 	{"HPOR", NULL, "Improve HP Amp Drv"},
1511 
1512 	{"HP L Playback", "Switch", "HP Amp"},
1513 	{"HP R Playback", "Switch", "HP Amp"},
1514 	{"HPOL", NULL, "HP L Playback"},
1515 	{"HPOR", NULL, "HP R Playback"},
1516 	{"LOUTL", NULL, "LOUT MIX"},
1517 	{"LOUTR", NULL, "LOUT MIX"},
1518 };
1519 
1520 static const struct snd_soc_dapm_route rt5640_specific_dapm_routes[] = {
1521 	{"ANC", NULL, "Stereo ADC MIXL"},
1522 	{"ANC", NULL, "Stereo ADC MIXR"},
1523 
1524 	{"Audio DSP", NULL, "DAC MIXL"},
1525 	{"Audio DSP", NULL, "DAC MIXR"},
1526 
1527 	{"DAC L2 Mux", "IF2", "IF2 DAC L"},
1528 	{"DAC L2 Mux", "Base L/R", "Audio DSP"},
1529 
1530 	{"DAC R2 Mux", "IF2", "IF2 DAC R"},
1531 
1532 	{"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1533 	{"Stereo DAC MIXL", "ANC Switch", "ANC"},
1534 	{"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1535 	{"Stereo DAC MIXR", "ANC Switch", "ANC"},
1536 
1537 	{"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1538 	{"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},
1539 
1540 	{"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1541 	{"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},
1542 
1543 	{"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1544 	{"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1545 
1546 	{"DAC L2", NULL, "Mono DAC MIXL"},
1547 	{"DAC L2", NULL, "PLL1", is_sys_clk_from_pll},
1548 	{"DAC R2", NULL, "Mono DAC MIXR"},
1549 	{"DAC R2", NULL, "PLL1", is_sys_clk_from_pll},
1550 
1551 	{"SPK MIXL", "DAC L2 Switch", "DAC L2"},
1552 	{"SPK MIXR", "DAC R2 Switch", "DAC R2"},
1553 
1554 	{"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
1555 	{"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
1556 
1557 	{"OUT MIXL", "DAC R2 Switch", "DAC R2"},
1558 	{"OUT MIXL", "DAC L2 Switch", "DAC L2"},
1559 
1560 	{"OUT MIXR", "DAC L2 Switch", "DAC L2"},
1561 	{"OUT MIXR", "DAC R2 Switch", "DAC R2"},
1562 
1563 	{"HPO MIX L", "HPO MIX DAC2 Switch", "DAC L2"},
1564 	{"HPO MIX R", "HPO MIX DAC2 Switch", "DAC R2"},
1565 
1566 	{"Mono MIX", "DAC R2 Switch", "DAC R2"},
1567 	{"Mono MIX", "DAC L2 Switch", "DAC L2"},
1568 	{"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
1569 	{"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
1570 	{"Mono MIX", "BST1 Switch", "BST1"},
1571 
1572 	{"MONOP", NULL, "Mono MIX"},
1573 	{"MONON", NULL, "Mono MIX"},
1574 	{"MONOP", NULL, "Improve MONO Amp Drv"},
1575 };
1576 
1577 static const struct snd_soc_dapm_route rt5639_specific_dapm_routes[] = {
1578 	{"Stereo DAC MIXL", "DAC L2 Switch", "IF2 DAC L"},
1579 	{"Stereo DAC MIXR", "DAC R2 Switch", "IF2 DAC R"},
1580 
1581 	{"Mono DAC MIXL", "DAC L2 Switch", "IF2 DAC L"},
1582 	{"Mono DAC MIXL", "DAC R2 Switch", "IF2 DAC R"},
1583 
1584 	{"Mono DAC MIXR", "DAC R2 Switch", "IF2 DAC R"},
1585 	{"Mono DAC MIXR", "DAC L2 Switch", "IF2 DAC L"},
1586 
1587 	{"DIG MIXL", "DAC L2 Switch", "IF2 DAC L"},
1588 	{"DIG MIXR", "DAC R2 Switch", "IF2 DAC R"},
1589 
1590 	{"IF2 DAC L", NULL, "DAC L2 Filter"},
1591 	{"IF2 DAC R", NULL, "DAC R2 Filter"},
1592 };
1593 
1594 static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
1595 {
1596 	int ret = 0, val;
1597 
1598 	if (codec == NULL)
1599 		return -EINVAL;
1600 
1601 	val = snd_soc_read(codec, RT5640_I2S1_SDP);
1602 	val = (val & RT5640_I2S_IF_MASK) >> RT5640_I2S_IF_SFT;
1603 	switch (dai_id) {
1604 	case RT5640_AIF1:
1605 		switch (val) {
1606 		case RT5640_IF_123:
1607 		case RT5640_IF_132:
1608 			ret |= RT5640_U_IF1;
1609 			break;
1610 		case RT5640_IF_113:
1611 			ret |= RT5640_U_IF1;
1612 		case RT5640_IF_312:
1613 		case RT5640_IF_213:
1614 			ret |= RT5640_U_IF2;
1615 			break;
1616 		}
1617 		break;
1618 
1619 	case RT5640_AIF2:
1620 		switch (val) {
1621 		case RT5640_IF_231:
1622 		case RT5640_IF_213:
1623 			ret |= RT5640_U_IF1;
1624 			break;
1625 		case RT5640_IF_223:
1626 			ret |= RT5640_U_IF1;
1627 		case RT5640_IF_123:
1628 		case RT5640_IF_321:
1629 			ret |= RT5640_U_IF2;
1630 			break;
1631 		}
1632 		break;
1633 
1634 	default:
1635 		ret = -EINVAL;
1636 		break;
1637 	}
1638 
1639 	return ret;
1640 }
1641 
1642 static int get_clk_info(int sclk, int rate)
1643 {
1644 	int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
1645 
1646 	if (sclk <= 0 || rate <= 0)
1647 		return -EINVAL;
1648 
1649 	rate = rate << 8;
1650 	for (i = 0; i < ARRAY_SIZE(pd); i++)
1651 		if (sclk == rate * pd[i])
1652 			return i;
1653 
1654 	return -EINVAL;
1655 }
1656 
1657 static int rt5640_hw_params(struct snd_pcm_substream *substream,
1658 	struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1659 {
1660 	struct snd_soc_codec *codec = dai->codec;
1661 	struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1662 	unsigned int val_len = 0, val_clk, mask_clk;
1663 	int dai_sel, pre_div, bclk_ms, frame_size;
1664 
1665 	rt5640->lrck[dai->id] = params_rate(params);
1666 	pre_div = get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);
1667 	if (pre_div < 0) {
1668 		dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n",
1669 			rt5640->lrck[dai->id], dai->id);
1670 		return -EINVAL;
1671 	}
1672 	frame_size = snd_soc_params_to_frame_size(params);
1673 	if (frame_size < 0) {
1674 		dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
1675 		return frame_size;
1676 	}
1677 	if (frame_size > 32)
1678 		bclk_ms = 1;
1679 	else
1680 		bclk_ms = 0;
1681 	rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms);
1682 
1683 	dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1684 		rt5640->bclk[dai->id], rt5640->lrck[dai->id]);
1685 	dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1686 				bclk_ms, pre_div, dai->id);
1687 
1688 	switch (params_width(params)) {
1689 	case 16:
1690 		break;
1691 	case 20:
1692 		val_len |= RT5640_I2S_DL_20;
1693 		break;
1694 	case 24:
1695 		val_len |= RT5640_I2S_DL_24;
1696 		break;
1697 	case 8:
1698 		val_len |= RT5640_I2S_DL_8;
1699 		break;
1700 	default:
1701 		return -EINVAL;
1702 	}
1703 
1704 	dai_sel = get_sdp_info(codec, dai->id);
1705 	if (dai_sel < 0) {
1706 		dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1707 		return -EINVAL;
1708 	}
1709 	if (dai_sel & RT5640_U_IF1) {
1710 		mask_clk = RT5640_I2S_BCLK_MS1_MASK | RT5640_I2S_PD1_MASK;
1711 		val_clk = bclk_ms << RT5640_I2S_BCLK_MS1_SFT |
1712 			pre_div << RT5640_I2S_PD1_SFT;
1713 		snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1714 			RT5640_I2S_DL_MASK, val_len);
1715 		snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1716 	}
1717 	if (dai_sel & RT5640_U_IF2) {
1718 		mask_clk = RT5640_I2S_BCLK_MS2_MASK | RT5640_I2S_PD2_MASK;
1719 		val_clk = bclk_ms << RT5640_I2S_BCLK_MS2_SFT |
1720 			pre_div << RT5640_I2S_PD2_SFT;
1721 		snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1722 			RT5640_I2S_DL_MASK, val_len);
1723 		snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1724 	}
1725 
1726 	return 0;
1727 }
1728 
1729 static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1730 {
1731 	struct snd_soc_codec *codec = dai->codec;
1732 	struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1733 	unsigned int reg_val = 0;
1734 	int dai_sel;
1735 
1736 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1737 	case SND_SOC_DAIFMT_CBM_CFM:
1738 		rt5640->master[dai->id] = 1;
1739 		break;
1740 	case SND_SOC_DAIFMT_CBS_CFS:
1741 		reg_val |= RT5640_I2S_MS_S;
1742 		rt5640->master[dai->id] = 0;
1743 		break;
1744 	default:
1745 		return -EINVAL;
1746 	}
1747 
1748 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1749 	case SND_SOC_DAIFMT_NB_NF:
1750 		break;
1751 	case SND_SOC_DAIFMT_IB_NF:
1752 		reg_val |= RT5640_I2S_BP_INV;
1753 		break;
1754 	default:
1755 		return -EINVAL;
1756 	}
1757 
1758 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1759 	case SND_SOC_DAIFMT_I2S:
1760 		break;
1761 	case SND_SOC_DAIFMT_LEFT_J:
1762 		reg_val |= RT5640_I2S_DF_LEFT;
1763 		break;
1764 	case SND_SOC_DAIFMT_DSP_A:
1765 		reg_val |= RT5640_I2S_DF_PCM_A;
1766 		break;
1767 	case SND_SOC_DAIFMT_DSP_B:
1768 		reg_val  |= RT5640_I2S_DF_PCM_B;
1769 		break;
1770 	default:
1771 		return -EINVAL;
1772 	}
1773 
1774 	dai_sel = get_sdp_info(codec, dai->id);
1775 	if (dai_sel < 0) {
1776 		dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1777 		return -EINVAL;
1778 	}
1779 	if (dai_sel & RT5640_U_IF1) {
1780 		snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1781 			RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1782 			RT5640_I2S_DF_MASK, reg_val);
1783 	}
1784 	if (dai_sel & RT5640_U_IF2) {
1785 		snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1786 			RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1787 			RT5640_I2S_DF_MASK, reg_val);
1788 	}
1789 
1790 	return 0;
1791 }
1792 
1793 static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
1794 		int clk_id, unsigned int freq, int dir)
1795 {
1796 	struct snd_soc_codec *codec = dai->codec;
1797 	struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1798 	unsigned int reg_val = 0;
1799 
1800 	if (freq == rt5640->sysclk && clk_id == rt5640->sysclk_src)
1801 		return 0;
1802 
1803 	switch (clk_id) {
1804 	case RT5640_SCLK_S_MCLK:
1805 		reg_val |= RT5640_SCLK_SRC_MCLK;
1806 		break;
1807 	case RT5640_SCLK_S_PLL1:
1808 		reg_val |= RT5640_SCLK_SRC_PLL1;
1809 		break;
1810 	default:
1811 		dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1812 		return -EINVAL;
1813 	}
1814 	snd_soc_update_bits(codec, RT5640_GLB_CLK,
1815 		RT5640_SCLK_SRC_MASK, reg_val);
1816 	rt5640->sysclk = freq;
1817 	rt5640->sysclk_src = clk_id;
1818 
1819 	dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1820 	return 0;
1821 }
1822 
1823 /**
1824  * rt5640_pll_calc - Calculate PLL M/N/K code.
1825  * @freq_in: external clock provided to codec.
1826  * @freq_out: target clock which codec works on.
1827  * @pll_code: Pointer to structure with M, N, K and bypass flag.
1828  *
1829  * Calculate M/N/K code to configure PLL for codec. And K is assigned to 2
1830  * which make calculation more efficiently.
1831  *
1832  * Returns 0 for success or negative error code.
1833  */
1834 static int rt5640_pll_calc(const unsigned int freq_in,
1835 	const unsigned int freq_out, struct rt5640_pll_code *pll_code)
1836 {
1837 	int max_n = RT5640_PLL_N_MAX, max_m = RT5640_PLL_M_MAX;
1838 	int n = 0, m = 0, red, n_t, m_t, in_t, out_t;
1839 	int red_t = abs(freq_out - freq_in);
1840 	bool bypass = false;
1841 
1842 	if (RT5640_PLL_INP_MAX < freq_in || RT5640_PLL_INP_MIN > freq_in)
1843 		return -EINVAL;
1844 
1845 	for (n_t = 0; n_t <= max_n; n_t++) {
1846 		in_t = (freq_in >> 1) + (freq_in >> 2) * n_t;
1847 		if (in_t < 0)
1848 			continue;
1849 		if (in_t == freq_out) {
1850 			bypass = true;
1851 			n = n_t;
1852 			goto code_find;
1853 		}
1854 		for (m_t = 0; m_t <= max_m; m_t++) {
1855 			out_t = in_t / (m_t + 2);
1856 			red = abs(out_t - freq_out);
1857 			if (red < red_t) {
1858 				n = n_t;
1859 				m = m_t;
1860 				if (red == 0)
1861 					goto code_find;
1862 				red_t = red;
1863 			}
1864 		}
1865 	}
1866 	pr_debug("Only get approximation about PLL\n");
1867 
1868 code_find:
1869 	pll_code->m_bp = bypass;
1870 	pll_code->m_code = m;
1871 	pll_code->n_code = n;
1872 	pll_code->k_code = 2;
1873 	return 0;
1874 }
1875 
1876 static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1877 			unsigned int freq_in, unsigned int freq_out)
1878 {
1879 	struct snd_soc_codec *codec = dai->codec;
1880 	struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1881 	struct rt5640_pll_code *pll_code = &rt5640->pll_code;
1882 	int ret, dai_sel;
1883 
1884 	if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
1885 	    freq_out == rt5640->pll_out)
1886 		return 0;
1887 
1888 	if (!freq_in || !freq_out) {
1889 		dev_dbg(codec->dev, "PLL disabled\n");
1890 
1891 		rt5640->pll_in = 0;
1892 		rt5640->pll_out = 0;
1893 		snd_soc_update_bits(codec, RT5640_GLB_CLK,
1894 			RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_MCLK);
1895 		return 0;
1896 	}
1897 
1898 	switch (source) {
1899 	case RT5640_PLL1_S_MCLK:
1900 		snd_soc_update_bits(codec, RT5640_GLB_CLK,
1901 			RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK);
1902 		break;
1903 	case RT5640_PLL1_S_BCLK1:
1904 	case RT5640_PLL1_S_BCLK2:
1905 		dai_sel = get_sdp_info(codec, dai->id);
1906 		if (dai_sel < 0) {
1907 			dev_err(codec->dev,
1908 				"Failed to get sdp info: %d\n", dai_sel);
1909 			return -EINVAL;
1910 		}
1911 		if (dai_sel & RT5640_U_IF1) {
1912 			snd_soc_update_bits(codec, RT5640_GLB_CLK,
1913 				RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1);
1914 		}
1915 		if (dai_sel & RT5640_U_IF2) {
1916 			snd_soc_update_bits(codec, RT5640_GLB_CLK,
1917 				RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2);
1918 		}
1919 		break;
1920 	default:
1921 		dev_err(codec->dev, "Unknown PLL source %d\n", source);
1922 		return -EINVAL;
1923 	}
1924 
1925 	ret = rt5640_pll_calc(freq_in, freq_out, pll_code);
1926 	if (ret < 0) {
1927 		dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
1928 		return ret;
1929 	}
1930 
1931 	dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=2\n", pll_code->m_bp,
1932 		(pll_code->m_bp ? 0 : pll_code->m_code), pll_code->n_code);
1933 
1934 	snd_soc_write(codec, RT5640_PLL_CTRL1,
1935 		pll_code->n_code << RT5640_PLL_N_SFT | pll_code->k_code);
1936 	snd_soc_write(codec, RT5640_PLL_CTRL2,
1937 		(pll_code->m_bp ? 0 : pll_code->m_code) << RT5640_PLL_M_SFT |
1938 		pll_code->m_bp << RT5640_PLL_M_BP_SFT);
1939 
1940 	rt5640->pll_in = freq_in;
1941 	rt5640->pll_out = freq_out;
1942 	rt5640->pll_src = source;
1943 
1944 	return 0;
1945 }
1946 
1947 static int rt5640_set_bias_level(struct snd_soc_codec *codec,
1948 			enum snd_soc_bias_level level)
1949 {
1950 	switch (level) {
1951 	case SND_SOC_BIAS_STANDBY:
1952 		if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
1953 			snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1954 				RT5640_PWR_VREF1 | RT5640_PWR_MB |
1955 				RT5640_PWR_BG | RT5640_PWR_VREF2,
1956 				RT5640_PWR_VREF1 | RT5640_PWR_MB |
1957 				RT5640_PWR_BG | RT5640_PWR_VREF2);
1958 			usleep_range(10000, 15000);
1959 			snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1960 				RT5640_PWR_FV1 | RT5640_PWR_FV2,
1961 				RT5640_PWR_FV1 | RT5640_PWR_FV2);
1962 			snd_soc_update_bits(codec, RT5640_DUMMY1,
1963 						0x0301, 0x0301);
1964 			snd_soc_update_bits(codec, RT5640_MICBIAS,
1965 						0x0030, 0x0030);
1966 		}
1967 		break;
1968 
1969 	case SND_SOC_BIAS_OFF:
1970 		snd_soc_write(codec, RT5640_DEPOP_M1, 0x0004);
1971 		snd_soc_write(codec, RT5640_DEPOP_M2, 0x1100);
1972 		snd_soc_update_bits(codec, RT5640_DUMMY1, 0x1, 0);
1973 		snd_soc_write(codec, RT5640_PWR_DIG1, 0x0000);
1974 		snd_soc_write(codec, RT5640_PWR_DIG2, 0x0000);
1975 		snd_soc_write(codec, RT5640_PWR_VOL, 0x0000);
1976 		snd_soc_write(codec, RT5640_PWR_MIXER, 0x0000);
1977 		snd_soc_write(codec, RT5640_PWR_ANLG1, 0x0000);
1978 		snd_soc_write(codec, RT5640_PWR_ANLG2, 0x0000);
1979 		break;
1980 
1981 	default:
1982 		break;
1983 	}
1984 	codec->dapm.bias_level = level;
1985 
1986 	return 0;
1987 }
1988 
1989 static int rt5640_probe(struct snd_soc_codec *codec)
1990 {
1991 	struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1992 
1993 	rt5640->codec = codec;
1994 
1995 	rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
1996 
1997 	snd_soc_update_bits(codec, RT5640_DUMMY1, 0x0301, 0x0301);
1998 	snd_soc_update_bits(codec, RT5640_MICBIAS, 0x0030, 0x0030);
1999 	snd_soc_update_bits(codec, RT5640_DSP_PATH2, 0xfc00, 0x0c00);
2000 
2001 	switch (snd_soc_read(codec, RT5640_RESET) & RT5640_ID_MASK) {
2002 	case RT5640_ID_5640:
2003 	case RT5640_ID_5642:
2004 		snd_soc_add_codec_controls(codec,
2005 			rt5640_specific_snd_controls,
2006 			ARRAY_SIZE(rt5640_specific_snd_controls));
2007 		snd_soc_dapm_new_controls(&codec->dapm,
2008 			rt5640_specific_dapm_widgets,
2009 			ARRAY_SIZE(rt5640_specific_dapm_widgets));
2010 		snd_soc_dapm_add_routes(&codec->dapm,
2011 			rt5640_specific_dapm_routes,
2012 			ARRAY_SIZE(rt5640_specific_dapm_routes));
2013 		break;
2014 	case RT5640_ID_5639:
2015 		snd_soc_dapm_new_controls(&codec->dapm,
2016 			rt5639_specific_dapm_widgets,
2017 			ARRAY_SIZE(rt5639_specific_dapm_widgets));
2018 		snd_soc_dapm_add_routes(&codec->dapm,
2019 			rt5639_specific_dapm_routes,
2020 			ARRAY_SIZE(rt5639_specific_dapm_routes));
2021 		break;
2022 	default:
2023 		dev_err(codec->dev,
2024 			"The driver is for RT5639 RT5640 or RT5642 only\n");
2025 		return -ENODEV;
2026 	}
2027 
2028 	return 0;
2029 }
2030 
2031 static int rt5640_remove(struct snd_soc_codec *codec)
2032 {
2033 	rt5640_reset(codec);
2034 
2035 	return 0;
2036 }
2037 
2038 #ifdef CONFIG_PM
2039 static int rt5640_suspend(struct snd_soc_codec *codec)
2040 {
2041 	struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2042 
2043 	rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
2044 	rt5640_reset(codec);
2045 	regcache_cache_only(rt5640->regmap, true);
2046 	regcache_mark_dirty(rt5640->regmap);
2047 	if (gpio_is_valid(rt5640->pdata.ldo1_en))
2048 		gpio_set_value_cansleep(rt5640->pdata.ldo1_en, 0);
2049 
2050 	return 0;
2051 }
2052 
2053 static int rt5640_resume(struct snd_soc_codec *codec)
2054 {
2055 	struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2056 
2057 	if (gpio_is_valid(rt5640->pdata.ldo1_en)) {
2058 		gpio_set_value_cansleep(rt5640->pdata.ldo1_en, 1);
2059 		msleep(400);
2060 	}
2061 
2062 	regcache_cache_only(rt5640->regmap, false);
2063 	regcache_sync(rt5640->regmap);
2064 
2065 	return 0;
2066 }
2067 #else
2068 #define rt5640_suspend NULL
2069 #define rt5640_resume NULL
2070 #endif
2071 
2072 #define RT5640_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2073 #define RT5640_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2074 			SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2075 
2076 static const struct snd_soc_dai_ops rt5640_aif_dai_ops = {
2077 	.hw_params = rt5640_hw_params,
2078 	.set_fmt = rt5640_set_dai_fmt,
2079 	.set_sysclk = rt5640_set_dai_sysclk,
2080 	.set_pll = rt5640_set_dai_pll,
2081 };
2082 
2083 static struct snd_soc_dai_driver rt5640_dai[] = {
2084 	{
2085 		.name = "rt5640-aif1",
2086 		.id = RT5640_AIF1,
2087 		.playback = {
2088 			.stream_name = "AIF1 Playback",
2089 			.channels_min = 1,
2090 			.channels_max = 2,
2091 			.rates = RT5640_STEREO_RATES,
2092 			.formats = RT5640_FORMATS,
2093 		},
2094 		.capture = {
2095 			.stream_name = "AIF1 Capture",
2096 			.channels_min = 1,
2097 			.channels_max = 2,
2098 			.rates = RT5640_STEREO_RATES,
2099 			.formats = RT5640_FORMATS,
2100 		},
2101 		.ops = &rt5640_aif_dai_ops,
2102 	},
2103 	{
2104 		.name = "rt5640-aif2",
2105 		.id = RT5640_AIF2,
2106 		.playback = {
2107 			.stream_name = "AIF2 Playback",
2108 			.channels_min = 1,
2109 			.channels_max = 2,
2110 			.rates = RT5640_STEREO_RATES,
2111 			.formats = RT5640_FORMATS,
2112 		},
2113 		.capture = {
2114 			.stream_name = "AIF2 Capture",
2115 			.channels_min = 1,
2116 			.channels_max = 2,
2117 			.rates = RT5640_STEREO_RATES,
2118 			.formats = RT5640_FORMATS,
2119 		},
2120 		.ops = &rt5640_aif_dai_ops,
2121 	},
2122 };
2123 
2124 static struct snd_soc_codec_driver soc_codec_dev_rt5640 = {
2125 	.probe = rt5640_probe,
2126 	.remove = rt5640_remove,
2127 	.suspend = rt5640_suspend,
2128 	.resume = rt5640_resume,
2129 	.set_bias_level = rt5640_set_bias_level,
2130 	.idle_bias_off = true,
2131 	.controls = rt5640_snd_controls,
2132 	.num_controls = ARRAY_SIZE(rt5640_snd_controls),
2133 	.dapm_widgets = rt5640_dapm_widgets,
2134 	.num_dapm_widgets = ARRAY_SIZE(rt5640_dapm_widgets),
2135 	.dapm_routes = rt5640_dapm_routes,
2136 	.num_dapm_routes = ARRAY_SIZE(rt5640_dapm_routes),
2137 };
2138 
2139 static const struct regmap_config rt5640_regmap = {
2140 	.reg_bits = 8,
2141 	.val_bits = 16,
2142 
2143 	.max_register = RT5640_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5640_ranges) *
2144 					       RT5640_PR_SPACING),
2145 	.volatile_reg = rt5640_volatile_register,
2146 	.readable_reg = rt5640_readable_register,
2147 
2148 	.cache_type = REGCACHE_RBTREE,
2149 	.reg_defaults = rt5640_reg,
2150 	.num_reg_defaults = ARRAY_SIZE(rt5640_reg),
2151 	.ranges = rt5640_ranges,
2152 	.num_ranges = ARRAY_SIZE(rt5640_ranges),
2153 };
2154 
2155 static const struct i2c_device_id rt5640_i2c_id[] = {
2156 	{ "rt5640", 0 },
2157 	{ "rt5639", 0 },
2158 	{ "rt5642", 0 },
2159 	{ }
2160 };
2161 MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);
2162 
2163 #if defined(CONFIG_OF)
2164 static const struct of_device_id rt5640_of_match[] = {
2165 	{ .compatible = "realtek,rt5639", },
2166 	{ .compatible = "realtek,rt5640", },
2167 	{},
2168 };
2169 MODULE_DEVICE_TABLE(of, rt5640_of_match);
2170 #endif
2171 
2172 #ifdef CONFIG_ACPI
2173 static struct acpi_device_id rt5640_acpi_match[] = {
2174 	{ "INT33CA", 0 },
2175 	{ "10EC5640", 0 },
2176 	{ },
2177 };
2178 MODULE_DEVICE_TABLE(acpi, rt5640_acpi_match);
2179 #endif
2180 
2181 static int rt5640_parse_dt(struct rt5640_priv *rt5640, struct device_node *np)
2182 {
2183 	rt5640->pdata.in1_diff = of_property_read_bool(np,
2184 					"realtek,in1-differential");
2185 	rt5640->pdata.in2_diff = of_property_read_bool(np,
2186 					"realtek,in2-differential");
2187 
2188 	rt5640->pdata.ldo1_en = of_get_named_gpio(np,
2189 					"realtek,ldo1-en-gpios", 0);
2190 	/*
2191 	 * LDO1_EN is optional (it may be statically tied on the board).
2192 	 * -ENOENT means that the property doesn't exist, i.e. there is no
2193 	 * GPIO, so is not an error. Any other error code means the property
2194 	 * exists, but could not be parsed.
2195 	 */
2196 	if (!gpio_is_valid(rt5640->pdata.ldo1_en) &&
2197 			(rt5640->pdata.ldo1_en != -ENOENT))
2198 		return rt5640->pdata.ldo1_en;
2199 
2200 	return 0;
2201 }
2202 
2203 static int rt5640_i2c_probe(struct i2c_client *i2c,
2204 		    const struct i2c_device_id *id)
2205 {
2206 	struct rt5640_platform_data *pdata = dev_get_platdata(&i2c->dev);
2207 	struct rt5640_priv *rt5640;
2208 	int ret;
2209 	unsigned int val;
2210 
2211 	rt5640 = devm_kzalloc(&i2c->dev,
2212 				sizeof(struct rt5640_priv),
2213 				GFP_KERNEL);
2214 	if (NULL == rt5640)
2215 		return -ENOMEM;
2216 	i2c_set_clientdata(i2c, rt5640);
2217 
2218 	if (pdata) {
2219 		rt5640->pdata = *pdata;
2220 		/*
2221 		 * Translate zero'd out (default) pdata value to an invalid
2222 		 * GPIO ID. This makes the pdata and DT paths consistent in
2223 		 * terms of the value left in this field when no GPIO is
2224 		 * specified, but means we can't actually use GPIO 0.
2225 		 */
2226 		if (!rt5640->pdata.ldo1_en)
2227 			rt5640->pdata.ldo1_en = -EINVAL;
2228 	} else if (i2c->dev.of_node) {
2229 		ret = rt5640_parse_dt(rt5640, i2c->dev.of_node);
2230 		if (ret)
2231 			return ret;
2232 	} else
2233 		rt5640->pdata.ldo1_en = -EINVAL;
2234 
2235 	rt5640->regmap = devm_regmap_init_i2c(i2c, &rt5640_regmap);
2236 	if (IS_ERR(rt5640->regmap)) {
2237 		ret = PTR_ERR(rt5640->regmap);
2238 		dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2239 			ret);
2240 		return ret;
2241 	}
2242 
2243 	if (gpio_is_valid(rt5640->pdata.ldo1_en)) {
2244 		ret = devm_gpio_request_one(&i2c->dev, rt5640->pdata.ldo1_en,
2245 					    GPIOF_OUT_INIT_HIGH,
2246 					    "RT5640 LDO1_EN");
2247 		if (ret < 0) {
2248 			dev_err(&i2c->dev, "Failed to request LDO1_EN %d: %d\n",
2249 				rt5640->pdata.ldo1_en, ret);
2250 			return ret;
2251 		}
2252 		msleep(400);
2253 	}
2254 
2255 	regmap_read(rt5640->regmap, RT5640_VENDOR_ID2, &val);
2256 	if (val != RT5640_DEVICE_ID) {
2257 		dev_err(&i2c->dev,
2258 			"Device with ID register %x is not rt5640/39\n", val);
2259 		return -ENODEV;
2260 	}
2261 
2262 	regmap_write(rt5640->regmap, RT5640_RESET, 0);
2263 
2264 	ret = regmap_register_patch(rt5640->regmap, init_list,
2265 				    ARRAY_SIZE(init_list));
2266 	if (ret != 0)
2267 		dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2268 
2269 	if (rt5640->pdata.in1_diff)
2270 		regmap_update_bits(rt5640->regmap, RT5640_IN1_IN2,
2271 					RT5640_IN_DF1, RT5640_IN_DF1);
2272 
2273 	if (rt5640->pdata.in2_diff)
2274 		regmap_update_bits(rt5640->regmap, RT5640_IN3_IN4,
2275 					RT5640_IN_DF2, RT5640_IN_DF2);
2276 
2277 	if (rt5640->pdata.dmic_en) {
2278 		regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
2279 			RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
2280 
2281 		if (rt5640->pdata.dmic1_data_pin) {
2282 			regmap_update_bits(rt5640->regmap, RT5640_DMIC,
2283 				RT5640_DMIC_1_DP_MASK, RT5640_DMIC_1_DP_GPIO3);
2284 			regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
2285 				RT5640_GP3_PIN_MASK, RT5640_GP3_PIN_DMIC1_SDA);
2286 		}
2287 
2288 		if (rt5640->pdata.dmic2_data_pin) {
2289 			regmap_update_bits(rt5640->regmap, RT5640_DMIC,
2290 				RT5640_DMIC_2_DP_MASK, RT5640_DMIC_2_DP_GPIO4);
2291 			regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
2292 				RT5640_GP4_PIN_MASK, RT5640_GP4_PIN_DMIC2_SDA);
2293 		}
2294 	}
2295 
2296 	rt5640->hp_mute = 1;
2297 
2298 	ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640,
2299 			rt5640_dai, ARRAY_SIZE(rt5640_dai));
2300 	if (ret < 0)
2301 		goto err;
2302 
2303 	return 0;
2304 err:
2305 	return ret;
2306 }
2307 
2308 static int rt5640_i2c_remove(struct i2c_client *i2c)
2309 {
2310 	snd_soc_unregister_codec(&i2c->dev);
2311 
2312 	return 0;
2313 }
2314 
2315 static struct i2c_driver rt5640_i2c_driver = {
2316 	.driver = {
2317 		.name = "rt5640",
2318 		.owner = THIS_MODULE,
2319 		.acpi_match_table = ACPI_PTR(rt5640_acpi_match),
2320 		.of_match_table = of_match_ptr(rt5640_of_match),
2321 	},
2322 	.probe = rt5640_i2c_probe,
2323 	.remove   = rt5640_i2c_remove,
2324 	.id_table = rt5640_i2c_id,
2325 };
2326 module_i2c_driver(rt5640_i2c_driver);
2327 
2328 MODULE_DESCRIPTION("ASoC RT5640/RT5639 driver");
2329 MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
2330 MODULE_LICENSE("GPL v2");
2331