xref: /linux/sound/soc/codecs/rt1320-sdw.h (revision b8e4b0529d59a3ccd0b25a31d3cfc8b0f3b34068)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * rt1320-sdw.h -- RT1320 SDCA ALSA SoC audio driver header
4  *
5  * Copyright(c) 2024 Realtek Semiconductor Corp.
6  */
7 
8 #ifndef __RT1320_SDW_H__
9 #define __RT1320_SDW_H__
10 
11 #include <linux/regmap.h>
12 #include <linux/soundwire/sdw.h>
13 #include <linux/soundwire/sdw_type.h>
14 #include <linux/soundwire/sdw_registers.h>
15 #include <sound/soc.h>
16 
17 /* imp-defined registers */
18 #define RT1320_DEV_VERSION_ID_1 0xc404
19 
20 #define RT1320_KR0_STATUS_CNT 0x1000f008
21 #define RT1320_HIFI_VER_0 0x3fe2e000
22 #define RT1320_HIFI_VER_1 0x3fe2e001
23 #define RT1320_HIFI_VER_2 0x3fe2e002
24 #define RT1320_HIFI_VER_3 0x3fe2e003
25 
26 /* RT1320 SDCA Control - function number */
27 #define FUNC_NUM_AMP 0x04
28 
29 /* RT1320 SDCA entity */
30 #define RT1320_SDCA_ENT0 0x00
31 #define RT1320_SDCA_ENT_PDE11 0x2a
32 #define RT1320_SDCA_ENT_PDE23 0x33
33 #define RT1320_SDCA_ENT_PDE27 0x27
34 #define RT1320_SDCA_ENT_FU14 0x32
35 #define RT1320_SDCA_ENT_FU21 0x03
36 #define RT1320_SDCA_ENT_FU113 0x30
37 #define RT1320_SDCA_ENT_CS14 0x13
38 #define RT1320_SDCA_ENT_CS21 0x21
39 #define RT1320_SDCA_ENT_CS113 0x12
40 #define RT1320_SDCA_ENT_SAPU 0x29
41 #define RT1320_SDCA_ENT_PPU21 0x04
42 
43 /* RT1320 SDCA control */
44 #define RT1320_SDCA_CTL_SAMPLE_FREQ_INDEX 0x10
45 #define RT1320_SDCA_CTL_REQ_POWER_STATE 0x01
46 #define RT1320_SDCA_CTL_FU_MUTE 0x01
47 #define RT1320_SDCA_CTL_FU_VOLUME 0x02
48 #define RT1320_SDCA_CTL_SAPU_PROTECTION_MODE 0x10
49 #define RT1320_SDCA_CTL_SAPU_PROTECTION_STATUS 0x11
50 #define RT1320_SDCA_CTL_POSTURE_NUMBER 0x10
51 #define RT1320_SDCA_CTL_FUNC_STATUS 0x10
52 
53 /* RT1320 SDCA channel */
54 #define CH_01 0x01
55 #define CH_02 0x02
56 
57 /* Function_Status */
58 #define FUNCTION_NEEDS_INITIALIZATION		BIT(5)
59 
60 /* Sample Frequency Index */
61 #define RT1320_SDCA_RATE_16000HZ		0x04
62 #define RT1320_SDCA_RATE_32000HZ		0x07
63 #define RT1320_SDCA_RATE_44100HZ		0x08
64 #define RT1320_SDCA_RATE_48000HZ		0x09
65 #define RT1320_SDCA_RATE_96000HZ		0x0b
66 #define RT1320_SDCA_RATE_192000HZ		0x0d
67 
68 enum {
69 	RT1320_AIF1,
70 };
71 
72 /*
73  * The version id will be useful to distinguish the capability between the different IC versions.
74  * Currently, VA and VB have different DSP FW versions.
75  */
76 enum rt1320_version_id {
77 	RT1320_VA,
78 	RT1320_VB,
79 };
80 
81 #define RT1320_VER_B_ID 0x07392238
82 
83 struct rt1320_sdw_priv {
84 	struct snd_soc_component *component;
85 	struct regmap *regmap;
86 	struct regmap *mbq_regmap;
87 	struct sdw_slave *sdw_slave;
88 	struct sdw_bus_params params;
89 	bool hw_init;
90 	bool first_hw_init;
91 	int version_id;
92 };
93 
94 #endif /* __RT1320_SDW_H__ */
95