1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * rt1320-sdw.h -- RT1320 SDCA ALSA SoC audio driver header 4 * 5 * Copyright(c) 2024 Realtek Semiconductor Corp. 6 */ 7 8 #ifndef __RT1320_SDW_H__ 9 #define __RT1320_SDW_H__ 10 11 #include <linux/regmap.h> 12 #include <linux/soundwire/sdw.h> 13 #include <linux/soundwire/sdw_type.h> 14 #include <linux/soundwire/sdw_registers.h> 15 #include <sound/soc.h> 16 17 /* imp-defined registers */ 18 #define RT1320_DEV_VERSION_ID_1 0xc404 19 20 #define RT1320_KR0_STATUS_CNT 0x1000f008 21 #define RT1320_KR0_INT_READY 0x1000f021 22 #define RT1320_HIFI_VER_0 0x3fe2e000 23 #define RT1320_HIFI_VER_1 0x3fe2e001 24 #define RT1320_HIFI_VER_2 0x3fe2e002 25 #define RT1320_HIFI_VER_3 0x3fe2e003 26 27 /* RT1320 SDCA Control - function number */ 28 #define FUNC_NUM_AMP 0x04 29 30 /* RT1320 SDCA entity */ 31 #define RT1320_SDCA_ENT0 0x00 32 #define RT1320_SDCA_ENT_PDE11 0x2a 33 #define RT1320_SDCA_ENT_PDE23 0x33 34 #define RT1320_SDCA_ENT_PDE27 0x27 35 #define RT1320_SDCA_ENT_FU14 0x32 36 #define RT1320_SDCA_ENT_FU21 0x03 37 #define RT1320_SDCA_ENT_FU113 0x30 38 #define RT1320_SDCA_ENT_CS14 0x13 39 #define RT1320_SDCA_ENT_CS21 0x21 40 #define RT1320_SDCA_ENT_CS113 0x12 41 #define RT1320_SDCA_ENT_SAPU 0x29 42 #define RT1320_SDCA_ENT_PPU21 0x04 43 44 /* RT1320 SDCA control */ 45 #define RT1320_SDCA_CTL_SAMPLE_FREQ_INDEX 0x10 46 #define RT1320_SDCA_CTL_REQ_POWER_STATE 0x01 47 #define RT1320_SDCA_CTL_ACTUAL_POWER_STATE 0x10 48 #define RT1320_SDCA_CTL_FU_MUTE 0x01 49 #define RT1320_SDCA_CTL_FU_VOLUME 0x02 50 #define RT1320_SDCA_CTL_SAPU_PROTECTION_MODE 0x10 51 #define RT1320_SDCA_CTL_SAPU_PROTECTION_STATUS 0x11 52 #define RT1320_SDCA_CTL_POSTURE_NUMBER 0x10 53 #define RT1320_SDCA_CTL_FUNC_STATUS 0x10 54 55 /* RT1320 SDCA channel */ 56 #define CH_01 0x01 57 #define CH_02 0x02 58 59 /* Function_Status */ 60 #define FUNCTION_NEEDS_INITIALIZATION BIT(5) 61 62 /* Sample Frequency Index */ 63 #define RT1320_SDCA_RATE_16000HZ 0x04 64 #define RT1320_SDCA_RATE_32000HZ 0x07 65 #define RT1320_SDCA_RATE_44100HZ 0x08 66 #define RT1320_SDCA_RATE_48000HZ 0x09 67 #define RT1320_SDCA_RATE_96000HZ 0x0b 68 #define RT1320_SDCA_RATE_192000HZ 0x0d 69 70 enum { 71 RT1320_AIF1, 72 }; 73 74 /* 75 * The version id will be useful to distinguish the capability between the different IC versions. 76 * Currently, VA and VB have different DSP FW versions. 77 */ 78 enum rt1320_version_id { 79 RT1320_VA, 80 RT1320_VB, 81 RT1320_VC, 82 }; 83 84 #define RT1320_VER_B_ID 0x07392238 85 86 struct rt1320_sdw_priv { 87 struct snd_soc_component *component; 88 struct regmap *regmap; 89 struct regmap *mbq_regmap; 90 struct sdw_slave *sdw_slave; 91 struct sdw_bus_params params; 92 bool hw_init; 93 bool first_hw_init; 94 int version_id; 95 }; 96 97 #endif /* __RT1320_SDW_H__ */ 98