xref: /linux/sound/soc/codecs/rk3328_codec.h (revision 597473720f4dc69749542bfcfed4a927a43d935e)
1*c3275903SKatsuhiro Suzuki /* SPDX-License-Identifier: GPL-2.0 */
2*c3275903SKatsuhiro Suzuki /*
3*c3275903SKatsuhiro Suzuki  * rk3328 ALSA SoC Audio driver
4*c3275903SKatsuhiro Suzuki  *
5*c3275903SKatsuhiro Suzuki  * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd All rights reserved.
6*c3275903SKatsuhiro Suzuki  */
7*c3275903SKatsuhiro Suzuki 
8*c3275903SKatsuhiro Suzuki #ifndef _RK3328_CODEC_H
9*c3275903SKatsuhiro Suzuki #define _RK3328_CODEC_H
10*c3275903SKatsuhiro Suzuki 
11*c3275903SKatsuhiro Suzuki #include <linux/bitfield.h>
12*c3275903SKatsuhiro Suzuki 
13*c3275903SKatsuhiro Suzuki /* codec register */
14*c3275903SKatsuhiro Suzuki #define CODEC_RESET			(0x00 << 2)
15*c3275903SKatsuhiro Suzuki #define DAC_INIT_CTRL1			(0x03 << 2)
16*c3275903SKatsuhiro Suzuki #define DAC_INIT_CTRL2			(0x04 << 2)
17*c3275903SKatsuhiro Suzuki #define DAC_INIT_CTRL3			(0x05 << 2)
18*c3275903SKatsuhiro Suzuki #define DAC_PRECHARGE_CTRL		(0x22 << 2)
19*c3275903SKatsuhiro Suzuki #define DAC_PWR_CTRL			(0x23 << 2)
20*c3275903SKatsuhiro Suzuki #define DAC_CLK_CTRL			(0x24 << 2)
21*c3275903SKatsuhiro Suzuki #define HPMIX_CTRL			(0x25 << 2)
22*c3275903SKatsuhiro Suzuki #define DAC_SELECT			(0x26 << 2)
23*c3275903SKatsuhiro Suzuki #define HPOUT_CTRL			(0x27 << 2)
24*c3275903SKatsuhiro Suzuki #define HPOUTL_GAIN_CTRL		(0x28 << 2)
25*c3275903SKatsuhiro Suzuki #define HPOUTR_GAIN_CTRL		(0x29 << 2)
26*c3275903SKatsuhiro Suzuki #define HPOUT_POP_CTRL			(0x2a << 2)
27*c3275903SKatsuhiro Suzuki 
28*c3275903SKatsuhiro Suzuki /* REG00: CODEC_RESET */
29*c3275903SKatsuhiro Suzuki #define PWR_RST_BYPASS_DIS		(0x0 << 6)
30*c3275903SKatsuhiro Suzuki #define PWR_RST_BYPASS_EN		(0x1 << 6)
31*c3275903SKatsuhiro Suzuki #define DIG_CORE_RST			(0x0 << 1)
32*c3275903SKatsuhiro Suzuki #define DIG_CORE_WORK			(0x1 << 1)
33*c3275903SKatsuhiro Suzuki #define SYS_RST				(0x0 << 0)
34*c3275903SKatsuhiro Suzuki #define SYS_WORK			(0x1 << 0)
35*c3275903SKatsuhiro Suzuki 
36*c3275903SKatsuhiro Suzuki /* REG03: DAC_INIT_CTRL1 */
37*c3275903SKatsuhiro Suzuki #define PIN_DIRECTION_MASK		BIT(5)
38*c3275903SKatsuhiro Suzuki #define PIN_DIRECTION_IN		(0x0 << 5)
39*c3275903SKatsuhiro Suzuki #define PIN_DIRECTION_OUT		(0x1 << 5)
40*c3275903SKatsuhiro Suzuki #define DAC_I2S_MODE_MASK		BIT(4)
41*c3275903SKatsuhiro Suzuki #define DAC_I2S_MODE_SLAVE		(0x0 << 4)
42*c3275903SKatsuhiro Suzuki #define DAC_I2S_MODE_MASTER		(0x1 << 4)
43*c3275903SKatsuhiro Suzuki 
44*c3275903SKatsuhiro Suzuki /* REG04: DAC_INIT_CTRL2 */
45*c3275903SKatsuhiro Suzuki #define DAC_I2S_LRP_MASK		BIT(7)
46*c3275903SKatsuhiro Suzuki #define DAC_I2S_LRP_NORMAL		(0x0 << 7)
47*c3275903SKatsuhiro Suzuki #define DAC_I2S_LRP_REVERSAL		(0x1 << 7)
48*c3275903SKatsuhiro Suzuki #define DAC_VDL_MASK			GENMASK(6, 5)
49*c3275903SKatsuhiro Suzuki #define DAC_VDL_16BITS			(0x0 << 5)
50*c3275903SKatsuhiro Suzuki #define DAC_VDL_20BITS			(0x1 << 5)
51*c3275903SKatsuhiro Suzuki #define DAC_VDL_24BITS			(0x2 << 5)
52*c3275903SKatsuhiro Suzuki #define DAC_VDL_32BITS			(0x3 << 5)
53*c3275903SKatsuhiro Suzuki #define DAC_MODE_MASK			GENMASK(4, 3)
54*c3275903SKatsuhiro Suzuki #define DAC_MODE_RJM			(0x0 << 3)
55*c3275903SKatsuhiro Suzuki #define DAC_MODE_LJM			(0x1 << 3)
56*c3275903SKatsuhiro Suzuki #define DAC_MODE_I2S			(0x2 << 3)
57*c3275903SKatsuhiro Suzuki #define DAC_MODE_PCM			(0x3 << 3)
58*c3275903SKatsuhiro Suzuki #define DAC_LR_SWAP_MASK		BIT(2)
59*c3275903SKatsuhiro Suzuki #define DAC_LR_SWAP_DIS			(0x0 << 2)
60*c3275903SKatsuhiro Suzuki #define DAC_LR_SWAP_EN			(0x1 << 2)
61*c3275903SKatsuhiro Suzuki 
62*c3275903SKatsuhiro Suzuki /* REG05: DAC_INIT_CTRL3 */
63*c3275903SKatsuhiro Suzuki #define DAC_WL_MASK			GENMASK(3, 2)
64*c3275903SKatsuhiro Suzuki #define DAC_WL_16BITS			(0x0 << 2)
65*c3275903SKatsuhiro Suzuki #define DAC_WL_20BITS			(0x1 << 2)
66*c3275903SKatsuhiro Suzuki #define DAC_WL_24BITS			(0x2 << 2)
67*c3275903SKatsuhiro Suzuki #define DAC_WL_32BITS			(0x3 << 2)
68*c3275903SKatsuhiro Suzuki #define DAC_RST_MASK			BIT(1)
69*c3275903SKatsuhiro Suzuki #define DAC_RST_EN			(0x0 << 1)
70*c3275903SKatsuhiro Suzuki #define DAC_RST_DIS			(0x1 << 1)
71*c3275903SKatsuhiro Suzuki #define DAC_BCP_MASK			BIT(0)
72*c3275903SKatsuhiro Suzuki #define DAC_BCP_NORMAL			(0x0 << 0)
73*c3275903SKatsuhiro Suzuki #define DAC_BCP_REVERSAL		(0x1 << 0)
74*c3275903SKatsuhiro Suzuki 
75*c3275903SKatsuhiro Suzuki /* REG22: DAC_PRECHARGE_CTRL */
76*c3275903SKatsuhiro Suzuki #define DAC_CHARGE_XCHARGE_MASK		BIT(7)
77*c3275903SKatsuhiro Suzuki #define DAC_CHARGE_DISCHARGE		(0x0 << 7)
78*c3275903SKatsuhiro Suzuki #define DAC_CHARGE_PRECHARGE		(0x1 << 7)
79*c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_64I_MASK	BIT(6)
80*c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_64I		(0x1 << 6)
81*c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_32I_MASK	BIT(5)
82*c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_32I		(0x1 << 5)
83*c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_16I_MASK	BIT(4)
84*c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_16I		(0x1 << 4)
85*c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_08I_MASK	BIT(3)
86*c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_08I		(0x1 << 3)
87*c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_04I_MASK	BIT(2)
88*c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_04I		(0x1 << 2)
89*c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_02I_MASK	BIT(1)
90*c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_02I		(0x1 << 1)
91*c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_I_MASK	BIT(0)
92*c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_I		(0x1 << 0)
93*c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_ALL_MASK	GENMASK(6, 0)
94*c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_ALL_OFF	0x00
95*c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_ALL_ON	0x7f
96*c3275903SKatsuhiro Suzuki 
97*c3275903SKatsuhiro Suzuki /* REG23: DAC_PWR_CTRL */
98*c3275903SKatsuhiro Suzuki #define DAC_PWR_MASK			BIT(6)
99*c3275903SKatsuhiro Suzuki #define DAC_PWR_OFF			(0x0 << 6)
100*c3275903SKatsuhiro Suzuki #define DAC_PWR_ON			(0x1 << 6)
101*c3275903SKatsuhiro Suzuki #define DACL_PATH_REFV_MASK		BIT(5)
102*c3275903SKatsuhiro Suzuki #define DACL_PATH_REFV_OFF		(0x0 << 5)
103*c3275903SKatsuhiro Suzuki #define DACL_PATH_REFV_ON		(0x1 << 5)
104*c3275903SKatsuhiro Suzuki #define HPOUTL_ZERO_CROSSING_MASK	BIT(4)
105*c3275903SKatsuhiro Suzuki #define HPOUTL_ZERO_CROSSING_OFF	(0x0 << 4)
106*c3275903SKatsuhiro Suzuki #define HPOUTL_ZERO_CROSSING_ON		(0x1 << 4)
107*c3275903SKatsuhiro Suzuki #define DACR_PATH_REFV_MASK		BIT(1)
108*c3275903SKatsuhiro Suzuki #define DACR_PATH_REFV_OFF		(0x0 << 1)
109*c3275903SKatsuhiro Suzuki #define DACR_PATH_REFV_ON		(0x1 << 1)
110*c3275903SKatsuhiro Suzuki #define HPOUTR_ZERO_CROSSING_MASK	BIT(0)
111*c3275903SKatsuhiro Suzuki #define HPOUTR_ZERO_CROSSING_OFF	(0x0 << 0)
112*c3275903SKatsuhiro Suzuki #define HPOUTR_ZERO_CROSSING_ON		(0x1 << 0)
113*c3275903SKatsuhiro Suzuki 
114*c3275903SKatsuhiro Suzuki /* REG24: DAC_CLK_CTRL */
115*c3275903SKatsuhiro Suzuki #define DACL_REFV_MASK			BIT(7)
116*c3275903SKatsuhiro Suzuki #define DACL_REFV_OFF			(0x0 << 7)
117*c3275903SKatsuhiro Suzuki #define DACL_REFV_ON			(0x1 << 7)
118*c3275903SKatsuhiro Suzuki #define DACL_CLK_MASK			BIT(6)
119*c3275903SKatsuhiro Suzuki #define DACL_CLK_OFF			(0x0 << 6)
120*c3275903SKatsuhiro Suzuki #define DACL_CLK_ON			(0x1 << 6)
121*c3275903SKatsuhiro Suzuki #define DACL_MASK			BIT(5)
122*c3275903SKatsuhiro Suzuki #define DACL_OFF			(0x0 << 5)
123*c3275903SKatsuhiro Suzuki #define DACL_ON				(0x1 << 5)
124*c3275903SKatsuhiro Suzuki #define DACL_INIT_MASK			BIT(4)
125*c3275903SKatsuhiro Suzuki #define DACL_INIT_OFF			(0x0 << 4)
126*c3275903SKatsuhiro Suzuki #define DACL_INIT_ON			(0x1 << 4)
127*c3275903SKatsuhiro Suzuki #define DACR_REFV_MASK			BIT(3)
128*c3275903SKatsuhiro Suzuki #define DACR_REFV_OFF			(0x0 << 3)
129*c3275903SKatsuhiro Suzuki #define DACR_REFV_ON			(0x1 << 3)
130*c3275903SKatsuhiro Suzuki #define DACR_CLK_MASK			BIT(2)
131*c3275903SKatsuhiro Suzuki #define DACR_CLK_OFF			(0x0 << 2)
132*c3275903SKatsuhiro Suzuki #define DACR_CLK_ON			(0x1 << 2)
133*c3275903SKatsuhiro Suzuki #define DACR_MASK			BIT(1)
134*c3275903SKatsuhiro Suzuki #define DACR_OFF			(0x0 << 1)
135*c3275903SKatsuhiro Suzuki #define DACR_ON				(0x1 << 1)
136*c3275903SKatsuhiro Suzuki #define DACR_INIT_MASK			BIT(0)
137*c3275903SKatsuhiro Suzuki #define DACR_INIT_OFF			(0x0 << 0)
138*c3275903SKatsuhiro Suzuki #define DACR_INIT_ON			(0x1 << 0)
139*c3275903SKatsuhiro Suzuki 
140*c3275903SKatsuhiro Suzuki /* REG25: HPMIX_CTRL*/
141*c3275903SKatsuhiro Suzuki #define HPMIXL_MASK			BIT(6)
142*c3275903SKatsuhiro Suzuki #define HPMIXL_DIS			(0x0 << 6)
143*c3275903SKatsuhiro Suzuki #define HPMIXL_EN			(0x1 << 6)
144*c3275903SKatsuhiro Suzuki #define HPMIXL_INIT_MASK		BIT(5)
145*c3275903SKatsuhiro Suzuki #define HPMIXL_INIT_DIS			(0x0 << 5)
146*c3275903SKatsuhiro Suzuki #define HPMIXL_INIT_EN			(0x1 << 5)
147*c3275903SKatsuhiro Suzuki #define HPMIXL_INIT2_MASK		BIT(4)
148*c3275903SKatsuhiro Suzuki #define HPMIXL_INIT2_DIS		(0x0 << 4)
149*c3275903SKatsuhiro Suzuki #define HPMIXL_INIT2_EN			(0x1 << 4)
150*c3275903SKatsuhiro Suzuki #define HPMIXR_MASK			BIT(2)
151*c3275903SKatsuhiro Suzuki #define HPMIXR_DIS			(0x0 << 2)
152*c3275903SKatsuhiro Suzuki #define HPMIXR_EN			(0x1 << 2)
153*c3275903SKatsuhiro Suzuki #define HPMIXR_INIT_MASK		BIT(1)
154*c3275903SKatsuhiro Suzuki #define HPMIXR_INIT_DIS			(0x0 << 1)
155*c3275903SKatsuhiro Suzuki #define HPMIXR_INIT_EN			(0x1 << 1)
156*c3275903SKatsuhiro Suzuki #define HPMIXR_INIT2_MASK		BIT(0)
157*c3275903SKatsuhiro Suzuki #define HPMIXR_INIT2_DIS		(0x0 << 0)
158*c3275903SKatsuhiro Suzuki #define HPMIXR_INIT2_EN			(0x1 << 0)
159*c3275903SKatsuhiro Suzuki 
160*c3275903SKatsuhiro Suzuki /* REG26: DAC_SELECT */
161*c3275903SKatsuhiro Suzuki #define DACL_SELECT_MASK		BIT(4)
162*c3275903SKatsuhiro Suzuki #define DACL_UNSELECT			(0x0 << 4)
163*c3275903SKatsuhiro Suzuki #define DACL_SELECT			(0x1 << 4)
164*c3275903SKatsuhiro Suzuki #define DACR_SELECT_MASK		BIT(0)
165*c3275903SKatsuhiro Suzuki #define DACR_UNSELECT			(0x0 << 0)
166*c3275903SKatsuhiro Suzuki #define DACR_SELECT			(0x1 << 0)
167*c3275903SKatsuhiro Suzuki 
168*c3275903SKatsuhiro Suzuki /* REG27: HPOUT_CTRL */
169*c3275903SKatsuhiro Suzuki #define HPOUTL_MASK			BIT(7)
170*c3275903SKatsuhiro Suzuki #define HPOUTL_DIS			(0x0 << 7)
171*c3275903SKatsuhiro Suzuki #define HPOUTL_EN			(0x1 << 7)
172*c3275903SKatsuhiro Suzuki #define HPOUTL_INIT_MASK		BIT(6)
173*c3275903SKatsuhiro Suzuki #define HPOUTL_INIT_DIS			(0x0 << 6)
174*c3275903SKatsuhiro Suzuki #define HPOUTL_INIT_EN			(0x1 << 6)
175*c3275903SKatsuhiro Suzuki #define HPOUTL_MUTE_MASK		BIT(5)
176*c3275903SKatsuhiro Suzuki #define HPOUTL_MUTE			(0x0 << 5)
177*c3275903SKatsuhiro Suzuki #define HPOUTL_UNMUTE			(0x1 << 5)
178*c3275903SKatsuhiro Suzuki #define HPOUTR_MASK			BIT(4)
179*c3275903SKatsuhiro Suzuki #define HPOUTR_DIS			(0x0 << 4)
180*c3275903SKatsuhiro Suzuki #define HPOUTR_EN			(0x1 << 4)
181*c3275903SKatsuhiro Suzuki #define HPOUTR_INIT_MASK		BIT(3)
182*c3275903SKatsuhiro Suzuki #define HPOUTR_INIT_DIS			(0x0 << 3)
183*c3275903SKatsuhiro Suzuki #define HPOUTR_INIT_EN			(0x1 << 3)
184*c3275903SKatsuhiro Suzuki #define HPOUTR_MUTE_MASK		BIT(2)
185*c3275903SKatsuhiro Suzuki #define HPOUTR_MUTE			(0x0 << 2)
186*c3275903SKatsuhiro Suzuki #define HPOUTR_UNMUTE			(0x1 << 2)
187*c3275903SKatsuhiro Suzuki 
188*c3275903SKatsuhiro Suzuki /* REG28: HPOUTL_GAIN_CTRL */
189*c3275903SKatsuhiro Suzuki #define HPOUTL_GAIN_MASK		GENMASK(4, 0)
190*c3275903SKatsuhiro Suzuki 
191*c3275903SKatsuhiro Suzuki /* REG29: HPOUTR_GAIN_CTRL */
192*c3275903SKatsuhiro Suzuki #define HPOUTR_GAIN_MASK		GENMASK(4, 0)
193*c3275903SKatsuhiro Suzuki 
194*c3275903SKatsuhiro Suzuki /* REG2a: HPOUT_POP_CTRL */
195*c3275903SKatsuhiro Suzuki #define HPOUTR_POP_MASK			GENMASK(5, 4)
196*c3275903SKatsuhiro Suzuki #define HPOUTR_POP_XCHARGE		(0x1 << 4)
197*c3275903SKatsuhiro Suzuki #define HPOUTR_POP_WORK			(0x2 << 4)
198*c3275903SKatsuhiro Suzuki #define HPOUTL_POP_MASK			GENMASK(1, 0)
199*c3275903SKatsuhiro Suzuki #define HPOUTL_POP_XCHARGE		(0x1 << 0)
200*c3275903SKatsuhiro Suzuki #define HPOUTL_POP_WORK			(0x2 << 0)
201*c3275903SKatsuhiro Suzuki 
202*c3275903SKatsuhiro Suzuki #define RK3328_HIFI			0
203*c3275903SKatsuhiro Suzuki 
204*c3275903SKatsuhiro Suzuki struct rk3328_reg_msk_val {
205*c3275903SKatsuhiro Suzuki 	unsigned int reg;
206*c3275903SKatsuhiro Suzuki 	unsigned int msk;
207*c3275903SKatsuhiro Suzuki 	unsigned int val;
208*c3275903SKatsuhiro Suzuki };
209*c3275903SKatsuhiro Suzuki 
210*c3275903SKatsuhiro Suzuki #endif
211