1*eef07b9eSArgus Lin /* SPDX-License-Identifier: GPL-2.0 */ 2*eef07b9eSArgus Lin /* 3*eef07b9eSArgus Lin * Copyright (C) 2021 MediaTek Inc. 4*eef07b9eSArgus Lin * Author: Argus Lin <argus.lin@mediatek.com> 5*eef07b9eSArgus Lin */ 6*eef07b9eSArgus Lin 7*eef07b9eSArgus Lin #ifndef _ACCDET_H_ 8*eef07b9eSArgus Lin #define _ACCDET_H_ 9*eef07b9eSArgus Lin 10*eef07b9eSArgus Lin #include <linux/ctype.h> 11*eef07b9eSArgus Lin #include <linux/string.h> 12*eef07b9eSArgus Lin 13*eef07b9eSArgus Lin #define ACCDET_DEVNAME "accdet" 14*eef07b9eSArgus Lin 15*eef07b9eSArgus Lin #define HEADSET_MODE_1 (1) 16*eef07b9eSArgus Lin #define HEADSET_MODE_2 (2) 17*eef07b9eSArgus Lin #define HEADSET_MODE_6 (6) 18*eef07b9eSArgus Lin 19*eef07b9eSArgus Lin #define MT6359_ACCDET_NUM_BUTTONS 4 20*eef07b9eSArgus Lin #define MT6359_ACCDET_JACK_MASK (SND_JACK_HEADPHONE | \ 21*eef07b9eSArgus Lin SND_JACK_HEADSET | \ 22*eef07b9eSArgus Lin SND_JACK_BTN_0 | \ 23*eef07b9eSArgus Lin SND_JACK_BTN_1 | \ 24*eef07b9eSArgus Lin SND_JACK_BTN_2 | \ 25*eef07b9eSArgus Lin SND_JACK_BTN_3) 26*eef07b9eSArgus Lin #define MT6359_ACCDET_BTN_MASK (SND_JACK_BTN_0 | \ 27*eef07b9eSArgus Lin SND_JACK_BTN_1 | \ 28*eef07b9eSArgus Lin SND_JACK_BTN_2 | \ 29*eef07b9eSArgus Lin SND_JACK_BTN_3) 30*eef07b9eSArgus Lin 31*eef07b9eSArgus Lin enum eint_moisture_status { 32*eef07b9eSArgus Lin M_PLUG_IN = 0, 33*eef07b9eSArgus Lin M_WATER_IN = 1, 34*eef07b9eSArgus Lin M_HP_PLUG_IN = 2, 35*eef07b9eSArgus Lin M_PLUG_OUT = 3, 36*eef07b9eSArgus Lin M_NO_ACT = 4, 37*eef07b9eSArgus Lin M_UNKNOWN = 5, 38*eef07b9eSArgus Lin }; 39*eef07b9eSArgus Lin 40*eef07b9eSArgus Lin enum { 41*eef07b9eSArgus Lin accdet_state000 = 0, 42*eef07b9eSArgus Lin accdet_state001, 43*eef07b9eSArgus Lin accdet_state010, 44*eef07b9eSArgus Lin accdet_state011, 45*eef07b9eSArgus Lin accdet_auxadc, 46*eef07b9eSArgus Lin eint_state000, 47*eef07b9eSArgus Lin eint_state001, 48*eef07b9eSArgus Lin eint_state010, 49*eef07b9eSArgus Lin eint_state011, 50*eef07b9eSArgus Lin eint_inverter_state000, 51*eef07b9eSArgus Lin }; 52*eef07b9eSArgus Lin 53*eef07b9eSArgus Lin struct three_key_threshold { 54*eef07b9eSArgus Lin unsigned int mid; 55*eef07b9eSArgus Lin unsigned int up; 56*eef07b9eSArgus Lin unsigned int down; 57*eef07b9eSArgus Lin }; 58*eef07b9eSArgus Lin 59*eef07b9eSArgus Lin struct four_key_threshold { 60*eef07b9eSArgus Lin unsigned int mid; 61*eef07b9eSArgus Lin unsigned int voice; 62*eef07b9eSArgus Lin unsigned int up; 63*eef07b9eSArgus Lin unsigned int down; 64*eef07b9eSArgus Lin }; 65*eef07b9eSArgus Lin 66*eef07b9eSArgus Lin struct pwm_deb_settings { 67*eef07b9eSArgus Lin unsigned int pwm_width; 68*eef07b9eSArgus Lin unsigned int pwm_thresh; 69*eef07b9eSArgus Lin unsigned int fall_delay; 70*eef07b9eSArgus Lin unsigned int rise_delay; 71*eef07b9eSArgus Lin unsigned int debounce0; 72*eef07b9eSArgus Lin unsigned int debounce1; 73*eef07b9eSArgus Lin unsigned int debounce3; 74*eef07b9eSArgus Lin unsigned int debounce4; 75*eef07b9eSArgus Lin unsigned int eint_pwm_width; 76*eef07b9eSArgus Lin unsigned int eint_pwm_thresh; 77*eef07b9eSArgus Lin unsigned int eint_debounce0; 78*eef07b9eSArgus Lin unsigned int eint_debounce1; 79*eef07b9eSArgus Lin unsigned int eint_debounce2; 80*eef07b9eSArgus Lin unsigned int eint_debounce3; 81*eef07b9eSArgus Lin unsigned int eint_inverter_debounce; 82*eef07b9eSArgus Lin 83*eef07b9eSArgus Lin }; 84*eef07b9eSArgus Lin 85*eef07b9eSArgus Lin struct dts_data { 86*eef07b9eSArgus Lin unsigned int mic_vol; 87*eef07b9eSArgus Lin unsigned int mic_mode; 88*eef07b9eSArgus Lin unsigned int plugout_deb; 89*eef07b9eSArgus Lin unsigned int eint_pol; 90*eef07b9eSArgus Lin struct pwm_deb_settings *pwm_deb; 91*eef07b9eSArgus Lin struct three_key_threshold three_key; 92*eef07b9eSArgus Lin struct four_key_threshold four_key; 93*eef07b9eSArgus Lin unsigned int moisture_detect_enable; 94*eef07b9eSArgus Lin unsigned int eint_detect_mode; 95*eef07b9eSArgus Lin unsigned int eint_use_ext_res; 96*eef07b9eSArgus Lin unsigned int eint_comp_vth; 97*eef07b9eSArgus Lin unsigned int moisture_detect_mode; 98*eef07b9eSArgus Lin unsigned int moisture_comp_vth; 99*eef07b9eSArgus Lin unsigned int moisture_comp_vref2; 100*eef07b9eSArgus Lin unsigned int moisture_use_ext_res; 101*eef07b9eSArgus Lin }; 102*eef07b9eSArgus Lin 103*eef07b9eSArgus Lin struct mt6359_accdet { 104*eef07b9eSArgus Lin struct snd_soc_jack *jack; 105*eef07b9eSArgus Lin struct device *dev; 106*eef07b9eSArgus Lin struct regmap *regmap; 107*eef07b9eSArgus Lin struct dts_data *data; 108*eef07b9eSArgus Lin unsigned int caps; 109*eef07b9eSArgus Lin int accdet_irq; 110*eef07b9eSArgus Lin int accdet_eint0; 111*eef07b9eSArgus Lin int accdet_eint1; 112*eef07b9eSArgus Lin struct mutex res_lock; /* lock protection */ 113*eef07b9eSArgus Lin bool jack_plugged; 114*eef07b9eSArgus Lin unsigned int jack_type; 115*eef07b9eSArgus Lin unsigned int btn_type; 116*eef07b9eSArgus Lin unsigned int accdet_status; 117*eef07b9eSArgus Lin unsigned int pre_accdet_status; 118*eef07b9eSArgus Lin unsigned int cali_voltage; 119*eef07b9eSArgus Lin unsigned int jd_sts; 120*eef07b9eSArgus Lin struct work_struct accdet_work; 121*eef07b9eSArgus Lin struct workqueue_struct *accdet_workqueue; 122*eef07b9eSArgus Lin struct work_struct jd_work; 123*eef07b9eSArgus Lin struct workqueue_struct *jd_workqueue; 124*eef07b9eSArgus Lin }; 125*eef07b9eSArgus Lin 126*eef07b9eSArgus Lin int mt6359_accdet_enable_jack_detect(struct snd_soc_component *component, 127*eef07b9eSArgus Lin struct snd_soc_jack *jack); 128*eef07b9eSArgus Lin #endif 129