1*d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2ca2cd6bcSanish kumar /* 3ca2cd6bcSanish kumar * max98371.h -- MAX98371 ALSA SoC Audio driver 4ca2cd6bcSanish kumar * 5ca2cd6bcSanish kumar * Copyright 2011-2012 Maxim Integrated Products 6ca2cd6bcSanish kumar */ 7ca2cd6bcSanish kumar 8ca2cd6bcSanish kumar #ifndef _MAX98371_H 9ca2cd6bcSanish kumar #define _MAX98371_H 10ca2cd6bcSanish kumar 11ca2cd6bcSanish kumar #define MAX98371_IRQ_CLEAR1 0x01 12ca2cd6bcSanish kumar #define MAX98371_IRQ_CLEAR2 0x02 13ca2cd6bcSanish kumar #define MAX98371_IRQ_CLEAR3 0x03 14ca2cd6bcSanish kumar #define MAX98371_DAI_CLK 0x10 15ca2cd6bcSanish kumar #define MAX98371_DAI_BSEL_MASK 0xF 16ca2cd6bcSanish kumar #define MAX98371_DAI_BSEL_32 2 17ca2cd6bcSanish kumar #define MAX98371_DAI_BSEL_48 3 18ca2cd6bcSanish kumar #define MAX98371_DAI_BSEL_64 4 19ca2cd6bcSanish kumar #define MAX98371_SPK_SR 0x11 20ca2cd6bcSanish kumar #define MAX98371_SPK_SR_MASK 0xF 21ca2cd6bcSanish kumar #define MAX98371_SPK_SR_32 6 22ca2cd6bcSanish kumar #define MAX98371_SPK_SR_44 7 23ca2cd6bcSanish kumar #define MAX98371_SPK_SR_48 8 24ca2cd6bcSanish kumar #define MAX98371_SPK_SR_88 10 25ca2cd6bcSanish kumar #define MAX98371_SPK_SR_96 11 26ca2cd6bcSanish kumar #define MAX98371_DAI_CHANNEL 0x15 27ca2cd6bcSanish kumar #define MAX98371_CHANNEL_MASK 0x3 28ca2cd6bcSanish kumar #define MAX98371_MONOMIX_SRC 0x18 29ca2cd6bcSanish kumar #define MAX98371_MONOMIX_CFG 0x19 30ca2cd6bcSanish kumar #define MAX98371_HPF 0x1C 31ca2cd6bcSanish kumar #define MAX98371_MONOMIX_SRC_MASK 0xFF 32ca2cd6bcSanish kumar #define MONOMIX_RX_0_1 ((0x1)<<(4)) 33ca2cd6bcSanish kumar #define M98371_DAI_CHANNEL_I2S 0x3 34ca2cd6bcSanish kumar #define MAX98371_DIGITAL_GAIN 0x2D 35ca2cd6bcSanish kumar #define MAX98371_DIGITAL_GAIN_WIDTH 0x7 36ca2cd6bcSanish kumar #define MAX98371_GAIN 0x2E 37ca2cd6bcSanish kumar #define MAX98371_GAIN_SHIFT 0x4 38ca2cd6bcSanish kumar #define MAX98371_GAIN_WIDTH 0x4 39ca2cd6bcSanish kumar #define MAX98371_DHT_MAX_WIDTH 4 40ca2cd6bcSanish kumar #define MAX98371_FMT 0x14 41ca2cd6bcSanish kumar #define MAX98371_CHANSZ_WIDTH 6 42ca2cd6bcSanish kumar #define MAX98371_FMT_MASK ((0x3)<<(MAX98371_CHANSZ_WIDTH)) 43ca2cd6bcSanish kumar #define MAX98371_FMT_MODE_MASK ((0x7)<<(3)) 44ca2cd6bcSanish kumar #define MAX98371_DAI_LEFT ((0x1)<<(3)) 45ca2cd6bcSanish kumar #define MAX98371_DAI_RIGHT ((0x2)<<(3)) 46ca2cd6bcSanish kumar #define MAX98371_DAI_CHANSZ_16 ((1)<<(MAX98371_CHANSZ_WIDTH)) 47ca2cd6bcSanish kumar #define MAX98371_DAI_CHANSZ_24 ((2)<<(MAX98371_CHANSZ_WIDTH)) 48ca2cd6bcSanish kumar #define MAX98371_DAI_CHANSZ_32 ((3)<<(MAX98371_CHANSZ_WIDTH)) 49ca2cd6bcSanish kumar #define MAX98371_DHT 0x32 50ca2cd6bcSanish kumar #define MAX98371_DHT_STEP 0x3 51ca2cd6bcSanish kumar #define MAX98371_DHT_GAIN 0x31 52ca2cd6bcSanish kumar #define MAX98371_DHT_GAIN_WIDTH 0x4 53ca2cd6bcSanish kumar #define MAX98371_DHT_ROT_WIDTH 0x4 54ca2cd6bcSanish kumar #define MAX98371_SPK_ENABLE 0x4A 55ca2cd6bcSanish kumar #define MAX98371_GLOBAL_ENABLE 0x50 56ca2cd6bcSanish kumar #define MAX98371_SOFT_RESET 0x51 57ca2cd6bcSanish kumar #define MAX98371_VERSION 0xFF 58ca2cd6bcSanish kumar 59ca2cd6bcSanish kumar 60ca2cd6bcSanish kumar struct max98371_priv { 61ca2cd6bcSanish kumar struct regmap *regmap; 62ca2cd6bcSanish kumar }; 63ca2cd6bcSanish kumar #endif 64