1*d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2ca2cd6bcSanish kumar /* 3ca2cd6bcSanish kumar * max98371.c -- ALSA SoC Stereo MAX98371 driver 4ca2cd6bcSanish kumar * 5ca2cd6bcSanish kumar * Copyright 2015-16 Maxim Integrated Products 6ca2cd6bcSanish kumar */ 7ca2cd6bcSanish kumar 8ca2cd6bcSanish kumar #include <linux/i2c.h> 9ca2cd6bcSanish kumar #include <linux/module.h> 10ca2cd6bcSanish kumar #include <linux/regmap.h> 11ca2cd6bcSanish kumar #include <linux/slab.h> 12ca2cd6bcSanish kumar #include <sound/pcm.h> 13ca2cd6bcSanish kumar #include <sound/pcm_params.h> 14ca2cd6bcSanish kumar #include <sound/soc.h> 15ca2cd6bcSanish kumar #include <sound/tlv.h> 16ca2cd6bcSanish kumar #include "max98371.h" 17ca2cd6bcSanish kumar 18ca2cd6bcSanish kumar static const char *const monomix_text[] = { 19ca2cd6bcSanish kumar "Left", "Right", "LeftRightDiv2", 20ca2cd6bcSanish kumar }; 21ca2cd6bcSanish kumar 22ca2cd6bcSanish kumar static const char *const hpf_cutoff_txt[] = { 23ca2cd6bcSanish kumar "Disable", "DC Block", "50Hz", 24ca2cd6bcSanish kumar "100Hz", "200Hz", "400Hz", "800Hz", 25ca2cd6bcSanish kumar }; 26ca2cd6bcSanish kumar 27ca2cd6bcSanish kumar static SOC_ENUM_SINGLE_DECL(max98371_monomix, MAX98371_MONOMIX_CFG, 0, 28ca2cd6bcSanish kumar monomix_text); 29ca2cd6bcSanish kumar 30ca2cd6bcSanish kumar static SOC_ENUM_SINGLE_DECL(max98371_hpf_cutoff, MAX98371_HPF, 0, 31ca2cd6bcSanish kumar hpf_cutoff_txt); 32ca2cd6bcSanish kumar 33ca2cd6bcSanish kumar static const DECLARE_TLV_DB_RANGE(max98371_dht_min_gain, 34ca2cd6bcSanish kumar 0, 1, TLV_DB_SCALE_ITEM(537, 66, 0), 35ca2cd6bcSanish kumar 2, 3, TLV_DB_SCALE_ITEM(677, 82, 0), 36ca2cd6bcSanish kumar 4, 5, TLV_DB_SCALE_ITEM(852, 104, 0), 37ca2cd6bcSanish kumar 6, 7, TLV_DB_SCALE_ITEM(1072, 131, 0), 38ca2cd6bcSanish kumar 8, 9, TLV_DB_SCALE_ITEM(1350, 165, 0), 39ca2cd6bcSanish kumar 10, 11, TLV_DB_SCALE_ITEM(1699, 101, 0), 40ca2cd6bcSanish kumar ); 41ca2cd6bcSanish kumar 42ca2cd6bcSanish kumar static const DECLARE_TLV_DB_RANGE(max98371_dht_max_gain, 43ca2cd6bcSanish kumar 0, 1, TLV_DB_SCALE_ITEM(537, 66, 0), 44ca2cd6bcSanish kumar 2, 3, TLV_DB_SCALE_ITEM(677, 82, 0), 45ca2cd6bcSanish kumar 4, 5, TLV_DB_SCALE_ITEM(852, 104, 0), 46ca2cd6bcSanish kumar 6, 7, TLV_DB_SCALE_ITEM(1072, 131, 0), 47ca2cd6bcSanish kumar 8, 9, TLV_DB_SCALE_ITEM(1350, 165, 0), 48ca2cd6bcSanish kumar 10, 11, TLV_DB_SCALE_ITEM(1699, 208, 0), 49ca2cd6bcSanish kumar ); 50ca2cd6bcSanish kumar 51ca2cd6bcSanish kumar static const DECLARE_TLV_DB_RANGE(max98371_dht_rot_gain, 52ca2cd6bcSanish kumar 0, 1, TLV_DB_SCALE_ITEM(-50, -50, 0), 53ca2cd6bcSanish kumar 2, 6, TLV_DB_SCALE_ITEM(-100, -100, 0), 54ca2cd6bcSanish kumar 7, 8, TLV_DB_SCALE_ITEM(-800, -200, 0), 55ca2cd6bcSanish kumar 9, 11, TLV_DB_SCALE_ITEM(-1200, -300, 0), 56ca2cd6bcSanish kumar 12, 13, TLV_DB_SCALE_ITEM(-2000, -200, 0), 57ca2cd6bcSanish kumar 14, 15, TLV_DB_SCALE_ITEM(-2500, -500, 0), 58ca2cd6bcSanish kumar ); 59ca2cd6bcSanish kumar 60ca2cd6bcSanish kumar static const struct reg_default max98371_reg[] = { 61ca2cd6bcSanish kumar { 0x01, 0x00 }, 62ca2cd6bcSanish kumar { 0x02, 0x00 }, 63ca2cd6bcSanish kumar { 0x03, 0x00 }, 64ca2cd6bcSanish kumar { 0x04, 0x00 }, 65ca2cd6bcSanish kumar { 0x05, 0x00 }, 66ca2cd6bcSanish kumar { 0x06, 0x00 }, 67ca2cd6bcSanish kumar { 0x07, 0x00 }, 68ca2cd6bcSanish kumar { 0x08, 0x00 }, 69ca2cd6bcSanish kumar { 0x09, 0x00 }, 70ca2cd6bcSanish kumar { 0x0A, 0x00 }, 71ca2cd6bcSanish kumar { 0x10, 0x06 }, 72ca2cd6bcSanish kumar { 0x11, 0x08 }, 73ca2cd6bcSanish kumar { 0x14, 0x80 }, 74ca2cd6bcSanish kumar { 0x15, 0x00 }, 75ca2cd6bcSanish kumar { 0x16, 0x00 }, 76ca2cd6bcSanish kumar { 0x18, 0x00 }, 77ca2cd6bcSanish kumar { 0x19, 0x00 }, 78ca2cd6bcSanish kumar { 0x1C, 0x00 }, 79ca2cd6bcSanish kumar { 0x1D, 0x00 }, 80ca2cd6bcSanish kumar { 0x1E, 0x00 }, 81ca2cd6bcSanish kumar { 0x1F, 0x00 }, 82ca2cd6bcSanish kumar { 0x20, 0x00 }, 83ca2cd6bcSanish kumar { 0x21, 0x00 }, 84ca2cd6bcSanish kumar { 0x22, 0x00 }, 85ca2cd6bcSanish kumar { 0x23, 0x00 }, 86ca2cd6bcSanish kumar { 0x24, 0x00 }, 87ca2cd6bcSanish kumar { 0x25, 0x00 }, 88ca2cd6bcSanish kumar { 0x26, 0x00 }, 89ca2cd6bcSanish kumar { 0x27, 0x00 }, 90ca2cd6bcSanish kumar { 0x28, 0x00 }, 91ca2cd6bcSanish kumar { 0x29, 0x00 }, 92ca2cd6bcSanish kumar { 0x2A, 0x00 }, 93ca2cd6bcSanish kumar { 0x2B, 0x00 }, 94ca2cd6bcSanish kumar { 0x2C, 0x00 }, 95ca2cd6bcSanish kumar { 0x2D, 0x00 }, 96ca2cd6bcSanish kumar { 0x2E, 0x0B }, 97ca2cd6bcSanish kumar { 0x31, 0x00 }, 98ca2cd6bcSanish kumar { 0x32, 0x18 }, 99ca2cd6bcSanish kumar { 0x33, 0x00 }, 100ca2cd6bcSanish kumar { 0x34, 0x00 }, 101ca2cd6bcSanish kumar { 0x36, 0x00 }, 102ca2cd6bcSanish kumar { 0x37, 0x00 }, 103ca2cd6bcSanish kumar { 0x38, 0x00 }, 104ca2cd6bcSanish kumar { 0x39, 0x00 }, 105ca2cd6bcSanish kumar { 0x3A, 0x00 }, 106ca2cd6bcSanish kumar { 0x3B, 0x00 }, 107ca2cd6bcSanish kumar { 0x3C, 0x00 }, 108ca2cd6bcSanish kumar { 0x3D, 0x00 }, 109ca2cd6bcSanish kumar { 0x3E, 0x00 }, 110ca2cd6bcSanish kumar { 0x3F, 0x00 }, 111ca2cd6bcSanish kumar { 0x40, 0x00 }, 112ca2cd6bcSanish kumar { 0x41, 0x00 }, 113ca2cd6bcSanish kumar { 0x42, 0x00 }, 114ca2cd6bcSanish kumar { 0x43, 0x00 }, 115ca2cd6bcSanish kumar { 0x4A, 0x00 }, 116ca2cd6bcSanish kumar { 0x4B, 0x00 }, 117ca2cd6bcSanish kumar { 0x4C, 0x00 }, 118ca2cd6bcSanish kumar { 0x4D, 0x00 }, 119ca2cd6bcSanish kumar { 0x4E, 0x00 }, 120ca2cd6bcSanish kumar { 0x50, 0x00 }, 121ca2cd6bcSanish kumar { 0x51, 0x00 }, 122ca2cd6bcSanish kumar { 0x55, 0x00 }, 123ca2cd6bcSanish kumar { 0x58, 0x00 }, 124ca2cd6bcSanish kumar { 0x59, 0x00 }, 125ca2cd6bcSanish kumar { 0x5C, 0x00 }, 126ca2cd6bcSanish kumar { 0xFF, 0x43 }, 127ca2cd6bcSanish kumar }; 128ca2cd6bcSanish kumar 129ca2cd6bcSanish kumar static bool max98371_volatile_register(struct device *dev, unsigned int reg) 130ca2cd6bcSanish kumar { 131ca2cd6bcSanish kumar switch (reg) { 132ca2cd6bcSanish kumar case MAX98371_IRQ_CLEAR1: 133ca2cd6bcSanish kumar case MAX98371_IRQ_CLEAR2: 134ca2cd6bcSanish kumar case MAX98371_IRQ_CLEAR3: 135ca2cd6bcSanish kumar case MAX98371_VERSION: 136ca2cd6bcSanish kumar return true; 137ca2cd6bcSanish kumar default: 138ca2cd6bcSanish kumar return false; 139ca2cd6bcSanish kumar } 140ca2cd6bcSanish kumar } 141ca2cd6bcSanish kumar 142ca2cd6bcSanish kumar static bool max98371_readable_register(struct device *dev, unsigned int reg) 143ca2cd6bcSanish kumar { 144ca2cd6bcSanish kumar switch (reg) { 145ca2cd6bcSanish kumar case MAX98371_SOFT_RESET: 146ca2cd6bcSanish kumar return false; 147ca2cd6bcSanish kumar default: 148ca2cd6bcSanish kumar return true; 149ca2cd6bcSanish kumar } 150ca2cd6bcSanish kumar }; 151ca2cd6bcSanish kumar 152ca2cd6bcSanish kumar static const DECLARE_TLV_DB_RANGE(max98371_gain_tlv, 153ca2cd6bcSanish kumar 0, 7, TLV_DB_SCALE_ITEM(0, 50, 0), 154ca2cd6bcSanish kumar 8, 10, TLV_DB_SCALE_ITEM(400, 100, 0) 155ca2cd6bcSanish kumar ); 156ca2cd6bcSanish kumar 157ca2cd6bcSanish kumar static const DECLARE_TLV_DB_RANGE(max98371_noload_gain_tlv, 158ca2cd6bcSanish kumar 0, 11, TLV_DB_SCALE_ITEM(950, 100, 0), 159ca2cd6bcSanish kumar ); 160ca2cd6bcSanish kumar 161ca2cd6bcSanish kumar static const DECLARE_TLV_DB_SCALE(digital_tlv, -6300, 50, 1); 162ca2cd6bcSanish kumar 163ca2cd6bcSanish kumar static const struct snd_kcontrol_new max98371_snd_controls[] = { 164ca2cd6bcSanish kumar SOC_SINGLE_TLV("Speaker Volume", MAX98371_GAIN, 165ca2cd6bcSanish kumar MAX98371_GAIN_SHIFT, (1<<MAX98371_GAIN_WIDTH)-1, 0, 166ca2cd6bcSanish kumar max98371_gain_tlv), 167ca2cd6bcSanish kumar SOC_SINGLE_TLV("Digital Volume", MAX98371_DIGITAL_GAIN, 0, 168ca2cd6bcSanish kumar (1<<MAX98371_DIGITAL_GAIN_WIDTH)-1, 1, digital_tlv), 169ca2cd6bcSanish kumar SOC_SINGLE_TLV("Speaker DHT Max Volume", MAX98371_GAIN, 170ca2cd6bcSanish kumar 0, (1<<MAX98371_DHT_MAX_WIDTH)-1, 0, 171ca2cd6bcSanish kumar max98371_dht_max_gain), 172ca2cd6bcSanish kumar SOC_SINGLE_TLV("Speaker DHT Min Volume", MAX98371_DHT_GAIN, 173ca2cd6bcSanish kumar 0, (1<<MAX98371_DHT_GAIN_WIDTH)-1, 0, 174ca2cd6bcSanish kumar max98371_dht_min_gain), 175ca2cd6bcSanish kumar SOC_SINGLE_TLV("Speaker DHT Rotation Volume", MAX98371_DHT_GAIN, 176ca2cd6bcSanish kumar 0, (1<<MAX98371_DHT_ROT_WIDTH)-1, 0, 177ca2cd6bcSanish kumar max98371_dht_rot_gain), 178ca2cd6bcSanish kumar SOC_SINGLE("DHT Attack Step", MAX98371_DHT, MAX98371_DHT_STEP, 3, 0), 179ca2cd6bcSanish kumar SOC_SINGLE("DHT Attack Rate", MAX98371_DHT, 0, 7, 0), 180ca2cd6bcSanish kumar SOC_ENUM("Monomix Select", max98371_monomix), 181ca2cd6bcSanish kumar SOC_ENUM("HPF Cutoff", max98371_hpf_cutoff), 182ca2cd6bcSanish kumar }; 183ca2cd6bcSanish kumar 184ca2cd6bcSanish kumar static int max98371_dai_set_fmt(struct snd_soc_dai *codec_dai, 185ca2cd6bcSanish kumar unsigned int fmt) 186ca2cd6bcSanish kumar { 1871ae91ac7SKuninori Morimoto struct snd_soc_component *component = codec_dai->component; 1881ae91ac7SKuninori Morimoto struct max98371_priv *max98371 = snd_soc_component_get_drvdata(component); 189ca2cd6bcSanish kumar unsigned int val = 0; 190ca2cd6bcSanish kumar 191ca2cd6bcSanish kumar switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 192ca2cd6bcSanish kumar case SND_SOC_DAIFMT_CBS_CFS: 193ca2cd6bcSanish kumar break; 194ca2cd6bcSanish kumar default: 1951ae91ac7SKuninori Morimoto dev_err(component->dev, "DAI clock mode unsupported"); 196ca2cd6bcSanish kumar return -EINVAL; 197ca2cd6bcSanish kumar } 198ca2cd6bcSanish kumar 199ca2cd6bcSanish kumar switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 200ca2cd6bcSanish kumar case SND_SOC_DAIFMT_I2S: 201ca2cd6bcSanish kumar val |= 0; 202ca2cd6bcSanish kumar break; 203ca2cd6bcSanish kumar case SND_SOC_DAIFMT_RIGHT_J: 204ca2cd6bcSanish kumar val |= MAX98371_DAI_RIGHT; 205ca2cd6bcSanish kumar break; 206ca2cd6bcSanish kumar case SND_SOC_DAIFMT_LEFT_J: 207ca2cd6bcSanish kumar val |= MAX98371_DAI_LEFT; 208ca2cd6bcSanish kumar break; 209ca2cd6bcSanish kumar default: 2101ae91ac7SKuninori Morimoto dev_err(component->dev, "DAI wrong mode unsupported"); 211ca2cd6bcSanish kumar return -EINVAL; 212ca2cd6bcSanish kumar } 213ca2cd6bcSanish kumar regmap_update_bits(max98371->regmap, MAX98371_FMT, 214ca2cd6bcSanish kumar MAX98371_FMT_MODE_MASK, val); 215ca2cd6bcSanish kumar return 0; 216ca2cd6bcSanish kumar } 217ca2cd6bcSanish kumar 218ca2cd6bcSanish kumar static int max98371_dai_hw_params(struct snd_pcm_substream *substream, 219ca2cd6bcSanish kumar struct snd_pcm_hw_params *params, 220ca2cd6bcSanish kumar struct snd_soc_dai *dai) 221ca2cd6bcSanish kumar { 2221ae91ac7SKuninori Morimoto struct snd_soc_component *component = dai->component; 2231ae91ac7SKuninori Morimoto struct max98371_priv *max98371 = snd_soc_component_get_drvdata(component); 224ca2cd6bcSanish kumar int blr_clk_ratio, ch_size, channels = params_channels(params); 225ca2cd6bcSanish kumar int rate = params_rate(params); 226ca2cd6bcSanish kumar 227ca2cd6bcSanish kumar switch (params_format(params)) { 228ca2cd6bcSanish kumar case SNDRV_PCM_FORMAT_S8: 229ca2cd6bcSanish kumar regmap_update_bits(max98371->regmap, MAX98371_FMT, 230ca2cd6bcSanish kumar MAX98371_FMT_MASK, MAX98371_DAI_CHANSZ_16); 231ca2cd6bcSanish kumar ch_size = 8; 232ca2cd6bcSanish kumar break; 233ca2cd6bcSanish kumar case SNDRV_PCM_FORMAT_S16_LE: 234ca2cd6bcSanish kumar regmap_update_bits(max98371->regmap, MAX98371_FMT, 235ca2cd6bcSanish kumar MAX98371_FMT_MASK, MAX98371_DAI_CHANSZ_16); 236ca2cd6bcSanish kumar ch_size = 16; 237ca2cd6bcSanish kumar break; 238ca2cd6bcSanish kumar case SNDRV_PCM_FORMAT_S24_LE: 239ca2cd6bcSanish kumar regmap_update_bits(max98371->regmap, MAX98371_FMT, 240ca2cd6bcSanish kumar MAX98371_FMT_MASK, MAX98371_DAI_CHANSZ_32); 241ca2cd6bcSanish kumar ch_size = 24; 242ca2cd6bcSanish kumar break; 243ca2cd6bcSanish kumar case SNDRV_PCM_FORMAT_S32_LE: 244ca2cd6bcSanish kumar regmap_update_bits(max98371->regmap, MAX98371_FMT, 245ca2cd6bcSanish kumar MAX98371_FMT_MASK, MAX98371_DAI_CHANSZ_32); 246ca2cd6bcSanish kumar ch_size = 32; 247ca2cd6bcSanish kumar break; 248ca2cd6bcSanish kumar default: 249ca2cd6bcSanish kumar return -EINVAL; 250ca2cd6bcSanish kumar } 251ca2cd6bcSanish kumar 252ca2cd6bcSanish kumar /* BCLK/LRCLK ratio calculation */ 253ca2cd6bcSanish kumar blr_clk_ratio = channels * ch_size; 254ca2cd6bcSanish kumar switch (blr_clk_ratio) { 255ca2cd6bcSanish kumar case 32: 256ca2cd6bcSanish kumar regmap_update_bits(max98371->regmap, 257ca2cd6bcSanish kumar MAX98371_DAI_CLK, 258ca2cd6bcSanish kumar MAX98371_DAI_BSEL_MASK, MAX98371_DAI_BSEL_32); 259ca2cd6bcSanish kumar break; 260ca2cd6bcSanish kumar case 48: 261ca2cd6bcSanish kumar regmap_update_bits(max98371->regmap, 262ca2cd6bcSanish kumar MAX98371_DAI_CLK, 263ca2cd6bcSanish kumar MAX98371_DAI_BSEL_MASK, MAX98371_DAI_BSEL_48); 264ca2cd6bcSanish kumar break; 265ca2cd6bcSanish kumar case 64: 266ca2cd6bcSanish kumar regmap_update_bits(max98371->regmap, 267ca2cd6bcSanish kumar MAX98371_DAI_CLK, 268ca2cd6bcSanish kumar MAX98371_DAI_BSEL_MASK, MAX98371_DAI_BSEL_64); 269ca2cd6bcSanish kumar break; 270ca2cd6bcSanish kumar default: 271ca2cd6bcSanish kumar return -EINVAL; 272ca2cd6bcSanish kumar } 273ca2cd6bcSanish kumar 274ca2cd6bcSanish kumar switch (rate) { 275ca2cd6bcSanish kumar case 32000: 276ca2cd6bcSanish kumar regmap_update_bits(max98371->regmap, 277ca2cd6bcSanish kumar MAX98371_SPK_SR, 278ca2cd6bcSanish kumar MAX98371_SPK_SR_MASK, MAX98371_SPK_SR_32); 279ca2cd6bcSanish kumar break; 280ca2cd6bcSanish kumar case 44100: 281ca2cd6bcSanish kumar regmap_update_bits(max98371->regmap, 282ca2cd6bcSanish kumar MAX98371_SPK_SR, 283ca2cd6bcSanish kumar MAX98371_SPK_SR_MASK, MAX98371_SPK_SR_44); 284ca2cd6bcSanish kumar break; 285ca2cd6bcSanish kumar case 48000: 286ca2cd6bcSanish kumar regmap_update_bits(max98371->regmap, 287ca2cd6bcSanish kumar MAX98371_SPK_SR, 288ca2cd6bcSanish kumar MAX98371_SPK_SR_MASK, MAX98371_SPK_SR_48); 289ca2cd6bcSanish kumar break; 290ca2cd6bcSanish kumar case 88200: 291ca2cd6bcSanish kumar regmap_update_bits(max98371->regmap, 292ca2cd6bcSanish kumar MAX98371_SPK_SR, 293ca2cd6bcSanish kumar MAX98371_SPK_SR_MASK, MAX98371_SPK_SR_88); 294ca2cd6bcSanish kumar break; 295ca2cd6bcSanish kumar case 96000: 296ca2cd6bcSanish kumar regmap_update_bits(max98371->regmap, 297ca2cd6bcSanish kumar MAX98371_SPK_SR, 298ca2cd6bcSanish kumar MAX98371_SPK_SR_MASK, MAX98371_SPK_SR_96); 299ca2cd6bcSanish kumar break; 300ca2cd6bcSanish kumar default: 301ca2cd6bcSanish kumar return -EINVAL; 302ca2cd6bcSanish kumar } 303ca2cd6bcSanish kumar 304ca2cd6bcSanish kumar /* enabling both the RX channels*/ 305ca2cd6bcSanish kumar regmap_update_bits(max98371->regmap, MAX98371_MONOMIX_SRC, 306ca2cd6bcSanish kumar MAX98371_MONOMIX_SRC_MASK, MONOMIX_RX_0_1); 307ca2cd6bcSanish kumar regmap_update_bits(max98371->regmap, MAX98371_DAI_CHANNEL, 308ca2cd6bcSanish kumar MAX98371_CHANNEL_MASK, MAX98371_CHANNEL_MASK); 309ca2cd6bcSanish kumar return 0; 310ca2cd6bcSanish kumar } 311ca2cd6bcSanish kumar 312ca2cd6bcSanish kumar static const struct snd_soc_dapm_widget max98371_dapm_widgets[] = { 313ca2cd6bcSanish kumar SND_SOC_DAPM_DAC("DAC", NULL, MAX98371_SPK_ENABLE, 0, 0), 314ca2cd6bcSanish kumar SND_SOC_DAPM_SUPPLY("Global Enable", MAX98371_GLOBAL_ENABLE, 315ca2cd6bcSanish kumar 0, 0, NULL, 0), 316ca2cd6bcSanish kumar SND_SOC_DAPM_OUTPUT("SPK_OUT"), 317ca2cd6bcSanish kumar }; 318ca2cd6bcSanish kumar 319ca2cd6bcSanish kumar static const struct snd_soc_dapm_route max98371_audio_map[] = { 320ca2cd6bcSanish kumar {"DAC", NULL, "HiFi Playback"}, 321ca2cd6bcSanish kumar {"SPK_OUT", NULL, "DAC"}, 322ca2cd6bcSanish kumar {"SPK_OUT", NULL, "Global Enable"}, 323ca2cd6bcSanish kumar }; 324ca2cd6bcSanish kumar 325ca2cd6bcSanish kumar #define MAX98371_RATES SNDRV_PCM_RATE_8000_48000 326ca2cd6bcSanish kumar #define MAX98371_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE | \ 327ca2cd6bcSanish kumar SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE) 328ca2cd6bcSanish kumar 329ca2cd6bcSanish kumar static const struct snd_soc_dai_ops max98371_dai_ops = { 330ca2cd6bcSanish kumar .set_fmt = max98371_dai_set_fmt, 331ca2cd6bcSanish kumar .hw_params = max98371_dai_hw_params, 332ca2cd6bcSanish kumar }; 333ca2cd6bcSanish kumar 334ca2cd6bcSanish kumar static struct snd_soc_dai_driver max98371_dai[] = { 335ca2cd6bcSanish kumar { 336ca2cd6bcSanish kumar .name = "max98371-aif1", 337ca2cd6bcSanish kumar .playback = { 338ca2cd6bcSanish kumar .stream_name = "HiFi Playback", 339ca2cd6bcSanish kumar .channels_min = 1, 340ca2cd6bcSanish kumar .channels_max = 2, 341ca2cd6bcSanish kumar .rates = SNDRV_PCM_RATE_8000_48000, 342ca2cd6bcSanish kumar .formats = MAX98371_FORMATS, 343ca2cd6bcSanish kumar }, 344ca2cd6bcSanish kumar .ops = &max98371_dai_ops, 345ca2cd6bcSanish kumar } 346ca2cd6bcSanish kumar }; 347ca2cd6bcSanish kumar 3481ae91ac7SKuninori Morimoto static const struct snd_soc_component_driver max98371_component = { 349ca2cd6bcSanish kumar .controls = max98371_snd_controls, 350ca2cd6bcSanish kumar .num_controls = ARRAY_SIZE(max98371_snd_controls), 351ca2cd6bcSanish kumar .dapm_routes = max98371_audio_map, 352ca2cd6bcSanish kumar .num_dapm_routes = ARRAY_SIZE(max98371_audio_map), 353ca2cd6bcSanish kumar .dapm_widgets = max98371_dapm_widgets, 354ca2cd6bcSanish kumar .num_dapm_widgets = ARRAY_SIZE(max98371_dapm_widgets), 3551ae91ac7SKuninori Morimoto .idle_bias_on = 1, 3561ae91ac7SKuninori Morimoto .use_pmdown_time = 1, 3571ae91ac7SKuninori Morimoto .endianness = 1, 3581ae91ac7SKuninori Morimoto .non_legacy_dai_naming = 1, 359ca2cd6bcSanish kumar }; 360ca2cd6bcSanish kumar 361ca2cd6bcSanish kumar static const struct regmap_config max98371_regmap = { 362ca2cd6bcSanish kumar .reg_bits = 8, 363ca2cd6bcSanish kumar .val_bits = 8, 364ca2cd6bcSanish kumar .max_register = MAX98371_VERSION, 365ca2cd6bcSanish kumar .reg_defaults = max98371_reg, 366ca2cd6bcSanish kumar .num_reg_defaults = ARRAY_SIZE(max98371_reg), 367ca2cd6bcSanish kumar .volatile_reg = max98371_volatile_register, 368ca2cd6bcSanish kumar .readable_reg = max98371_readable_register, 369ca2cd6bcSanish kumar .cache_type = REGCACHE_RBTREE, 370ca2cd6bcSanish kumar }; 371ca2cd6bcSanish kumar 372ca2cd6bcSanish kumar static int max98371_i2c_probe(struct i2c_client *i2c, 373ca2cd6bcSanish kumar const struct i2c_device_id *id) 374ca2cd6bcSanish kumar { 375ca2cd6bcSanish kumar struct max98371_priv *max98371; 376ca2cd6bcSanish kumar int ret, reg; 377ca2cd6bcSanish kumar 378ca2cd6bcSanish kumar max98371 = devm_kzalloc(&i2c->dev, 379ca2cd6bcSanish kumar sizeof(*max98371), GFP_KERNEL); 380ca2cd6bcSanish kumar if (!max98371) 381ca2cd6bcSanish kumar return -ENOMEM; 382ca2cd6bcSanish kumar 383ca2cd6bcSanish kumar i2c_set_clientdata(i2c, max98371); 384ca2cd6bcSanish kumar max98371->regmap = devm_regmap_init_i2c(i2c, &max98371_regmap); 385ca2cd6bcSanish kumar if (IS_ERR(max98371->regmap)) { 386ca2cd6bcSanish kumar ret = PTR_ERR(max98371->regmap); 387ca2cd6bcSanish kumar dev_err(&i2c->dev, 388ca2cd6bcSanish kumar "Failed to allocate regmap: %d\n", ret); 389ca2cd6bcSanish kumar return ret; 390ca2cd6bcSanish kumar } 391ca2cd6bcSanish kumar 392ca2cd6bcSanish kumar ret = regmap_read(max98371->regmap, MAX98371_VERSION, ®); 393ca2cd6bcSanish kumar if (ret < 0) { 394ca2cd6bcSanish kumar dev_info(&i2c->dev, "device error %d\n", ret); 395ca2cd6bcSanish kumar return ret; 396ca2cd6bcSanish kumar } 397ca2cd6bcSanish kumar dev_info(&i2c->dev, "device version %x\n", reg); 398ca2cd6bcSanish kumar 3991ae91ac7SKuninori Morimoto ret = devm_snd_soc_register_component(&i2c->dev, &max98371_component, 400ca2cd6bcSanish kumar max98371_dai, ARRAY_SIZE(max98371_dai)); 401ca2cd6bcSanish kumar if (ret < 0) { 4021ae91ac7SKuninori Morimoto dev_err(&i2c->dev, "Failed to register component: %d\n", ret); 403ca2cd6bcSanish kumar return ret; 404ca2cd6bcSanish kumar } 405ca2cd6bcSanish kumar return ret; 406ca2cd6bcSanish kumar } 407ca2cd6bcSanish kumar 408ca2cd6bcSanish kumar static const struct i2c_device_id max98371_i2c_id[] = { 409ca2cd6bcSanish kumar { "max98371", 0 }, 410209c721cSWei Yongjun { } 411ca2cd6bcSanish kumar }; 412ca2cd6bcSanish kumar 413ca2cd6bcSanish kumar MODULE_DEVICE_TABLE(i2c, max98371_i2c_id); 414ca2cd6bcSanish kumar 415ca2cd6bcSanish kumar static const struct of_device_id max98371_of_match[] = { 416ca2cd6bcSanish kumar { .compatible = "maxim,max98371", }, 417ca2cd6bcSanish kumar { } 418ca2cd6bcSanish kumar }; 419ca2cd6bcSanish kumar MODULE_DEVICE_TABLE(of, max98371_of_match); 420ca2cd6bcSanish kumar 421ca2cd6bcSanish kumar static struct i2c_driver max98371_i2c_driver = { 422ca2cd6bcSanish kumar .driver = { 423ca2cd6bcSanish kumar .name = "max98371", 424ca2cd6bcSanish kumar .pm = NULL, 425ca2cd6bcSanish kumar .of_match_table = of_match_ptr(max98371_of_match), 426ca2cd6bcSanish kumar }, 427ca2cd6bcSanish kumar .probe = max98371_i2c_probe, 428ca2cd6bcSanish kumar .id_table = max98371_i2c_id, 429ca2cd6bcSanish kumar }; 430ca2cd6bcSanish kumar 431ca2cd6bcSanish kumar module_i2c_driver(max98371_i2c_driver); 432ca2cd6bcSanish kumar 433ca2cd6bcSanish kumar MODULE_AUTHOR("anish kumar <yesanishhere@gmail.com>"); 434ca2cd6bcSanish kumar MODULE_DESCRIPTION("ALSA SoC MAX98371 driver"); 435ca2cd6bcSanish kumar MODULE_LICENSE("GPL"); 436