1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * es8389.c -- ES8389 ALSA SoC Audio Codec 4 * 5 * Copyright Everest Semiconductor Co., Ltd 6 * 7 * Authors: Michael Zhang (zhangyi@everest-semi.com) 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14 #include <linux/clk.h> 15 #include <linux/module.h> 16 #include <linux/kernel.h> 17 #include <linux/delay.h> 18 #include <linux/i2c.h> 19 #include <linux/regmap.h> 20 #include <linux/regulator/consumer.h> 21 #include <sound/core.h> 22 #include <sound/pcm.h> 23 #include <sound/pcm_params.h> 24 #include <sound/tlv.h> 25 #include <sound/soc.h> 26 27 #include "es8389.h" 28 29 30 /* codec private data */ 31 32 struct es8389_private { 33 struct regmap *regmap; 34 struct clk *mclk; 35 struct regulator_bulk_data core_supply[2]; 36 unsigned int sysclk; 37 int mastermode; 38 39 u8 hpfl; 40 u8 hpfr; 41 u32 hpf_freq; 42 u32 capture_rate; 43 u8 mclk_src; 44 u8 vddd; 45 int version; 46 enum snd_soc_bias_level bias_level; 47 }; 48 49 static const char * const es8389_core_supplies[] = { 50 "vddd", 51 "vdda", 52 }; 53 54 static bool es8389_volatile_register(struct device *dev, 55 unsigned int reg) 56 { 57 switch (reg) { 58 case ES8389_ADCL_VOL: 59 case ES8389_ADCR_VOL: 60 case ES8389_MIC1_GAIN: 61 case ES8389_MIC2_GAIN: 62 case ES8389_DACL_VOL: 63 case ES8389_DACR_VOL: 64 case ES8389_ALC_ON: 65 case ES8389_ALC_CTL: 66 case ES8389_ALC_TARGET: 67 case ES8389_ALC_GAIN: 68 case ES8389_ADC_MUTE: 69 case ES8389_OSR_VOL: 70 case ES8389_DAC_INV: 71 case ES8389_MIX_VOL: 72 case ES8389_DAC_MIX: 73 case ES8389_ADC_RESET: 74 case ES8389_ADC_MODE: 75 case ES8389_DMIC_EN: 76 return false; 77 default: 78 return true; 79 } 80 } 81 82 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -9550, 50, 0); 83 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -9550, 50, 0); 84 static const DECLARE_TLV_DB_SCALE(pga_vol_tlv, 0, 300, 0); 85 static const DECLARE_TLV_DB_SCALE(mix_vol_tlv, -9500, 100, 0); 86 static const DECLARE_TLV_DB_SCALE(alc_target_tlv, -3200, 200, 0); 87 static const DECLARE_TLV_DB_SCALE(alc_max_level, -3200, 200, 0); 88 89 static const u32 hpf_table[10][10] = { 90 {1020, 754, 624, 559, 527, 511, 502, 498, 497, 496}, 91 {754, 495, 368, 306, 274, 259, 251, 247, 246, 244}, 92 {624, 368, 243, 182, 151, 136, 128, 124, 123, 121}, 93 {559, 306, 182, 120, 90, 75, 68, 63, 62, 60}, 94 {527, 274, 151, 90, 60, 45, 38, 33, 32, 31}, 95 {511, 259, 136, 75, 45, 30, 23, 19, 18, 17}, 96 {502, 251, 128, 68, 38, 23, 16, 13, 11, 11}, 97 {498, 247, 124, 63, 33, 19, 13, 10, 8, 8}, 98 {497, 246, 123, 62, 32, 18, 11, 8, 8, 0}, 99 {496, 244, 121, 60, 31, 17, 11, 8, 0, 0} 100 }; 101 102 static bool find_best_hpf_freq(u32 target_hz, u8 *hpf1, u8 *hpf2, u32 *out) 103 { 104 int best_row = -1, best_col = -1; 105 u32 min_diff = U32_MAX; 106 u32 f, diff; 107 int i, j; 108 109 if (target_hz > 1020) 110 return false; 111 112 for (i = 0; i < 10; i++) { 113 for (j = i; j < 10; j++) { 114 f = hpf_table[i][j]; 115 116 diff = (target_hz > f) ? (target_hz - f) : (f - target_hz); 117 if (diff < min_diff) { 118 min_diff = diff; 119 best_row = i; 120 best_col = j; 121 *out = f; 122 } 123 } 124 } 125 126 *hpf1 = best_col + ES8389_HPF_OFFSET; 127 *hpf2 = best_row + ES8389_HPF_OFFSET; 128 129 return true; 130 } 131 132 static int es8389_hpf_get(struct snd_kcontrol *kcontrol, 133 struct snd_ctl_elem_value *ucontrol) 134 { 135 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 136 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 137 138 ucontrol->value.integer.value[0] = es8389->hpf_freq; 139 return 0; 140 } 141 142 static int es8389_hpf_set(struct snd_kcontrol *kcontrol, 143 struct snd_ctl_elem_value *ucontrol) 144 { 145 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 146 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 147 u32 freq; 148 bool hpf; 149 150 if (es8389->hpf_freq == ucontrol->value.integer.value[0]) 151 return 0; 152 153 if (es8389->capture_rate) { 154 freq = (ucontrol->value.integer.value[0] * 48000) / es8389->capture_rate; 155 156 hpf = find_best_hpf_freq(freq, &es8389->hpfl, &es8389->hpfr, &es8389->hpf_freq); 157 if (!hpf) 158 return -EBUSY; 159 160 if (es8389->hpf_freq != ucontrol->value.integer.value[0]) 161 dev_dbg(component->dev, "At the %u Hz sampling rate, %ld Hz could not be obtained." 162 "the frequency has been set to the closest value, %u Hz\n", 163 es8389->capture_rate, ucontrol->value.integer.value[0], es8389->hpf_freq); 164 165 regmap_update_bits(es8389->regmap, ES8389_ADC_HPF1, 0x0f, es8389->hpfl); 166 regmap_update_bits(es8389->regmap, ES8389_ADC_HPF2, 0x0f, es8389->hpfr); 167 } else { 168 es8389->hpf_freq = ucontrol->value.integer.value[0]; 169 dev_dbg(component->dev, "PCM_STREAM_CAPTURE is not active.retain the input frequency\n"); 170 } 171 172 return 1; 173 } 174 175 static int es8389_dmic_set(struct snd_kcontrol *kcontrol, 176 struct snd_ctl_elem_value *ucontrol) 177 { 178 struct snd_soc_component *component = snd_soc_dapm_kcontrol_to_component(kcontrol); 179 struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_to_dapm(kcontrol); 180 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 181 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 182 unsigned int val; 183 bool changed1, changed2; 184 185 val = ucontrol->value.integer.value[0]; 186 if (val > 1) 187 return -EINVAL; 188 189 if (val) { 190 regmap_update_bits_check(es8389->regmap, ES8389_DMIC_EN, 0xC0, 0xC0, &changed1); 191 regmap_update_bits_check(es8389->regmap, ES8389_ADC_MODE, 0x03, 0x03, &changed2); 192 } else { 193 regmap_update_bits_check(es8389->regmap, ES8389_DMIC_EN, 0xC0, 0x00, &changed1); 194 regmap_update_bits_check(es8389->regmap, ES8389_ADC_MODE, 0x03, 0x00, &changed2); 195 } 196 197 if (changed1 & changed2) 198 return snd_soc_dapm_mux_update_power(dapm, kcontrol, val, e, NULL); 199 else 200 return 0; 201 } 202 203 static const char *const alc[] = { 204 "ALC OFF", 205 "ADCR ALC ON", 206 "ADCL ALC ON", 207 "ADCL & ADCL ALC ON", 208 }; 209 210 static const char *const ramprate[] = { 211 "0.125db/1 LRCK", 212 "0.125db/4 LRCK", 213 "0.125db/8 LRCK", 214 "0.125db/16 LRCK", 215 "0.125db/32 LRCK", 216 "0.125db/64 LRCK", 217 "0.125db/128 LRCK", 218 "0.125db/256 LRCK", 219 "0.125db/512 LRCK", 220 "0.125db/1024 LRCK", 221 "0.125db/2048 LRCK", 222 "0.125db/4096 LRCK", 223 "0.125db/8192 LRCK", 224 "0.125db/16384 LRCK", 225 "0.125db/32768 LRCK", 226 "0.125db/65536 LRCK", 227 }; 228 229 static const char *const winsize[] = { 230 "2 LRCK", 231 "4 LRCK", 232 "8 LRCK", 233 "16 LRCK", 234 "32 LRCK", 235 "64 LRCK", 236 "128 LRCK", 237 "256 LRCK", 238 "512 LRCK", 239 "1024 LRCK", 240 "2048 LRCK", 241 "4096 LRCK", 242 "8192 LRCK", 243 "16384 LRCK", 244 "32768 LRCK", 245 "65536 LRCK", 246 }; 247 248 static const struct soc_enum alc_enable = 249 SOC_ENUM_SINGLE(ES8389_ALC_ON, 5, 4, alc); 250 static const struct soc_enum alc_ramprate = 251 SOC_ENUM_SINGLE(ES8389_ALC_CTL, 4, 16, ramprate); 252 static const struct soc_enum alc_winsize = 253 SOC_ENUM_SINGLE(ES8389_ALC_CTL, 0, 16, winsize); 254 255 static const char *const es8389_adcl_mux_txt[] = { 256 "Normal", 257 "ADC2 channel to ADC1 channel", 258 }; 259 260 static const char *const es8389_adcr_mux_txt[] = { 261 "Normal", 262 "ADC1 channel to ADC2 channel", 263 }; 264 265 static const char *const es8389_outl_mux_txt[] = { 266 "Normal", 267 "DAC2 channel to DAC1 channel", 268 }; 269 270 static const char *const es8389_outr_mux_txt[] = { 271 "Normal", 272 "DAC1 channel to DAC2 channel", 273 }; 274 275 static const char *const es8389_dmic_mux_txt[] = { 276 "AMIC", 277 "DMIC", 278 }; 279 280 static const char *const es8389_pga1_texts[] = { 281 "DifferentialL", "Line 1P", "Line 2P" 282 }; 283 284 static const char *const es8389_pga2_texts[] = { 285 "DifferentialR", "Line 2N", "Line 1N" 286 }; 287 288 static const unsigned int es8389_pga_values[] = { 289 1, 5, 6 290 }; 291 292 static const struct soc_enum es8389_adcl_mux_enum = 293 SOC_ENUM_SINGLE(ES8389_ADC_MODE, 5, 294 ARRAY_SIZE(es8389_adcl_mux_txt), es8389_adcl_mux_txt); 295 296 static const struct snd_kcontrol_new es8389_adcl_mux_controls = 297 SOC_DAPM_ENUM("INPUTL MUX", es8389_adcl_mux_enum); 298 299 static const struct soc_enum es8389_adcr_mux_enum = 300 SOC_ENUM_SINGLE(ES8389_ADC_MODE, 4, 301 ARRAY_SIZE(es8389_adcr_mux_txt), es8389_adcr_mux_txt); 302 303 static const struct snd_kcontrol_new es8389_adcr_mux_controls = 304 SOC_DAPM_ENUM("INPUTR MUX", es8389_adcr_mux_enum); 305 306 static const struct soc_enum es8389_outl_mux_enum = 307 SOC_ENUM_SINGLE(ES8389_DAC_MIX, 5, 308 ARRAY_SIZE(es8389_outl_mux_txt), es8389_outl_mux_txt); 309 310 static const struct snd_kcontrol_new es8389_outl_mux_controls = 311 SOC_DAPM_ENUM("OUTL MUX", es8389_outl_mux_enum); 312 313 static const struct soc_enum es8389_outr_mux_enum = 314 SOC_ENUM_SINGLE(ES8389_DAC_MIX, 4, 315 ARRAY_SIZE(es8389_outr_mux_txt), es8389_outr_mux_txt); 316 317 static const struct snd_kcontrol_new es8389_outr_mux_controls = 318 SOC_DAPM_ENUM("OUTR MUX", es8389_outr_mux_enum); 319 320 static SOC_ENUM_SINGLE_DECL( 321 es8389_dmic_mux_enum, ES8389_DMIC_EN, 6, es8389_dmic_mux_txt); 322 323 static const struct soc_enum es8389_pgal_enum = 324 SOC_VALUE_ENUM_SINGLE(ES8389_MIC1_GAIN, 4, 7, 325 ARRAY_SIZE(es8389_pga1_texts), es8389_pga1_texts, 326 es8389_pga_values); 327 328 static const struct soc_enum es8389_pgar_enum = 329 SOC_VALUE_ENUM_SINGLE(ES8389_MIC2_GAIN, 4, 7, 330 ARRAY_SIZE(es8389_pga2_texts), es8389_pga2_texts, 331 es8389_pga_values); 332 333 static const struct snd_kcontrol_new es8389_dmic_mux_controls = 334 SOC_DAPM_ENUM_EXT("ADC MUX", es8389_dmic_mux_enum, 335 snd_soc_dapm_get_enum_double, es8389_dmic_set); 336 337 static const struct snd_kcontrol_new es8389_left_mixer_controls[] = { 338 SOC_DAPM_SINGLE("DACR DACL Mixer", ES8389_DAC_MIX, 3, 1, 0), 339 }; 340 341 static const struct snd_kcontrol_new es8389_right_mixer_controls[] = { 342 SOC_DAPM_SINGLE("DACL DACR Mixer", ES8389_DAC_MIX, 2, 1, 0), 343 }; 344 345 static const struct snd_kcontrol_new es8389_leftadc_mixer_controls[] = { 346 SOC_DAPM_SINGLE("ADCL DACL Mixer", ES8389_DAC_MIX, 1, 1, 0), 347 }; 348 349 static const struct snd_kcontrol_new es8389_rightadc_mixer_controls[] = { 350 SOC_DAPM_SINGLE("ADCR DACR Mixer", ES8389_DAC_MIX, 0, 1, 0), 351 }; 352 353 static const struct snd_kcontrol_new es8389_adc_mixer_controls[] = { 354 SOC_DAPM_SINGLE("DACL ADCL Mixer", ES8389_ADC_RESET, 7, 1, 0), 355 SOC_DAPM_SINGLE("DACR ADCR Mixer", ES8389_ADC_RESET, 6, 1, 0), 356 }; 357 358 static const struct snd_kcontrol_new es8389_snd_controls[] = { 359 SOC_SINGLE_TLV("ADCL Capture Volume", ES8389_ADCL_VOL, 0, 0xFF, 0, adc_vol_tlv), 360 SOC_SINGLE_TLV("ADCR Capture Volume", ES8389_ADCR_VOL, 0, 0xFF, 0, adc_vol_tlv), 361 SOC_SINGLE_TLV("ADCL PGA Volume", ES8389_MIC1_GAIN, 0, 0x0E, 0, pga_vol_tlv), 362 SOC_SINGLE_TLV("ADCR PGA Volume", ES8389_MIC2_GAIN, 0, 0x0E, 0, pga_vol_tlv), 363 364 SOC_ENUM("PGAL Select", es8389_pgal_enum), 365 SOC_ENUM("PGAR Select", es8389_pgar_enum), 366 SOC_ENUM("ALC Capture Switch", alc_enable), 367 SOC_SINGLE_TLV("ALC Capture Target Level", ES8389_ALC_TARGET, 368 0, 0x0f, 0, alc_target_tlv), 369 SOC_SINGLE_TLV("ALC Capture Max Gain", ES8389_ALC_GAIN, 370 0, 0x0f, 0, alc_max_level), 371 SOC_ENUM("ADC Ramp Rate", alc_ramprate), 372 SOC_ENUM("ALC Capture Winsize", alc_winsize), 373 SOC_DOUBLE("ADC OSR Volume ON Switch", ES8389_ADC_MUTE, 6, 7, 1, 0), 374 SOC_SINGLE_TLV("ADC OSR Volume", ES8389_OSR_VOL, 0, 0xFF, 0, adc_vol_tlv), 375 SOC_DOUBLE("ADC OUTPUT Invert Switch", ES8389_ADC_HPF2, 5, 6, 1, 0), 376 SOC_SINGLE_EXT("ADC HPF Freq Select", SND_SOC_NOPM, 0, 1020, 0, 377 es8389_hpf_get, es8389_hpf_set), 378 379 SOC_SINGLE_TLV("DACL Playback Volume", ES8389_DACL_VOL, 0, 0xFF, 0, dac_vol_tlv), 380 SOC_SINGLE_TLV("DACR Playback Volume", ES8389_DACR_VOL, 0, 0xFF, 0, dac_vol_tlv), 381 SOC_DOUBLE("DAC OUTPUT Invert Switch", ES8389_DAC_INV, 5, 6, 1, 0), 382 SOC_SINGLE_TLV("ADC2DAC Mixer Volume", ES8389_MIX_VOL, 0, 0x7F, 0, mix_vol_tlv), 383 }; 384 385 static const struct snd_soc_dapm_widget es8389_dapm_widgets[] = { 386 /*Input Side*/ 387 SND_SOC_DAPM_INPUT("INPUT1"), 388 SND_SOC_DAPM_INPUT("INPUT2"), 389 SND_SOC_DAPM_INPUT("DMIC"), 390 SND_SOC_DAPM_PGA("PGAL", SND_SOC_NOPM, 4, 0, NULL, 0), 391 SND_SOC_DAPM_PGA("PGAR", SND_SOC_NOPM, 4, 0, NULL, 0), 392 393 /*ADCs*/ 394 SND_SOC_DAPM_ADC("ADCL", NULL, SND_SOC_NOPM, 0, 0), 395 SND_SOC_DAPM_ADC("ADCR", NULL, SND_SOC_NOPM, 0, 0), 396 397 /* Audio Interface */ 398 SND_SOC_DAPM_AIF_OUT("I2S OUT", "I2S Capture", 0, SND_SOC_NOPM, 0, 0), 399 SND_SOC_DAPM_AIF_IN("I2S IN", "I2S Playback", 0, SND_SOC_NOPM, 0, 0), 400 401 /*DACs*/ 402 SND_SOC_DAPM_DAC("DACL", NULL, SND_SOC_NOPM, 0, 0), 403 SND_SOC_DAPM_DAC("DACR", NULL, SND_SOC_NOPM, 0, 0), 404 405 /*Output Side*/ 406 SND_SOC_DAPM_OUTPUT("HPOL"), 407 SND_SOC_DAPM_OUTPUT("HPOR"), 408 409 /* Digital Interface */ 410 SND_SOC_DAPM_PGA("IF DAC", SND_SOC_NOPM, 0, 0, NULL, 0), 411 SND_SOC_DAPM_PGA("IF DACL1", SND_SOC_NOPM, 0, 0, NULL, 0), 412 SND_SOC_DAPM_PGA("IF DACR1", SND_SOC_NOPM, 0, 0, NULL, 0), 413 SND_SOC_DAPM_PGA("IF DACL2", SND_SOC_NOPM, 0, 0, NULL, 0), 414 SND_SOC_DAPM_PGA("IF DACR2", SND_SOC_NOPM, 0, 0, NULL, 0), 415 SND_SOC_DAPM_PGA("IF DACL3", SND_SOC_NOPM, 0, 0, NULL, 0), 416 SND_SOC_DAPM_PGA("IF DACR3", SND_SOC_NOPM, 0, 0, NULL, 0), 417 418 /* Digital Interface Select */ 419 SND_SOC_DAPM_MIXER("IF DACL Mixer", SND_SOC_NOPM, 0, 0, 420 &es8389_left_mixer_controls[0], 421 ARRAY_SIZE(es8389_left_mixer_controls)), 422 SND_SOC_DAPM_MIXER("IF DACR Mixer", SND_SOC_NOPM, 0, 0, 423 &es8389_right_mixer_controls[0], 424 ARRAY_SIZE(es8389_right_mixer_controls)), 425 SND_SOC_DAPM_MIXER("IF ADCDACL Mixer", SND_SOC_NOPM, 0, 0, 426 &es8389_leftadc_mixer_controls[0], 427 ARRAY_SIZE(es8389_leftadc_mixer_controls)), 428 SND_SOC_DAPM_MIXER("IF ADCDACR Mixer", SND_SOC_NOPM, 0, 0, 429 &es8389_rightadc_mixer_controls[0], 430 ARRAY_SIZE(es8389_rightadc_mixer_controls)), 431 432 SND_SOC_DAPM_MIXER("ADC Mixer", SND_SOC_NOPM, 0, 0, 433 &es8389_adc_mixer_controls[0], 434 ARRAY_SIZE(es8389_adc_mixer_controls)), 435 SND_SOC_DAPM_MUX("ADC MUX", SND_SOC_NOPM, 0, 0, &es8389_dmic_mux_controls), 436 SND_SOC_DAPM_MUX("INPUTL MUX", SND_SOC_NOPM, 0, 0, &es8389_adcl_mux_controls), 437 SND_SOC_DAPM_MUX("INPUTR MUX", SND_SOC_NOPM, 0, 0, &es8389_adcr_mux_controls), 438 439 SND_SOC_DAPM_MUX("OUTL MUX", SND_SOC_NOPM, 0, 0, &es8389_outl_mux_controls), 440 SND_SOC_DAPM_MUX("OUTR MUX", SND_SOC_NOPM, 0, 0, &es8389_outr_mux_controls), 441 }; 442 443 444 static const struct snd_soc_dapm_route es8389_dapm_routes[] = { 445 {"PGAL", NULL, "INPUT1"}, 446 {"PGAR", NULL, "INPUT2"}, 447 448 {"ADCL", NULL, "PGAL"}, 449 {"ADCR", NULL, "PGAR"}, 450 451 {"INPUTL MUX", "Normal", "ADCL"}, 452 {"INPUTL MUX", "ADC2 channel to ADC1 channel", "ADCR"}, 453 {"INPUTR MUX", "Normal", "ADCR"}, 454 {"INPUTR MUX", "ADC1 channel to ADC2 channel", "ADCL"}, 455 456 {"ADC Mixer", "DACL ADCL Mixer", "DACL"}, 457 {"ADC Mixer", "DACR ADCR Mixer", "DACR"}, 458 {"ADC Mixer", NULL, "INPUTL MUX"}, 459 {"ADC Mixer", NULL, "INPUTR MUX"}, 460 461 {"ADC MUX", "AMIC", "ADC Mixer"}, 462 {"ADC MUX", "DMIC", "DMIC"}, 463 464 {"I2S OUT", NULL, "ADC MUX"}, 465 466 {"DACL", NULL, "I2S IN"}, 467 {"DACR", NULL, "I2S IN"}, 468 469 {"IF DACL1", NULL, "DACL"}, 470 {"IF DACR1", NULL, "DACR"}, 471 {"IF DACL2", NULL, "DACL"}, 472 {"IF DACR2", NULL, "DACR"}, 473 {"IF DACL3", NULL, "DACL"}, 474 {"IF DACR3", NULL, "DACR"}, 475 476 {"IF DACL Mixer", NULL, "IF DACL2"}, 477 {"IF DACL Mixer", "DACR DACL Mixer", "IF DACR1"}, 478 {"IF DACR Mixer", NULL, "IF DACR2"}, 479 {"IF DACR Mixer", "DACL DACR Mixer", "IF DACL1"}, 480 481 {"IF ADCDACL Mixer", NULL, "IF DACL Mixer"}, 482 {"IF ADCDACL Mixer", "ADCL DACL Mixer", "IF DACL3"}, 483 {"IF ADCDACR Mixer", NULL, "IF DACR Mixer"}, 484 {"IF ADCDACR Mixer", "ADCR DACR Mixer", "IF DACR3"}, 485 486 {"OUTL MUX", "Normal", "IF ADCDACL Mixer"}, 487 {"OUTL MUX", "DAC2 channel to DAC1 channel", "IF ADCDACR Mixer"}, 488 {"OUTR MUX", "Normal", "IF ADCDACR Mixer"}, 489 {"OUTR MUX", "DAC1 channel to DAC2 channel", "IF ADCDACL Mixer"}, 490 491 {"HPOL", NULL, "OUTL MUX"}, 492 {"HPOR", NULL, "OUTR MUX"}, 493 494 }; 495 496 struct _coeff_div { 497 u16 fs; 498 u32 mclk; 499 u32 rate; 500 u8 Reg0x04; 501 u8 Reg0x05; 502 u8 Reg0x06; 503 u8 Reg0x07; 504 u8 Reg0x08; 505 u8 Reg0x09; 506 u8 Reg0x0A; 507 u8 Reg0x0F; 508 u8 Reg0x11; 509 u8 Reg0x21; 510 u8 Reg0x22; 511 u8 Reg0x26; 512 u8 Reg0x30; 513 u8 Reg0x41; 514 u8 Reg0x42; 515 u8 Reg0x43; 516 u8 Reg0xF0; 517 u8 Reg0xF1; 518 u8 Reg0x16; 519 u8 Reg0x18; 520 u8 Reg0x19; 521 u8 dvdd_vol; 522 u8 dmic_sel; 523 }; 524 525 /* codec hifi mclk clock divider coefficients */ 526 static const struct _coeff_div coeff_div[] = { 527 {32, 256000, 8000, 0x00, 0x57, 0x84, 0xD0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 528 {36, 288000, 8000, 0x00, 0x55, 0x84, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x23, 0x8F, 0xBF, 0xC0, 0x1F, 0x8F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 529 {48, 384000, 8000, 0x02, 0x5F, 0x04, 0xC0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 530 {50, 400000, 8000, 0x00, 0x75, 0x05, 0xC8, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x18, 0xC7, 0xD0, 0xC0, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 0}, 531 {50, 400000, 8000, 0x00, 0x15, 0x85, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 1}, 532 {64, 512000, 8000, 0x00, 0x4D, 0x24, 0xC0, 0x03, 0xD1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 533 {72, 576000, 8000, 0x00, 0x45, 0x24, 0xC0, 0x01, 0xD1, 0x90, 0x00, 0x00, 0x23, 0x8F, 0xBF, 0xC0, 0x1F, 0x8F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 534 {96, 768000, 8000, 0x02, 0x57, 0x84, 0xD0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 535 {128, 1024000, 8000, 0x00, 0x45, 0x04, 0xD0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 536 {192, 1536000, 8000, 0x02, 0x4D, 0x24, 0xC0, 0x03, 0xD1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 537 {256, 2048000, 8000, 0x01, 0x45, 0x04, 0xD0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 538 {288, 2304000, 8000, 0x01, 0x51, 0x00, 0xC0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x23, 0x8F, 0xBF, 0xC0, 0x1F, 0x8F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 539 {384, 3072000, 8000, 0x02, 0x45, 0x04, 0xD0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 540 {512, 4096000, 8000, 0x00, 0x41, 0x04, 0xE0, 0x00, 0xD1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 541 {600, 4800000, 8000, 0x05, 0x65, 0x25, 0xF9, 0x00, 0xD1, 0x90, 0x00, 0x00, 0x18, 0xC7, 0xD0, 0xC0, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 0}, 542 {600, 4800000, 8000, 0x02, 0x24, 0x05, 0xD0, 0x00, 0xC2, 0x80, 0x00, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 1}, 543 {768, 6144000, 8000, 0x05, 0x45, 0x04, 0xD0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 544 {1024, 8192000, 8000, 0x01, 0x41, 0x06, 0xE0, 0x00, 0xD1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 545 {1500, 12000000, 8000, 0x0E, 0x25, 0x25, 0xE8, 0x00, 0xD1, 0x90, 0x40, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 546 {1536, 12288000, 8000, 0x02, 0x41, 0x04, 0xE0, 0x00, 0xD1, 0xB0, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 547 {1625, 13000000, 8000, 0x40, 0x6E, 0x05, 0xC8, 0x01, 0xC2, 0x90, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 548 {2048, 16384000, 8000, 0x03, 0x44, 0x01, 0xC0, 0x00, 0xD2, 0x80, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 549 {2304, 18432000, 8000, 0x11, 0x45, 0x25, 0xF0, 0x00, 0xD1, 0xB0, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 550 {2400, 19200000, 8000, 0x05, 0x14, 0x01, 0xC9, 0x00, 0xD2, 0x80, 0x80, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 1}, 551 {2400, 19200000, 8000, 0x0B, 0x01, 0x00, 0xD0, 0x00, 0xD1, 0x80, 0x80, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0xC7, 0xC7, 0x00, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 0}, 552 {3000, 24000000, 8000, 0x0E, 0x24, 0x05, 0xD0, 0x00, 0xC2, 0x80, 0xC0, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 553 {3072, 24576000, 8000, 0x05, 0x44, 0x01, 0xC0, 0x00, 0xD2, 0x80, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 554 {3250, 26000000, 8000, 0x40, 0x15, 0x85, 0xD0, 0x01, 0xC1, 0x90, 0xC0, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 1}, 555 {3250, 26000000, 8000, 0x40, 0x05, 0xA4, 0xC0, 0x00, 0xD1, 0x80, 0xC0, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0xC7, 0xC7, 0x00, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 0}, 556 {32, 512000, 16000, 0x00, 0x55, 0x84, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 557 {36, 576000, 16000, 0x00, 0x55, 0x84, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x23, 0x8F, 0xBF, 0xC0, 0x1F, 0x8F, 0x01, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 558 {48, 768000, 16000, 0x02, 0x57, 0x04, 0xC0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 559 {50, 800000, 16000, 0x00, 0x7E, 0x01, 0xD9, 0x00, 0xC2, 0x80, 0x00, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 560 {64, 1024000, 16000, 0x00, 0x45, 0x24, 0xC0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 561 {72, 1152000, 16000, 0x00, 0x45, 0x24, 0xC0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x23, 0x8F, 0xBF, 0xC0, 0x1F, 0x8F, 0x01, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 562 {96, 1536000, 16000, 0x02, 0x55, 0x84, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 563 {128, 2048000, 16000, 0x00, 0x51, 0x04, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 564 {144, 2304000, 16000, 0x00, 0x51, 0x00, 0xC0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x23, 0x8F, 0xBF, 0xC0, 0x1F, 0x8F, 0x01, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 565 {150, 2400000, 16000, 0x02, 0x7E, 0x01, 0xC9, 0x00, 0xC2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 566 {192, 3072000, 16000, 0x02, 0x65, 0x25, 0xE0, 0x00, 0xE1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 567 {256, 4096000, 16000, 0x00, 0x41, 0x04, 0xC0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 568 {300, 4800000, 16000, 0x02, 0x66, 0x01, 0xD9, 0x00, 0xC2, 0x80, 0x00, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 569 {384, 6144000, 16000, 0x02, 0x51, 0x04, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 570 {512, 8192000, 16000, 0x01, 0x41, 0x04, 0xC0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 571 {750, 12000000, 16000, 0x0E, 0x7E, 0x01, 0xC9, 0x00, 0xC2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 572 {768, 12288000, 16000, 0x02, 0x41, 0x04, 0xC0, 0x01, 0xC1, 0x90, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 573 {1024, 16384000, 16000, 0x03, 0x41, 0x04, 0xC0, 0x01, 0xC1, 0x90, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 574 {1152, 18432000, 16000, 0x08, 0x51, 0x04, 0xD0, 0x01, 0xC1, 0x90, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 575 {1200, 19200000, 16000, 0x0B, 0x66, 0x01, 0xD9, 0x00, 0xC2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 576 {1500, 24000000, 16000, 0x0E, 0x26, 0x01, 0xD9, 0x00, 0xC2, 0x80, 0xC0, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 577 {1536, 24576000, 16000, 0x05, 0x41, 0x04, 0xC0, 0x01, 0xC1, 0x90, 0xC0, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 578 {1625, 26000000, 16000, 0x40, 0x6E, 0x05, 0xC8, 0x01, 0xC2, 0x90, 0xC0, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 579 {800, 19200000, 24000, 0x07, 0x66, 0x01, 0xD9, 0x00, 0xC2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x1A, 0x49, 0x14, 2, 2}, 580 {375, 12000000, 32000, 0x0E, 0x2E, 0x05, 0xC8, 0x00, 0xC2, 0x80, 0x40, 0x01, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x23, 0x61, 0x1B, 2, 0}, 581 {600, 19200000, 32000, 0x05, 0x46, 0x01, 0xD8, 0x10, 0xC2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x23, 0x61, 0x1B, 2, 2}, 582 {32, 1411200, 44100, 0x00, 0x45, 0xA4, 0xD0, 0x10, 0xC1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 583 {64, 2822400, 44100, 0x00, 0x51, 0x00, 0xC0, 0x10, 0xC1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 584 {128, 5644800, 44100, 0x00, 0x41, 0x04, 0xD0, 0x10, 0xC1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 585 {256, 11289600, 44100, 0x01, 0x41, 0x04, 0xD0, 0x10, 0xC1, 0x80, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 586 {512, 22579200, 44100, 0x03, 0x41, 0x04, 0xD0, 0x10, 0xC1, 0x80, 0xC0, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 587 {32, 1536000, 48000, 0x00, 0x45, 0xA4, 0xD0, 0x10, 0xC1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 588 {48, 2304000, 48000, 0x02, 0x55, 0x04, 0xC0, 0x10, 0xC1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 589 {50, 2400000, 48000, 0x00, 0x76, 0x01, 0xC8, 0x10, 0xC2, 0x80, 0x00, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 590 {64, 3072000, 48000, 0x00, 0x51, 0x04, 0xC0, 0x10, 0xC1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 591 {100, 4800000, 48000, 0x00, 0x46, 0x01, 0xD8, 0x10, 0xC2, 0x80, 0x00, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 592 {125, 6000000, 48000, 0x04, 0x6E, 0x05, 0xC8, 0x10, 0xC2, 0x80, 0x00, 0x01, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 593 {128, 6144000, 48000, 0x00, 0x41, 0x04, 0xD0, 0x10, 0xC1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 594 {200, 9600000, 48000, 0x01, 0x46, 0x01, 0xD8, 0x10, 0xC2, 0x80, 0x00, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 595 {250, 12000000, 48000, 0x04, 0x76, 0x01, 0xC8, 0x10, 0xC2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 596 {256, 12288000, 48000, 0x01, 0x41, 0x04, 0xD0, 0x10, 0xC1, 0x80, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 597 {384, 18432000, 48000, 0x02, 0x41, 0x04, 0xD0, 0x10, 0xC1, 0x80, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 598 {400, 19200000, 48000, 0x03, 0x46, 0x01, 0xD8, 0x10, 0xC2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 599 {500, 24000000, 48000, 0x04, 0x46, 0x01, 0xD8, 0x10, 0xC2, 0x80, 0xC0, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 600 {512, 24576000, 48000, 0x03, 0x41, 0x04, 0xD0, 0x10, 0xC1, 0x80, 0xC0, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 601 {800, 38400000, 48000, 0x18, 0x45, 0x04, 0xC0, 0x10, 0xC1, 0x80, 0xC0, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 602 {128, 11289600, 88200, 0x00, 0x50, 0x00, 0xC0, 0x10, 0xC1, 0x80, 0x40, 0x00, 0x9F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x80, 0x12, 0xC0, 0x32, 0x89, 0x25, 2, 2}, 603 {64, 6144000, 96000, 0x00, 0x41, 0x00, 0xD0, 0x10, 0xC1, 0x80, 0x00, 0x00, 0x9F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x80, 0x12, 0xC0, 0x35, 0x91, 0x28, 2, 2}, 604 {96, 9216000, 96000, 0x02, 0x43, 0x00, 0xC0, 0x10, 0xC0, 0x80, 0x00, 0x00, 0x9F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x80, 0x12, 0xC0, 0x35, 0x91, 0x28, 2, 2}, 605 {256, 24576000, 96000, 0x00, 0x40, 0x00, 0xC0, 0x10, 0xC1, 0x80, 0xC0, 0x00, 0x9F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x80, 0x12, 0xC0, 0x35, 0x91, 0x28, 2, 2}, 606 {128, 24576000, 192000, 0x00, 0x50, 0x00, 0xC0, 0x18, 0xC1, 0x81, 0xC0, 0x00, 0x8F, 0x7F, 0xBF, 0xC0, 0x3F, 0x7F, 0x80, 0x12, 0xC0, 0x3F, 0xF9, 0x3F, 2, 2}, 607 {64, 12288000, 192000, 0x00, 0x41, 0x00, 0xC0, 0x18, 0xC1, 0x80, 0x00, 0x00, 0x8F, 0x7F, 0xEF, 0xC0, 0x7F, 0x7F, 0x80, 0x12, 0xC0, 0x3F, 0xF9, 0x3F, 1, 0}, 608 }; 609 610 static inline int get_coeff(u8 vddd, u8 dmic, int mclk, int rate) 611 { 612 int i; 613 u8 dmic_det, vddd_det; 614 615 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { 616 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) { 617 vddd_det = ~(coeff_div[i].dvdd_vol ^ vddd) & 0x01; 618 dmic_det = ~(coeff_div[i].dmic_sel ^ dmic) & 0x01; 619 vddd_det |= ~(coeff_div[i].dvdd_vol % 2) & 0x01; 620 dmic_det |= ~(coeff_div[i].dmic_sel % 2) & 0x01; 621 622 if (vddd_det && dmic_det) 623 return i; 624 } 625 } 626 627 return -EINVAL; 628 } 629 630 /* 631 * if PLL not be used, use internal clk1 for mclk,otherwise, use internal clk2 for PLL source. 632 */ 633 static int es8389_set_dai_sysclk(struct snd_soc_dai *dai, 634 int clk_id, unsigned int freq, int dir) 635 { 636 struct snd_soc_component *component = dai->component; 637 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 638 639 es8389->sysclk = freq; 640 641 return 0; 642 } 643 644 static int es8389_set_tdm_slot(struct snd_soc_dai *dai, 645 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width) 646 { 647 struct snd_soc_component *component = dai->component; 648 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 649 650 regmap_update_bits(es8389->regmap, ES8389_PTDM_SLOT, 651 ES8389_TDM_SLOT, (slots << ES8389_TDM_SHIFT)); 652 regmap_update_bits(es8389->regmap, ES8389_DAC_RAMP, 653 ES8389_TDM_SLOT, (slots << ES8389_TDM_SHIFT)); 654 655 return 0; 656 } 657 658 static int es8389_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) 659 { 660 struct snd_soc_component *component = dai->component; 661 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 662 u8 state = 0; 663 664 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 665 case SND_SOC_DAIFMT_CBC_CFP: 666 regmap_update_bits(es8389->regmap, ES8389_MASTER_MODE, 667 ES8389_MASTER_MODE_EN, ES8389_MASTER_MODE_EN); 668 es8389->mastermode = 1; 669 break; 670 case SND_SOC_DAIFMT_CBC_CFC: 671 es8389->mastermode = 0; 672 break; 673 default: 674 return -EINVAL; 675 } 676 677 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 678 case SND_SOC_DAIFMT_I2S: 679 state |= ES8389_DAIFMT_I2S; 680 break; 681 case SND_SOC_DAIFMT_RIGHT_J: 682 dev_err(component->dev, "component driver does not support right justified\n"); 683 return -EINVAL; 684 case SND_SOC_DAIFMT_LEFT_J: 685 state |= ES8389_DAIFMT_LEFT_J; 686 break; 687 case SND_SOC_DAIFMT_DSP_A: 688 state |= ES8389_DAIFMT_DSP_A; 689 break; 690 case SND_SOC_DAIFMT_DSP_B: 691 state |= ES8389_DAIFMT_DSP_B; 692 break; 693 default: 694 break; 695 } 696 regmap_update_bits(es8389->regmap, ES8389_ADC_FORMAT_MUTE, ES8389_DAIFMT_MASK, state); 697 regmap_update_bits(es8389->regmap, ES8389_DAC_FORMAT_MUTE, ES8389_DAIFMT_MASK, state); 698 699 return 0; 700 } 701 702 static int es8389_pcm_hw_params(struct snd_pcm_substream *substream, 703 struct snd_pcm_hw_params *params, 704 struct snd_soc_dai *dai) 705 { 706 struct snd_soc_component *component = dai->component; 707 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 708 int coeff, ret; 709 u8 dmic_enable, state = 0; 710 unsigned int regv; 711 u32 freq; 712 bool hpf; 713 714 switch (params_format(params)) { 715 case SNDRV_PCM_FORMAT_S16_LE: 716 state |= ES8389_S16_LE; 717 break; 718 case SNDRV_PCM_FORMAT_S20_3LE: 719 state |= ES8389_S20_3_LE; 720 break; 721 case SNDRV_PCM_FORMAT_S18_3LE: 722 state |= ES8389_S18_LE; 723 break; 724 case SNDRV_PCM_FORMAT_S24_LE: 725 state |= ES8389_S24_LE; 726 break; 727 case SNDRV_PCM_FORMAT_S32_LE: 728 state |= ES8389_S32_LE; 729 break; 730 default: 731 return -EINVAL; 732 } 733 734 regmap_update_bits(es8389->regmap, ES8389_ADC_FORMAT_MUTE, ES8389_DATA_LEN_MASK, state); 735 regmap_update_bits(es8389->regmap, ES8389_DAC_FORMAT_MUTE, ES8389_DATA_LEN_MASK, state); 736 737 if (es8389->mclk_src == ES8389_SCLK_PIN) { 738 regmap_update_bits(es8389->regmap, ES8389_MASTER_CLK, 739 ES8389_MCLK_MASK, ES8389_MCLK_FROM_SCLK); 740 es8389->sysclk = params_channels(params) * params_width(params) * params_rate(params); 741 } 742 743 regmap_read(es8389->regmap, ES8389_DMIC_EN, ®v); 744 dmic_enable = regv >> 7 & 0x01; 745 746 ret = regulator_get_voltage(es8389->core_supply[ES8389_SUPPLY_VD].consumer); 747 switch (ret) { 748 case 1800000 ... 2000000: 749 es8389->vddd = ES8389_1V8; 750 break; 751 case 2500000 ... 3300000: 752 es8389->vddd = ES8389_3V3; 753 break; 754 default: 755 es8389->vddd = ES8389_3V3; 756 break; 757 } 758 759 coeff = get_coeff(es8389->vddd, dmic_enable, es8389->sysclk, params_rate(params)); 760 if (coeff >= 0) { 761 regmap_write(es8389->regmap, ES8389_CLK_DIV1, coeff_div[coeff].Reg0x04); 762 regmap_write(es8389->regmap, ES8389_CLK_MUL, coeff_div[coeff].Reg0x05); 763 regmap_write(es8389->regmap, ES8389_CLK_MUX1, coeff_div[coeff].Reg0x06); 764 regmap_write(es8389->regmap, ES8389_CLK_MUX2, coeff_div[coeff].Reg0x07); 765 regmap_write(es8389->regmap, ES8389_CLK_CTL1, coeff_div[coeff].Reg0x08); 766 regmap_write(es8389->regmap, ES8389_CLK_CTL2, coeff_div[coeff].Reg0x09); 767 regmap_write(es8389->regmap, ES8389_CLK_CTL3, coeff_div[coeff].Reg0x0A); 768 regmap_update_bits(es8389->regmap, ES8389_OSC_CLK, 769 0xC0, coeff_div[coeff].Reg0x0F); 770 regmap_write(es8389->regmap, ES8389_CLK_DIV2, coeff_div[coeff].Reg0x11); 771 regmap_write(es8389->regmap, ES8389_ADC_OSR, coeff_div[coeff].Reg0x21); 772 regmap_write(es8389->regmap, ES8389_ADC_DSP, coeff_div[coeff].Reg0x22); 773 regmap_write(es8389->regmap, ES8389_OSR_VOL, coeff_div[coeff].Reg0x26); 774 regmap_update_bits(es8389->regmap, ES8389_SYSTEM30, 775 0xC0, coeff_div[coeff].Reg0x30); 776 regmap_write(es8389->regmap, ES8389_DAC_DSM_OSR, coeff_div[coeff].Reg0x41); 777 regmap_write(es8389->regmap, ES8389_DAC_DSP_OSR, coeff_div[coeff].Reg0x42); 778 regmap_update_bits(es8389->regmap, ES8389_DAC_MISC, 779 0x81, coeff_div[coeff].Reg0x43); 780 regmap_update_bits(es8389->regmap, ES8389_CHIP_MISC, 781 0x72, coeff_div[coeff].Reg0xF0); 782 regmap_write(es8389->regmap, ES8389_CSM_STATE1, coeff_div[coeff].Reg0xF1); 783 regmap_write(es8389->regmap, ES8389_SYSTEM16, coeff_div[coeff].Reg0x16); 784 regmap_write(es8389->regmap, ES8389_SYSTEM18, coeff_div[coeff].Reg0x18); 785 regmap_write(es8389->regmap, ES8389_SYSTEM19, coeff_div[coeff].Reg0x19); 786 } else { 787 dev_warn(component->dev, "Clock coefficients do not match"); 788 } 789 790 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { 791 es8389->capture_rate = params_rate(params); 792 freq = (es8389->hpf_freq * 48000) / params_rate(params); 793 hpf = find_best_hpf_freq(freq, &es8389->hpfl, &es8389->hpfr, &es8389->hpf_freq); 794 if (!hpf) { 795 dev_err(component->dev, "The HPF frequency is invalid\n"); 796 return -EINVAL; 797 } 798 } 799 800 return 0; 801 } 802 803 static int es8389_pcm_hw_free(struct snd_pcm_substream *substream, 804 struct snd_soc_dai *dai) 805 { 806 struct snd_soc_component *component = dai->component; 807 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 808 809 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) 810 es8389->capture_rate = 0; 811 812 return 0; 813 } 814 815 static void es8389_standby(struct snd_soc_component *component) 816 { 817 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 818 819 regmap_update_bits(es8389->regmap, ES8389_ADC_HPF1, 0x0f, 0x04); 820 regmap_update_bits(es8389->regmap, ES8389_ADC_HPF2, 0x0f, 0x04); 821 regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0xD4); 822 usleep_range(70000, 72000); 823 regmap_write(es8389->regmap, ES8389_ANA_CTL1, 0x59); 824 regmap_write(es8389->regmap, ES8389_ADC_EN, 0x00); 825 regmap_write(es8389->regmap, ES8389_CLK_OFF1, 0x00); 826 regmap_write(es8389->regmap, ES8389_RESET, 0x3E); 827 regmap_update_bits(es8389->regmap, ES8389_DAC_INV, 0x80, 0x80); 828 usleep_range(8000, 8500); 829 regmap_update_bits(es8389->regmap, ES8389_DAC_INV, 0x80, 0x00); 830 } 831 832 static int es8389_set_bias_level(struct snd_soc_component *component, 833 enum snd_soc_bias_level level) 834 { 835 int ret; 836 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 837 838 switch (level) { 839 case SND_SOC_BIAS_ON: 840 ret = clk_prepare_enable(es8389->mclk); 841 if (ret) 842 return ret; 843 844 regmap_update_bits(es8389->regmap, ES8389_HPSW, 0x20, 0x20); 845 regmap_write(es8389->regmap, ES8389_ANA_CTL1, 0xD9); 846 regmap_write(es8389->regmap, ES8389_ADC_EN, 0x8F); 847 regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0xE4); 848 regmap_write(es8389->regmap, ES8389_RESET, 0x01); 849 regmap_write(es8389->regmap, ES8389_CLK_OFF1, 0xC3); 850 break; 851 case SND_SOC_BIAS_PREPARE: 852 break; 853 case SND_SOC_BIAS_STANDBY: 854 es8389_standby(component); 855 clk_disable_unprepare(es8389->mclk); 856 break; 857 case SND_SOC_BIAS_OFF: 858 break; 859 } 860 return 0; 861 } 862 863 864 865 static int es8389_mute(struct snd_soc_dai *dai, int mute, int direction) 866 { 867 struct snd_soc_component *component = dai->component; 868 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 869 unsigned int regv; 870 871 if (mute) { 872 if (direction == SNDRV_PCM_STREAM_PLAYBACK) { 873 regmap_update_bits(es8389->regmap, ES8389_DAC_FORMAT_MUTE, 874 0x03, 0x03); 875 } else { 876 regmap_update_bits(es8389->regmap, ES8389_ADC_FORMAT_MUTE, 877 0x03, 0x03); 878 } 879 } else { 880 regmap_read(es8389->regmap, ES8389_CSM_STATE1, ®v); 881 if (regv != ES8389_STATE_ON) { 882 regmap_update_bits(es8389->regmap, ES8389_HPSW, 0x20, 0x20); 883 regmap_write(es8389->regmap, ES8389_ANA_CTL1, 0xD9); 884 regmap_write(es8389->regmap, ES8389_ADC_EN, 0x8F); 885 regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0xE4); 886 regmap_write(es8389->regmap, ES8389_RESET, 0x01); 887 regmap_write(es8389->regmap, ES8389_CLK_OFF1, 0xC3); 888 } 889 890 if (direction == SNDRV_PCM_STREAM_PLAYBACK) { 891 if (!es8389->version) { 892 regmap_write(es8389->regmap, ES8389_DAC_RESET, 0X00); 893 usleep_range(70000, 72000); 894 } 895 regmap_update_bits(es8389->regmap, ES8389_DAC_FORMAT_MUTE, 896 0x03, 0x00); 897 } else { 898 regmap_update_bits(es8389->regmap, ES8389_ADC_HPF1, 0x0f, es8389->hpfl); 899 regmap_update_bits(es8389->regmap, ES8389_ADC_HPF2, 0x0f, es8389->hpfr); 900 regmap_update_bits(es8389->regmap, ES8389_ADC_FORMAT_MUTE, 901 0x03, 0x00); 902 } 903 } 904 905 return 0; 906 } 907 908 #define es8389_RATES SNDRV_PCM_RATE_8000_96000 909 910 #define es8389_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 911 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE) 912 913 static const struct snd_soc_dai_ops es8389_ops = { 914 .hw_params = es8389_pcm_hw_params, 915 .hw_free = es8389_pcm_hw_free, 916 .set_fmt = es8389_set_dai_fmt, 917 .set_sysclk = es8389_set_dai_sysclk, 918 .set_tdm_slot = es8389_set_tdm_slot, 919 .mute_stream = es8389_mute, 920 }; 921 922 static struct snd_soc_dai_driver es8389_dai = { 923 .name = "ES8389 HiFi", 924 .playback = { 925 .stream_name = "Playback", 926 .channels_min = 1, 927 .channels_max = 2, 928 .rates = es8389_RATES, 929 .formats = es8389_FORMATS, 930 }, 931 .capture = { 932 .stream_name = "Capture", 933 .channels_min = 1, 934 .channels_max = 2, 935 .rates = es8389_RATES, 936 .formats = es8389_FORMATS, 937 }, 938 .ops = &es8389_ops, 939 .symmetric_rate = 1, 940 }; 941 942 static void es8389_init(struct snd_soc_component *component) 943 { 944 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 945 unsigned int reg; 946 947 regmap_read(es8389->regmap, ES8389_MAX_REGISTER, ®); 948 es8389->version = reg; 949 regmap_write(es8389->regmap, ES8389_ISO_CTL, 0x56); 950 regmap_write(es8389->regmap, ES8389_RESET, 0x7E); 951 regmap_write(es8389->regmap, ES8389_ISO_CTL, 0x38); 952 regmap_write(es8389->regmap, ES8389_ADC_HPF1, 0x64); 953 regmap_write(es8389->regmap, ES8389_ADC_HPF2, 0x04); 954 regmap_write(es8389->regmap, ES8389_DAC_INV, 0x03); 955 956 regmap_write(es8389->regmap, ES8389_VMID, 0x2A); 957 regmap_write(es8389->regmap, ES8389_ANA_CTL1, 0xC9); 958 regmap_write(es8389->regmap, ES8389_ANA_VSEL, 0x4F); 959 regmap_write(es8389->regmap, ES8389_ANA_CTL2, 0x06); 960 regmap_write(es8389->regmap, ES8389_LOW_POWER1, 0x00); 961 regmap_write(es8389->regmap, ES8389_DMIC_EN, 0x16); 962 963 regmap_write(es8389->regmap, ES8389_PGA_SW, 0xAA); 964 regmap_write(es8389->regmap, ES8389_MOD_SW1, 0x66); 965 regmap_write(es8389->regmap, ES8389_MOD_SW2, 0x99); 966 regmap_write(es8389->regmap, ES8389_ADC_MODE, (0x00 | ES8389_TDM_MODE)); 967 regmap_update_bits(es8389->regmap, ES8389_DMIC_EN, 0xC0, 0x00); 968 regmap_update_bits(es8389->regmap, ES8389_ADC_MODE, 0x03, 0x00); 969 970 regmap_update_bits(es8389->regmap, ES8389_MIC1_GAIN, 971 ES8389_MIC_SEL_MASK, ES8389_MIC_DEFAULT); 972 regmap_update_bits(es8389->regmap, ES8389_MIC2_GAIN, 973 ES8389_MIC_SEL_MASK, ES8389_MIC_DEFAULT); 974 regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0xC4); 975 regmap_write(es8389->regmap, ES8389_MASTER_MODE, 0x08); 976 regmap_write(es8389->regmap, ES8389_CSM_STATE1, 0x00); 977 regmap_write(es8389->regmap, ES8389_SYSTEM12, 0x01); 978 regmap_write(es8389->regmap, ES8389_SYSTEM13, 0x01); 979 regmap_write(es8389->regmap, ES8389_SYSTEM14, 0x01); 980 regmap_write(es8389->regmap, ES8389_SYSTEM15, 0x01); 981 regmap_write(es8389->regmap, ES8389_SYSTEM16, 0x35); 982 regmap_write(es8389->regmap, ES8389_SYSTEM17, 0x09); 983 regmap_write(es8389->regmap, ES8389_SYSTEM18, 0x91); 984 regmap_write(es8389->regmap, ES8389_SYSTEM19, 0x28); 985 regmap_write(es8389->regmap, ES8389_SYSTEM1A, 0x01); 986 regmap_write(es8389->regmap, ES8389_SYSTEM1B, 0x01); 987 regmap_write(es8389->regmap, ES8389_SYSTEM1C, 0x11); 988 989 regmap_write(es8389->regmap, ES8389_CHIP_MISC, 0x13); 990 regmap_write(es8389->regmap, ES8389_MASTER_CLK, 0x00); 991 regmap_write(es8389->regmap, ES8389_CLK_DIV1, 0x00); 992 regmap_write(es8389->regmap, ES8389_CLK_MUL, 0x10); 993 regmap_write(es8389->regmap, ES8389_CLK_MUX1, 0x00); 994 regmap_write(es8389->regmap, ES8389_CLK_MUX2, 0xC0); 995 regmap_write(es8389->regmap, ES8389_CLK_CTL1, 0x00); 996 regmap_write(es8389->regmap, ES8389_CLK_CTL2, 0xC0); 997 regmap_write(es8389->regmap, ES8389_CLK_CTL3, 0x80); 998 regmap_write(es8389->regmap, ES8389_SCLK_DIV, 0x04); 999 regmap_write(es8389->regmap, ES8389_LRCK_DIV1, 0x01); 1000 regmap_write(es8389->regmap, ES8389_LRCK_DIV2, 0x00); 1001 regmap_write(es8389->regmap, ES8389_OSC_CLK, 0x10); 1002 regmap_write(es8389->regmap, ES8389_ADC_OSR, 0x1F); 1003 regmap_write(es8389->regmap, ES8389_ADC_DSP, 0x7F); 1004 regmap_write(es8389->regmap, ES8389_ADC_MUTE, 0xC0); 1005 regmap_write(es8389->regmap, ES8389_SYSTEM30, 0xF4); 1006 regmap_write(es8389->regmap, ES8389_DAC_DSM_OSR, 0x7F); 1007 regmap_write(es8389->regmap, ES8389_DAC_DSP_OSR, 0x7F); 1008 regmap_write(es8389->regmap, ES8389_DAC_MISC, 0x10); 1009 regmap_write(es8389->regmap, ES8389_DAC_RAMP, 0x0F); 1010 regmap_write(es8389->regmap, ES8389_SYSTEM4C, 0xC0); 1011 regmap_write(es8389->regmap, ES8389_RESET, 0x00); 1012 regmap_write(es8389->regmap, ES8389_CLK_OFF1, 0xC1); 1013 regmap_write(es8389->regmap, ES8389_RESET, 0x01); 1014 regmap_write(es8389->regmap, ES8389_DAC_RESET, 0x02); 1015 1016 regmap_update_bits(es8389->regmap, ES8389_ADC_FORMAT_MUTE, 0x03, 0x03); 1017 regmap_update_bits(es8389->regmap, ES8389_DAC_FORMAT_MUTE, 0x03, 0x03); 1018 } 1019 1020 static int es8389_suspend(struct snd_soc_component *component) 1021 { 1022 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 1023 1024 es8389_standby(component); 1025 regcache_cache_only(es8389->regmap, true); 1026 regcache_mark_dirty(es8389->regmap); 1027 1028 return 0; 1029 } 1030 1031 static int es8389_resume(struct snd_soc_component *component) 1032 { 1033 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 1034 unsigned int regv; 1035 1036 regcache_cache_only(es8389->regmap, false); 1037 regcache_cache_bypass(es8389->regmap, true); 1038 regmap_read(es8389->regmap, ES8389_RESET, ®v); 1039 1040 if (regv == 0xff) 1041 es8389_init(component); 1042 else 1043 es8389_set_bias_level(component, SND_SOC_BIAS_ON); 1044 1045 regcache_cache_bypass(es8389->regmap, false); 1046 regcache_sync(es8389->regmap); 1047 1048 return 0; 1049 } 1050 1051 static int es8389_probe(struct snd_soc_component *component) 1052 { 1053 int ret, i; 1054 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 1055 1056 ret = device_property_read_u8(component->dev, "everest,mclk-src", &es8389->mclk_src); 1057 if (ret != 0) { 1058 dev_dbg(component->dev, "mclk-src return %d", ret); 1059 es8389->mclk_src = ES8389_MCLK_SOURCE; 1060 } 1061 1062 for (i = 0; i < ARRAY_SIZE(es8389_core_supplies); i++) 1063 es8389->core_supply[i].supply = es8389_core_supplies[i]; 1064 ret = devm_regulator_bulk_get(component->dev, ARRAY_SIZE(es8389_core_supplies), es8389->core_supply); 1065 if (ret) { 1066 dev_err(component->dev, "Failed to request core supplies %d\n", ret); 1067 return ret; 1068 } 1069 1070 es8389->mclk = devm_clk_get_optional(component->dev, "mclk"); 1071 if (IS_ERR(es8389->mclk)) 1072 return dev_err_probe(component->dev, PTR_ERR(es8389->mclk), 1073 "ES8389 is unable to get mclk\n"); 1074 1075 if (!es8389->mclk) 1076 dev_err(component->dev, "%s, assuming static mclk\n", __func__); 1077 1078 ret = clk_prepare_enable(es8389->mclk); 1079 if (ret) { 1080 dev_err(component->dev, "%s, unable to enable mclk\n", __func__); 1081 return ret; 1082 } 1083 1084 ret = regulator_bulk_enable(ARRAY_SIZE(es8389_core_supplies), es8389->core_supply); 1085 if (ret) { 1086 dev_err(component->dev, "Failed to enable core supplies: %d\n", ret); 1087 clk_disable_unprepare(es8389->mclk); 1088 return ret; 1089 } 1090 1091 es8389->hpf_freq = ES8389_HPF_DEFAULT; 1092 es8389_init(component); 1093 es8389_standby(component); 1094 1095 return 0; 1096 } 1097 1098 static void es8389_remove(struct snd_soc_component *component) 1099 { 1100 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 1101 1102 regmap_write(es8389->regmap, ES8389_MASTER_MODE, 0x28); 1103 regmap_write(es8389->regmap, ES8389_HPSW, 0x00); 1104 regmap_write(es8389->regmap, ES8389_VMID, 0x00); 1105 regmap_write(es8389->regmap, ES8389_RESET, 0x00); 1106 regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0xCC); 1107 usleep_range(500000, 550000);//500MS 1108 regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0x00); 1109 regmap_write(es8389->regmap, ES8389_ANA_CTL1, 0x08); 1110 regmap_write(es8389->regmap, ES8389_ISO_CTL, 0xC1); 1111 regmap_write(es8389->regmap, ES8389_PULL_DOWN, 0x00); 1112 1113 } 1114 1115 static const struct snd_soc_component_driver soc_codec_dev_es8389 = { 1116 .probe = es8389_probe, 1117 .remove = es8389_remove, 1118 .suspend = es8389_suspend, 1119 .resume = es8389_resume, 1120 .set_bias_level = es8389_set_bias_level, 1121 1122 .controls = es8389_snd_controls, 1123 .num_controls = ARRAY_SIZE(es8389_snd_controls), 1124 .dapm_widgets = es8389_dapm_widgets, 1125 .num_dapm_widgets = ARRAY_SIZE(es8389_dapm_widgets), 1126 .dapm_routes = es8389_dapm_routes, 1127 .num_dapm_routes = ARRAY_SIZE(es8389_dapm_routes), 1128 .idle_bias_on = 1, 1129 .use_pmdown_time = 1, 1130 }; 1131 1132 static const struct regmap_config es8389_regmap = { 1133 .reg_bits = 8, 1134 .val_bits = 8, 1135 1136 .max_register = ES8389_MAX_REGISTER, 1137 1138 .volatile_reg = es8389_volatile_register, 1139 .cache_type = REGCACHE_MAPLE, 1140 }; 1141 1142 static void es8389_i2c_shutdown(struct i2c_client *i2c) 1143 { 1144 struct es8389_private *es8389; 1145 1146 es8389 = i2c_get_clientdata(i2c); 1147 1148 regmap_write(es8389->regmap, ES8389_MASTER_MODE, 0x28); 1149 regmap_write(es8389->regmap, ES8389_HPSW, 0x00); 1150 regmap_write(es8389->regmap, ES8389_VMID, 0x00); 1151 regmap_write(es8389->regmap, ES8389_RESET, 0x00); 1152 regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0xCC); 1153 usleep_range(500000, 550000);//500MS 1154 regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0x00); 1155 regmap_write(es8389->regmap, ES8389_ANA_CTL1, 0x08); 1156 regmap_write(es8389->regmap, ES8389_ISO_CTL, 0xC1); 1157 regmap_write(es8389->regmap, ES8389_PULL_DOWN, 0x00); 1158 1159 regulator_bulk_disable(ARRAY_SIZE(es8389_core_supplies), es8389->core_supply); 1160 } 1161 1162 static int es8389_i2c_probe(struct i2c_client *i2c_client) 1163 { 1164 struct es8389_private *es8389; 1165 int ret; 1166 1167 es8389 = devm_kzalloc(&i2c_client->dev, sizeof(*es8389), GFP_KERNEL); 1168 if (es8389 == NULL) 1169 return -ENOMEM; 1170 1171 i2c_set_clientdata(i2c_client, es8389); 1172 es8389->regmap = devm_regmap_init_i2c(i2c_client, &es8389_regmap); 1173 if (IS_ERR(es8389->regmap)) 1174 return dev_err_probe(&i2c_client->dev, PTR_ERR(es8389->regmap), 1175 "regmap_init() failed\n"); 1176 1177 ret = devm_snd_soc_register_component(&i2c_client->dev, 1178 &soc_codec_dev_es8389, 1179 &es8389_dai, 1180 1); 1181 1182 return ret; 1183 } 1184 1185 #ifdef CONFIG_OF 1186 static const struct of_device_id es8389_if_dt_ids[] = { 1187 { .compatible = "everest,es8389", }, 1188 { } 1189 }; 1190 MODULE_DEVICE_TABLE(of, es8389_if_dt_ids); 1191 #endif 1192 1193 static const struct i2c_device_id es8389_i2c_id[] = { 1194 { .name = "es8389" }, 1195 { } 1196 }; 1197 MODULE_DEVICE_TABLE(i2c, es8389_i2c_id); 1198 1199 static struct i2c_driver es8389_i2c_driver = { 1200 .driver = { 1201 .name = "es8389", 1202 .of_match_table = of_match_ptr(es8389_if_dt_ids), 1203 }, 1204 .shutdown = es8389_i2c_shutdown, 1205 .probe = es8389_i2c_probe, 1206 .id_table = es8389_i2c_id, 1207 }; 1208 module_i2c_driver(es8389_i2c_driver); 1209 1210 MODULE_DESCRIPTION("ASoC es8389 driver"); 1211 MODULE_AUTHOR("Michael Zhang <zhangyi@everest-semi.com>"); 1212 MODULE_LICENSE("GPL"); 1213