xref: /linux/sound/soc/codecs/es8326.h (revision cf21f328fcafacf4f96e7a30ef9dceede1076378)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * es8326.h -- es8326 ALSA SoC audio driver
4  * Copyright Everest Semiconductor Co.,Ltd
5  *
6  * Authors: David Yang <yangxiaohua@everest-semi.com>
7  */
8 
9 #ifndef _ES8326_H
10 #define _ES8326_H
11 
12 #define CONFIG_HHTECH_MINIPMP	1
13 
14 /* ES8326 register space */
15 #define ES8326_RESET		0x00
16 #define ES8326_CLK_CTL		0x01
17 #define ES8326_CLK_INV		0x02
18 #define ES8326_CLK_RESAMPLE	0x03
19 #define ES8326_CLK_DIV1		0x04
20 #define ES8326_CLK_DIV2		0x05
21 #define ES8326_CLK_DLL		0x06
22 #define ES8326_CLK_MUX		0x07
23 #define ES8326_CLK_ADC_SEL	0x08
24 #define ES8326_CLK_DAC_SEL	0x09
25 #define ES8326_CLK_ADC_OSR	0x0a
26 #define ES8326_CLK_DAC_OSR	0x0b
27 #define ES8326_CLK_DIV_CPC	0x0c
28 #define ES8326_CLK_DIV_BCLK	0x0d
29 #define ES8326_CLK_TRI		0x0e
30 #define ES8326_CLK_DIV_LRCK	0x0f
31 #define ES8326_CLK_VMIDS1	0x10
32 #define ES8326_CLK_VMIDS2	0x11
33 #define ES8326_CLK_CAL_TIME	0x12
34 #define ES8326_FMT		0x13
35 
36 #define ES8326_DAC_MUTE		0x14
37 #define ES8326_ADC_MUTE		0x15
38 #define ES8326_ANA_PDN		0x16
39 #define ES8326_PGA_PDN		0x17
40 #define ES8326_VMIDSEL		0x18
41 #define ES8326_ANA_LP		0x19
42 #define ES8326_ANA_DMS		0x1a
43 #define ES8326_ANA_MICBIAS	0x1b
44 #define ES8326_ANA_VSEL		0x1c
45 #define ES8326_SYS_BIAS		0x1d
46 #define ES8326_BIAS_SW1		0x1e
47 #define ES8326_BIAS_SW2		0x1f
48 #define ES8326_BIAS_SW3		0x20
49 #define ES8326_BIAS_SW4		0x21
50 #define ES8326_VMIDLOW		0x22
51 #define ES8326_PGAGAIN		0x23
52 #define ES8326_HP_DRIVER	0x24
53 #define ES8326_DAC2HPMIX	0x25
54 #define ES8326_HP_VOL		0x26
55 #define ES8326_HP_CAL		0x27
56 #define ES8326_HP_DRIVER_REF	0x28
57 #define ES8326_ADC_SCALE	0x29
58 #define ES8326_ADC1_SRC		0x2a
59 #define ES8326_ADC2_SRC		0x2b
60 #define ES8326_ADC1_VOL		0x2c
61 #define ES8326_ADC2_VOL		0x2d
62 #define ES8326_ADC_RAMPRATE	0x2e
63 #define ES8326_ALC_RECOVERY	0x32
64 #define ES8326_ALC_LEVEL	0x33
65 #define ES8326_ADC_HPFS1	0x34
66 #define ES8326_ADC_HPFS2	0x35
67 #define ES8326_ADC_EQ		0x36
68 #define ES8326_HP_OFFSET_CAL	0x4A
69 #define ES8326_HPL_OFFSET_INI	0x4B
70 #define ES8326_HPR_OFFSET_INI	0x4C
71 #define ES8326_DAC_DSM		0x4D
72 #define ES8326_DAC_RAMPRATE	0x4E
73 #define ES8326_DAC_VPPSCALE	0x4F
74 #define ES8326_DAC_VOL		0x50
75 #define ES8326_DRC_RECOVERY	0x53
76 #define ES8326_DRC_WINSIZE	0x54
77 #define ES8326_HPJACK_TIMER	0x56
78 #define ES8326_HP_DET		0x57
79 #define ES8326_INT_SOURCE	0x58
80 #define ES8326_INTOUT_IO	0x59
81 #define ES8326_SDINOUT1_IO	0x5A
82 #define ES8326_SDINOUT23_IO	0x5B
83 #define ES8326_JACK_PULSE	0x5C
84 
85 #define ES8326_PULLUP_CTL	0xF9
86 #define ES8326_HP_DETECT	0xFB
87 #define ES8326_CHIP_ID1		0xFD
88 #define ES8326_CHIP_ID2		0xFE
89 #define ES8326_CHIP_VERSION	0xFF
90 
91 /* ES8326_RESET */
92 #define ES8326_CSM_ON (1 << 7)
93 #define ES8326_MASTER_MODE_EN	(1 << 6)
94 #define	ES8326_PWRUP_SEQ_EN	(1 << 5)
95 #define ES8326_CODEC_RESET (0x0f << 0)
96 #define ES8326_CSM_OFF (0 << 7)
97 
98 /* ES8326_CLK_CTL */
99 #define ES8326_CLK_ON (0x7f << 0)
100 #define ES8326_CLK_OFF (0 << 0)
101 
102 /* ES8326_CLK_INV */
103 #define ES8326_BCLK_AS_MCLK (1 << 3)
104 
105 /* ES8326_FMT */
106 #define ES8326_S24_LE	(0 << 2)
107 #define ES8326_S20_3_LE	(1 << 2)
108 #define ES8326_S18_LE	(2 << 2)
109 #define ES8326_S16_LE	(3 << 2)
110 #define ES8326_S32_LE	(4 << 2)
111 #define ES8326_DATA_LEN_MASK	(7 << 2)
112 
113 #define ES8326_DAIFMT_MASK	((1 << 5) | (3 << 0))
114 #define ES8326_DAIFMT_I2S	0
115 #define ES8326_DAIFMT_LEFT_J	(1 << 0)
116 #define ES8326_DAIFMT_DSP_A	(3 << 0)
117 #define ES8326_DAIFMT_DSP_B	((1 << 5) | (3 << 0))
118 
119 /* ES8326_PGAGAIN */
120 #define ES8326_MIC_SEL_MASK (3 << 4)
121 #define ES8326_MIC1_SEL	(1 << 4)
122 #define ES8326_MIC2_SEL (1 << 5)
123 
124 /* ES8326_HP_CAL */
125 #define ES8326_HPOR_SHIFT 4
126 
127 /* ES8326_ADC1_SRC */
128 #define ES8326_ADC1_SHIFT 0
129 #define ES8326_ADC2_SHIFT 4
130 #define ES8326_ADC_SRC_ANA 0
131 #define ES8326_ADC_SRC_ANA_INV_SW0 1
132 #define ES8326_ADC_SRC_ANA_INV_SW1 2
133 #define ES8326_ADC_SRC_DMIC_MCLK 3
134 #define ES8326_ADC_SRC_DMIC_SDIN2 4
135 #define ES8326_ADC_SRC_DMIC_SDIN2_INV 5
136 #define ES8326_ADC_SRC_DMIC_SDIN3 6
137 #define ES8326_ADC_SRC_DMIC_SDIN3_INV 7
138 
139 #define ES8326_ADC_AMIC	((ES8326_ADC_SRC_ANA_INV_SW1 << ES8326_ADC2_SHIFT) \
140 		| (ES8326_ADC_SRC_ANA_INV_SW1 << ES8326_ADC1_SHIFT))
141 #define ES8326_ADC_DMIC	((ES8326_ADC_SRC_DMIC_SDIN2 << ES8326_ADC2_SHIFT) \
142 		| (ES8326_ADC_SRC_DMIC_SDIN2 << ES8326_ADC1_SHIFT))
143 /* ES8326_ADC2_SRC */
144 #define ES8326_ADC3_SHIFT 0
145 #define ES8326_ADC4_SHIFT 3
146 
147 /* ES8326_HP_DET */
148 #define ES8326_HP_DET_SRC_PIN27 (1 << 5)
149 #define ES8326_HP_DET_SRC_PIN9 (1 << 4)
150 #define ES8326_HP_DET_JACK_POL (1 << 3)
151 #define ES8326_HP_DET_BUTTON_POL (1 << 2)
152 #define ES8326_HP_TYPE_OMTP	(3 << 0)
153 #define ES8326_HP_TYPE_CTIA	(2 << 0)
154 #define ES8326_HP_TYPE_AUTO	(1 << 0)
155 #define ES8326_HP_TYPE_AUTO_INV	(0 << 0)
156 
157 /* ES8326_SDINOUT1_IO */
158 #define ES8326_IO_INPUT	(0 << 0)
159 #define ES8326_IO_SDIN_SLOT0 (1 << 0)
160 #define ES8326_IO_SDIN_SLOT1 (2 << 0)
161 #define ES8326_IO_SDIN_SLOT2 (3 << 0)
162 #define ES8326_IO_SDIN_SLOT7 (8 << 0)
163 #define ES8326_IO_DMIC_CLK (9 << 0)
164 #define ES8326_IO_DMIC_CLK_INV (0x0a << 0)
165 #define ES8326_IO_SDOUT2 (0x0b << 0)
166 #define ES8326_IO_LOW (0x0e << 0)
167 #define ES8326_IO_HIGH (0x0f << 0)
168 #define ES8326_ADC2DAC (1 << 3)
169 #define ES8326_SDINOUT1_SHIFT 4
170 
171 /* ES8326_SDINOUT23_IO */
172 #define ES8326_SDINOUT2_SHIFT 4
173 #define ES8326_SDINOUT3_SHIFT 0
174 
175 /* ES8326_HP_DETECT */
176 #define ES8326_HPINSERT_FLAG (1 << 1)
177 #define ES8326_HPBUTTON_FLAG (1 << 0)
178 
179 /* ES8326_CHIP_VERSION 0xFF */
180 #define ES8326_VERSION_B (1 << 0)
181 
182 #endif
183