1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // es8326.c -- es8326 ALSA SoC audio driver 4 // Copyright Everest Semiconductor Co., Ltd 5 // 6 // Authors: David Yang <yangxiaohua@everest-semi.com> 7 // 8 9 #include <linux/clk.h> 10 #include <linux/i2c.h> 11 #include <linux/interrupt.h> 12 #include <linux/irq.h> 13 #include <linux/module.h> 14 #include <sound/jack.h> 15 #include <sound/pcm_params.h> 16 #include <sound/soc.h> 17 #include <sound/soc-dapm.h> 18 #include <sound/tlv.h> 19 #include "es8326.h" 20 21 struct es8326_priv { 22 struct clk *mclk; 23 struct i2c_client *i2c; 24 struct regmap *regmap; 25 struct snd_soc_component *component; 26 struct delayed_work jack_detect_work; 27 struct delayed_work button_press_work; 28 struct snd_soc_jack *jack; 29 int irq; 30 /* The lock protects the situation that an irq is generated 31 * while enabling or disabling or during an irq. 32 */ 33 struct mutex lock; 34 u8 jack_pol; 35 u8 interrupt_src; 36 u8 interrupt_clk; 37 u8 hpl_vol; 38 u8 hpr_vol; 39 bool jd_inverted; 40 unsigned int sysclk; 41 42 bool calibrated; 43 int version; 44 int hp; 45 int jack_remove_retry; 46 }; 47 48 static int es8326_crosstalk1_get(struct snd_kcontrol *kcontrol, 49 struct snd_ctl_elem_value *ucontrol) 50 { 51 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 52 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 53 unsigned int crosstalk_h, crosstalk_l; 54 unsigned int crosstalk; 55 56 regmap_read(es8326->regmap, ES8326_DAC_RAMPRATE, &crosstalk_h); 57 regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l); 58 crosstalk_h &= 0x20; 59 crosstalk_l &= 0xf0; 60 crosstalk = crosstalk_h >> 1 | crosstalk_l >> 4; 61 ucontrol->value.integer.value[0] = crosstalk; 62 63 return 0; 64 } 65 66 static int es8326_crosstalk1_set(struct snd_kcontrol *kcontrol, 67 struct snd_ctl_elem_value *ucontrol) 68 { 69 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 70 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 71 unsigned int crosstalk_h, crosstalk_l; 72 unsigned int crosstalk; 73 74 crosstalk = ucontrol->value.integer.value[0]; 75 regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l); 76 crosstalk_h = (crosstalk & 0x10) << 1; 77 crosstalk_l &= 0x0f; 78 crosstalk_l |= (crosstalk & 0x0f) << 4; 79 regmap_update_bits(es8326->regmap, ES8326_DAC_RAMPRATE, 80 0x20, crosstalk_h); 81 regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l); 82 83 return 0; 84 } 85 86 static int es8326_crosstalk2_get(struct snd_kcontrol *kcontrol, 87 struct snd_ctl_elem_value *ucontrol) 88 { 89 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 90 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 91 unsigned int crosstalk_h, crosstalk_l; 92 unsigned int crosstalk; 93 94 regmap_read(es8326->regmap, ES8326_DAC_RAMPRATE, &crosstalk_h); 95 regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l); 96 crosstalk_h &= 0x10; 97 crosstalk_l &= 0x0f; 98 crosstalk = crosstalk_h | crosstalk_l; 99 ucontrol->value.integer.value[0] = crosstalk; 100 101 return 0; 102 } 103 104 static int es8326_crosstalk2_set(struct snd_kcontrol *kcontrol, 105 struct snd_ctl_elem_value *ucontrol) 106 { 107 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 108 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 109 unsigned int crosstalk_h, crosstalk_l; 110 unsigned int crosstalk; 111 112 crosstalk = ucontrol->value.integer.value[0]; 113 regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l); 114 crosstalk_h = crosstalk & 0x10; 115 crosstalk_l &= 0xf0; 116 crosstalk_l |= crosstalk & 0x0f; 117 regmap_update_bits(es8326->regmap, ES8326_DAC_RAMPRATE, 118 0x10, crosstalk_h); 119 regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l); 120 121 return 0; 122 } 123 124 static int es8326_hplvol_get(struct snd_kcontrol *kcontrol, 125 struct snd_ctl_elem_value *ucontrol) 126 { 127 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 128 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 129 130 ucontrol->value.integer.value[0] = es8326->hpl_vol; 131 132 return 0; 133 } 134 135 static int es8326_hplvol_set(struct snd_kcontrol *kcontrol, 136 struct snd_ctl_elem_value *ucontrol) 137 { 138 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 139 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 140 unsigned int hp_vol; 141 142 hp_vol = ucontrol->value.integer.value[0]; 143 if (hp_vol > 5) 144 return -EINVAL; 145 if (es8326->hpl_vol != hp_vol) { 146 es8326->hpl_vol = hp_vol; 147 if (hp_vol >= 3) 148 hp_vol++; 149 regmap_update_bits(es8326->regmap, ES8326_HP_VOL, 150 0x70, (hp_vol << 4)); 151 return 1; 152 } 153 154 return 0; 155 } 156 157 static int es8326_hprvol_get(struct snd_kcontrol *kcontrol, 158 struct snd_ctl_elem_value *ucontrol) 159 { 160 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 161 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 162 163 ucontrol->value.integer.value[0] = es8326->hpr_vol; 164 165 return 0; 166 } 167 168 static int es8326_hprvol_set(struct snd_kcontrol *kcontrol, 169 struct snd_ctl_elem_value *ucontrol) 170 { 171 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 172 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 173 unsigned int hp_vol; 174 175 hp_vol = ucontrol->value.integer.value[0]; 176 if (hp_vol > 5) 177 return -EINVAL; 178 if (es8326->hpr_vol != hp_vol) { 179 es8326->hpr_vol = hp_vol; 180 if (hp_vol >= 3) 181 hp_vol++; 182 regmap_update_bits(es8326->regmap, ES8326_HP_VOL, 183 0x07, hp_vol); 184 return 1; 185 } 186 187 return 0; 188 } 189 190 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(dac_vol_tlv, -9550, 50, 0); 191 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_vol_tlv, -9550, 50, 0); 192 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_analog_pga_tlv, 0, 300, 0); 193 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_pga_tlv, 0, 600, 0); 194 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(softramp_rate, 0, 100, 0); 195 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(drc_target_tlv, -3200, 200, 0); 196 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(drc_recovery_tlv, -125, 250, 0); 197 198 static const char *const winsize[] = { 199 "0.25db/2 LRCK", 200 "0.25db/4 LRCK", 201 "0.25db/8 LRCK", 202 "0.25db/16 LRCK", 203 "0.25db/32 LRCK", 204 "0.25db/64 LRCK", 205 "0.25db/128 LRCK", 206 "0.25db/256 LRCK", 207 "0.25db/512 LRCK", 208 "0.25db/1024 LRCK", 209 "0.25db/2048 LRCK", 210 "0.25db/4096 LRCK", 211 "0.25db/8192 LRCK", 212 "0.25db/16384 LRCK", 213 "0.25db/32768 LRCK", 214 "0.25db/65536 LRCK", 215 }; 216 217 static const char *const dacpol_txt[] = { 218 "Normal", "R Invert", "L Invert", "L + R Invert" }; 219 220 static const char *const hp_spkvol_switch[] = { 221 "HPVOL: HPL+HPL, SPKVOL: HPL+HPL", 222 "HPVOL: HPL+HPR, SPKVOL: HPL+HPR", 223 "HPVOL: HPL+HPL, SPKVOL: SPKL+SPKR", 224 "HPVOL: HPL+HPR, SPKVOL: SPKL+SPKR", 225 }; 226 227 static const struct soc_enum dacpol = 228 SOC_ENUM_SINGLE(ES8326_DAC_DSM, 4, 4, dacpol_txt); 229 static const struct soc_enum alc_winsize = 230 SOC_ENUM_SINGLE(ES8326_ADC_RAMPRATE, 4, 16, winsize); 231 static const struct soc_enum drc_winsize = 232 SOC_ENUM_SINGLE(ES8326_DRC_WINSIZE, 4, 16, winsize); 233 static const struct soc_enum hpvol_spkvol_switch = 234 SOC_ENUM_SINGLE(ES8326_HP_MISC, 6, 4, hp_spkvol_switch); 235 236 static const struct snd_kcontrol_new es8326_snd_controls[] = { 237 SOC_SINGLE_TLV("DAC Playback Volume", ES8326_DACL_VOL, 0, 0xbf, 0, dac_vol_tlv), 238 SOC_ENUM("Playback Polarity", dacpol), 239 SOC_SINGLE_TLV("DAC Ramp Rate", ES8326_DAC_RAMPRATE, 0, 0x0f, 0, softramp_rate), 240 SOC_SINGLE_TLV("DRC Recovery Level", ES8326_DRC_RECOVERY, 0, 4, 0, drc_recovery_tlv), 241 SOC_ENUM("DRC Winsize", drc_winsize), 242 SOC_SINGLE_TLV("DRC Target Level", ES8326_DRC_WINSIZE, 0, 0x0f, 0, drc_target_tlv), 243 244 SOC_DOUBLE_R_TLV("ADC Capture Volume", ES8326_ADC1_VOL, ES8326_ADC2_VOL, 0, 0xff, 0, 245 adc_vol_tlv), 246 SOC_DOUBLE_TLV("ADC PGA Volume", ES8326_ADC_SCALE, 4, 0, 5, 0, adc_pga_tlv), 247 SOC_SINGLE_TLV("ADC PGA Gain Volume", ES8326_PGAGAIN, 0, 10, 0, adc_analog_pga_tlv), 248 SOC_SINGLE_TLV("ADC Ramp Rate", ES8326_ADC_RAMPRATE, 0, 0x0f, 0, softramp_rate), 249 SOC_SINGLE("ALC Capture Switch", ES8326_ALC_RECOVERY, 3, 1, 0), 250 SOC_SINGLE_TLV("ALC Capture Recovery Level", ES8326_ALC_LEVEL, 251 0, 4, 0, drc_recovery_tlv), 252 SOC_ENUM("ALC Capture Winsize", alc_winsize), 253 SOC_SINGLE_TLV("ALC Capture Target Level", ES8326_ALC_LEVEL, 254 0, 0x0f, 0, drc_target_tlv), 255 256 SOC_SINGLE_EXT("CROSSTALK1", SND_SOC_NOPM, 0, 31, 0, 257 es8326_crosstalk1_get, es8326_crosstalk1_set), 258 SOC_SINGLE_EXT("CROSSTALK2", SND_SOC_NOPM, 0, 31, 0, 259 es8326_crosstalk2_get, es8326_crosstalk2_set), 260 SOC_SINGLE_EXT("HPL Volume", SND_SOC_NOPM, 0, 5, 0, 261 es8326_hplvol_get, es8326_hplvol_set), 262 SOC_SINGLE_EXT("HPR Volume", SND_SOC_NOPM, 0, 5, 0, 263 es8326_hprvol_get, es8326_hprvol_set), 264 265 SOC_SINGLE_TLV("HPL Playback Volume", ES8326_DACL_VOL, 0, 0xbf, 0, dac_vol_tlv), 266 SOC_SINGLE_TLV("HPR Playback Volume", ES8326_DACR_VOL, 0, 0xbf, 0, dac_vol_tlv), 267 SOC_SINGLE_TLV("SPKL Playback Volume", ES8326_SPKL_VOL, 0, 0xbf, 0, dac_vol_tlv), 268 SOC_SINGLE_TLV("SPKR Playback Volume", ES8326_SPKR_VOL, 0, 0xbf, 0, dac_vol_tlv), 269 270 SOC_ENUM("HPVol SPKVol Switch", hpvol_spkvol_switch), 271 }; 272 273 static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = { 274 SND_SOC_DAPM_INPUT("MIC1"), 275 SND_SOC_DAPM_INPUT("MIC2"), 276 SND_SOC_DAPM_INPUT("MIC3"), 277 SND_SOC_DAPM_INPUT("MIC4"), 278 279 SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0), 280 SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0), 281 282 /* Digital Interface */ 283 SND_SOC_DAPM_AIF_OUT("I2S OUT", "I2S1 Capture", 0, SND_SOC_NOPM, 0, 0), 284 SND_SOC_DAPM_AIF_IN("I2S IN", "I2S1 Playback", 0, SND_SOC_NOPM, 0, 0), 285 286 /* Analog Power Supply*/ 287 SND_SOC_DAPM_DAC("Right DAC", NULL, ES8326_ANA_PDN, 0, 1), 288 SND_SOC_DAPM_DAC("Left DAC", NULL, ES8326_ANA_PDN, 1, 1), 289 SND_SOC_DAPM_SUPPLY("MICBIAS1", ES8326_ANA_MICBIAS, 2, 0, NULL, 0), 290 SND_SOC_DAPM_SUPPLY("MICBIAS2", ES8326_ANA_MICBIAS, 3, 0, NULL, 0), 291 292 SND_SOC_DAPM_PGA("LHPMIX", ES8326_DAC2HPMIX, 7, 0, NULL, 0), 293 SND_SOC_DAPM_PGA("RHPMIX", ES8326_DAC2HPMIX, 3, 0, NULL, 0), 294 295 SND_SOC_DAPM_OUTPUT("HPOL"), 296 SND_SOC_DAPM_OUTPUT("HPOR"), 297 }; 298 299 static const struct snd_soc_dapm_route es8326_dapm_routes[] = { 300 {"ADC L", NULL, "MIC1"}, 301 {"ADC R", NULL, "MIC2"}, 302 {"ADC L", NULL, "MIC3"}, 303 {"ADC R", NULL, "MIC4"}, 304 305 {"I2S OUT", NULL, "ADC L"}, 306 {"I2S OUT", NULL, "ADC R"}, 307 308 {"Right DAC", NULL, "I2S IN"}, 309 {"Left DAC", NULL, "I2S IN"}, 310 311 {"LHPMIX", NULL, "Left DAC"}, 312 {"RHPMIX", NULL, "Right DAC"}, 313 314 {"HPOL", NULL, "LHPMIX"}, 315 {"HPOR", NULL, "RHPMIX"}, 316 }; 317 318 static bool es8326_volatile_register(struct device *dev, unsigned int reg) 319 { 320 switch (reg) { 321 case ES8326_HPL_OFFSET_INI: 322 case ES8326_HPR_OFFSET_INI: 323 case ES8326_HPDET_STA: 324 case ES8326_CTIA_OMTP_STA: 325 case ES8326_CSM_MUTE_STA: 326 return true; 327 default: 328 return false; 329 } 330 } 331 332 static const struct regmap_config es8326_regmap_config = { 333 .reg_bits = 8, 334 .val_bits = 8, 335 .max_register = 0xff, 336 .volatile_reg = es8326_volatile_register, 337 .cache_type = REGCACHE_RBTREE, 338 }; 339 340 struct _coeff_div { 341 u16 fs; 342 u32 rate; 343 u32 mclk; 344 u8 reg4; 345 u8 reg5; 346 u8 reg6; 347 u8 reg7; 348 u8 reg8; 349 u8 reg9; 350 u8 rega; 351 u8 regb; 352 }; 353 354 /* codec hifi mclk clock divider coefficients */ 355 /* {ratio, LRCK, MCLK, REG04, REG05, REG06, REG07, REG08, REG09, REG10, REG11} */ 356 static const struct _coeff_div coeff_div_v0[] = { 357 {64, 8000, 512000, 0x60, 0x01, 0x0F, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 358 {64, 16000, 1024000, 0x20, 0x00, 0x33, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 359 {64, 44100, 2822400, 0xE0, 0x00, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F}, 360 {64, 48000, 3072000, 0xE0, 0x00, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F}, 361 {128, 8000, 1024000, 0x60, 0x00, 0x33, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 362 {128, 16000, 2048000, 0x20, 0x00, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 363 {128, 44100, 5644800, 0xE0, 0x01, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F}, 364 {128, 48000, 6144000, 0xE0, 0x01, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F}, 365 366 {192, 32000, 6144000, 0xE0, 0x02, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F}, 367 {256, 8000, 2048000, 0x60, 0x00, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 368 {256, 16000, 4096000, 0x20, 0x01, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 369 {256, 44100, 11289600, 0xE0, 0x00, 0x30, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F}, 370 {256, 48000, 12288000, 0xE0, 0x00, 0x30, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F}, 371 {384, 32000, 12288000, 0xE0, 0x05, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F}, 372 {400, 48000, 19200000, 0xE9, 0x04, 0x0F, 0x6d, 0x4A, 0x0A, 0x1F, 0x1F}, 373 374 {500, 48000, 24000000, 0xF8, 0x04, 0x3F, 0x6D, 0x4A, 0x0A, 0x1F, 0x1F}, 375 {512, 8000, 4096000, 0x60, 0x01, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 376 {512, 16000, 8192000, 0x20, 0x00, 0x30, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 377 {512, 44100, 22579200, 0xE0, 0x00, 0x00, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F}, 378 {512, 48000, 24576000, 0xE0, 0x00, 0x00, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F}, 379 {768, 32000, 24576000, 0xE0, 0x02, 0x30, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F}, 380 {1024, 8000, 8192000, 0x60, 0x00, 0x30, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 381 {1024, 16000, 16384000, 0x20, 0x00, 0x00, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 382 }; 383 384 static const struct _coeff_div coeff_div_v3[] = { 385 {32, 8000, 256000, 0x60, 0x00, 0x0F, 0x75, 0x8A, 0x1B, 0x1F, 0x7F}, 386 {32, 16000, 512000, 0x20, 0x00, 0x0D, 0x75, 0x8A, 0x1B, 0x1F, 0x3F}, 387 {32, 44100, 1411200, 0x00, 0x00, 0x13, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F}, 388 {32, 48000, 1536000, 0x00, 0x00, 0x13, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F}, 389 {36, 8000, 288000, 0x20, 0x00, 0x0D, 0x75, 0x8A, 0x1B, 0x23, 0x47}, 390 {36, 16000, 576000, 0x20, 0x00, 0x0D, 0x75, 0x8A, 0x1B, 0x23, 0x47}, 391 {48, 8000, 384000, 0x60, 0x02, 0x1F, 0x75, 0x8A, 0x1B, 0x1F, 0x7F}, 392 {48, 16000, 768000, 0x20, 0x02, 0x0F, 0x75, 0x8A, 0x1B, 0x1F, 0x3F}, 393 {48, 48000, 2304000, 0x00, 0x02, 0x0D, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F}, 394 395 {64, 8000, 512000, 0x60, 0x00, 0x35, 0x75, 0x8A, 0x1B, 0x1F, 0x7F}, 396 {64, 16000, 1024000, 0x20, 0x00, 0x05, 0x75, 0x8A, 0x1B, 0x1F, 0x3F}, 397 {64, 44100, 2822400, 0xE0, 0x00, 0x31, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F}, 398 {64, 48000, 3072000, 0xE0, 0x00, 0x31, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F}, 399 {72, 8000, 576000, 0x20, 0x00, 0x13, 0x35, 0x8A, 0x1B, 0x23, 0x47}, 400 {72, 16000, 1152000, 0x20, 0x00, 0x05, 0x75, 0x8A, 0x1B, 0x23, 0x47}, 401 {96, 8000, 768000, 0x60, 0x02, 0x1D, 0x75, 0x8A, 0x1B, 0x1F, 0x7F}, 402 {96, 16000, 1536000, 0x20, 0x02, 0x0D, 0x75, 0x8A, 0x1B, 0x1F, 0x3F}, 403 {100, 48000, 4800000, 0x04, 0x04, 0x3F, 0x6D, 0xB8, 0x08, 0x4f, 0x1f}, 404 {125, 48000, 6000000, 0x04, 0x04, 0x1F, 0x2D, 0x8A, 0x0A, 0x27, 0x27}, 405 406 {128, 8000, 1024000, 0x60, 0x00, 0x05, 0x75, 0x8A, 0x1B, 0x1F, 0x7F}, 407 {128, 16000, 2048000, 0x20, 0x00, 0x31, 0x35, 0x08, 0x19, 0x1F, 0x3F}, 408 {128, 44100, 5644800, 0xE0, 0x00, 0x01, 0x2D, 0x48, 0x08, 0x1F, 0x1F}, 409 {128, 48000, 6144000, 0xE0, 0x00, 0x01, 0x2D, 0x48, 0x08, 0x1F, 0x1F}, 410 {144, 8000, 1152000, 0x20, 0x00, 0x03, 0x35, 0x8A, 0x1B, 0x23, 0x47}, 411 {144, 16000, 2304000, 0x20, 0x00, 0x11, 0x35, 0x8A, 0x1B, 0x23, 0x47}, 412 {192, 8000, 1536000, 0x60, 0x02, 0x0D, 0x75, 0x8A, 0x1B, 0x1F, 0x7F}, 413 {192, 32000, 6144000, 0xE0, 0x02, 0x31, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F}, 414 {192, 16000, 3072000, 0x20, 0x02, 0x05, 0x75, 0xCA, 0x1B, 0x1F, 0x3F}, 415 416 {200, 48000, 9600000, 0x04, 0x04, 0x0F, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F}, 417 {250, 48000, 12000000, 0x04, 0x04, 0x0F, 0x2D, 0xCA, 0x0A, 0x27, 0x27}, 418 {256, 8000, 2048000, 0x60, 0x00, 0x31, 0x35, 0x08, 0x19, 0x1F, 0x7F}, 419 {256, 16000, 4096000, 0x20, 0x00, 0x01, 0x35, 0x08, 0x19, 0x1F, 0x3F}, 420 {256, 44100, 11289600, 0xE0, 0x01, 0x01, 0x2D, 0x48, 0x08, 0x1F, 0x1F}, 421 {256, 48000, 12288000, 0xE0, 0x01, 0x01, 0x2D, 0x48, 0x08, 0x1F, 0x1F}, 422 {288, 8000, 2304000, 0x20, 0x00, 0x01, 0x35, 0x8A, 0x1B, 0x23, 0x47}, 423 {384, 8000, 3072000, 0x60, 0x02, 0x05, 0x75, 0x8A, 0x1B, 0x1F, 0x7F}, 424 {384, 16000, 6144000, 0x20, 0x02, 0x03, 0x35, 0x8A, 0x1B, 0x1F, 0x3F}, 425 {384, 32000, 12288000, 0xE0, 0x02, 0x01, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F}, 426 {384, 48000, 18432000, 0x00, 0x02, 0x01, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F}, 427 428 {400, 48000, 19200000, 0xE4, 0x04, 0x35, 0x6d, 0xCA, 0x0A, 0x1F, 0x1F}, 429 {500, 48000, 24000000, 0xF8, 0x04, 0x3F, 0x6D, 0xCA, 0x0A, 0x1F, 0x1F}, 430 {512, 8000, 4096000, 0x60, 0x00, 0x01, 0x08, 0x19, 0x1B, 0x1F, 0x7F}, 431 {512, 16000, 8192000, 0x20, 0x00, 0x30, 0x35, 0x08, 0x19, 0x1F, 0x3F}, 432 {512, 44100, 22579200, 0xE0, 0x00, 0x00, 0x2D, 0x48, 0x08, 0x1F, 0x1F}, 433 {512, 48000, 24576000, 0xE0, 0x00, 0x00, 0x2D, 0x48, 0x08, 0x1F, 0x1F}, 434 {768, 8000, 6144000, 0x60, 0x02, 0x11, 0x35, 0x8A, 0x1B, 0x1F, 0x7F}, 435 {768, 16000, 12288000, 0x20, 0x02, 0x01, 0x35, 0x8A, 0x1B, 0x1F, 0x3F}, 436 {768, 32000, 24576000, 0xE0, 0x02, 0x30, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F}, 437 {800, 48000, 38400000, 0x00, 0x18, 0x13, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F}, 438 439 {1024, 8000, 8192000, 0x60, 0x00, 0x30, 0x35, 0x8A, 0x1B, 0x1F, 0x7F}, 440 {1024, 16000, 16384000, 0x20, 0x00, 0x00, 0x35, 0x8A, 0x1B, 0x1F, 0x3F}, 441 {1152, 16000, 18432000, 0x20, 0x08, 0x11, 0x35, 0x8A, 0x1B, 0x1F, 0x3F}, 442 {1536, 8000, 12288000, 0x60, 0x02, 0x01, 0x35, 0x8A, 0x1B, 0x1F, 0x7F}, 443 {1536, 16000, 24576000, 0x20, 0x02, 0x10, 0x35, 0x8A, 0x1B, 0x1F, 0x3F}, 444 {1625, 8000, 13000000, 0x0C, 0x18, 0x1F, 0x2D, 0x8A, 0x0A, 0x27, 0x27}, 445 {1625, 16000, 26000000, 0x0C, 0x18, 0x1F, 0x2D, 0x8A, 0x0A, 0x27, 0x27}, 446 {2048, 8000, 16384000, 0x60, 0x00, 0x00, 0x35, 0x8A, 0x1B, 0x1F, 0x7F}, 447 {2304, 8000, 18432000, 0x40, 0x02, 0x10, 0x35, 0x8A, 0x1B, 0x1F, 0x5F}, 448 {3072, 8000, 24576000, 0x60, 0x02, 0x10, 0x35, 0x8A, 0x1B, 0x1F, 0x7F}, 449 {3250, 8000, 26000000, 0x0C, 0x18, 0x0F, 0x2D, 0x8A, 0x0A, 0x27, 0x27}, 450 }; 451 452 static inline int get_coeff(int mclk, int rate, int array, 453 const struct _coeff_div *coeff_div) 454 { 455 int i; 456 457 for (i = 0; i < array; i++) { 458 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) 459 return i; 460 } 461 462 return -EINVAL; 463 } 464 465 static int es8326_set_dai_sysclk(struct snd_soc_dai *codec_dai, 466 int clk_id, unsigned int freq, int dir) 467 { 468 struct snd_soc_component *codec = codec_dai->component; 469 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(codec); 470 471 es8326->sysclk = freq; 472 473 return 0; 474 } 475 476 static int es8326_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) 477 { 478 struct snd_soc_component *component = codec_dai->component; 479 u8 iface = 0; 480 481 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 482 case SND_SOC_DAIFMT_CBC_CFP: 483 snd_soc_component_update_bits(component, ES8326_RESET, 484 ES8326_MASTER_MODE_EN, ES8326_MASTER_MODE_EN); 485 break; 486 case SND_SOC_DAIFMT_CBC_CFC: 487 break; 488 default: 489 return -EINVAL; 490 } 491 492 /* interface format */ 493 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 494 case SND_SOC_DAIFMT_I2S: 495 break; 496 case SND_SOC_DAIFMT_RIGHT_J: 497 dev_err(component->dev, "Codec driver does not support right justified\n"); 498 return -EINVAL; 499 case SND_SOC_DAIFMT_LEFT_J: 500 iface |= ES8326_DAIFMT_LEFT_J; 501 break; 502 case SND_SOC_DAIFMT_DSP_A: 503 iface |= ES8326_DAIFMT_DSP_A; 504 break; 505 case SND_SOC_DAIFMT_DSP_B: 506 iface |= ES8326_DAIFMT_DSP_B; 507 break; 508 default: 509 return -EINVAL; 510 } 511 512 snd_soc_component_update_bits(component, ES8326_FMT, ES8326_DAIFMT_MASK, iface); 513 514 return 0; 515 } 516 517 static int es8326_pcm_hw_params(struct snd_pcm_substream *substream, 518 struct snd_pcm_hw_params *params, 519 struct snd_soc_dai *dai) 520 { 521 struct snd_soc_component *component = dai->component; 522 const struct _coeff_div *coeff_div; 523 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 524 u8 srate = 0; 525 int coeff, array; 526 527 if (es8326->version == 0) { 528 coeff_div = coeff_div_v0; 529 array = ARRAY_SIZE(coeff_div_v0); 530 } else { 531 coeff_div = coeff_div_v3; 532 array = ARRAY_SIZE(coeff_div_v3); 533 } 534 coeff = get_coeff(es8326->sysclk, params_rate(params), array, coeff_div); 535 /* bit size */ 536 switch (params_format(params)) { 537 case SNDRV_PCM_FORMAT_S16_LE: 538 srate |= ES8326_S16_LE; 539 break; 540 case SNDRV_PCM_FORMAT_S20_3LE: 541 srate |= ES8326_S20_3_LE; 542 break; 543 case SNDRV_PCM_FORMAT_S18_3LE: 544 srate |= ES8326_S18_LE; 545 break; 546 case SNDRV_PCM_FORMAT_S24_LE: 547 srate |= ES8326_S24_LE; 548 break; 549 case SNDRV_PCM_FORMAT_S32_LE: 550 srate |= ES8326_S32_LE; 551 break; 552 default: 553 return -EINVAL; 554 } 555 556 /* set iface & srate */ 557 snd_soc_component_update_bits(component, ES8326_FMT, ES8326_DATA_LEN_MASK, srate); 558 559 if (coeff >= 0) { 560 regmap_write(es8326->regmap, ES8326_CLK_DIV1, 561 coeff_div[coeff].reg4); 562 regmap_write(es8326->regmap, ES8326_CLK_DIV2, 563 coeff_div[coeff].reg5); 564 regmap_write(es8326->regmap, ES8326_CLK_DLL, 565 coeff_div[coeff].reg6); 566 regmap_write(es8326->regmap, ES8326_CLK_MUX, 567 coeff_div[coeff].reg7); 568 regmap_write(es8326->regmap, ES8326_CLK_ADC_SEL, 569 coeff_div[coeff].reg8); 570 regmap_write(es8326->regmap, ES8326_CLK_DAC_SEL, 571 coeff_div[coeff].reg9); 572 regmap_write(es8326->regmap, ES8326_CLK_ADC_OSR, 573 coeff_div[coeff].rega); 574 regmap_write(es8326->regmap, ES8326_CLK_DAC_OSR, 575 coeff_div[coeff].regb); 576 } else { 577 dev_warn(component->dev, "Clock coefficients do not match"); 578 } 579 580 return 0; 581 } 582 583 static int es8326_mute(struct snd_soc_dai *dai, int mute, int direction) 584 { 585 struct snd_soc_component *component = dai->component; 586 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 587 unsigned int offset_l, offset_r; 588 589 if (mute) { 590 if (direction == SNDRV_PCM_STREAM_PLAYBACK) { 591 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF); 592 regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, 593 ES8326_MUTE_MASK, ES8326_MUTE); 594 regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 595 0x30, 0x00); 596 } else { 597 regmap_update_bits(es8326->regmap, ES8326_ADC_MUTE, 598 0x0F, 0x0F); 599 } 600 } else { 601 if (!es8326->calibrated) { 602 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_FORCE_CAL); 603 msleep(30); 604 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF); 605 regmap_read(es8326->regmap, ES8326_HPL_OFFSET_INI, &offset_l); 606 regmap_read(es8326->regmap, ES8326_HPR_OFFSET_INI, &offset_r); 607 regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c); 608 regmap_write(es8326->regmap, ES8326_HPL_OFFSET_INI, offset_l); 609 regmap_write(es8326->regmap, ES8326_HPR_OFFSET_INI, offset_r); 610 es8326->calibrated = true; 611 } 612 if (direction == SNDRV_PCM_STREAM_PLAYBACK) { 613 regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x01); 614 usleep_range(1000, 5000); 615 regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x00); 616 usleep_range(1000, 5000); 617 regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x30, 0x20); 618 regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x30, 0x30); 619 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1); 620 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_ON); 621 regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, 622 ES8326_MUTE_MASK, ~(ES8326_MUTE)); 623 } else { 624 msleep(300); 625 regmap_update_bits(es8326->regmap, ES8326_ADC_MUTE, 626 0x0F, 0x00); 627 } 628 } 629 return 0; 630 } 631 632 static int es8326_set_bias_level(struct snd_soc_component *codec, 633 enum snd_soc_bias_level level) 634 { 635 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(codec); 636 int ret; 637 638 switch (level) { 639 case SND_SOC_BIAS_ON: 640 ret = clk_prepare_enable(es8326->mclk); 641 if (ret) 642 return ret; 643 644 regmap_update_bits(es8326->regmap, ES8326_RESET, 0x02, 0x02); 645 usleep_range(5000, 10000); 646 regmap_write(es8326->regmap, ES8326_INTOUT_IO, es8326->interrupt_clk); 647 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, 648 (ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT)); 649 regmap_write(es8326->regmap, ES8326_PGA_PDN, 0x40); 650 regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x00); 651 regmap_update_bits(es8326->regmap, ES8326_CLK_CTL, 0x20, 0x20); 652 regmap_update_bits(es8326->regmap, ES8326_RESET, 0x02, 0x00); 653 break; 654 case SND_SOC_BIAS_PREPARE: 655 break; 656 case SND_SOC_BIAS_STANDBY: 657 regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x3b); 658 regmap_update_bits(es8326->regmap, ES8326_CLK_CTL, 0x20, 0x00); 659 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, ES8326_IO_INPUT); 660 break; 661 case SND_SOC_BIAS_OFF: 662 clk_disable_unprepare(es8326->mclk); 663 break; 664 } 665 666 return 0; 667 } 668 669 #define es8326_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 670 SNDRV_PCM_FMTBIT_S24_LE) 671 672 static const struct snd_soc_dai_ops es8326_ops = { 673 .hw_params = es8326_pcm_hw_params, 674 .set_fmt = es8326_set_dai_fmt, 675 .set_sysclk = es8326_set_dai_sysclk, 676 .mute_stream = es8326_mute, 677 .no_capture_mute = 0, 678 }; 679 680 static struct snd_soc_dai_driver es8326_dai = { 681 .name = "ES8326 HiFi", 682 .playback = { 683 .stream_name = "Playback", 684 .channels_min = 1, 685 .channels_max = 2, 686 .rates = SNDRV_PCM_RATE_8000_48000, 687 .formats = es8326_FORMATS, 688 }, 689 .capture = { 690 .stream_name = "Capture", 691 .channels_min = 1, 692 .channels_max = 2, 693 .rates = SNDRV_PCM_RATE_8000_48000, 694 .formats = es8326_FORMATS, 695 }, 696 .ops = &es8326_ops, 697 .symmetric_rate = 1, 698 }; 699 700 static void es8326_enable_micbias(struct snd_soc_component *component) 701 { 702 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 703 704 snd_soc_dapm_mutex_lock(dapm); 705 snd_soc_dapm_force_enable_pin_unlocked(dapm, "MICBIAS1"); 706 snd_soc_dapm_force_enable_pin_unlocked(dapm, "MICBIAS2"); 707 snd_soc_dapm_sync_unlocked(dapm); 708 snd_soc_dapm_mutex_unlock(dapm); 709 } 710 711 static void es8326_disable_micbias(struct snd_soc_component *component) 712 { 713 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 714 715 snd_soc_dapm_mutex_lock(dapm); 716 snd_soc_dapm_disable_pin_unlocked(dapm, "MICBIAS1"); 717 snd_soc_dapm_disable_pin_unlocked(dapm, "MICBIAS2"); 718 snd_soc_dapm_sync_unlocked(dapm); 719 snd_soc_dapm_mutex_unlock(dapm); 720 } 721 722 /* 723 * For button detection, set the following in soundcard 724 * snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE); 725 * snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOLUMEUP); 726 * snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEDOWN); 727 */ 728 static void es8326_jack_button_handler(struct work_struct *work) 729 { 730 struct es8326_priv *es8326 = 731 container_of(work, struct es8326_priv, button_press_work.work); 732 struct snd_soc_component *comp = es8326->component; 733 unsigned int iface; 734 static int button_to_report, press_count; 735 static int prev_button, cur_button; 736 737 if (!(es8326->jack->status & SND_JACK_HEADSET)) /* Jack unplugged */ 738 return; 739 740 mutex_lock(&es8326->lock); 741 iface = snd_soc_component_read(comp, ES8326_HPDET_STA); 742 switch (iface) { 743 case 0x93: 744 /* pause button detected */ 745 cur_button = SND_JACK_BTN_0; 746 break; 747 case 0x6f: 748 case 0x4b: 749 /* button volume up */ 750 cur_button = SND_JACK_BTN_1; 751 break; 752 case 0x27: 753 /* button volume down */ 754 cur_button = SND_JACK_BTN_2; 755 break; 756 case 0x1e: 757 case 0xe2: 758 /* button released or not pressed */ 759 cur_button = 0; 760 break; 761 default: 762 break; 763 } 764 765 if ((prev_button == cur_button) && (cur_button != 0)) { 766 press_count++; 767 if (press_count > 3) { 768 /* report a press every 120ms */ 769 snd_soc_jack_report(es8326->jack, cur_button, 770 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2); 771 press_count = 0; 772 } 773 button_to_report = cur_button; 774 queue_delayed_work(system_wq, &es8326->button_press_work, 775 msecs_to_jiffies(35)); 776 } else if (prev_button != cur_button) { 777 /* mismatch, detect again */ 778 prev_button = cur_button; 779 queue_delayed_work(system_wq, &es8326->button_press_work, 780 msecs_to_jiffies(35)); 781 } else { 782 /* released or no pressed */ 783 if (button_to_report != 0) { 784 snd_soc_jack_report(es8326->jack, button_to_report, 785 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2); 786 snd_soc_jack_report(es8326->jack, 0, 787 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2); 788 button_to_report = 0; 789 } 790 } 791 mutex_unlock(&es8326->lock); 792 } 793 794 static void es8326_jack_detect_handler(struct work_struct *work) 795 { 796 struct es8326_priv *es8326 = 797 container_of(work, struct es8326_priv, jack_detect_work.work); 798 struct snd_soc_component *comp = es8326->component; 799 unsigned int iface; 800 801 mutex_lock(&es8326->lock); 802 iface = snd_soc_component_read(comp, ES8326_HPDET_STA); 803 dev_dbg(comp->dev, "gpio flag %#04x", iface); 804 805 if ((es8326->jack_remove_retry == 1) && (es8326->version != ES8326_VERSION_B)) { 806 if (iface & ES8326_HPINSERT_FLAG) 807 es8326->jack_remove_retry = 2; 808 else 809 es8326->jack_remove_retry = 0; 810 811 dev_dbg(comp->dev, "remove event check, set HPJACK_POL normal, cnt = %d\n", 812 es8326->jack_remove_retry); 813 /* 814 * Inverted HPJACK_POL bit to trigger one IRQ to double check HP Removal event 815 */ 816 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 817 ES8326_HP_DET_JACK_POL, (es8326->jd_inverted ? 818 ~es8326->jack_pol : es8326->jack_pol)); 819 goto exit; 820 } 821 822 if ((iface & ES8326_HPINSERT_FLAG) == 0) { 823 /* Jack unplugged or spurious IRQ */ 824 dev_dbg(comp->dev, "No headset detected\n"); 825 es8326_disable_micbias(es8326->component); 826 if (es8326->jack->status & SND_JACK_HEADPHONE) { 827 dev_dbg(comp->dev, "Report hp remove event\n"); 828 snd_soc_jack_report(es8326->jack, 0, SND_JACK_HEADSET); 829 /* mute adc when mic path switch */ 830 regmap_write(es8326->regmap, ES8326_ADC1_SRC, 0x44); 831 regmap_write(es8326->regmap, ES8326_ADC2_SRC, 0x66); 832 } 833 es8326->hp = 0; 834 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01); 835 regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x0a); 836 regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x0f, 0x03); 837 regmap_write(es8326->regmap, ES8326_INT_SOURCE, ES8326_INT_SRC_PIN9); 838 /* 839 * Inverted HPJACK_POL bit to trigger one IRQ to double check HP Removal event 840 */ 841 if ((es8326->jack_remove_retry == 0) && (es8326->version != ES8326_VERSION_B)) { 842 es8326->jack_remove_retry = 1; 843 dev_dbg(comp->dev, "remove event check, invert HPJACK_POL, cnt = %d\n", 844 es8326->jack_remove_retry); 845 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 846 ES8326_HP_DET_JACK_POL, (es8326->jd_inverted ? 847 es8326->jack_pol : ~es8326->jack_pol)); 848 849 } else { 850 es8326->jack_remove_retry = 0; 851 } 852 } else if ((iface & ES8326_HPINSERT_FLAG) == ES8326_HPINSERT_FLAG) { 853 es8326->jack_remove_retry = 0; 854 if (es8326->hp == 0) { 855 dev_dbg(comp->dev, "First insert, start OMTP/CTIA type check\n"); 856 /* 857 * set auto-check mode, then restart jack_detect_work after 400ms. 858 * Don't report jack status. 859 */ 860 regmap_write(es8326->regmap, ES8326_INT_SOURCE, 0x00); 861 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01); 862 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x10, 0x00); 863 es8326_enable_micbias(es8326->component); 864 usleep_range(50000, 70000); 865 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00); 866 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x10, 0x10); 867 usleep_range(50000, 70000); 868 regmap_write(es8326->regmap, ES8326_INT_SOURCE, 869 (ES8326_INT_SRC_PIN9 | ES8326_INT_SRC_BUTTON)); 870 regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x1f); 871 regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x0f, 0x08); 872 queue_delayed_work(system_wq, &es8326->jack_detect_work, 873 msecs_to_jiffies(400)); 874 es8326->hp = 1; 875 goto exit; 876 } 877 if (es8326->jack->status & SND_JACK_HEADSET) { 878 /* detect button */ 879 dev_dbg(comp->dev, "button pressed\n"); 880 queue_delayed_work(system_wq, &es8326->button_press_work, 10); 881 goto exit; 882 } 883 if ((iface & ES8326_HPBUTTON_FLAG) == 0x01) { 884 dev_dbg(comp->dev, "Headphone detected\n"); 885 snd_soc_jack_report(es8326->jack, 886 SND_JACK_HEADPHONE, SND_JACK_HEADSET); 887 } else { 888 dev_dbg(comp->dev, "Headset detected\n"); 889 snd_soc_jack_report(es8326->jack, 890 SND_JACK_HEADSET, SND_JACK_HEADSET); 891 892 regmap_update_bits(es8326->regmap, ES8326_PGA_PDN, 893 0x08, 0x08); 894 regmap_update_bits(es8326->regmap, ES8326_PGAGAIN, 895 0x80, 0x80); 896 regmap_write(es8326->regmap, ES8326_ADC1_SRC, 0x00); 897 regmap_write(es8326->regmap, ES8326_ADC2_SRC, 0x00); 898 regmap_update_bits(es8326->regmap, ES8326_PGA_PDN, 899 0x08, 0x00); 900 usleep_range(10000, 15000); 901 } 902 } 903 exit: 904 mutex_unlock(&es8326->lock); 905 } 906 907 static irqreturn_t es8326_irq(int irq, void *dev_id) 908 { 909 struct es8326_priv *es8326 = dev_id; 910 911 if (!es8326->jack) 912 goto out; 913 914 if (es8326->jack->status & SND_JACK_HEADSET) 915 queue_delayed_work(system_wq, &es8326->jack_detect_work, 916 msecs_to_jiffies(10)); 917 else 918 queue_delayed_work(system_wq, &es8326->jack_detect_work, 919 msecs_to_jiffies(300)); 920 921 out: 922 return IRQ_HANDLED; 923 } 924 925 static int es8326_calibrate(struct snd_soc_component *component) 926 { 927 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 928 unsigned int reg; 929 unsigned int offset_l, offset_r; 930 931 regmap_read(es8326->regmap, ES8326_CHIP_VERSION, ®); 932 es8326->version = reg; 933 934 if ((es8326->version == ES8326_VERSION_B) && (es8326->calibrated == false)) { 935 dev_dbg(component->dev, "ES8326_VERSION_B, calibrating\n"); 936 regmap_write(es8326->regmap, ES8326_CLK_INV, 0xc0); 937 regmap_write(es8326->regmap, ES8326_CLK_DIV1, 0x03); 938 regmap_write(es8326->regmap, ES8326_CLK_DLL, 0x30); 939 regmap_write(es8326->regmap, ES8326_CLK_MUX, 0xed); 940 regmap_write(es8326->regmap, ES8326_CLK_DAC_SEL, 0x08); 941 regmap_write(es8326->regmap, ES8326_CLK_TRI, 0xc1); 942 regmap_write(es8326->regmap, ES8326_DAC_MUTE, 0x03); 943 regmap_write(es8326->regmap, ES8326_ANA_VSEL, 0x7f); 944 regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x23); 945 regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x88); 946 usleep_range(15000, 20000); 947 regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c); 948 usleep_range(15000, 20000); 949 regmap_write(es8326->regmap, ES8326_RESET, 0xc0); 950 usleep_range(15000, 20000); 951 952 regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, ES8326_HP_OFF); 953 regmap_read(es8326->regmap, ES8326_CSM_MUTE_STA, ®); 954 if ((reg & 0xf0) != 0x40) 955 msleep(50); 956 957 regmap_write(es8326->regmap, ES8326_HP_CAL, 0xd4); 958 msleep(200); 959 regmap_write(es8326->regmap, ES8326_HP_CAL, 0x4d); 960 msleep(200); 961 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF); 962 regmap_read(es8326->regmap, ES8326_HPL_OFFSET_INI, &offset_l); 963 regmap_read(es8326->regmap, ES8326_HPR_OFFSET_INI, &offset_r); 964 regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c); 965 regmap_write(es8326->regmap, ES8326_HPL_OFFSET_INI, offset_l); 966 regmap_write(es8326->regmap, ES8326_HPR_OFFSET_INI, offset_r); 967 regmap_write(es8326->regmap, ES8326_CLK_INV, 0x00); 968 969 es8326->calibrated = true; 970 } 971 972 return 0; 973 } 974 975 static int es8326_resume(struct snd_soc_component *component) 976 { 977 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 978 979 regcache_cache_only(es8326->regmap, false); 980 regcache_sync(es8326->regmap); 981 982 /* reset internal clock state */ 983 regmap_write(es8326->regmap, ES8326_RESET, 0x1f); 984 regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x0E); 985 regmap_write(es8326->regmap, ES8326_ANA_LP, 0xf0); 986 usleep_range(10000, 15000); 987 regmap_write(es8326->regmap, ES8326_HPJACK_TIMER, 0xd9); 988 regmap_write(es8326->regmap, ES8326_ANA_MICBIAS, 0xd8); 989 /* set headphone default type and detect pin */ 990 regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x83); 991 regmap_write(es8326->regmap, ES8326_CLK_RESAMPLE, 0x05); 992 993 /* set internal oscillator as clock source of headpone cp */ 994 regmap_write(es8326->regmap, ES8326_CLK_DIV_CPC, 0x89); 995 regmap_write(es8326->regmap, ES8326_CLK_CTL, ES8326_CLK_ON); 996 /* clock manager reset release */ 997 regmap_write(es8326->regmap, ES8326_RESET, 0x17); 998 /* set headphone detection as half scan mode */ 999 regmap_write(es8326->regmap, ES8326_HP_MISC, 0x3d); 1000 regmap_write(es8326->regmap, ES8326_PULLUP_CTL, 0x00); 1001 1002 /* enable headphone driver */ 1003 regmap_write(es8326->regmap, ES8326_HP_VOL, 0xc4); 1004 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa7); 1005 usleep_range(2000, 5000); 1006 regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0x23); 1007 regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0x33); 1008 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1); 1009 1010 regmap_write(es8326->regmap, ES8326_CLK_INV, 0x00); 1011 regmap_write(es8326->regmap, ES8326_CLK_VMIDS1, 0xc4); 1012 regmap_write(es8326->regmap, ES8326_CLK_VMIDS2, 0x81); 1013 regmap_write(es8326->regmap, ES8326_CLK_CAL_TIME, 0x00); 1014 /* calibrate for B version */ 1015 es8326_calibrate(component); 1016 regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, 0xaa); 1017 regmap_write(es8326->regmap, ES8326_DAC_RAMPRATE, 0x00); 1018 /* turn off headphone out */ 1019 regmap_write(es8326->regmap, ES8326_HP_CAL, 0x00); 1020 /* set ADC and DAC in low power mode */ 1021 regmap_write(es8326->regmap, ES8326_ANA_LP, 0xf0); 1022 1023 regmap_write(es8326->regmap, ES8326_ANA_VSEL, 0x7F); 1024 /* select vdda as micbias source */ 1025 regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x03); 1026 /* set dac dsmclip = 1 */ 1027 regmap_write(es8326->regmap, ES8326_DAC_DSM, 0x08); 1028 regmap_write(es8326->regmap, ES8326_DAC_VPPSCALE, 0x15); 1029 1030 regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x80 | 1031 ((es8326->version == ES8326_VERSION_B) ? 1032 (ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol) : 1033 (ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol | 0x04))); 1034 usleep_range(5000, 10000); 1035 es8326_enable_micbias(es8326->component); 1036 usleep_range(50000, 70000); 1037 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00); 1038 regmap_write(es8326->regmap, ES8326_INT_SOURCE, ES8326_INT_SRC_PIN9); 1039 regmap_write(es8326->regmap, ES8326_INTOUT_IO, 1040 es8326->interrupt_clk); 1041 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, 1042 (ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT)); 1043 regmap_write(es8326->regmap, ES8326_SDINOUT23_IO, ES8326_IO_INPUT); 1044 1045 regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x00); 1046 regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_ON); 1047 regmap_update_bits(es8326->regmap, ES8326_PGAGAIN, ES8326_MIC_SEL_MASK, 1048 ES8326_MIC1_SEL); 1049 1050 regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, ES8326_MUTE_MASK, 1051 ES8326_MUTE); 1052 1053 regmap_write(es8326->regmap, ES8326_ADC_MUTE, 0x0f); 1054 1055 es8326->jack_remove_retry = 0; 1056 es8326->hp = 0; 1057 es8326->hpl_vol = 0x03; 1058 es8326->hpr_vol = 0x03; 1059 1060 es8326_irq(es8326->irq, es8326); 1061 return 0; 1062 } 1063 1064 static int es8326_suspend(struct snd_soc_component *component) 1065 { 1066 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 1067 1068 cancel_delayed_work_sync(&es8326->jack_detect_work); 1069 es8326_disable_micbias(component); 1070 es8326->calibrated = false; 1071 regmap_write(es8326->regmap, ES8326_CLK_MUX, 0x2d); 1072 regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x00); 1073 regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x3b); 1074 regmap_write(es8326->regmap, ES8326_CLK_CTL, ES8326_CLK_OFF); 1075 regcache_cache_only(es8326->regmap, true); 1076 1077 /* reset register value to default */ 1078 regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x01); 1079 usleep_range(1000, 3000); 1080 regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x00); 1081 1082 regcache_mark_dirty(es8326->regmap); 1083 return 0; 1084 } 1085 1086 static int es8326_probe(struct snd_soc_component *component) 1087 { 1088 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 1089 int ret; 1090 1091 es8326->component = component; 1092 es8326->jd_inverted = device_property_read_bool(component->dev, 1093 "everest,jack-detect-inverted"); 1094 1095 ret = device_property_read_u8(component->dev, "everest,jack-pol", &es8326->jack_pol); 1096 if (ret != 0) { 1097 dev_dbg(component->dev, "jack-pol return %d", ret); 1098 es8326->jack_pol = ES8326_HP_TYPE_AUTO; 1099 } 1100 dev_dbg(component->dev, "jack-pol %x", es8326->jack_pol); 1101 1102 ret = device_property_read_u8(component->dev, "everest,interrupt-src", 1103 &es8326->interrupt_src); 1104 if (ret != 0) { 1105 dev_dbg(component->dev, "interrupt-src return %d", ret); 1106 es8326->interrupt_src = ES8326_HP_DET_SRC_PIN9; 1107 } 1108 dev_dbg(component->dev, "interrupt-src %x", es8326->interrupt_src); 1109 1110 ret = device_property_read_u8(component->dev, "everest,interrupt-clk", 1111 &es8326->interrupt_clk); 1112 if (ret != 0) { 1113 dev_dbg(component->dev, "interrupt-clk return %d", ret); 1114 es8326->interrupt_clk = 0x00; 1115 } 1116 dev_dbg(component->dev, "interrupt-clk %x", es8326->interrupt_clk); 1117 1118 es8326_resume(component); 1119 return 0; 1120 } 1121 1122 static void es8326_enable_jack_detect(struct snd_soc_component *component, 1123 struct snd_soc_jack *jack) 1124 { 1125 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 1126 1127 mutex_lock(&es8326->lock); 1128 if (es8326->jd_inverted) 1129 snd_soc_component_update_bits(component, ES8326_HPDET_TYPE, 1130 ES8326_HP_DET_JACK_POL, ~es8326->jack_pol); 1131 es8326->jack = jack; 1132 1133 mutex_unlock(&es8326->lock); 1134 es8326_irq(es8326->irq, es8326); 1135 } 1136 1137 static void es8326_disable_jack_detect(struct snd_soc_component *component) 1138 { 1139 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 1140 1141 dev_dbg(component->dev, "Enter into %s\n", __func__); 1142 if (!es8326->jack) 1143 return; /* Already disabled (or never enabled) */ 1144 cancel_delayed_work_sync(&es8326->jack_detect_work); 1145 1146 mutex_lock(&es8326->lock); 1147 if (es8326->jack->status & SND_JACK_MICROPHONE) { 1148 es8326_disable_micbias(component); 1149 snd_soc_jack_report(es8326->jack, 0, SND_JACK_HEADSET); 1150 } 1151 es8326->jack = NULL; 1152 mutex_unlock(&es8326->lock); 1153 } 1154 1155 static int es8326_set_jack(struct snd_soc_component *component, 1156 struct snd_soc_jack *jack, void *data) 1157 { 1158 if (jack) 1159 es8326_enable_jack_detect(component, jack); 1160 else 1161 es8326_disable_jack_detect(component); 1162 1163 return 0; 1164 } 1165 1166 static void es8326_remove(struct snd_soc_component *component) 1167 { 1168 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 1169 1170 es8326_disable_jack_detect(component); 1171 es8326_set_bias_level(component, SND_SOC_BIAS_OFF); 1172 regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x01); 1173 usleep_range(1000, 3000); 1174 regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x00); 1175 } 1176 1177 static const struct snd_soc_component_driver soc_component_dev_es8326 = { 1178 .probe = es8326_probe, 1179 .remove = es8326_remove, 1180 .resume = es8326_resume, 1181 .suspend = es8326_suspend, 1182 .set_bias_level = es8326_set_bias_level, 1183 .set_jack = es8326_set_jack, 1184 .dapm_widgets = es8326_dapm_widgets, 1185 .num_dapm_widgets = ARRAY_SIZE(es8326_dapm_widgets), 1186 .dapm_routes = es8326_dapm_routes, 1187 .num_dapm_routes = ARRAY_SIZE(es8326_dapm_routes), 1188 .controls = es8326_snd_controls, 1189 .num_controls = ARRAY_SIZE(es8326_snd_controls), 1190 .use_pmdown_time = 1, 1191 .endianness = 1, 1192 }; 1193 1194 static int es8326_i2c_probe(struct i2c_client *i2c) 1195 { 1196 struct es8326_priv *es8326; 1197 int ret; 1198 1199 es8326 = devm_kzalloc(&i2c->dev, sizeof(struct es8326_priv), GFP_KERNEL); 1200 if (!es8326) 1201 return -ENOMEM; 1202 1203 i2c_set_clientdata(i2c, es8326); 1204 es8326->i2c = i2c; 1205 mutex_init(&es8326->lock); 1206 es8326->regmap = devm_regmap_init_i2c(i2c, &es8326_regmap_config); 1207 if (IS_ERR(es8326->regmap)) { 1208 ret = PTR_ERR(es8326->regmap); 1209 dev_err(&i2c->dev, "Failed to init regmap: %d\n", ret); 1210 return ret; 1211 } 1212 1213 es8326->irq = i2c->irq; 1214 INIT_DELAYED_WORK(&es8326->jack_detect_work, 1215 es8326_jack_detect_handler); 1216 INIT_DELAYED_WORK(&es8326->button_press_work, 1217 es8326_jack_button_handler); 1218 /* ES8316 is level-based while ES8326 is edge-based */ 1219 ret = devm_request_threaded_irq(&i2c->dev, es8326->irq, NULL, es8326_irq, 1220 IRQF_TRIGGER_RISING | IRQF_ONESHOT, 1221 "es8326", es8326); 1222 if (ret) { 1223 dev_warn(&i2c->dev, "Failed to request IRQ: %d: %d\n", 1224 es8326->irq, ret); 1225 es8326->irq = -ENXIO; 1226 } 1227 1228 es8326->mclk = devm_clk_get_optional(&i2c->dev, "mclk"); 1229 if (IS_ERR(es8326->mclk)) { 1230 dev_err(&i2c->dev, "unable to get mclk\n"); 1231 return PTR_ERR(es8326->mclk); 1232 } 1233 if (!es8326->mclk) 1234 dev_warn(&i2c->dev, "assuming static mclk\n"); 1235 1236 ret = clk_prepare_enable(es8326->mclk); 1237 if (ret) { 1238 dev_err(&i2c->dev, "unable to enable mclk\n"); 1239 return ret; 1240 } 1241 return devm_snd_soc_register_component(&i2c->dev, 1242 &soc_component_dev_es8326, 1243 &es8326_dai, 1); 1244 } 1245 1246 1247 static void es8326_i2c_shutdown(struct i2c_client *i2c) 1248 { 1249 struct snd_soc_component *component; 1250 struct es8326_priv *es8326; 1251 1252 es8326 = i2c_get_clientdata(i2c); 1253 component = es8326->component; 1254 dev_dbg(component->dev, "Enter into %s\n", __func__); 1255 cancel_delayed_work_sync(&es8326->jack_detect_work); 1256 cancel_delayed_work_sync(&es8326->button_press_work); 1257 1258 regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x01); 1259 usleep_range(1000, 3000); 1260 regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x00); 1261 1262 } 1263 1264 static void es8326_i2c_remove(struct i2c_client *i2c) 1265 { 1266 es8326_i2c_shutdown(i2c); 1267 } 1268 1269 static const struct i2c_device_id es8326_i2c_id[] = { 1270 {"es8326" }, 1271 {} 1272 }; 1273 MODULE_DEVICE_TABLE(i2c, es8326_i2c_id); 1274 1275 #ifdef CONFIG_OF 1276 static const struct of_device_id es8326_of_match[] = { 1277 { .compatible = "everest,es8326", }, 1278 {} 1279 }; 1280 MODULE_DEVICE_TABLE(of, es8326_of_match); 1281 #endif 1282 1283 #ifdef CONFIG_ACPI 1284 static const struct acpi_device_id es8326_acpi_match[] = { 1285 {"ESSX8326", 0}, 1286 {}, 1287 }; 1288 MODULE_DEVICE_TABLE(acpi, es8326_acpi_match); 1289 #endif 1290 1291 static struct i2c_driver es8326_i2c_driver = { 1292 .driver = { 1293 .name = "es8326", 1294 .acpi_match_table = ACPI_PTR(es8326_acpi_match), 1295 .of_match_table = of_match_ptr(es8326_of_match), 1296 }, 1297 .probe = es8326_i2c_probe, 1298 .shutdown = es8326_i2c_shutdown, 1299 .remove = es8326_i2c_remove, 1300 .id_table = es8326_i2c_id, 1301 }; 1302 module_i2c_driver(es8326_i2c_driver); 1303 1304 MODULE_DESCRIPTION("ASoC es8326 driver"); 1305 MODULE_AUTHOR("David Yang <yangxiaohua@everest-semi.com>"); 1306 MODULE_LICENSE("GPL"); 1307