1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // es8326.c -- es8326 ALSA SoC audio driver 4 // Copyright Everest Semiconductor Co., Ltd 5 // 6 // Authors: David Yang <yangxiaohua@everest-semi.com> 7 // 8 9 #include <linux/clk.h> 10 #include <linux/i2c.h> 11 #include <linux/interrupt.h> 12 #include <linux/irq.h> 13 #include <linux/module.h> 14 #include <sound/jack.h> 15 #include <sound/pcm_params.h> 16 #include <sound/soc.h> 17 #include <sound/soc-dapm.h> 18 #include <sound/tlv.h> 19 #include "es8326.h" 20 21 struct es8326_priv { 22 struct clk *mclk; 23 struct i2c_client *i2c; 24 struct regmap *regmap; 25 struct snd_soc_component *component; 26 struct delayed_work jack_detect_work; 27 struct delayed_work button_press_work; 28 struct snd_soc_jack *jack; 29 int irq; 30 /* The lock protects the situation that an irq is generated 31 * while enabling or disabling or during an irq. 32 */ 33 struct mutex lock; 34 u8 mic1_src; 35 u8 mic2_src; 36 u8 jack_pol; 37 u8 interrupt_src; 38 u8 interrupt_clk; 39 bool jd_inverted; 40 unsigned int sysclk; 41 }; 42 43 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(dac_vol_tlv, -9550, 50, 0); 44 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_vol_tlv, -9550, 50, 0); 45 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_analog_pga_tlv, 0, 300, 0); 46 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_pga_tlv, 0, 600, 0); 47 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(softramp_rate, 0, 100, 0); 48 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(drc_target_tlv, -3200, 200, 0); 49 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(drc_recovery_tlv, -125, 250, 0); 50 51 static const char *const winsize[] = { 52 "0.25db/2 LRCK", 53 "0.25db/4 LRCK", 54 "0.25db/8 LRCK", 55 "0.25db/16 LRCK", 56 "0.25db/32 LRCK", 57 "0.25db/64 LRCK", 58 "0.25db/128 LRCK", 59 "0.25db/256 LRCK", 60 "0.25db/512 LRCK", 61 "0.25db/1024 LRCK", 62 "0.25db/2048 LRCK", 63 "0.25db/4096 LRCK", 64 "0.25db/8192 LRCK", 65 "0.25db/16384 LRCK", 66 "0.25db/32768 LRCK", 67 "0.25db/65536 LRCK", 68 }; 69 70 static const char *const dacpol_txt[] = { 71 "Normal", "R Invert", "L Invert", "L + R Invert" }; 72 73 static const struct soc_enum dacpol = 74 SOC_ENUM_SINGLE(ES8326_DAC_DSM, 4, 4, dacpol_txt); 75 static const struct soc_enum alc_winsize = 76 SOC_ENUM_SINGLE(ES8326_ADC_RAMPRATE, 4, 16, winsize); 77 static const struct soc_enum drc_winsize = 78 SOC_ENUM_SINGLE(ES8326_DRC_WINSIZE, 4, 16, winsize); 79 80 static const struct snd_kcontrol_new es8326_snd_controls[] = { 81 SOC_SINGLE_TLV("DAC Playback Volume", ES8326_DAC_VOL, 0, 0xbf, 0, dac_vol_tlv), 82 SOC_ENUM("Playback Polarity", dacpol), 83 SOC_SINGLE_TLV("DAC Ramp Rate", ES8326_DAC_RAMPRATE, 0, 0x0f, 0, softramp_rate), 84 SOC_SINGLE_TLV("DRC Recovery Level", ES8326_DRC_RECOVERY, 0, 4, 0, drc_recovery_tlv), 85 SOC_ENUM("DRC Winsize", drc_winsize), 86 SOC_SINGLE_TLV("DRC Target Level", ES8326_DRC_WINSIZE, 0, 0x0f, 0, drc_target_tlv), 87 88 SOC_DOUBLE_R_TLV("ADC Capture Volume", ES8326_ADC1_VOL, ES8326_ADC2_VOL, 0, 0xff, 0, 89 adc_vol_tlv), 90 SOC_DOUBLE_TLV("ADC PGA Volume", ES8326_ADC_SCALE, 4, 0, 5, 0, adc_pga_tlv), 91 SOC_SINGLE_TLV("ADC PGA Gain Volume", ES8326_PGAGAIN, 0, 10, 0, adc_analog_pga_tlv), 92 SOC_SINGLE_TLV("ADC Ramp Rate", ES8326_ADC_RAMPRATE, 0, 0x0f, 0, softramp_rate), 93 SOC_SINGLE("ALC Capture Switch", ES8326_ALC_RECOVERY, 3, 1, 0), 94 SOC_SINGLE_TLV("ALC Capture Recovery Level", ES8326_ALC_LEVEL, 95 0, 4, 0, drc_recovery_tlv), 96 SOC_ENUM("ALC Capture Winsize", alc_winsize), 97 SOC_SINGLE_TLV("ALC Capture Target Level", ES8326_ALC_LEVEL, 98 0, 0x0f, 0, drc_target_tlv), 99 100 }; 101 102 static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = { 103 SND_SOC_DAPM_INPUT("MIC1"), 104 SND_SOC_DAPM_INPUT("MIC2"), 105 SND_SOC_DAPM_INPUT("MIC3"), 106 SND_SOC_DAPM_INPUT("MIC4"), 107 108 SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0), 109 SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0), 110 111 /* Digital Interface */ 112 SND_SOC_DAPM_AIF_OUT("I2S OUT", "I2S1 Capture", 0, SND_SOC_NOPM, 0, 0), 113 SND_SOC_DAPM_AIF_IN("I2S IN", "I2S1 Playback", 0, SND_SOC_NOPM, 0, 0), 114 115 /* ADC Digital Mute */ 116 SND_SOC_DAPM_PGA("ADC L1", ES8326_ADC_MUTE, 0, 1, NULL, 0), 117 SND_SOC_DAPM_PGA("ADC R1", ES8326_ADC_MUTE, 1, 1, NULL, 0), 118 SND_SOC_DAPM_PGA("ADC L2", ES8326_ADC_MUTE, 2, 1, NULL, 0), 119 SND_SOC_DAPM_PGA("ADC R2", ES8326_ADC_MUTE, 3, 1, NULL, 0), 120 121 /* Analog Power Supply*/ 122 SND_SOC_DAPM_DAC("Right DAC", NULL, ES8326_ANA_PDN, 0, 1), 123 SND_SOC_DAPM_DAC("Left DAC", NULL, ES8326_ANA_PDN, 1, 1), 124 SND_SOC_DAPM_SUPPLY("Analog Power", ES8326_ANA_PDN, 7, 1, NULL, 0), 125 SND_SOC_DAPM_SUPPLY("IBias Power", ES8326_ANA_PDN, 6, 1, NULL, 0), 126 SND_SOC_DAPM_SUPPLY("ADC Vref", ES8326_ANA_PDN, 5, 1, NULL, 0), 127 SND_SOC_DAPM_SUPPLY("DAC Vref", ES8326_ANA_PDN, 4, 1, NULL, 0), 128 SND_SOC_DAPM_SUPPLY("Vref Power", ES8326_ANA_PDN, 3, 1, NULL, 0), 129 SND_SOC_DAPM_SUPPLY("MICBIAS1", ES8326_ANA_MICBIAS, 2, 0, NULL, 0), 130 SND_SOC_DAPM_SUPPLY("MICBIAS2", ES8326_ANA_MICBIAS, 3, 0, NULL, 0), 131 132 SND_SOC_DAPM_PGA("LHPMIX", ES8326_DAC2HPMIX, 7, 0, NULL, 0), 133 SND_SOC_DAPM_PGA("RHPMIX", ES8326_DAC2HPMIX, 3, 0, NULL, 0), 134 135 /* Headphone Charge Pump and Output */ 136 SND_SOC_DAPM_SUPPLY("HPOR Cal", ES8326_HP_CAL, 7, 1, NULL, 0), 137 SND_SOC_DAPM_SUPPLY("HPOL Cal", ES8326_HP_CAL, 3, 1, NULL, 0), 138 SND_SOC_DAPM_SUPPLY("Headphone Charge Pump", ES8326_HP_DRIVER, 139 3, 1, NULL, 0), 140 SND_SOC_DAPM_SUPPLY("Headphone Driver Bias", ES8326_HP_DRIVER, 141 2, 1, NULL, 0), 142 SND_SOC_DAPM_SUPPLY("Headphone LDO", ES8326_HP_DRIVER, 143 1, 1, NULL, 0), 144 SND_SOC_DAPM_SUPPLY("Headphone Reference", ES8326_HP_DRIVER, 145 0, 1, NULL, 0), 146 SND_SOC_DAPM_REG(snd_soc_dapm_supply, "HPOR Supply", ES8326_HP_CAL, 147 ES8326_HPOR_SHIFT, 7, 7, 0), 148 SND_SOC_DAPM_REG(snd_soc_dapm_supply, "HPOL Supply", ES8326_HP_CAL, 149 0, 7, 7, 0), 150 151 SND_SOC_DAPM_OUTPUT("HPOL"), 152 SND_SOC_DAPM_OUTPUT("HPOR"), 153 }; 154 155 static const struct snd_soc_dapm_route es8326_dapm_routes[] = { 156 {"ADC L1", NULL, "MIC1"}, 157 {"ADC R1", NULL, "MIC2"}, 158 {"ADC L2", NULL, "MIC3"}, 159 {"ADC R2", NULL, "MIC4"}, 160 161 {"ADC L", NULL, "ADC L1"}, 162 {"ADC R", NULL, "ADC R1"}, 163 {"ADC L", NULL, "ADC L2"}, 164 {"ADC R", NULL, "ADC R2"}, 165 166 {"I2S OUT", NULL, "ADC L"}, 167 {"I2S OUT", NULL, "ADC R"}, 168 169 {"I2S OUT", NULL, "Analog Power"}, 170 {"I2S OUT", NULL, "ADC Vref"}, 171 {"I2S OUT", NULL, "Vref Power"}, 172 {"I2S OUT", NULL, "IBias Power"}, 173 {"I2S IN", NULL, "Analog Power"}, 174 {"I2S IN", NULL, "DAC Vref"}, 175 {"I2S IN", NULL, "Vref Power"}, 176 {"I2S IN", NULL, "IBias Power"}, 177 178 {"Right DAC", NULL, "I2S IN"}, 179 {"Left DAC", NULL, "I2S IN"}, 180 181 {"LHPMIX", NULL, "Left DAC"}, 182 {"RHPMIX", NULL, "Right DAC"}, 183 184 {"HPOR", NULL, "HPOR Cal"}, 185 {"HPOL", NULL, "HPOL Cal"}, 186 {"HPOR", NULL, "HPOR Supply"}, 187 {"HPOL", NULL, "HPOL Supply"}, 188 {"HPOL", NULL, "Headphone Charge Pump"}, 189 {"HPOR", NULL, "Headphone Charge Pump"}, 190 {"HPOL", NULL, "Headphone Driver Bias"}, 191 {"HPOR", NULL, "Headphone Driver Bias"}, 192 {"HPOL", NULL, "Headphone LDO"}, 193 {"HPOR", NULL, "Headphone LDO"}, 194 {"HPOL", NULL, "Headphone Reference"}, 195 {"HPOR", NULL, "Headphone Reference"}, 196 197 {"HPOL", NULL, "LHPMIX"}, 198 {"HPOR", NULL, "RHPMIX"}, 199 }; 200 201 static const struct regmap_range es8326_volatile_ranges[] = { 202 regmap_reg_range(ES8326_HP_DETECT, ES8326_HP_DETECT), 203 }; 204 205 static const struct regmap_access_table es8326_volatile_table = { 206 .yes_ranges = es8326_volatile_ranges, 207 .n_yes_ranges = ARRAY_SIZE(es8326_volatile_ranges), 208 }; 209 210 static const struct regmap_config es8326_regmap_config = { 211 .reg_bits = 8, 212 .val_bits = 8, 213 .max_register = 0xff, 214 .volatile_table = &es8326_volatile_table, 215 .cache_type = REGCACHE_RBTREE, 216 }; 217 218 struct _coeff_div { 219 u16 fs; 220 u32 rate; 221 u32 mclk; 222 u8 reg4; 223 u8 reg5; 224 u8 reg6; 225 u8 reg7; 226 u8 reg8; 227 u8 reg9; 228 u8 rega; 229 u8 regb; 230 }; 231 232 /* codec hifi mclk clock divider coefficients */ 233 /* {ratio, LRCK, MCLK, REG04, REG05, REG06, REG07, REG08, REG09, REG10, REG11} */ 234 static const struct _coeff_div coeff_div[] = { 235 {32, 8000, 256000, 0x60, 0x00, 0x0F, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 236 {32, 16000, 512000, 0x20, 0x00, 0x0D, 0x75, 0x0A, 0x1B, 0x1F, 0x3F}, 237 {32, 44100, 1411200, 0x00, 0x00, 0x13, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 238 {32, 48000, 1536000, 0x00, 0x00, 0x13, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 239 {36, 8000, 288000, 0x20, 0x00, 0x0D, 0x75, 0x0A, 0x1B, 0x23, 0x47}, 240 {36, 16000, 576000, 0x20, 0x00, 0x0D, 0x75, 0x0A, 0x1B, 0x23, 0x47}, 241 {48, 8000, 384000, 0x60, 0x02, 0x1F, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 242 {48, 16000, 768000, 0x20, 0x02, 0x0F, 0x75, 0x0A, 0x1B, 0x1F, 0x3F}, 243 {48, 48000, 2304000, 0x00, 0x02, 0x0D, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 244 {64, 8000, 512000, 0x60, 0x00, 0x0D, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 245 {64, 16000, 1024000, 0x20, 0x00, 0x05, 0x75, 0x0A, 0x1B, 0x1F, 0x3F}, 246 247 {64, 44100, 2822400, 0x00, 0x00, 0x11, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 248 {64, 48000, 3072000, 0x00, 0x00, 0x11, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 249 {72, 8000, 576000, 0x20, 0x00, 0x13, 0x35, 0x0A, 0x1B, 0x23, 0x47}, 250 {72, 16000, 1152000, 0x20, 0x00, 0x05, 0x75, 0x0A, 0x1B, 0x23, 0x47}, 251 {96, 8000, 768000, 0x60, 0x02, 0x1D, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 252 {96, 16000, 1536000, 0x20, 0x02, 0x0D, 0x75, 0x0A, 0x1B, 0x1F, 0x3F}, 253 {100, 48000, 4800000, 0x04, 0x04, 0x3F, 0x6D, 0x38, 0x08, 0x4f, 0x1f}, 254 {125, 48000, 6000000, 0x04, 0x04, 0x1F, 0x2D, 0x0A, 0x0A, 0x27, 0x27}, 255 {128, 8000, 1024000, 0x60, 0x00, 0x13, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 256 {128, 16000, 2048000, 0x20, 0x00, 0x11, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 257 258 {128, 44100, 5644800, 0x00, 0x00, 0x01, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 259 {128, 48000, 6144000, 0x00, 0x00, 0x01, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 260 {144, 8000, 1152000, 0x20, 0x00, 0x03, 0x35, 0x0A, 0x1B, 0x23, 0x47}, 261 {144, 16000, 2304000, 0x20, 0x00, 0x11, 0x35, 0x0A, 0x1B, 0x23, 0x47}, 262 {192, 8000, 1536000, 0x60, 0x02, 0x0D, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 263 {192, 16000, 3072000, 0x20, 0x02, 0x05, 0x75, 0x0A, 0x1B, 0x1F, 0x3F}, 264 {200, 48000, 9600000, 0x04, 0x04, 0x0F, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 265 {250, 48000, 12000000, 0x04, 0x04, 0x0F, 0x2D, 0x0A, 0x0A, 0x27, 0x27}, 266 {256, 8000, 2048000, 0x60, 0x00, 0x11, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 267 {256, 16000, 4096000, 0x20, 0x00, 0x01, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 268 269 {256, 44100, 11289600, 0x00, 0x00, 0x10, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 270 {256, 48000, 12288000, 0x00, 0x00, 0x30, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 271 {288, 8000, 2304000, 0x20, 0x00, 0x01, 0x35, 0x0A, 0x1B, 0x23, 0x47}, 272 {384, 8000, 3072000, 0x60, 0x02, 0x05, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 273 {384, 16000, 6144000, 0x20, 0x02, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 274 {384, 48000, 18432000, 0x00, 0x02, 0x01, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 275 {400, 48000, 19200000, 0x09, 0x04, 0x0f, 0x6d, 0x3a, 0x0A, 0x4F, 0x1F}, 276 {500, 48000, 24000000, 0x18, 0x04, 0x1F, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 277 {512, 8000, 4096000, 0x60, 0x00, 0x01, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 278 {512, 16000, 8192000, 0x20, 0x00, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 279 280 {512, 44100, 22579200, 0x00, 0x00, 0x00, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 281 {512, 48000, 24576000, 0x00, 0x00, 0x00, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 282 {768, 8000, 6144000, 0x60, 0x02, 0x11, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 283 {768, 16000, 12288000, 0x20, 0x02, 0x01, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 284 {800, 48000, 38400000, 0x00, 0x18, 0x13, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 285 {1024, 8000, 8192000, 0x60, 0x00, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 286 {1024, 16000, 16384000, 0x20, 0x00, 0x00, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 287 {1152, 16000, 18432000, 0x20, 0x08, 0x11, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 288 {1536, 8000, 12288000, 0x60, 0x02, 0x01, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 289 290 {1536, 16000, 24576000, 0x20, 0x02, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 291 {1625, 8000, 13000000, 0x0C, 0x18, 0x1F, 0x2D, 0x0A, 0x0A, 0x27, 0x27}, 292 {1625, 16000, 26000000, 0x0C, 0x18, 0x1F, 0x2D, 0x0A, 0x0A, 0x27, 0x27}, 293 {2048, 8000, 16384000, 0x60, 0x00, 0x00, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 294 {2304, 8000, 18432000, 0x40, 0x02, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x5F}, 295 {3072, 8000, 24576000, 0x60, 0x02, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 296 {3250, 8000, 26000000, 0x0C, 0x18, 0x0F, 0x2D, 0x0A, 0x0A, 0x27, 0x27}, 297 298 }; 299 300 static inline int get_coeff(int mclk, int rate) 301 { 302 int i; 303 304 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { 305 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) 306 return i; 307 } 308 309 return -EINVAL; 310 } 311 312 static int es8326_set_dai_sysclk(struct snd_soc_dai *codec_dai, 313 int clk_id, unsigned int freq, int dir) 314 { 315 struct snd_soc_component *codec = codec_dai->component; 316 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(codec); 317 318 es8326->sysclk = freq; 319 320 return 0; 321 } 322 323 static int es8326_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) 324 { 325 struct snd_soc_component *component = codec_dai->component; 326 u8 iface = 0; 327 328 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 329 case SND_SOC_DAIFMT_CBC_CFP: 330 snd_soc_component_update_bits(component, ES8326_RESET, 331 ES8326_MASTER_MODE_EN, ES8326_MASTER_MODE_EN); 332 break; 333 case SND_SOC_DAIFMT_CBC_CFC: 334 break; 335 default: 336 return -EINVAL; 337 } 338 339 /* interface format */ 340 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 341 case SND_SOC_DAIFMT_I2S: 342 break; 343 case SND_SOC_DAIFMT_RIGHT_J: 344 dev_err(component->dev, "Codec driver does not support right justified\n"); 345 return -EINVAL; 346 case SND_SOC_DAIFMT_LEFT_J: 347 iface |= ES8326_DAIFMT_LEFT_J; 348 break; 349 case SND_SOC_DAIFMT_DSP_A: 350 iface |= ES8326_DAIFMT_DSP_A; 351 break; 352 case SND_SOC_DAIFMT_DSP_B: 353 iface |= ES8326_DAIFMT_DSP_B; 354 break; 355 default: 356 return -EINVAL; 357 } 358 359 snd_soc_component_update_bits(component, ES8326_FMT, ES8326_DAIFMT_MASK, iface); 360 361 return 0; 362 } 363 364 static int es8326_pcm_hw_params(struct snd_pcm_substream *substream, 365 struct snd_pcm_hw_params *params, 366 struct snd_soc_dai *dai) 367 { 368 struct snd_soc_component *component = dai->component; 369 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 370 u8 srate = 0; 371 int coeff; 372 373 coeff = get_coeff(es8326->sysclk, params_rate(params)); 374 /* bit size */ 375 switch (params_format(params)) { 376 case SNDRV_PCM_FORMAT_S16_LE: 377 srate |= ES8326_S16_LE; 378 break; 379 case SNDRV_PCM_FORMAT_S20_3LE: 380 srate |= ES8326_S20_3_LE; 381 break; 382 case SNDRV_PCM_FORMAT_S18_3LE: 383 srate |= ES8326_S18_LE; 384 break; 385 case SNDRV_PCM_FORMAT_S24_LE: 386 srate |= ES8326_S24_LE; 387 break; 388 case SNDRV_PCM_FORMAT_S32_LE: 389 srate |= ES8326_S32_LE; 390 break; 391 default: 392 return -EINVAL; 393 } 394 395 /* set iface & srate */ 396 snd_soc_component_update_bits(component, ES8326_FMT, ES8326_DATA_LEN_MASK, srate); 397 398 if (coeff >= 0) { 399 regmap_write(es8326->regmap, ES8326_CLK_DIV1, 400 coeff_div[coeff].reg4); 401 regmap_write(es8326->regmap, ES8326_CLK_DIV2, 402 coeff_div[coeff].reg5); 403 regmap_write(es8326->regmap, ES8326_CLK_DLL, 404 coeff_div[coeff].reg6); 405 regmap_write(es8326->regmap, ES8326_CLK_MUX, 406 coeff_div[coeff].reg7); 407 regmap_write(es8326->regmap, ES8326_CLK_ADC_SEL, 408 coeff_div[coeff].reg8); 409 regmap_write(es8326->regmap, ES8326_CLK_DAC_SEL, 410 coeff_div[coeff].reg9); 411 regmap_write(es8326->regmap, ES8326_CLK_ADC_OSR, 412 coeff_div[coeff].rega); 413 regmap_write(es8326->regmap, ES8326_CLK_DAC_OSR, 414 coeff_div[coeff].regb); 415 } else { 416 dev_warn(component->dev, "Clock coefficients do not match"); 417 } 418 419 return 0; 420 } 421 422 static int es8326_set_bias_level(struct snd_soc_component *codec, 423 enum snd_soc_bias_level level) 424 { 425 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(codec); 426 int ret; 427 428 switch (level) { 429 case SND_SOC_BIAS_ON: 430 ret = clk_prepare_enable(es8326->mclk); 431 if (ret) 432 return ret; 433 regmap_write(es8326->regmap, ES8326_RESET, ES8326_PWRUP_SEQ_EN); 434 regmap_write(es8326->regmap, ES8326_INTOUT_IO, 0x45); 435 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, 436 (ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT)); 437 regmap_write(es8326->regmap, ES8326_SDINOUT23_IO, ES8326_IO_INPUT); 438 regmap_write(es8326->regmap, ES8326_CLK_RESAMPLE, 0x05); 439 regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x02); 440 regmap_write(es8326->regmap, ES8326_PGA_PDN, 0x40); 441 regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0xAA); 442 regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_ON); 443 break; 444 case SND_SOC_BIAS_PREPARE: 445 break; 446 case SND_SOC_BIAS_STANDBY: 447 break; 448 case SND_SOC_BIAS_OFF: 449 clk_disable_unprepare(es8326->mclk); 450 regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x11); 451 regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_OFF); 452 regmap_write(es8326->regmap, ES8326_PGA_PDN, 0xF8); 453 regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x00); 454 regmap_write(es8326->regmap, ES8326_INT_SOURCE, 0x08); 455 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, ES8326_IO_INPUT); 456 regmap_write(es8326->regmap, ES8326_SDINOUT23_IO, ES8326_IO_INPUT); 457 regmap_write(es8326->regmap, ES8326_RESET, 458 ES8326_CODEC_RESET | ES8326_PWRUP_SEQ_EN); 459 break; 460 } 461 462 return 0; 463 } 464 465 #define es8326_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 466 SNDRV_PCM_FMTBIT_S24_LE) 467 468 static const struct snd_soc_dai_ops es8326_ops = { 469 .hw_params = es8326_pcm_hw_params, 470 .set_fmt = es8326_set_dai_fmt, 471 .set_sysclk = es8326_set_dai_sysclk, 472 }; 473 474 static struct snd_soc_dai_driver es8326_dai = { 475 .name = "ES8326 HiFi", 476 .playback = { 477 .stream_name = "Playback", 478 .channels_min = 1, 479 .channels_max = 2, 480 .rates = SNDRV_PCM_RATE_8000_48000, 481 .formats = es8326_FORMATS, 482 }, 483 .capture = { 484 .stream_name = "Capture", 485 .channels_min = 1, 486 .channels_max = 2, 487 .rates = SNDRV_PCM_RATE_8000_48000, 488 .formats = es8326_FORMATS, 489 }, 490 .ops = &es8326_ops, 491 .symmetric_rate = 1, 492 }; 493 494 static void es8326_enable_micbias(struct snd_soc_component *component) 495 { 496 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 497 498 snd_soc_dapm_mutex_lock(dapm); 499 snd_soc_dapm_force_enable_pin_unlocked(dapm, "MICBIAS1"); 500 snd_soc_dapm_force_enable_pin_unlocked(dapm, "MICBIAS2"); 501 snd_soc_dapm_sync_unlocked(dapm); 502 snd_soc_dapm_mutex_unlock(dapm); 503 } 504 505 static void es8326_disable_micbias(struct snd_soc_component *component) 506 { 507 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 508 509 snd_soc_dapm_mutex_lock(dapm); 510 snd_soc_dapm_disable_pin_unlocked(dapm, "MICBIAS1"); 511 snd_soc_dapm_disable_pin_unlocked(dapm, "MICBIAS2"); 512 snd_soc_dapm_sync_unlocked(dapm); 513 snd_soc_dapm_mutex_unlock(dapm); 514 } 515 516 /* 517 * For button detection, set the following in soundcard 518 * snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE); 519 * snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOLUMEUP); 520 * snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEDOWN); 521 */ 522 static void es8326_jack_button_handler(struct work_struct *work) 523 { 524 struct es8326_priv *es8326 = 525 container_of(work, struct es8326_priv, button_press_work.work); 526 struct snd_soc_component *comp = es8326->component; 527 unsigned int iface; 528 static int button_to_report, press_count; 529 static int prev_button, cur_button; 530 531 if (!(es8326->jack->status & SND_JACK_HEADSET)) /* Jack unplugged */ 532 return; 533 534 mutex_lock(&es8326->lock); 535 iface = snd_soc_component_read(comp, ES8326_HP_DETECT); 536 switch (iface) { 537 case 0x93: 538 /* pause button detected */ 539 cur_button = SND_JACK_BTN_0; 540 break; 541 case 0x6f: 542 /* button volume up */ 543 cur_button = SND_JACK_BTN_1; 544 break; 545 case 0x27: 546 /* button volume down */ 547 cur_button = SND_JACK_BTN_2; 548 break; 549 case 0x1e: 550 /* button released or not pressed */ 551 cur_button = 0; 552 break; 553 default: 554 break; 555 } 556 557 if ((prev_button == cur_button) && (cur_button != 0)) { 558 press_count++; 559 if (press_count > 10) { 560 /* report a press every 500ms */ 561 snd_soc_jack_report(es8326->jack, cur_button, 562 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2); 563 press_count = 0; 564 } 565 button_to_report = cur_button; 566 queue_delayed_work(system_wq, &es8326->button_press_work, 567 msecs_to_jiffies(50)); 568 } else if (prev_button != cur_button) { 569 /* mismatch, detect again */ 570 prev_button = cur_button; 571 queue_delayed_work(system_wq, &es8326->button_press_work, 572 msecs_to_jiffies(50)); 573 } else { 574 /* released or no pressed */ 575 if (button_to_report != 0) { 576 snd_soc_jack_report(es8326->jack, button_to_report, 577 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2); 578 snd_soc_jack_report(es8326->jack, 0, 579 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2); 580 button_to_report = 0; 581 } 582 } 583 mutex_unlock(&es8326->lock); 584 } 585 586 static void es8326_jack_detect_handler(struct work_struct *work) 587 { 588 struct es8326_priv *es8326 = 589 container_of(work, struct es8326_priv, jack_detect_work.work); 590 struct snd_soc_component *comp = es8326->component; 591 unsigned int iface; 592 593 mutex_lock(&es8326->lock); 594 iface = snd_soc_component_read(comp, ES8326_HP_DETECT); 595 dev_dbg(comp->dev, "gpio flag %#04x", iface); 596 if ((iface & ES8326_HPINSERT_FLAG) == 0) { 597 /* Jack unplugged or spurious IRQ */ 598 dev_dbg(comp->dev, "No headset detected"); 599 if (es8326->jack->status & SND_JACK_HEADPHONE) { 600 snd_soc_jack_report(es8326->jack, 0, SND_JACK_HEADSET); 601 snd_soc_component_write(comp, ES8326_ADC1_SRC, es8326->mic2_src); 602 es8326_disable_micbias(comp); 603 } 604 } else if ((iface & ES8326_HPINSERT_FLAG) == ES8326_HPINSERT_FLAG) { 605 if (es8326->jack->status & SND_JACK_HEADSET) { 606 /* detect button */ 607 queue_delayed_work(system_wq, &es8326->button_press_work, 10); 608 } else { 609 if ((iface & ES8326_HPBUTTON_FLAG) == 0x00) { 610 dev_dbg(comp->dev, "Headset detected"); 611 snd_soc_jack_report(es8326->jack, 612 SND_JACK_HEADSET, SND_JACK_HEADSET); 613 snd_soc_component_write(comp, 614 ES8326_ADC1_SRC, es8326->mic1_src); 615 } else { 616 dev_dbg(comp->dev, "Headphone detected"); 617 snd_soc_jack_report(es8326->jack, 618 SND_JACK_HEADPHONE, SND_JACK_HEADSET); 619 } 620 } 621 } 622 mutex_unlock(&es8326->lock); 623 } 624 625 static irqreturn_t es8326_irq(int irq, void *dev_id) 626 { 627 struct es8326_priv *es8326 = dev_id; 628 struct snd_soc_component *comp = es8326->component; 629 630 if (!es8326->jack) 631 goto out; 632 633 es8326_enable_micbias(comp); 634 635 if (es8326->jack->status & SND_JACK_HEADSET) 636 queue_delayed_work(system_wq, &es8326->jack_detect_work, 637 msecs_to_jiffies(10)); 638 else 639 queue_delayed_work(system_wq, &es8326->jack_detect_work, 640 msecs_to_jiffies(300)); 641 642 out: 643 return IRQ_HANDLED; 644 } 645 646 static int es8326_resume(struct snd_soc_component *component) 647 { 648 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 649 unsigned int reg; 650 651 regcache_cache_only(es8326->regmap, false); 652 regcache_sync(es8326->regmap); 653 654 regmap_write(es8326->regmap, ES8326_CLK_CTL, ES8326_CLK_ON); 655 /* Two channel ADC */ 656 regmap_write(es8326->regmap, ES8326_PULLUP_CTL, 0x02); 657 regmap_write(es8326->regmap, ES8326_CLK_INV, 0x00); 658 regmap_write(es8326->regmap, ES8326_CLK_DIV_CPC, 0x1F); 659 regmap_write(es8326->regmap, ES8326_CLK_VMIDS1, 0xC8); 660 regmap_write(es8326->regmap, ES8326_CLK_VMIDS2, 0x88); 661 regmap_write(es8326->regmap, ES8326_CLK_CAL_TIME, 0x20); 662 regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x08); 663 regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x22); 664 regmap_write(es8326->regmap, ES8326_ADC1_SRC, es8326->mic1_src); 665 regmap_write(es8326->regmap, ES8326_ADC2_SRC, es8326->mic2_src); 666 regmap_write(es8326->regmap, ES8326_HPJACK_TIMER, 0x88); 667 regmap_write(es8326->regmap, ES8326_HP_DET, 668 ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol); 669 regmap_write(es8326->regmap, ES8326_INT_SOURCE, es8326->interrupt_src); 670 regmap_write(es8326->regmap, ES8326_INTOUT_IO, es8326->interrupt_clk); 671 regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_ON); 672 snd_soc_component_update_bits(component, ES8326_PGAGAIN, 673 ES8326_MIC_SEL_MASK, ES8326_MIC1_SEL); 674 675 regmap_read(es8326->regmap, ES8326_CHIP_VERSION, ®); 676 if ((reg & ES8326_VERSION_B) == 1) { 677 regmap_write(es8326->regmap, ES8326_ANA_MICBIAS, 0xDD); 678 regmap_write(es8326->regmap, ES8326_ANA_VSEL, 0x7F); 679 regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x0F); 680 /* enable button detect */ 681 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xA0); 682 } 683 684 es8326_irq(es8326->irq, es8326); 685 return 0; 686 } 687 688 static int es8326_suspend(struct snd_soc_component *component) 689 { 690 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 691 692 cancel_delayed_work_sync(&es8326->jack_detect_work); 693 es8326_disable_micbias(component); 694 695 regmap_write(es8326->regmap, ES8326_CLK_CTL, ES8326_CLK_OFF); 696 regcache_cache_only(es8326->regmap, true); 697 regcache_mark_dirty(es8326->regmap); 698 699 return 0; 700 } 701 702 static int es8326_probe(struct snd_soc_component *component) 703 { 704 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 705 int ret; 706 707 es8326->component = component; 708 es8326->jd_inverted = device_property_read_bool(component->dev, 709 "everest,jack-detect-inverted"); 710 711 ret = device_property_read_u8(component->dev, "everest,mic1-src", &es8326->mic1_src); 712 if (ret != 0) { 713 dev_dbg(component->dev, "mic1-src return %d", ret); 714 es8326->mic1_src = ES8326_ADC_AMIC; 715 } 716 dev_dbg(component->dev, "mic1-src %x", es8326->mic1_src); 717 718 ret = device_property_read_u8(component->dev, "everest,mic2-src", &es8326->mic2_src); 719 if (ret != 0) { 720 dev_dbg(component->dev, "mic2-src return %d", ret); 721 es8326->mic2_src = ES8326_ADC_DMIC; 722 } 723 dev_dbg(component->dev, "mic2-src %x", es8326->mic2_src); 724 725 ret = device_property_read_u8(component->dev, "everest,jack-pol", &es8326->jack_pol); 726 if (ret != 0) { 727 dev_dbg(component->dev, "jack-pol return %d", ret); 728 es8326->jack_pol = ES8326_HP_DET_BUTTON_POL | ES8326_HP_TYPE_OMTP; 729 } 730 dev_dbg(component->dev, "jack-pol %x", es8326->jack_pol); 731 732 ret = device_property_read_u8(component->dev, "everest,interrupt-src", 733 &es8326->interrupt_src); 734 if (ret != 0) { 735 dev_dbg(component->dev, "interrupt-src return %d", ret); 736 es8326->interrupt_src = ES8326_HP_DET_SRC_PIN9; 737 } 738 dev_dbg(component->dev, "interrupt-src %x", es8326->interrupt_src); 739 740 ret = device_property_read_u8(component->dev, "everest,interrupt-clk", 741 &es8326->interrupt_clk); 742 if (ret != 0) { 743 dev_dbg(component->dev, "interrupt-clk return %d", ret); 744 es8326->interrupt_clk = 0x45; 745 } 746 dev_dbg(component->dev, "interrupt-clk %x", es8326->interrupt_clk); 747 748 es8326_resume(component); 749 return 0; 750 } 751 752 static void es8326_enable_jack_detect(struct snd_soc_component *component, 753 struct snd_soc_jack *jack) 754 { 755 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 756 757 mutex_lock(&es8326->lock); 758 if (es8326->jd_inverted) 759 snd_soc_component_update_bits(component, ES8326_HP_DET, 760 ES8326_HP_DET_JACK_POL, ~es8326->jack_pol); 761 es8326->jack = jack; 762 763 mutex_unlock(&es8326->lock); 764 es8326_irq(es8326->irq, es8326); 765 } 766 767 static void es8326_disable_jack_detect(struct snd_soc_component *component) 768 { 769 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 770 771 dev_dbg(component->dev, "Enter into %s\n", __func__); 772 if (!es8326->jack) 773 return; /* Already disabled (or never enabled) */ 774 cancel_delayed_work_sync(&es8326->jack_detect_work); 775 776 mutex_lock(&es8326->lock); 777 if (es8326->jack->status & SND_JACK_MICROPHONE) { 778 es8326_disable_micbias(component); 779 snd_soc_jack_report(es8326->jack, 0, SND_JACK_HEADSET); 780 } 781 es8326->jack = NULL; 782 mutex_unlock(&es8326->lock); 783 } 784 785 static int es8326_set_jack(struct snd_soc_component *component, 786 struct snd_soc_jack *jack, void *data) 787 { 788 if (jack) 789 es8326_enable_jack_detect(component, jack); 790 else 791 es8326_disable_jack_detect(component); 792 793 return 0; 794 } 795 796 static void es8326_remove(struct snd_soc_component *component) 797 { 798 es8326_disable_jack_detect(component); 799 es8326_set_bias_level(component, SND_SOC_BIAS_OFF); 800 } 801 802 static const struct snd_soc_component_driver soc_component_dev_es8326 = { 803 .probe = es8326_probe, 804 .remove = es8326_remove, 805 .resume = es8326_resume, 806 .suspend = es8326_suspend, 807 .set_bias_level = es8326_set_bias_level, 808 .set_jack = es8326_set_jack, 809 .dapm_widgets = es8326_dapm_widgets, 810 .num_dapm_widgets = ARRAY_SIZE(es8326_dapm_widgets), 811 .dapm_routes = es8326_dapm_routes, 812 .num_dapm_routes = ARRAY_SIZE(es8326_dapm_routes), 813 .controls = es8326_snd_controls, 814 .num_controls = ARRAY_SIZE(es8326_snd_controls), 815 .use_pmdown_time = 1, 816 .endianness = 1, 817 }; 818 819 static int es8326_i2c_probe(struct i2c_client *i2c) 820 { 821 struct es8326_priv *es8326; 822 int ret; 823 824 es8326 = devm_kzalloc(&i2c->dev, sizeof(struct es8326_priv), GFP_KERNEL); 825 if (!es8326) 826 return -ENOMEM; 827 828 i2c_set_clientdata(i2c, es8326); 829 es8326->i2c = i2c; 830 mutex_init(&es8326->lock); 831 es8326->regmap = devm_regmap_init_i2c(i2c, &es8326_regmap_config); 832 if (IS_ERR(es8326->regmap)) { 833 ret = PTR_ERR(es8326->regmap); 834 dev_err(&i2c->dev, "Failed to init regmap: %d\n", ret); 835 return ret; 836 } 837 838 es8326->irq = i2c->irq; 839 INIT_DELAYED_WORK(&es8326->jack_detect_work, 840 es8326_jack_detect_handler); 841 INIT_DELAYED_WORK(&es8326->button_press_work, 842 es8326_jack_button_handler); 843 /* ES8316 is level-based while ES8326 is edge-based */ 844 ret = devm_request_threaded_irq(&i2c->dev, es8326->irq, NULL, es8326_irq, 845 IRQF_TRIGGER_RISING | IRQF_ONESHOT, 846 "es8326", es8326); 847 if (ret) { 848 dev_warn(&i2c->dev, "Failed to request IRQ: %d: %d\n", 849 es8326->irq, ret); 850 es8326->irq = -ENXIO; 851 } 852 853 es8326->mclk = devm_clk_get_optional(&i2c->dev, "mclk"); 854 if (IS_ERR(es8326->mclk)) { 855 dev_err(&i2c->dev, "unable to get mclk\n"); 856 return PTR_ERR(es8326->mclk); 857 } 858 if (!es8326->mclk) 859 dev_warn(&i2c->dev, "assuming static mclk\n"); 860 861 ret = clk_prepare_enable(es8326->mclk); 862 if (ret) { 863 dev_err(&i2c->dev, "unable to enable mclk\n"); 864 return ret; 865 } 866 return devm_snd_soc_register_component(&i2c->dev, 867 &soc_component_dev_es8326, 868 &es8326_dai, 1); 869 } 870 871 static const struct i2c_device_id es8326_i2c_id[] = { 872 {"es8326", 0 }, 873 {} 874 }; 875 MODULE_DEVICE_TABLE(i2c, es8326_i2c_id); 876 877 #ifdef CONFIG_OF 878 static const struct of_device_id es8326_of_match[] = { 879 { .compatible = "everest,es8326", }, 880 {} 881 }; 882 MODULE_DEVICE_TABLE(of, es8326_of_match); 883 #endif 884 885 #ifdef CONFIG_ACPI 886 static const struct acpi_device_id es8326_acpi_match[] = { 887 {"ESSX8326", 0}, 888 {}, 889 }; 890 MODULE_DEVICE_TABLE(acpi, es8326_acpi_match); 891 #endif 892 893 static struct i2c_driver es8326_i2c_driver = { 894 .driver = { 895 .name = "es8326", 896 .acpi_match_table = ACPI_PTR(es8326_acpi_match), 897 .of_match_table = of_match_ptr(es8326_of_match), 898 }, 899 .probe_new = es8326_i2c_probe, 900 .id_table = es8326_i2c_id, 901 }; 902 module_i2c_driver(es8326_i2c_driver); 903 904 MODULE_DESCRIPTION("ASoC es8326 driver"); 905 MODULE_AUTHOR("David Yang <yangxiaohua@everest-semi.com>"); 906 MODULE_LICENSE("GPL"); 907